CN114094998B - Device and method for detecting electrical state of electrical signal - Google Patents
Device and method for detecting electrical state of electrical signal Download PDFInfo
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- CN114094998B CN114094998B CN202210056381.XA CN202210056381A CN114094998B CN 114094998 B CN114094998 B CN 114094998B CN 202210056381 A CN202210056381 A CN 202210056381A CN 114094998 B CN114094998 B CN 114094998B
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/22—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0175—Coupling arrangements; Interface arrangements
- H03K19/017545—Coupling arrangements; Impedance matching circuits
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/01—Shaping pulses
- H03K5/08—Shaping pulses by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/22—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
- H03K5/26—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being duration, interval, position, frequency, or sequence
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Abstract
The invention discloses a detection device and a method for detecting the electrical state of an electrical signal, wherein the detection device comprises: a preprocessing circuit for preprocessing the electrical signal to be detected; a first comparison circuit for performing voltage comparison on the electric signal after being processed by the preprocessing circuit to output a first pulse signal as a comparison result; and a dynamic deglitch processing circuit for performing dynamic deglitch processing on the first pulse signal so as to determine the electrical state of the electrical signal as a valid signal or an idle signal according to the processing result. The detection device and the detection method are based on the amplitude detection principle, and can complete the rapid detection of the electrical states of the high-speed data and the low-speed data by using only one set of circuit. Further, in order to solve the problems possibly occurring in the detection process, the invention also utilizes a dynamic anti-spike pulse method to enable the final detection result to be accurate and efficient.
Description
Technical Field
The present invention relates generally to the field of signal detection. More particularly, the present invention relates to a detection apparatus and a detection method for detecting an electrical state of an electrical signal.
Background
With the progress of communication technology, more and more communication devices are applied to modern industrial production and daily life. Interfaces based on these communication devices are typically standardized so that the devices can communicate with each other according to the same protocol. For example, the USB protocol is one of widely used protocol standards. Based on the protocol, when data transmission is performed between the host and the terminal device, handshaking, negotiation, feedback, confirmation, and the like generally need to be performed, and signals of different modes and states may need to be transmitted, where the signals of the modes and states may include, for example, a valid signal and an idle signal ("e-signal"), and the like. This requires the receiving end to have the capability of detecting signals of different modes and states and to make corresponding judgments on the states of these signals.
At present, a common method for detecting the state of an electrical signal is Eidle detection, which is used for judging whether a currently transmitted signal is a valid signal or an electrical idle signal. In the prior art, there are some Eidle detection methods and devices, such as an amplitude difference detection method and an I-V square law detection method based on an MOS transistor. However, these detection methods have drawbacks and problems that are difficult to overcome. The following exemplary methods of the two Eidle detection methods in the prior art are described and analyzed for advantages and disadvantages.
One of the detection schemes in the prior art is designed based on the I-V square law characteristic of the MOS transistor, and first, a difference value of a differential input signal is taken out, and is rectified and filtered to obtain a current dc energy signal. Then, the direct current energy signal is compared with a reference voltage value, so that whether the current input signal is in an alternating current effective signal state or an idle state is judged. This detection method can detect the state of the input signal, but may be a low-speed signal, a high-speed signal, and an idle signal due to the pattern of the input signal. Therefore, the method needs to be compatible with the three modes of signals in the process of filtering the rectified signal obtained by the I-V square law characteristic, so that the low-pass cut-off frequency cannot be set too high, and finally, the detection time is too long. For example, in USB applications, the detection method cannot respond to the transmission of the shortest LFPS signal (low frequency periodic signal).
Another detection scheme in the prior art is based on an amplitude detection principle, in which the state of the input signal is a valid signal or an idle signal by directly comparing the amplitude difference of the input signal with the amplitude difference of the reference signal and performing deglitch ("deglitch") processing on the comparison result. Although this detection method can achieve fast response, it needs to process the low-speed signal and the high-speed signal separately, and then perform an or operation on the processing result. This way of processing the different signals separately obviously increases the power consumption of the hardware detection module, which is not suitable for the scenario of low power consumption applications. In summary, in the prior art, there is no method or apparatus for detecting the state of an electrical signal, which can not only achieve fast response but also reduce power consumption and circuit complexity.
Disclosure of Invention
To address one or more of the above-mentioned problems in the background art, the present invention provides a detection apparatus for detecting an electrical state of an electrical signal. The detection device firstly preprocesses an electric signal to be detected, then compares the preprocessed signal, and finally carries out filtering processing on a comparison result by utilizing a dynamic deglitch technology, thereby judging the electric state of the electric signal to be detected.
In particular, in one aspect, a detection device for detecting an electrical state of an electrical signal is disclosed. The detection device includes: a preprocessing circuit for preprocessing the electrical signal to be detected; a first comparison circuit for performing voltage comparison on the electric signal after being processed by the preprocessing circuit to output a first pulse signal as a comparison result; and a dynamic deglitch processing circuit for performing dynamic deglitch processing on the first pulse signal so as to determine the electrical state of the electrical signal as a valid signal or an idle signal according to a processing result of the dynamic deglitch processing.
In one embodiment, the pre-processing circuit comprises a coupling circuit for coupling the electrical signal to be detected so as to output the coupled electrical signal to the first comparing circuit.
In another embodiment, the pre-processing circuit further includes a buffer circuit for performing compensation amplification processing on the coupled electrical signal output by the coupling circuit so as to output a processed electrical signal to the first comparison circuit.
In yet another embodiment, the detection apparatus of the present invention further comprises a reference voltage generating circuit electrically connected to the first comparing circuit and configured to provide a reference voltage during the voltage comparison of the electrical signal by the first comparing circuit.
In one embodiment, the first comparison circuit includes: a first comparator for performing a first subtraction operation on the voltage value of the electric signal output by the preprocessing circuit and the reference voltage so as to output a second pulse signal as an operation result of the first subtraction operation; a second comparator for performing a second subtraction operation on the voltage value of the electric signal output by the preprocessing circuit and the reference voltage to output a third pulse signal as an operation result of the second subtraction operation; and an or operation circuit for performing an or operation on the second pulse signal and the third pulse signal to output the first pulse signal.
In another embodiment, the dynamic deglitch processing circuit comprises: a first deglitch processing circuit for processing the first pulse signal to determine whether the electrical signal is a valid signal or a non-valid signal; second deglitch processing circuitry for determining whether the electrical signal is an idle signal in response to the inactive signal; and a deglitch time generation circuit for generating a deglitch time for providing to the second deglitch processing circuit based on the second pulse signal to determine whether the electrical signal is an idle signal based on the deglitch time.
In yet another embodiment, the dynamic deglitch processing circuit further comprises a clock generation circuit for providing a clock signal to the dynamic deglitch processing circuit.
In one embodiment, the deglitch time generation circuit includes a counter for counting the second pulse signal to set the deglitch time according to a count result of counting the second pulse signal.
In another embodiment, the second deglitch processing circuit includes a second comparison circuit for comparing the deglitch time to the duration of the inactive signal to determine whether the electrical signal is an idle signal based on the comparison.
In another aspect, the present invention also discloses a detection method for detecting an electrical state of an electrical signal. The detection method comprises the following steps: performing a preprocessing operation on the electrical signal to be detected; performing a comparison operation on the preprocessed electrical signal in response to a result of the preprocessing operation to output a pulse signal as a comparison result; and performing dynamic deglitch processing on the pulse signal to determine whether the electrical state of the electrical signal is a valid signal or an idle signal according to a processing result.
Based on the above-mentioned aspects and embodiments, it can be seen that the detection apparatus and method of the present invention can simultaneously detect the low-speed signal and the high-speed signal with only one set of circuit. In addition, in the subsequent anti-spike pulse processing, the scheme of the invention adopts the dynamic deglitch technology, thereby automatically detecting whether the currently transmitted effective signal is a high-speed signal or a low-speed signal. On the basis, the invention provides that corresponding deglitch time is respectively configured, thereby avoiding the problem that the unified deglitch time can not be set in the signal detection process.
Drawings
The above and other objects, features and advantages of exemplary embodiments of the present invention will become readily apparent from the following detailed description read in conjunction with the accompanying drawings. In the accompanying drawings, several embodiments of the present invention are illustrated by way of example and not by way of limitation, and like reference numerals designate like or corresponding parts throughout the several views, in which:
FIG. 1 is a functional block diagram illustrating a detection device for detecting an electrical state of an electrical signal according to an embodiment of the present invention;
FIG. 2 is a detailed functional block diagram illustrating a detection device for detecting an electrical state of an electrical signal according to an embodiment of the present invention;
FIG. 3 is a flow diagram illustrating the operation of a first deglitch processing circuit according to an embodiment of the present invention;
FIG. 4 is a flow chart illustrating the principle of operation of a deglitch time generation circuit according to an embodiment of the present invention; and
fig. 5 is a flowchart illustrating a detection method for detecting an electrical state of an electrical signal according to an embodiment of the present invention.
Detailed Description
The technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. It is to be understood that the embodiments described are only a few embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Fig. 1 is a schematic block diagram illustrating a detection apparatus 100 for detecting an electrical state of an electrical signal according to an embodiment of the present invention.
As shown in fig. 1, the detection apparatus 100 for detecting an electrical state of an electrical signal of the present invention may include a preprocessing circuit 101, a first comparison circuit 102, and a dynamic deglitch processing circuit 103. Further, the preprocessing circuit is used for preprocessing the electrical signal to be detected so as to couple the input electrical signal and perform amplification compensation and other processing on the input electrical signal, so that the preprocessed electrical signal is suitable for voltage comparison. The first comparison circuit may be composed of one or more voltage comparators for performing voltage comparison on the electrical signal after being processed by the preprocessing circuit to output a first pulse signal as a comparison result. The dynamic deglitch processing circuit is used for performing dynamic deglitch processing on the first pulse signal so as to filter, compare and arrange the first pulse signal, and thus the electrical state of the input electrical signal is determined to be a valid signal state or an idle signal state according to the processing result.
Fig. 2 is a detailed functional block diagram illustrating a detection apparatus 200 for detecting an electrical state of an electrical signal according to an embodiment of the present invention. It will be appreciated that the detection apparatus 200 shown in FIG. 2 is a further refined embodiment of the detection apparatus 100 shown in FIG. 1. The description of the detection apparatus 100 in fig. 1 therefore also applies to the description of the detection apparatus 200 in fig. 2, wherein the preprocessing circuit 210, the first comparison circuit 220 and the dynamic deglitch processing circuit 230 in fig. 2 correspond to the preprocessing circuit 101, the first comparison circuit 102 and the dynamic deglitch processing circuit 103 in fig. 1, respectively.
As shown in fig. 2, the detection apparatus 200 for detecting an electrical state of an electrical signal of the present invention may include a preprocessing circuit 210, a first comparison circuit 220, a dynamic deglitch processing circuit 230, and a reference voltage generating circuit 240. Further, the preprocessing circuit may include a coupling circuit 211 and a buffering circuit 212. Specifically, the coupling circuit may include, for example, a circuit composed of an AC coupling capacitor or a transformer, which functions to isolate a direct-current component of a signal to transmit an alternating-current signal from a previous stage to a next stage, and the method of coupling may include direct coupling and transformer coupling.
Further, in order to make the operating point of the next stage in the circuit not affected by the previous stage, it is necessary to separate the dc signals of the previous stage and the next stage. Meanwhile, the alternating current signal can be smoothly transmitted from the former stage to the latter stage. In general, capacitors or transformers can be used to meet the above requirements. In contrast, when the capacitor is used for transmission, the phase of the signal is delayed; when the transformer is used for transmission, the high-frequency component of the signal is lost. In addition, when the capacitor is used for direct coupling, the adjustment of front and rear two-stage working points is complex, but the signal is ensured not to be distorted and the efficiency is highest. Therefore, in general, when a small signal is transmitted, a capacitor is often used as a coupling element; when a large signal or a strong signal is transmitted, a transformer is usually used as a coupling element.
In one embodiment, the buffer circuit of the preprocessing circuit of the present invention may include a circuit composed of a buffer. A buffer is a digital device that is used to compensate for speed differences between different data processing rates during data transmission. The buffer does not perform any operation on the input data value, and thus its output value is the same as the input value. Further, the buffer circuit is used for compensating and amplifying the electric signal processed by the coupling circuit, so as to output the compensated and amplified electric signal to the first comparison circuit. It should be noted that, according to the scheme of the present invention, the preprocessing circuit of the present invention may include a buffer circuit, or may not include a buffer circuit. When the preprocessing circuit does not include a buffer circuit, the electrical signal to be detected may be directly input to the first comparison circuit for data comparison.
In another embodiment, the first comparison circuit 220 of the present invention may include a first comparator 221, a second comparator 222, and or an operation circuit 223. Further, the first comparator is configured to perform a first subtraction operation on the voltage value of the electric signal output from the preprocessing circuit and the reference voltage to output a second pulse signal as a result of the first subtraction operation. The second comparator is configured to perform a second subtraction operation on the voltage value of the electric signal output by the preprocessing circuit and the reference voltage to output a third pulse signal as a result of the second subtraction operation. In one embodiment, the reference voltage may be generated by a reference voltage generating circuit 240, which is electrically connected to the first comparing circuit and is used for providing the reference voltage during the voltage comparison of the electrical signal by the first comparing circuit.
As a specific embodiment, the first subtraction operation may be, for example, a subtraction operation of (OUTP-OUTM) - (VREFP-VREFM) performed by the first comparator; the second subtraction operation may be, for example, a subtraction operation of (OUTP-OUTM) - (VREFP-VREFM) performed by the second comparator, where OUTP and OUTM are the preprocessed differential signals output by the buffer circuit, and VREFP and VREFM are the reference voltage values generated by the reference voltage generating circuit. Further, the operation results of the two comparators will obtain a series of PULSE signals, namely PULSE1 (second PULSE signal) and PULSE2 (third PULSE signal) shown in fig. 2. Next, the or operation circuit of the first comparison circuit of the present invention is configured to perform an or operation on the second PULSE signal and the third PULSE signal, so as to output the first PULSE signal (PULSE) to the dynamic deglitch processing circuit.
In some scenarios, for the actual input electrical signal to be detected, it may be a low-speed low-frequency periodic signal (LFPS) or a low-speed clock signal, and it may also be a high-speed Pseudo Random Binary Sequence (PRBS) signal or a high-speed clock signal. The rate and morphology of these signals will directly affect the result output by the first comparison circuit, causing the first comparison circuit to output a different PULSE signal. Further, these different pulse signals will cause the problem that the spike (deglitch) time cannot be uniformly set in the subsequent logic processing.
Specifically, if the deglitch time is set to be too short, the output result may be burred, thereby causing misjudgment of the electrical state of the electrical signal to be measured; on the other hand, if the deglitch time is set too long, on the one hand, when the high-speed valid data enters the idle state, excessive deglitch processing is formed, so that the system cannot respond quickly, thereby causing system errors, such as occurrence of trailing. On the other hand, for low-speed data transmission, the system can cooperate with the low-speed transmission in various states by using a proxy mode, so that the long deglitch time does not greatly influence the low-speed data transmission. Based on the above problems, the present invention adopts a dynamic deglitch method to automatically identify the form of the current data stream, so as to preset the required deglitch time in advance according to the form of the data stream to solve the above problems.
In one embodiment, the present invention employs a dynamic deglitch processing circuit 230 to solve the above-described problems. Specifically, the dynamic deglitch processing circuit 230 may include a first deglitch processing circuit 231, a second deglitch processing circuit 232, a deglitch time generation circuit 233, and a clock generation circuit 234. The main functions of the four circuits are briefly described below.
The first deglitch processing circuit is used for processing the first PULSE signal PULSE output by the OR operation circuit so as to determine whether the electric signal is a valid signal or a non-valid signal. The second deglitch processing circuit is responsive to the non-valid signal determined by the first deglitch processing circuit to determine whether the electrical signal is an idle signal. The clock generation circuit is used for providing a clock signal to the dynamic deglitch processing circuit. In one embodiment, the clock signal may be, for example, a low frequency asynchronous clock having a frequency of 25 MHz. Alternatively, the clock signal may be a low frequency clock other than 25 MHz.
Further, the deglitch time generation circuit is configured to generate a deglitch time for providing to the second deglitch processing circuit based on the second pulse signal output by the first comparator, so that the second deglitch processing circuit determines whether the electrical signal to be detected is an idle signal based on the deglitch time. In one embodiment, the deglitch time generation circuit may include a counter for counting the second pulse signal to set the deglitch time according to a counting result. The operation of the dynamic deglitch processing circuit of the present invention is described in detail below with reference to fig. 3 and 4.
Fig. 3 is a flow diagram illustrating a principle of operation 300 of a first deglitch processing circuit according to an embodiment of the present invention.
As shown in fig. 3, the operation principle flow 300 of the first deglitch processing circuit of the embodiment of the present invention starts at step S301. At this step, the dynamic deglitch processing circuit block is turned on so that it starts to operate. Next, at step S302, it is detected whether the current first PULSE signal PULSE is equal to 1 (whether it is judged as a valid signal beforehand). If not equal to 1, the detection is continued until an equal to 1 is detected. Therefore, the circuit function of the first anti-spike processing circuit is to further verify whether the input electrical signal to be measured is a real effective signal when the input electrical signal to be measured is pre-determined to be an effective signal, rather than being misjudged as an effective signal due to interference inside a circuit system.
Further, when it is detected that the first PULSE signal PULSE is equal to 1, the flow 300 proceeds to step S303. At this step, it is determined whether the duration of PULSE equal to 1 is greater than 2ns, or the number of rising edges of the PULSE signal is counted statistically, and then it is determined whether the number of rising edges is greater than 8, wherein the counting can be performed by a counter, for example. It should be noted that the duration 2ns in the above determination process may also be set to other different times as needed. Accordingly, the number of rising edges of the above-mentioned determination PULSE signal may also be set to other values, such as 26 or 32. In addition, the number of "rising edges" may be used as the determination criterion, or the number of "falling edges" may be used as the determination criterion.
Finally, the workflow 300 of the first deglitch processing circuit ends in step S304 or S305. Specifically, on the one hand, at step S304, if the duration of PULSE equal to 1 is determined to be greater than 2ns, or the number of rising edges of the PULSE signal is greater than 8, the current input data is considered to be a valid data stream. In response to this, the indication flag PULSE _ SEL of the active signal is set to 1. On the other hand, at step S305, if the duration of PULSE equal to 1 is determined to be less than 2ns and the number of rising edges of the PULSE signal is determined to be less than 8, it is considered that it is a false determination that the input signal is pre-determined to be a valid signal. Based on which the input signal is finally determined to be a non-valid signal. In response to this, the indication flag PULSE _ SEL of the active signal is set to 0.
Fig. 4 is a flow diagram illustrating the principle of operation 400 of a deglitch time generation circuit according to an embodiment of the present invention.
As shown in fig. 4, the operation principle flow 400 of the deglitch time generation circuit of the embodiment of the present invention starts at step S401. At this step, the dynamic deglitch processing circuit block is turned on so that it starts to operate. Next, at step S402, it is detected whether a clock rising edge arrives, wherein the clock may be generated by a clock generation circuit. In the process, if the rising edge of the clock cannot be detected, the dynamic anti-spike processing circuit module continues to detect until the rising edge of the clock signal arrives, so as to carry out the next operation. Upon detecting the arrival of the clock rising edge, the process 400 proceeds to step S403. At this step, it is detected whether the number of rising edges of the second PULSE signal PULSE1 is greater than 32. Specifically, in one clock cycle, the rising edge of the second PULSE signal PULSE1 at present may be counted by a counter to determine whether the number of rising edges of the PULSE1 signal is greater than 32, so as to determine whether the current data stream is a low-speed signal or a high-speed signal according to the determination result.
Further, based on the determination result of step S403, the flow 400 performs step S404 or performs step S405. Specifically, at step S404, if the number of rising edges of the PULSE1 signal is greater than 32, it is determined that the current data stream is a high speed signal, and the deglitch time is set to be a short deglitch time. In contrast, at step S405, if the number of rising edges of the PULSE1 signal is less than 32, it is determined that the current data stream is a low-speed signal, and the deglitch time is set as the long deglitch time.
Next, the flow 400 proceeds to step S406. At this step, it is determined whether the input signal is a non-valid signal, and step S402 or step S407 is performed according to the determination result, wherein the process of determining whether the input signal is a non-valid signal is detailed in fig. 3 with respect to the description of step S305, and is not described herein again. Further, when the input signal is determined to be a valid signal (i.e., PULSE _ SEL = 1), the process 400 returns to step S402, where the clock period window is shifted to continue to count the PULSE1 signal again. On the other hand, when the input signal is determined to be a non-valid signal (i.e., PULSE _ SEL = 0), the flow 400 ends at step S407. At this step, the deglitch time set in step S404 or step S405 is latched, so that the second deglitch processing circuit performs deglitch processing using the deglitch time, thereby implementing the dynamic deglitch function of the present invention.
In one embodiment, based on the foregoing description about the operation principle of the first deglitch processing circuit in fig. 3 and the operation principle of the deglitch time generation circuit in fig. 4, the second deglitch processing circuit of the present invention may include a second comparison circuit for comparing the deglitch time provided by the deglitch time generation circuit with the duration of the non-valid signal judged and output by the first deglitch processing circuit, so as to determine whether the input electrical signal to be detected is an idle signal according to the comparison result, thereby completing the function of detecting the electrical state of the electrical signal to be detected of the present invention. Specifically, for the idle state of the detection signal, when the duration of the non-valid signal is greater than the deglitch time after comparison and judgment, it is determined that the electrical state of the currently input electrical signal is the idle state.
Fig. 5 is a flow chart illustrating a detection method 500 for detecting an electrical state of an electrical signal according to an embodiment of the present invention.
As shown in fig. 5, the detection method 500 for detecting the electrical state of an electrical signal of the present invention starts with step S501, where a preprocessing operation is performed on the electrical signal to be detected. Further, the preprocessing operation may include coupling the electrical signal to be detected through a coupling capacitor, and filtering, compensating and amplifying the electrical signal after the coupling processing through a buffer circuit. Next, the flow of the detection method 500 of the present invention proceeds to step S502. At this step, in response to a result of the preprocessing operation, a comparison operation is performed on the preprocessed electric signal to output a pulse signal as a comparison result. Further, the performing of the comparison operation on the electric signal includes performing a first subtraction operation and a second subtraction operation on the electric signal output from the preprocessing circuit, and performing an or operation on a result of the two subtraction operations, thereby outputting the pulse signal.
Finally, the flow of the detection method 500 of the present invention ends at step S503. At this step, dynamic deglitch processing is performed on the pulse signal output at step S502 to determine whether the electrical state of the electrical signal to be detected is a valid signal state or an idle signal state according to the processing result. Specifically, in the process of performing the dynamic deglitch processing, the deglitch processing from the idle signal to the active signal is first performed to deglitch the PULSE =1 signal output from the comparator, thereby determining whether the currently input signal is the active input signal. Next, the judgment of the current data rate is made on the comparator output result PULSE1 of the half detection, so as to predict and set the deglitch time at the time of PULSE =0 in advance. And finally, deglitch processing is carried out on the PULSE _ SEL signal by using the preset anti-spike PULSE time, and LOSS _ FLAG information is updated, so that the function of confirming the electrical state of the electrical signal to be detected is completed.
Based on the above description, it can be understood that the apparatus for detecting the electrical state of an electrical signal according to the present invention can perform rapid detection of the states of electrical signals of different modes by using one set of circuit, thereby reducing the power consumption of the detection apparatus. Further, in order to solve the problems of overlong response time, signal tailing, system misjudgment and the like which may occur in the detection process, the scheme of the invention also utilizes a dynamic anti-spike pulse technology to enable the final detection result to be accurate and efficient.
It should be understood that when the terms "first", "second", "third" and "fourth" etc. are used in the description and drawings of the present invention, they are used only for distinguishing different objects and not for describing a particular order. The terms "comprises" and "comprising" when used in this specification are taken to specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It is also to be understood that the terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the specification of the present invention, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should be further understood that the term "and/or" as used in this specification refers to any and all possible combinations of one or more of the associated listed items and includes such combinations.
As used in this specification, the term "if" may be interpreted contextually as "when" or "upon" or "in response to a determination" or "in response to a detection". Similarly, the phrase "if it is determined" or "if a [ described condition or event ] is detected" may be interpreted contextually to mean "upon determining" or "in response to determining" or "upon detecting [ described condition or event ]" or "in response to detecting [ described condition or event ]".
Although the embodiments of the present invention are described above, the descriptions are only examples for facilitating understanding of the present invention, and are not intended to limit the scope and application scenarios of the present invention. It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (9)
1. A sensing device for sensing an electrical state of an electrical signal, comprising:
a preprocessing circuit for preprocessing the electrical signal to be detected;
a first comparison circuit for performing voltage comparison on the electric signal after being processed by the preprocessing circuit to output a first pulse signal as a comparison result; and
a dynamic deglitch processing circuit for performing dynamic deglitch processing on the first pulse signal to determine whether an electrical state of the electrical signal is a valid signal or an idle signal according to a processing result of the dynamic deglitch processing,
wherein the dynamic deglitch processing circuit comprises:
a first deglitch processing circuit for processing the first pulse signal to determine whether the electrical signal is a valid signal or a non-valid signal;
a deglitch time generation circuit for generating a deglitch time;
a second deglitch processing circuit for comparing the deglitch time to a duration of the non-valid signal in response to the non-valid signal to determine whether the electrical signal is an idle signal according to a comparison result.
2. The detection device according to claim 1, wherein the preprocessing circuit comprises a coupling circuit for coupling the electrical signal to be detected so as to output the coupled electrical signal to the first comparison circuit.
3. The detection device according to claim 2, wherein the preprocessing circuit further comprises a buffer circuit for performing compensation amplification processing on the coupled electrical signal output by the coupling circuit so as to output the processed electrical signal to the first comparison circuit.
4. The detection device of claim 1, further comprising a reference voltage generation circuit electrically connected to the first comparison circuit and configured to provide a reference voltage during the voltage comparison of the electrical signals by the first comparison circuit.
5. The detection device of claim 4, wherein the first comparison circuit comprises:
a first comparator for performing a first subtraction operation on the voltage value of the electric signal output by the preprocessing circuit and the reference voltage so as to output a second pulse signal as an operation result of the first subtraction operation;
a second comparator for performing a second subtraction operation on the voltage value of the electric signal output by the preprocessing circuit and the reference voltage to output a third pulse signal as an operation result of the second subtraction operation; and
an OR operation circuit for performing an OR operation on the second pulse signal and the third pulse signal so as to output the first pulse signal.
6. The detection apparatus of claim 1, wherein the dynamic deglitch processing circuit further comprises a clock generation circuit for providing a clock signal to the dynamic deglitch processing circuit.
7. The detection apparatus according to claim 5, wherein the deglitch time generation circuit includes a counter for counting the second pulse signal so as to set the deglitch time according to a result of counting the second pulse signal.
8. The detection apparatus according to claim 7, wherein the second deglitch processing circuit comprises a second comparison circuit for comparing the deglitch time with the duration of the inactive signal to determine whether the electrical signal is an idle signal based on the comparison.
9. A detection method for detecting an electrical state of an electrical signal, the detection method comprising:
performing a preprocessing operation on the electrical signal to be detected;
performing a comparison operation on the preprocessed electrical signal in response to a result of the preprocessing operation to output a pulse signal as a comparison result; and
performing dynamic deglitch processing on the pulse signal to determine whether the electrical state of the electrical signal is a valid signal or an idle signal according to a processing result,
wherein the dynamic deglitch processing comprises:
judging whether the duration time of the pulse signal with the amplitude meeting the threshold condition is greater than a first preset value or whether the edge number of the pulse signal is greater than a second preset value so as to determine whether the electric signal is a valid signal or a non-valid signal;
determining a deglitch time in response to the non-valid signal; and
comparing the deglitch time to the duration of the non-valid signal to determine whether the electrical signal is an idle signal based on the comparison.
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