CN114094955A - W-waveband high-gain low-noise amplifier circuit - Google Patents
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Abstract
The invention discloses a W-band high-gain low-noise amplifier circuit, which comprises cascaded three-stage amplification circuits, wherein the cascaded three-stage amplification circuits all adopt a cascode structure and comprise an input matching network, an input tuning inductor, a common emitter transistor, an interconnection inductor, a common base transistor, a bias decoupling capacitor and an output matching network; the input end of the input matching network is connected with an input signal, and an input tuning inductor is connected between the output end of the input matching network and the base electrode of the common emitter transistor in series; an interconnected inductor is connected in series between the collector of the common emitter transistor and the emitter of the common base transistor; the base electrode of the common base electrode transistor is connected with one end of a bias decoupling capacitor and VDD, and the other end of the bias decoupling capacitor is grounded; the collector of the common base transistor is connected with an output matching network, and the output matching network is simultaneously connected with VDD; the emitters of the common emitter transistors of the second stage and the third stage of the amplifying circuit are directly grounded, and the first stage is grounded through an emitter feedback inductor. The invention can realize high gain and low noise coefficient of W wave band.
Description
Technical Field
The invention belongs to the field of microwave integrated circuits, and particularly relates to a W-band high-gain low-noise amplifier circuit.
Background
With the rapid development of wireless communication technology, in order to solve the frequency band congestion problem and pursue high transmission rate, wireless communication frequency has been developed towards a millimeter wave direction of higher frequency. And one 'atmospheric window' 94GHz in the W wave band of 75GHz-110GHz has become a hot point of research in academia and industry due to the atmospheric attenuation characteristic, and related application fields cover the fields of satellite communication, radar, space detection, remote sensing, imaging and the like.
The lna, which is the first active module in the receiver front-end in a wireless communication system, is usually connected directly to the antenna. Due to the fact that long-distance transmission is achieved and the external environment where signal transmission is achieved is complex, signals received by the antenna are weak and interference is serious. The low noise amplifier is used for amplifying a weak radio frequency signal received from an antenna and reducing interference of input noise to the signal as much as possible, so that a receiving end keeps a higher signal-to-noise ratio (SNR) as much as possible, the integrity of the finally received signal is directly influenced by the performance of the low noise amplifier, and the low noise amplifier is of great importance to the influence of a wireless receiver system.
Therefore, how to design a low noise amplifier with low noise figure and high gain is a key issue worthy of research in the field of wireless communication.
Disclosure of Invention
In order to solve the above problems in the prior art, the present invention provides a W-band high-gain low-noise amplifier circuit. The technical problem to be solved by the invention is realized by the following technical scheme:
a W-band high-gain low-noise amplifier circuit, comprising: a cascaded three-stage amplification circuit, wherein,
each stage of amplifying circuit adopts a common-emitter common-base amplifying structure, and comprises: the circuit comprises an input matching network, an input tuning inductor, a common emitter transistor, an interconnection inductor, a common base transistor, a bias decoupling capacitor and an output matching network; the input end of the input matching network is connected with an input signal, and the input tuning inductor is connected between the output end of the input matching network and the base electrode of the common emitter transistor in series; the interconnection inductor is connected in series between the collector of the common emitter transistor and the emitter of the common base transistor; the base electrode of the common base electrode transistor is connected with one end of the bias decoupling capacitor and a power supply voltage VDD, and the other end of the bias decoupling capacitor is grounded; the collector of the common base transistor is connected with the output matching network, and the output matching network is simultaneously connected with the power supply voltage VDD; the output end of the output matching network of each stage of amplifying circuit outputs signals; the emitters of the common emitter transistors of the second-stage amplifying circuit and the third-stage amplifying circuit are directly grounded; the emitter of the common emitter transistor of the first stage amplifying circuit is grounded through an emitter feedback inductor.
In one embodiment of the present invention, the input matching network and the output matching network both use L-type matching networks.
In one embodiment of the present invention, the input matching network includes:
an input matching capacitor and an input matching inductor; one end of the input matching capacitor is connected with an input signal, the other end of the input matching capacitor is connected with one end of the input matching inductor, and the other end of the input matching inductor is connected with a bias voltage Vbias.
In one embodiment of the present invention, the output matching network includes:
an output matching inductor and an output matching capacitor; one end of the output matching inductor is connected with the power supply voltage VDD, the other end of the output matching inductor is connected with one end of the output matching capacitor and the collector of the common base transistor, and the other end of the output matching capacitor is used as the output end of the output matching network.
In one embodiment of the present invention, the output matching capacitor of the first stage amplification circuit is shared with the input matching capacitor of the second stage amplification circuit, and the output matching capacitor of the second stage amplification circuit is shared with the input matching capacitor of the third stage amplification circuit.
In one embodiment of the present invention, each input matching inductor, each output matching inductor and the emitter feedback inductor adopt a combined structure formed by a microstrip line and a coplanar waveguide.
In one embodiment of the present invention, in the combined structure, a signal line is located in the middle of a top metal layer, a top ground plane is disposed in parallel at an interval on two sides of the signal line, and the top ground plane and the signal line form a coplanar waveguide structure; the bottom layer metal is used as a bottom layer ground plane and forms a microstrip line structure with the signal line; the top ground plane and the bottom ground plane are connected by vias.
In an embodiment of the present invention, a process for manufacturing the W-band high-gain low-noise amplifier circuit includes:
130nm SiGe BiCMOS process.
In one embodiment of the present invention, the operating frequency band of the W-band high-gain low-noise amplifier circuit includes:
92GHz～96GHz。
in one embodiment of the present invention, in the operating frequency band, the best test result of the high-gain low-noise amplifier circuit in the W band includes:
S11＝-17dB；S22＝-10dB；S21＝28dB；NF＝5.2。
in the scheme provided by the embodiment of the invention, a three-stage amplification circuit cascade structure is adopted, so that the low-noise amplifier can still have higher gain under the signal attenuation of a W wave band. By adopting the input tuning inductor, the parasitic capacitance of the PN junction in the common emitter transistor can be tuned, good input matching is realized, and the linearity of the circuit is improved. The emitter feedback inductor is adopted in the first stage amplifying circuit, so that the noise can be reduced, and the linearity of the circuit can be further improved. The parasitic capacitance between the two transistors in the single-stage circuit can be eliminated by adopting the interconnected inductor, and the noise of the common base transistor is suppressed. With the bias decoupling capacitor, the parasitic inductance between the base of the common base transistor and the dc bias provided by VDD can be coupled.
Furthermore, the input and output matching networks of the embodiment of the invention all adopt L-shaped matching networks, so that the influence of unnecessary passive devices on circuit noise and loss can be reduced while the narrow-band bandwidth is ensured.
In addition, the capacitor of the radio frequency path in the embodiment of the invention also has the function of blocking direct current, and the inductor connected with a power supply is simultaneously used as a high-frequency choke coil.
And the inductors used for input and output matching and emitter feedback in the embodiment of the invention all adopt a combined structure formed by a microstrip line and a coplanar waveguide. The microstrip line can effectively prevent the electric field from entering the substrate to cause loss, the coplanar waveguide can enable the signal electric field to be concentrated between the signal line and the ground plane, the coupling of the signal electric field and the bypass passive circuit is effectively prevented, and the loss of the substrate can be further reduced.
The present invention will be described in further detail with reference to the accompanying drawings and examples.
Drawings
FIG. 1 is a schematic diagram of a conventional low noise amplifier circuit;
FIG. 2 is a schematic diagram of a W-band high-gain low-noise amplifier circuit according to an embodiment of the present invention;
fig. 3(a) and 3(b) are circuit configuration diagrams of an L-shaped input matching network and an output matching network, respectively, provided by an embodiment of the present invention;
fig. 4 is a cross-sectional structural view of a combined structure formed by a microstrip line and a coplanar waveguide provided in the embodiment of the present invention;
FIG. 5 is a schematic diagram of a specific structure of a W-band high-gain low-noise amplifier circuit according to an embodiment of the present invention;
fig. 6 is a diagram of simulation results of a high-gain low-noise amplifier circuit for the W-band of fig. 5 according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to specific examples, but the embodiments of the present invention are not limited thereto.
Referring to fig. 1, a conventional low noise amplifier circuit has a multi-stage amplification structure, and an operating frequency band is 92GHz to 96GHz, but in the operating frequency band, the gain and noise figure of the low noise amplifier circuit cannot meet the actual application requirements at the present stage. Therefore, in order to improve the performance of the W-band low noise amplifier circuit, the embodiment of the invention provides a W-band high-gain low noise amplifier circuit, as shown in fig. 2, which includes cascaded three-stage amplification circuits, wherein,
each stage of amplifying circuit adopts a common-emitter common-base amplifying structure, and comprises: the circuit comprises an input matching network, an input tuning inductor, a common emitter transistor, an interconnection inductor, a common base transistor, a bias decoupling capacitor and an output matching network.
The input end of the input matching network is connected with an input signal, and an input tuning inductor is connected between the output end of the input matching network and the base electrode of the common emitter transistor in series; an interconnected inductor is connected in series between the collector of the common emitter transistor and the emitter of the common base transistor; the base electrode of the common base electrode transistor is connected with one end of a bias decoupling capacitor and a power supply voltage VDD, and the other end of the bias decoupling capacitor is grounded; the collector of the common base transistor is connected with an output matching network, and the output matching network is simultaneously connected with a power supply voltage VDD; the output end of the output matching network of each stage of amplifying circuit outputs signals; the emitters of the common emitter transistors of the second-stage amplifying circuit and the third-stage amplifying circuit are directly grounded; the emitter of the common emitter transistor of the first stage amplifying circuit is grounded through an emitter feedback inductor.
In the embodiment of the invention, the first-stage amplifying circuit adopts minimum noise matching, and the second-stage amplifying circuit and the third-stage amplifying circuit both adopt maximum power matching. The input signal of the first stage of amplification circuit is a radio frequency signal from an antenna. The input signals of the second-stage amplifying circuit and the third-stage amplifying circuit are respectively the signals output by the output matching network of the previous-stage amplifying circuit.
For each stage of the amplifying circuit provided by the embodiment of the invention, the input matching network and the output matching network can be mutually independent, and the type can be selected according to the requirement. Specific types may include L-type, Π -type, T-type, and the like.
In the embodiment of the invention, the input tuning inductor is connected in series between the input matching capacitor and the common emitter transistor, so that the parasitic capacitance of the PN junction in the common emitter transistor can be tuned, good input matching is realized, and the linearity of the circuit is improved.
By connecting an interconnection inductor between the collector of the common emitter transistor and the emitter of the common base transistor, parasitic capacitance between the common emitter transistor and the common base transistor can be eliminated, thereby suppressing noise of the common base transistor.
And the bias decoupling capacitor is used for coupling parasitic inductance between the base of the common base transistor and the direct current bias provided by VDD.
Aiming at the first-stage amplifying circuit, the emitter feedback inductor is used for carrying out negative feedback regulation on the circuit, and the noise and the linearity of the first-stage amplifying circuit are optimized.
In the scheme provided by the embodiment of the invention, a three-stage amplification circuit cascade structure is adopted, so that the low-noise amplifier can still have higher gain under the signal attenuation of a W wave band. By adopting the input tuning inductor, the parasitic capacitance of the PN junction in the common emitter transistor can be tuned, good input matching is realized, and the linearity of the circuit is improved. The emitter feedback inductor is adopted in the first stage amplifying circuit, so that the noise can be reduced, and the linearity of the circuit can be further improved. The parasitic capacitance between the two transistors in the single-stage circuit can be eliminated by adopting the interconnected inductor, and the noise of the common base transistor is suppressed. With the bias decoupling capacitor, the parasitic inductance between the base of the common base transistor and the dc bias provided by VDD can be coupled. Therefore, a low noise amplifier circuit having a high gain and a low noise figure for the W band can be provided.
Regarding the alternative schemes of the W-band high-gain low-noise amplifier circuit of the embodiment of the present invention, specifically:
in an alternative embodiment, the input matching network and the output matching network both use L-type matching networks.
As for the input matching network, the specific structure is as shown in fig. 3(a), and the input matching network includes:
an input matching capacitor and an input matching inductor; one end of the input matching capacitor is connected with an input signal, the other end of the input matching capacitor is connected with one end of the input matching inductor, and the other end of the input matching inductor is connected with a bias voltage Vbias.
As for the output matching network, the specific structure is shown in fig. 3(b), and the output matching network includes:
an output matching inductor and an output matching capacitor; one end of the output matching inductor is connected with a power supply voltage VDD, the other end of the output matching inductor is connected with one end of the output matching capacitor and a collector of the common base transistor, and the other end of the output matching capacitor is used as an output end of the output matching network.
The input and output matching networks of the embodiment of the invention all adopt L-shaped matching networks, and the influence of unnecessary passive devices on circuit noise and loss can be reduced while the narrow-band bandwidth is ensured.
In the embodiment of the invention, the input matching network and the output matching network of each stage of amplifying circuit can be mutually independent. In an alternative embodiment, the output matching capacitor of the first stage amplifier circuit is shared with the input matching capacitor of the second stage amplifier circuit, and the output matching capacitor of the second stage amplifier circuit is shared with the input matching capacitor of the third stage amplifier circuit, so that the complexity of the circuit structure can be reduced through the sharing of the capacitors.
In an alternative embodiment, each of the input matching inductors, each of the output matching inductors, and the emitter feedback inductor adopts a combined structure formed by a microstrip line and a coplanar waveguide. Referring to fig. 4, fig. 4 is a cross-sectional structural view of a combined structure formed by a microstrip line and a coplanar waveguide according to an embodiment of the present invention. In particular, the method comprises the following steps of,
in the combined structure, a signal wire is positioned in the middle of top metal, two top ground planes are arranged on two sides of the signal wire at intervals in parallel, and the top ground planes and the signal wire form a coplanar waveguide structure; the bottom metal is used as a bottom ground plane and forms a microstrip line structure with the signal line; the top and bottom ground planes are connected by vias.
The signal lines are used to transmit various signals. The top and bottom ground planes are used to transmit ground signals.
The coplanar waveguide structure can enable a signal electric field to be mainly concentrated between the signal line and the top-layer ground plane, effectively prevent the coupling of the signal electric field and the bypass passive circuit, and reduce the signal loss of the substrate. The microstrip line structure can effectively prevent the electric field from entering the substrate to cause loss. And the top layer ground plane is connected with the bottom layer ground plane through the perforation, namely the microstrip line and the coplanar waveguide are combined for use, so that the substrate can be completely shielded, and the loss can be further reduced.
In the embodiment of the invention, the preparation process of the W-band high-gain low-noise amplifier circuit can be realized by any one of the existing processes, such as a III-V semiconductor process, a gallium arsenide (GaAs) process, an indium phosphide (InP) process and the like.
In an alternative embodiment, a process for manufacturing a W-band high-gain low-noise amplifier circuit includes: 130nm SiGe BiCMOS process (silicon germanium process).
Since Ge has a larger lattice constant than Si, and thus SiGe has a smaller energy band than Si and a larger energy band than Ge, the reduction of the energy band increases the mobility of carriers, and thus the cutoff frequency of SiGe is much higher than Si. At the same time, doping with Si also provides the same level of integration as silicon-based processes, so the cost of SiGe processes is much less than processes such as III-V compounds.
In an alternative embodiment, the operating frequency band of the W-band high-gain low-noise amplifier circuit includes: 92 GHz-96 GHz. The center frequency point is 94 GHz.
The embodiment of the present invention will be described in detail below with reference to a specific structure of a W-band high-gain low-noise amplifier circuit shown in fig. 5.
1) For the first stage of amplification circuit:
the input matching network of the first stage amplifying circuit is an L-shaped matching network formed by an input matching capacitor C1 and an input matching inductor L1 and used for carrying out minimum noise matching on the first stage amplifying circuit so as to ensure the better low-noise performance of the circuit. Specifically, one end of the input matching capacitor C1 is connected to the rf input signal IN, the other end is connected to one end of the input matching inductor L1, and the other end of the input matching inductor L1 is connected to the bias voltage Vbias for providing the optimal current density to the common emitter transistor Q1.
The input tuning inductor Lg1 is connected in series between the input matching capacitor C1 and the base of the common emitter transistor Q1 and is used for tuning the parasitic capacitance of the PN junction in the common emitter transistor Q1.
An emitter of the common emitter transistor Q1 is connected with one end of an emitter feedback inductor Ls, and the other end of the emitter feedback inductor Ls is grounded; the emitter feedback inductor Ls is used for carrying out negative feedback regulation on the circuit, and optimizing the noise and the linearity of the first-stage amplifying circuit.
An interconnection inductor Lm1 is connected in series between the collector of the common emitter transistor Q1 and the emitter of the common base transistor Q2; the interconnection inductor Lm1 is used to eliminate parasitic capacitance between the common-emitter transistor Q1 and the common-base transistor Q2, thereby suppressing noise of the common-base transistor Q2.
The base of the common base transistor Q2 is connected with one end of a bias decoupling capacitor C5, and the other end of the bias decoupling capacitor C5 is grounded; the base of common base transistor Q2 is also connected to a supply voltage VDD to provide a bias voltage to ensure optimal current density for common base transistor Q2. And a bias decoupling capacitor C5 for coupling parasitic inductance between the base of the common base transistor Q2 and dc bias.
The collector of the common base transistor Q2 is connected to the output matching network of the first stage of the amplification circuit. The output matching network consists of an output matching inductor L2 and an output matching capacitor C2 and is used for ensuring that the output impedance of the circuit can be matched with the input impedance in a conjugate mode, so that the circuit has enough gain. Specifically, the collector of the common base transistor Q2 is connected to one end of an output matching inductor L2 and one end of an output matching capacitor C2, the other end of the output matching inductor L2 is connected to the power supply voltage VDD, and the other end of the output matching capacitor C2 is used as a signal output end.
2) For the second stage of the amplifying circuit:
the input matching network of the second stage amplifying circuit is an L-shaped matching network formed by an input matching capacitor C2 (namely, an output matching capacitor C2 in the output matching network of the first stage amplifying circuit) and an input matching inductor L3, and is used for performing conjugate matching with the output impedance of the first stage amplifying circuit to ensure the optimal matching between circuit stages. Specifically, C2 is connected to one end of an input matching inductor L3, and the other end of the input matching inductor L3 is connected to a bias voltage Vbias for providing an optimal current density to the common emitter transistor Q3.
The input tuning inductor Lg2 is connected in series between the input matching capacitor C2 and the base of the common emitter transistor Q3 and is used for tuning the parasitic capacitance of the PN junction in the common emitter transistor Q3.
The emitter of the common emitter transistor Q3 is directly connected to ground. An interconnection inductor Lm2 is connected in series between the collector of the common emitter transistor Q3 and the emitter of the common base transistor Q4; the interconnection inductor Lm2 is used to eliminate parasitic capacitance between the common-emitter transistor Q3 and the common-base transistor Q4, thereby suppressing noise of the common-base transistor Q4.
The base of the common base transistor Q4 is connected with one end of a bias decoupling capacitor C6, and the other end of the bias decoupling capacitor C6 is grounded; the base of common base transistor Q4 is also connected to a supply voltage VDD to provide a bias voltage to ensure optimal current density for common base transistor Q4. And a bias decoupling capacitor C6 for coupling parasitic inductance between the base of the common base transistor Q4 and dc bias.
The collector of the common base transistor Q4 is connected to the output matching network of the second stage of the amplification circuit. The output matching network consists of an output matching inductor L4 and an output matching capacitor C3 and is used for ensuring that the output impedance of the circuit can be matched with the input impedance in a conjugate mode, so that the circuit has enough gain. Specifically, the collector of the common base transistor Q4 is connected to one end of an output matching inductor L4 and one end of an output matching capacitor C3, the other end of the output matching inductor L4 is connected to the power supply voltage VDD, and the other end of the output matching capacitor C3 is used as a signal output end.
3) For the third stage of amplification circuit:
the input matching network of the third stage of amplifying circuit is an L-shaped matching network formed by an input matching capacitor C3 (namely, an output matching capacitor C3 in the output matching network of the second stage of amplifying circuit) and an input matching inductor L5, and the L-shaped matching network is used for performing conjugate matching with the output impedance of the second stage of amplifying circuit so as to ensure the optimal matching between circuit stages. Specifically, C3 is connected to one end of the input matching inductor L5, and the other end of the input matching inductor L5 is connected to the bias voltage Vbias for providing the optimal current density to the common emitter transistor Q5.
The input tuning inductor Lg3 is connected in series between the input matching capacitor C3 and the base of the common emitter transistor Q5 and is used for tuning the parasitic capacitance of the PN junction in the common emitter transistor Q5.
The emitter of the common emitter transistor Q5 is directly connected to ground. An interconnection inductor Lm3 is connected in series between the collector of the common emitter transistor Q5 and the emitter of the common base transistor Q6; the interconnection inductor Lm3 is used to eliminate parasitic capacitance between the common-emitter transistor Q5 and the common-base transistor Q6, thereby suppressing noise of the common-base transistor Q6.
The base of the common base transistor Q6 is connected with one end of a bias decoupling capacitor C7, and the other end of the bias decoupling capacitor C7 is grounded; the base of common base transistor Q6 is also connected to a supply voltage VDD to provide a bias voltage to ensure optimal current density for common base transistor Q6. And a bias decoupling capacitor C7 for coupling parasitic inductance between the base of the common base transistor Q6 and dc bias.
The collector of the common base transistor Q6 is connected to the output matching network of the third stage of amplification circuitry. The output matching network consists of an output matching inductor L6 and an output matching capacitor C4 and is used for ensuring that the output impedance of the circuit can be matched with the input impedance in a conjugate mode, so that the circuit has enough gain. Specifically, the collector of the common base transistor Q6 is connected to one end of an output matching inductor L6 and one end of an output matching capacitor C4, the other end of the output matching inductor L6 is connected to the power supply voltage VDD, and the other end of the output matching capacitor C4 is used as a signal output end.
In the scheme provided by the embodiment of the invention, a three-stage amplification circuit cascade structure is adopted, so that the low-noise amplifier can still have higher gain under the signal attenuation of a W wave band. By adopting the input tuning inductor, the parasitic capacitance of the PN junction in the common emitter transistor can be tuned, good input matching is realized, and the linearity of the circuit is improved. The emitter feedback inductor is adopted in the first stage amplifying circuit, so that the noise can be reduced, and the linearity of the circuit can be further improved. The parasitic capacitance between the two transistors in the single-stage circuit can be eliminated by adopting the interconnected inductor, and the noise of the common base transistor is suppressed. With the bias decoupling capacitor, the parasitic inductance between the base of the common base transistor and the dc bias provided by VDD can be coupled.
Furthermore, the input and output matching networks of the embodiment of the invention all adopt L-shaped matching networks, so that the influence of unnecessary passive devices on circuit noise and loss can be reduced while the narrow-band bandwidth is ensured.
In addition, the capacitor of the radio frequency path in the embodiment of the invention also has the function of blocking direct current, and the inductor connected with a power supply is simultaneously used as a high-frequency choke coil.
And the inductors used for input and output matching and emitter feedback in the embodiment of the invention all adopt a combined structure formed by a microstrip line and a coplanar waveguide. The microstrip line can effectively prevent the electric field from entering the substrate to cause loss, the coplanar waveguide can enable the signal electric field to be concentrated between the signal line and the ground plane, the coupling of the signal electric field and the bypass passive circuit is effectively prevented, and the loss of the substrate can be further reduced.
In order to verify the specific performance of the W-band high-gain low-noise amplifier circuit provided by the embodiment of the present invention, the optimization tuning and the corresponding performance simulation are performed. Table 1 shows the optimization results of the element parameter values of the W-band high-gain low-noise amplifier circuit shown in fig. 5.
TABLE 1 optimization results of component parameter values of high-gain low-noise amplifier circuit of W band
| Component | Numerical value |
| L1 | 90pH |
| L3/L5 | 100pH |
| L2 | 64fF |
| L4/L6 | 70fF |
| Lg1/Lg2/Lg3 | 15pH |
| Lm1/Lm2/Lm3 | 10pH |
| C1 | 102fF |
| C2/C3 | 6fF |
| C4 | 8.5fF |
| Ls | 22pH |
| C5/C6/C7 | 1pH |
With the parameter values of the components in table 1, the simulation results of the W-band high-gain low-noise amplifier circuit provided by the embodiment of the invention in 90 GHz-100 GHz are shown in fig. 6. It should be noted that the simulation result of fig. 6 is a post-simulation result, parasitic parameters of all transistors used in the circuit are extracted in the Cadence IC617 by using a PEX tool, and the rest passive parts are electromagnetically simulated by using an electromagnetic simulation tool Momentum, and the result obtained by the combined simulation method is closer to the real result during chip testing.
In fig. 6, the left-hand axis represents the S parameter, the right-hand axis represents the noise figure, and each curve indicates the corresponding axis in the direction of the arrow. Five curves of S11, S22, S21, NFmin and NF are shown in fig. 6, respectively. Wherein S11 and S22 represent degrees of isolation; s21 denotes a gain; NFmin represents the noise figure value determined after the specification of the transistor and the power supply bias are determined, does not change with the value of the inductance and the capacitance, and represents the minimum value of the noise figure which can be reached without considering other factors by a system; NF represents the actual noise figure of the present solution. As can be seen from fig. 6, the best test result of the high-gain low-noise amplifier circuit in the W-band in the operating band of 92 GHz-96 GHz includes: -17dB for S11; -10dB for S22; s21 ═ 28 dB; NF 5.2. And the NF curve is close to the ideal minimum value NFmin curve, and the result shows that the high-gain low-noise amplifier circuit of the W wave band has better performance.
The best performance comparison was made between the conventional low noise amplifier circuit shown in fig. 1 and the high gain low noise amplifier circuit of the W band described above, and the results are shown in table 2.
TABLE 2 comparison of the main performance of two low noise amplifier circuits
| Contrast item | Fig. 1 shows a conventional low noise amplifier circuit | Low-noise amplifier circuit of the scheme |
| Process for the preparation of a coating | 130nm SiGe BiCMOS | 130nm SiGe BiCMOS |
| Center frequency (GHz) | 94 | 94 |
| Gain S21(dB) | 19 | 28 |
| Noise NF (dB) | 9 | 5.2 |
| Isolation S11(dB) | -11 | -17 |
| Isolation S22(dB) | -12 | -10 |
Compared with the traditional low-noise amplifier circuit, the high-gain low-noise amplifier circuit with the W waveband provided by the embodiment of the invention has higher gain and lower noise coefficient in the W waveband of 92 GHz-96 GHz, improves partial isolation and has obvious performance advantage.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples described in this specification can be combined and combined by those skilled in the art.
The foregoing is a more detailed description of the invention in connection with specific preferred embodiments and it is not intended that the invention be limited to these specific details. For those skilled in the art to which the invention pertains, several simple deductions or substitutions can be made without departing from the spirit of the invention, and all shall be considered as belonging to the protection scope of the invention.
Claims (10)
1. A W-band high-gain low-noise amplifier circuit, comprising: a cascaded three-stage amplification circuit, wherein,
each stage of amplifying circuit adopts a common-emitter common-base amplifying structure, and comprises: the circuit comprises an input matching network, an input tuning inductor, a common emitter transistor, an interconnection inductor, a common base transistor, a bias decoupling capacitor and an output matching network; the input end of the input matching network is connected with an input signal, and the input tuning inductor is connected between the output end of the input matching network and the base electrode of the common emitter transistor in series; the interconnection inductor is connected in series between the collector of the common emitter transistor and the emitter of the common base transistor; the base electrode of the common base electrode transistor is connected with one end of the bias decoupling capacitor and a power supply voltage VDD, and the other end of the bias decoupling capacitor is grounded; the collector of the common base transistor is connected with the output matching network, and the output matching network is simultaneously connected with the power supply voltage VDD; the output end of the output matching network of each stage of amplifying circuit outputs signals; the emitters of the common emitter transistors of the second-stage amplifying circuit and the third-stage amplifying circuit are directly grounded; the emitter of the common emitter transistor of the first stage amplifying circuit is grounded through an emitter feedback inductor.
2. The W-band high-gain low-noise amplifier circuit according to claim 1, wherein said input matching network and said output matching network each use an L-type matching network.
3. The W-band high-gain low-noise amplifier circuit according to claim 2, wherein said input matching network comprises:
an input matching capacitor and an input matching inductor; one end of the input matching capacitor is connected with an input signal, the other end of the input matching capacitor is connected with one end of the input matching inductor, and the other end of the input matching inductor is connected with a bias voltage Vbias.
4. The W-band high-gain low-noise amplifier circuit according to claim 3, wherein said output matching network comprises:
an output matching inductor and an output matching capacitor; one end of the output matching inductor is connected with the power supply voltage VDD, the other end of the output matching inductor is connected with one end of the output matching capacitor and the collector of the common base transistor, and the other end of the output matching capacitor is used as the output end of the output matching network.
5. The W-band high-gain low-noise amplifier circuit according to claim 4, wherein an output matching capacitor of the first stage amplifier circuit is shared with an input matching capacitor of the second stage amplifier circuit, and an output matching capacitor of the second stage amplifier circuit is shared with an input matching capacitor of the third stage amplifier circuit.
6. The W-band high-gain low-noise amplifier circuit according to claim 5, wherein each of the input matching inductors, each of the output matching inductors, and the emitter feedback inductor have a combined structure of a microstrip line and a coplanar waveguide.
7. The W-band high-gain low-noise amplifier circuit according to claim 6, wherein in the combined structure, a signal line is located in the middle of a top metal layer, a top ground plane is disposed in parallel and spaced on both sides of the signal line, and the top ground plane and the signal line form a coplanar waveguide structure; the bottom layer metal is used as a bottom layer ground plane and forms a microstrip line structure with the signal line; the top ground plane and the bottom ground plane are connected by vias.
8. The W-band high-gain low-noise amplifier circuit according to claim 1, wherein the process for manufacturing the W-band high-gain low-noise amplifier circuit comprises:
130nm SiGe BiCMOS process.
9. The W-band high-gain low-noise amplifier circuit according to claim 1, wherein an operating frequency band of the W-band high-gain low-noise amplifier circuit comprises:
92GHz～96GHz。
10. the W-band high-gain low-noise amplifier circuit according to claim 9, wherein the optimal test results of the W-band high-gain low-noise amplifier circuit in the operating frequency band include:
S11＝-17dB；S22＝-10dB；S21＝28dB；NF＝5.2。
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