CN114093290A - Display module abnormal positioning method and device, intelligent equipment and storage medium - Google Patents
Display module abnormal positioning method and device, intelligent equipment and storage medium Download PDFInfo
- Publication number
- CN114093290A CN114093290A CN202111431452.1A CN202111431452A CN114093290A CN 114093290 A CN114093290 A CN 114093290A CN 202111431452 A CN202111431452 A CN 202111431452A CN 114093290 A CN114093290 A CN 114093290A
- Authority
- CN
- China
- Prior art keywords
- load
- display module
- screen
- signal
- time sequence
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 66
- 230000002159 abnormal effect Effects 0.000 title claims description 41
- 238000001514 detection method Methods 0.000 claims abstract description 80
- 238000004088 simulation Methods 0.000 claims abstract description 39
- 230000005856 abnormality Effects 0.000 claims description 40
- 230000003287 optical effect Effects 0.000 claims description 9
- 229910044991 metal oxide Inorganic materials 0.000 claims description 3
- 150000004706 metal oxides Chemical class 0.000 claims description 3
- 239000004065 semiconductor Substances 0.000 claims description 3
- 230000003213 activating effect Effects 0.000 claims 1
- 238000012360 testing method Methods 0.000 abstract description 2
- 230000008569 process Effects 0.000 description 13
- 238000010586 diagram Methods 0.000 description 11
- 238000004590 computer program Methods 0.000 description 5
- 230000006870 function Effects 0.000 description 4
- 230000004044 response Effects 0.000 description 4
- 230000002950 deficient Effects 0.000 description 3
- 238000009659 non-destructive testing Methods 0.000 description 3
- 238000011161 development Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 230000002427 irreversible effect Effects 0.000 description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 230000004807 localization Effects 0.000 description 2
- 230000008439 repair process Effects 0.000 description 2
- 238000004891 communication Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000011835 investigation Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000012958 reprocessing Methods 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The invention discloses a method and a device for positioning abnormity of a display module, intelligent equipment and a storage medium, wherein the method comprises the following steps: detecting the received analog no-load signal; controlling and starting a simulation no-load circuit arranged between a screen time sequence control IC and a source electrode drive IC based on the simulation no-load signal; through the simulation no-load circuit, the screen timing sequence is controlled to control the IC to be in no-load; and detecting the received detection signal and outputting a detection return signal for indicating whether the screen time sequence control IC is in fault. Compared with the prior art, through setting up a simulation no-load circuit between screen sequential control IC's output and source drive IC's input for when carrying out unusual location to the display module assembly, need not to destroy the connection structure between screen sequential control IC and source drive IC and can judge whether screen sequential control IC is unusual, and based on the display module assembly that has not destroyed yet, can further detect whether other structures of display module assembly are unusual, realize the nondestructive test to the display module assembly, reduce cost optimizes the flow.
Description
Technical Field
The invention relates to the field of display module abnormity detection, in particular to a display module abnormity positioning method and device, intelligent equipment and a storage medium.
Background
Most of the conventional display modules include a display panel, a Chip On Flex (COF) connected to the display panel, wherein the COF includes a source driver ic (source driver ic), a screen timing control ic (tcon ic) connected to the COF, and a Power module Power.
In the prior art, when a display panel has a display abnormality such as a black screen, flicker, etc., a detection means is usually adopted to tear the screen timing control IC, the power module and the flip chip film apart, and detect whether a Data signal waveform output by the screen timing control IC is abnormal under a no-load condition to determine whether the display abnormality is caused by the screen timing control IC abnormality or the source drive IC abnormality. The damage caused by the detection method is irreversible, and simultaneously, the further detection and investigation of other possible fault parts of the display module are difficult to carry out.
Thus, there is still a need for improvement and development of the prior art.
Disclosure of Invention
The invention mainly aims to provide a display module abnormity positioning method, a display module abnormity positioning device, intelligent equipment and a storage medium, and aims to solve the problems that in the prior art, when a fault display module is detected, hardware needs to be damaged to detect whether a screen time sequence control IC is in fault or not, and other parts of the display module cannot be further detected under the condition of no fault.
In order to achieve the above object, a first aspect of the present invention provides a method for locating an abnormality of a display module, wherein the method includes:
detecting the received analog no-load signal;
controlling and starting a simulation no-load circuit arranged between a screen time sequence control IC and a source electrode drive IC based on the simulation no-load signal;
through the simulation no-load circuit, the screen timing sequence is controlled to control the IC to be in no-load;
and detecting the received detection signal and outputting a detection return signal for indicating whether the screen time sequence control IC is in fault.
Optionally, the step of detecting that the analog idle signal is received includes:
a no-load circuit for simulating no-load of the screen sequential control IC is arranged between the output end of the screen sequential control IC and the input end of the source drive IC in advance.
Optionally, the step of controlling and starting the analog no-load circuit arranged between the screen timing control IC and the source driver IC based on the analog no-load signal includes:
inputting the analog no-load signal to an input end of the analog no-load circuit;
and starting a simulation no-load circuit arranged between the output end of the screen time sequence control IC and the input end of the source electrode drive IC based on the input simulation no-load signal.
Optionally, the step of controlling the screen timing control IC to be idle by the analog idle circuit includes:
and the connection between the output end of the screen time sequence control IC and the input end of the source electrode drive IC is disconnected through the simulation no-load circuit, so that the screen time sequence control IC is in a no-load state.
Optionally, after the step of detecting that the detection signal is received and outputting a detection return signal indicating whether the screen timing control IC has a fault, the method includes:
judging whether the screen timing control IC is normal or not based on the detection return signal;
when the detected return signal waveform is the same as a preset normal waveform, judging that the screen time sequence control IC is normal;
and when the detected return signal waveform is different from a preset normal waveform, judging that the screen time sequence control IC has a fault.
Optionally, after the step of detecting that the detection signal is received and outputting a detection return signal indicating whether the screen timing control IC has a fault, the method further includes:
when the screen time sequence control IC is judged to be normal;
further detecting that the bonding area is not damaged through OM optical equipment;
and separating the source driving IC from the display panel, and judging whether the source driving IC and the display panel have faults or not by detecting the waveform of the output signal of the source driving IC.
The second aspect of the present invention provides an analog no-load circuit, which includes:
the analog no-load signal input end is connected with the screen timing sequence control IC;
and the switch group comprises a plurality of MOS (metal oxide semiconductor) tubes, the base electrode of each MOS tube is connected with the input end of the analog no-load signal, the source electrode of each MOS tube is connected with the output end of the screen time sequence control IC, and the drain electrode of each MOS tube is connected with the input end of the source electrode drive IC.
The third aspect of the present invention provides a device for locating an abnormality of a display module, wherein the device comprises:
the analog no-load signal receiving module is used for detecting the received analog no-load signal;
the analog no-load circuit starting module is used for controlling and starting an analog no-load circuit arranged between the screen time sequence control IC and the source electrode driving IC based on the analog no-load signal;
the screen time sequence control IC no-load control module is used for controlling the screen time sequence control IC to be in no-load through the simulation no-load circuit;
and the detection signal output module is used for detecting the received detection signal and outputting a detection return signal for indicating whether the screen time sequence control IC has a fault or not.
A fourth aspect of the present invention provides an intelligent device, where the intelligent device includes a memory, a processor, and a display module exception positioning program that is stored in the memory and is executable on the processor, and the display module exception positioning program implements any one of the display module exception positioning methods when executed by the processor.
A fifth aspect of the present invention provides a storage medium, where a display module abnormality positioning program is stored in the storage medium, and the display module abnormality positioning program is executed by a processor to implement any one of the steps of the display module abnormality positioning method.
Therefore, in the scheme of the invention, the received analog no-load signal is detected; controlling and starting a simulation no-load circuit arranged between a screen time sequence control IC and a source electrode drive IC based on the simulation no-load signal; through the simulation no-load circuit, the screen timing sequence is controlled to control the IC to be in no-load; and detecting the received detection signal and outputting a detection return signal for indicating whether the screen time sequence control IC is in fault. Compared with the prior art, the invention has the advantages that the no-load simulation circuit is arranged between the output end of the screen time sequence control IC and the input end of the source electrode drive IC, so that the no-load condition of the screen time sequence control IC can be simulated without destroying the connection structure between the screen time sequence control IC and the source electrode drive IC when the display module is abnormally positioned, the abnormal positioning of the display module is facilitated, and whether other structures of the display module are abnormal can be further detected based on the undamaged display module, the nondestructive detection of the display module is facilitated, the cost is reduced, and the more perfect abnormal positioning process of the display module is realized.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.
FIG. 1 is a schematic circuit diagram of an analog no-load circuit provided by an embodiment of the present invention;
fig. 2 is a schematic flow chart illustrating a method for locating an abnormality of a display module according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a 32HD driver architecture according to an embodiment of the invention;
FIG. 4 is a schematic diagram of an analog idle circuit disposed between a panel timing control IC and a source driver IC according to an embodiment of the present invention;
FIG. 5 is a flowchart illustrating the implementation of step S200 in FIG. 2;
FIG. 6 is a flowchart illustrating the implementation of step S300 in FIG. 2;
FIG. 7 is a schematic waveform diagram illustrating an abnormal display of the off-screen timing control IC of the display module according to the embodiment of the present invention;
FIG. 8 is a waveform diagram illustrating an abnormal display lower screen timing control IC of the display module according to an embodiment of the present invention;
fig. 9 is a schematic view of a specific process of performing exception positioning by the display module exception positioning method according to the embodiment of the present invention;
FIG. 10 is a schematic flow chart of the method for abnormal localization of COF/bonding/panel based on an undamaged sample according to an embodiment of the present invention;
fig. 11 is a schematic structural diagram of an abnormal positioning device of a display module according to an embodiment of the present invention;
fig. 12 is a schematic block diagram of an internal structure of an intelligent device according to an embodiment of the present invention.
Detailed Description
In the following description, for purposes of explanation and not limitation, specific details are set forth, such as particular system structures, techniques, etc. in order to provide a thorough understanding of the embodiments of the invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present invention with unnecessary detail.
It will be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It is also to be understood that the terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the specification of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It should be further understood that the term "and/or" as used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.
As used in this specification and the appended claims, the term "if" may be interpreted contextually as "when …" or "upon" or "in response to a determination" or "in response to a detection". Similarly, the phrase "if it is determined" or "if a [ described condition or event ] is detected" may be interpreted depending on the context to mean "upon determining" or "in response to determining" or "upon detecting [ described condition or event ]" or "in response to detecting [ described condition or event ]".
The technical solutions in the embodiments of the present invention are clearly and completely described below with reference to the drawings of the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention, but the present invention may be practiced in other ways than those specifically described and will be readily apparent to those of ordinary skill in the art without departing from the spirit of the present invention, and therefore the present invention is not limited to the specific embodiments disclosed below.
Along with the development of science and technology and the improvement of people's standard of living, the display effect of equipment such as TV, cell-phone, computer is better and better, but the appearance of new technology is often along with unknown trouble and risk, how to reduce the fault rate of screen display module assembly, reprocess the rate, perfect and optimize the detection procedure of reprocessing the in-process, just become a big important problem in display module assembly field.
In the prior art, when a screen timing control IC (integrated circuit) in a display module needs to be analyzed to determine whether a failure occurs, a connection structure between the screen timing control IC and a source driver IC is often damaged, so that the screen timing control IC is placed in an empty load state to detect an output signal waveform.
In order to solve the problems of the prior art, in the scheme of the invention, the received analog no-load signal is detected; controlling and starting a simulation no-load circuit arranged between a screen time sequence control IC and a source electrode drive IC based on the simulation no-load signal; through the simulation no-load circuit, the screen timing sequence is controlled to control the IC to be in no-load; and detecting the received detection signal and outputting a detection return signal for indicating whether the screen time sequence control IC is in fault. Compared with the prior art, the invention has the advantages that the no-load simulation circuit is arranged between the output end of the screen time sequence control IC and the input end of the source electrode drive IC, so that the no-load condition of the screen time sequence control IC can be simulated without destroying the connection structure between the screen time sequence control IC and the source electrode drive IC when the display module is abnormally positioned, the abnormal positioning of the display module is facilitated, and whether other structures of the display module are abnormal can be further detected based on the undamaged display module, the nondestructive detection of the display module is facilitated, the cost is reduced, and the more perfect abnormal positioning process of the display module is realized.
Exemplary Structure
As shown in fig. 1, in this embodiment, an analog no-load circuit is provided, which specifically includes:
the analog no-load signal input end is connected with the screen timing sequence control IC;
and the switch group comprises a plurality of MOS (metal oxide semiconductor) tubes, the base electrode of each MOS tube is connected with the input end of the analog no-load signal, the source electrode of each MOS tube is connected with the output end of the screen time sequence control IC, and the drain electrode of each MOS tube is connected with the input end of the source electrode drive IC.
Therefore, the analog no-load circuit controls the switch states of all the MOS tubes through Input _ enable (an Input enable end or an Input end of the analog no-load circuit), further controls the communication relation between the output end of the screen time sequence control IC and the Input end of the source drive IC, and can realize the effect of the analog screen time sequence control IC no-load.
Exemplary method
As shown in fig. 2, an embodiment of the present invention provides a method for locating an abnormality of a display module, and specifically, the method includes the following steps:
s100, detecting that a received simulation no-load signal is received;
in this embodiment, the display module receives the simulated no-load signal through an input end of the display module, or receives the simulated no-load signal through an input end detection of a screen sequential control IC according to different specific display module structures.
S200, controlling and starting a simulated no-load circuit arranged between a screen time sequence control IC and a source electrode drive IC based on the simulated no-load signal;
in this embodiment, the display module controls and starts a dummy idle circuit disposed between the screen timing control IC and the source driver IC based on the dummy idle signal. Furthermore, based on different display module structures, the analog no-load circuit can be started and controlled through a single IC, and the control can also be performed through an IC with the existing structure, for example, a certain output end of a screen time sequence control IC is used for starting and controlling the analog no-load circuit. The analog no-load circuit can be conveniently carried in display modules with different structures and the abnormal positioning method of the display module can be used.
Step S300, controlling a screen time sequence control IC to be in idle load through the simulation idle load circuit;
in this embodiment, the display module controls the screen timing control IC to be in the idle state through the simulated idle circuit, specifically includes that the simulated idle circuit simulates to disconnect the connection between the output end of the screen timing control IC and the input end of the source drive IC, so that the screen timing control IC is in the idle state. The screen sequential control IC is placed in an idle state on the premise of not damaging the structure of the display module, so that the aim of nondestructive testing is fulfilled.
And step S400, detecting the received detection signal and outputting a detection return signal for indicating whether the screen time sequence control IC is in fault.
In this embodiment, after the screen timing control IC simulates no-load, when the display module receives a detection signal for the screen timing control IC, the screen timing control IC outputs a detection return signal according to the input detection signal, where the detection return signal is used to indicate whether the screen timing control IC has a fault, and specifically, when the detection return signal has the same waveform as a preset normal detection return signal, it is determined that the screen timing control IC is normal; and when the detection return signal is different from a preset normal detection return signal waveform, judging that the screen time sequence control IC is abnormal. Based on the not destroyed display module structure, it can further detect whether other structures in the display module are abnormal, such as whether the display module connection structure has dirt, scratch, etc., whether the source driving IC is abnormal and whether the display panel itself is abnormal, etc. Therefore, the method can not only ensure that the screen sequential control IC is subjected to fault detection on the basis of not damaging the structure of the display panel, but also be convenient for further determining other fault problems of the display module.
As can be seen from the above, the display module anomaly positioning method provided by the embodiment of the invention detects that a simulated no-load signal is received; controlling and starting a simulation no-load circuit arranged between a screen time sequence control IC and a source electrode drive IC based on the simulation no-load signal; through the simulation no-load circuit, the screen timing sequence is controlled to control the IC to be in no-load; and detecting the received detection signal and outputting a detection return signal for indicating whether the screen time sequence control IC is in fault. Compared with the prior art, the analog no-load circuit is additionally arranged between the screen time sequence control IC and the source electrode driving IC of the display module, and the analog no-load circuit is used for simulating that the screen time sequence control IC is in an no-load state. The output signal of the no-load screen time sequence control IC is obtained on the premise of not damaging the structure of the display module, and whether the screen time sequence control IC is in fault or not is further judged through the waveform of the output signal. The problems that in the prior art, when the screen sequential control IC fault is detected, a connection structure between the screen sequential control IC and a source electrode drive IC needs to be damaged, the process is complex, and the cost is high are solved. The display module manufacturer can optimize the repair process of the display module and control the cost conveniently.
Specifically, as shown in fig. 3, the method for locating the abnormality of the display module in this embodiment is explained by taking the open cell (liquid crystal) driving structure of the 32HD in this embodiment as an example, and the abnormality of the display module in this embodiment is represented by a flicker in a display screen. When the display module is of other driving structures, the specific scheme in this embodiment can be referred to.
In one application scenario, detecting a received analog no-load signal;
specifically, the step of detecting the received analog no-load signal includes:
a no-load circuit for simulating no-load of the screen sequential control IC is arranged between the output end of the screen sequential control IC and the input end of the source drive IC in advance.
For example, as shown in fig. 4, a dummy idle circuit (Block a) is arranged in advance between an output terminal of a screen timing control IC (tcon IC) and an Input terminal of a source driver IC (source driver), one end of the dummy idle circuit is connected to the output terminal of the screen timing control IC, and the other corresponding end is connected to the Input terminal of the source driver IC, wherein the dummy idle circuit is connected to the screen timing control IC through an Input _ enable Input enable terminal, that is, the dummy idle circuit can be controlled to operate through the screen timing control IC.
Further, based on the driving architecture in this embodiment, the display panel receives the analog no-load signal through the screen timing control IC.
In an application scenario, the analog no-load circuit is controlled to be started based on the acquired analog no-load signal.
Specifically, as shown in fig. 5, the step S200 includes:
step S201, inputting the simulation no-load signal to the input end of the simulation no-load circuit;
step S202, starting a simulation no-load circuit arranged between the output end of the screen time sequence control IC and the input end of the source electrode drive IC based on the input simulation no-load signal.
For example, after the screen timing control IC receives the analog no-load signal, the analog no-load signal is input to the analog no-load circuit through an input enable terminal, i.e., the analog no-load signal input terminal. And based on the received analog no-load signal, the analog no-load circuit arranged between the output end of the screen time sequence control IC and the input end of the source electrode drive IC is started.
In an application scenario, the display module controls the screen timing sequence to control the IC to be in an idle state through the simulation idle circuit.
Specifically, as shown in fig. 6, the step S300 includes:
and S301, disconnecting the output end of the screen time sequence control IC from the input end of the source drive IC through the simulated no-load circuit, so that the screen time sequence control IC is in a no-load state.
For example, referring to fig. 1, the analog no-load circuit is composed of a plurality of MOS transistors, bases of the MOS transistors are connected to an input terminal of the analog no-load circuit, and sources and drains of the MOS transistors are respectively connected to an output terminal of the screen timing control IC and an input terminal of the source drive IC. When the input end of the analog no-load circuit is at a high level, the source electrode and the drain electrode of the MOS tube are conducted, namely the screen time sequence control IC is connected with the source electrode drive IC, and when the input end of the analog no-load circuit is at a low level, the source electrode and the drain electrode of the MOS tube are disconnected, namely the screen time sequence control IC is equivalent to the fact that the screen time sequence control IC is disconnected with the source electrode drive IC, and the screen time sequence control IC is in an no-load state. The method simulates the load shedding condition of the screen time sequence control IC, and avoids the problem of irreversible damage to the display module caused by the abnormality of the screen time sequence control IC.
In an application scenario, when the display module receives a detection signal for detecting a screen timing control IC, the screen timing control IC outputs a detection return signal.
Specifically, referring to fig. 4, each input terminal of the screen timing control IC has a detection point (testing pad), and after the display module receives a detection signal, the detection point measures the waveform of the output signal at each output terminal. Based on the detection return signal, whether the screen timing control IC is normal is judged, when the detection return signal waveform is the same as the preset normal waveform, the screen timing control IC is judged to be normal, when the detection return signal waveform is different from the preset normal waveform, the screen timing control IC is judged to have a fault, and fig. 7 and 8 are respectively waveform schematic diagrams of display module abnormal display, no abnormality of the screen timing control IC and abnormality of the screen timing control IC, wherein an ST signal is a scanning signal of the display panel, and COF input can be understood as source driving IC input.
Further, after the step of detecting that the detection signal is received and outputting a detection return signal indicating whether the panel timing control IC is malfunctioning, the method further includes: when the screen time sequence control IC is judged to be normal, the OM optical equipment is further used for detecting that the bonding area is not damaged, the source drive IC is separated from the display panel, and whether the source drive IC and the display panel are in fault or not is judged by detecting the output signal waveform of the source drive IC. The OM optical equipment is used for amplifying and detecting whether a circuit microstructure is dirty or damaged; the bonding is a line connection method and structure used in the electronic field.
For example, when the screen timing control IC is judged to be normal by the detection of the return signal waveform, based on the display module that has not been damaged, it is possible to further investigate and position whether other devices, modules, and structures are damaged. Referring to fig. 3, for example, the display module is placed under the OM optical device, and it is checked whether the connection structure between the bonding area a and the bonding area B is abnormal in display due to dirt or damage. When the OM optical equipment does not detect that the dirt or the abnormality exists, the abnormality is further determined to be a circuit behind the source drive IC, wherein the circuit comprises the source drive IC and the display panel, the source drive IC and the display panel are disconnected, whether the output signal waveform of the source drive IC is the same as the preset output signal waveform is detected, if so, the source drive IC is judged to be normal, and the display panel is abnormal; and if the difference is not the same, judging that the source electrode driving IC is abnormal. Therefore, after the screen time sequence control IC is detected by the method, the subsequent bonding area, the source electrode drive IC and the display panel can be further detected conveniently.
In the embodiment of the present invention, the method for locating an abnormality of a display module according to the present invention is further specifically described based on a scenario, and fig. 9 is a schematic view of a specific process for locating an abnormality by using the method for locating an abnormality of a display module according to the present invention, where the method includes:
step S10, start, proceed to step S11;
step S11, detecting the Data waveform of the defective product, and entering step S12;
step S12, comparing the waveform of the defective product with the waveform of the OK sample, confirming whether the waveform is OK, if so, entering step S16, otherwise, entering step S13;
step S13, the TCON pulls down the Input _ enable pin, the Source driver inputs disable, and the step S14 is entered;
step S14, measuring the Data waveform under the no-load condition, confirming whether the waveform is OK, if yes, entering step S17, otherwise entering step S15;
step S15, entering step S20 for the Data output channel NG corresponding to the TCON IC;
step S16, confirm Power NG, go to step S20;
step S17, confirming the NG is COF/binding/panel, etc., and proceeding to step S18;
step S18, the sample is not damaged, the analysis can be continued, and the step S20 is entered;
and step S20, end.
It can be seen from the above that, when a certain display module sample enters a detection process, a first detection signal is Input first, and a first Data signal is obtained from an output end of a TCON, i.e., a screen timing control IC in the previous embodiment, by comparing a waveform of the first Data signal with a waveform of a normal sample, when the waveform is confirmed to be normal, Power, i.e., a Power supply module, is considered to be abnormal, when the waveform is abnormal, an Input _ enable pin is further pulled down through the TCON, so that a Source driver, i.e., a Source drive IC Input, is disconnected, and whether a second Data waveform output by the screen timing control IC under no-load condition is normal is detected, if so, it is judged that the display module abnormality is caused by NG of COF/bonding/panel, etc., and when the sample is not damaged, COF/bonding/panel can be further analyzed through other analysis processes; if not, judging that the Data output channel corresponding to the screen time sequence control IC is abnormal, and finishing the analysis.
Further, as shown in fig. 10, a specific flow chart for COF/bonding/panel abnormality localization based on an undamaged sample is shown, which comprises the following steps:
step S30, start, proceed to step S31;
step S31, confirming that the display module is abnormal caused by COF/bonding/panel, and entering step S32;
step S32, checking whether the bonding area is abnormal under OM optical equipment, if yes, going to step S36, and if not, going to step S33;
step S33, private COF, detecting source output signal waveform of V _ block area under COF without panel, and entering step S34;
step S34, comparing the waveform with the waveform of the OK display area, if the waveform is the same, the step S37 is executed, and if the waveform is different, the step S35 is executed;
step S35, determining that the display abnormality is caused by COF failure, and the process proceeds to step S40;
step S36, determining that the bad is the display abnormal caused by the binding abnormal, and entering step S40;
step S37, determining that the failure is caused by panel, and proceeding to step S40;
and step S40, end.
As can be seen from the above, when the defective product is determined to be caused by COF/bonding/panel, the OM optical device is further used to check whether the bonding area is abnormal, if so, the abnormal is determined to be caused by the bonding area, if not, the COF is further torn down, and a signal waveform of source output (source output) of the area where the V _ block is located under the condition that the COF does not have the panel is obtained, where the COF is a structure used by a source driver IC in the previous embodiment of the package and can be regarded as the source driver IC for understanding, the panel is a display panel, the V _ block is a damaged area in the panel, and the source output of the area where the V _ block is located corresponds to the source driver IC output end for managing pixel display at the V _ block. And comparing the source output signal waveform of the abnormal position with the source output signal waveform corresponding to the display normal area, judging that the display abnormality is caused by the display panel when the source output signal waveform of the abnormal position is the same as the source output signal waveform of the display normal area, and judging that the display abnormality is caused by COF (chip on film) or source drive IC abnormality when the source output signal waveform of the abnormal position is different from the source output signal waveform of the display normal area.
Therefore, the nondestructive testing of the screen time sequence control IC can be realized by the method, the COF/bonding/panel can be further positioned abnormally based on the undamaged bad sample, and the cost is saved while the repairing step is optimized.
Exemplary device
As shown in fig. 11, an embodiment of the present invention further provides a display module anomaly positioning device corresponding to the display module anomaly positioning method, where the display module anomaly positioning device includes:
an analog no-load signal receiving module 1110, configured to detect that an analog no-load signal is received;
in this embodiment, the display module receives the simulated no-load signal through an input end of the display module, or receives the simulated no-load signal through an input end detection of a screen sequential control IC according to different specific display module structures.
A simulated no-load circuit starting module 1120, configured to control and start a simulated no-load circuit arranged between the screen timing control IC and the source driver IC based on the simulated no-load signal;
in this embodiment, the display module controls and starts a dummy idle circuit disposed between the screen timing control IC and the source driver IC based on the dummy idle signal. Furthermore, based on different display module structures, the analog no-load circuit can be started and controlled through a single IC, and the control can also be performed through an IC with the existing structure, for example, a certain output end of a screen time sequence control IC is used for starting and controlling the analog no-load circuit. The analog no-load circuit can be conveniently carried in display modules with different structures and the abnormal positioning method of the display module can be used.
A screen timing control IC no-load control module 1130, configured to control the screen timing control IC to be in no-load through the simulated no-load circuit;
in this embodiment, the display module controls the screen timing control IC to be in the idle state through the simulated idle circuit, specifically includes that the simulated idle circuit simulates to disconnect the connection between the output end of the screen timing control IC and the input end of the source drive IC, so that the screen timing control IC is in the idle state. The screen sequential control IC is placed in an idle state on the premise of not damaging the structure of the display module, so that the aim of nondestructive testing is fulfilled.
And a detection signal output module 1140, configured to detect that the detection signal is received, and output a detection return signal indicating whether the screen timing control IC is faulty.
In this embodiment, after the screen timing control IC simulates no-load, when the display module receives a detection signal for the screen timing control IC, the screen timing control IC outputs a detection return signal according to the input detection signal, where the detection return signal is used to indicate whether the screen timing control IC has a fault, and specifically, when the detection return signal has the same waveform as a preset normal detection return signal, it is determined that the screen timing control IC is normal; and when the detection return signal is different from a preset normal detection return signal waveform, judging that the screen time sequence control IC is abnormal. Based on the not destroyed display module structure, it can further detect whether other structures in the display module are abnormal, such as whether the display module connection structure has dirt, scratch, etc., whether the source driving IC is abnormal and whether the display panel itself is abnormal, etc. Therefore, the method can not only ensure that the screen sequential control IC is subjected to fault detection on the basis of not damaging the structure of the display panel, but also be convenient for further determining other fault problems of the display module.
As can be seen from the above, the method for locating an abnormality of a display module according to the embodiment of the present invention detects that a simulated no-load signal is received through the simulated no-load signal receiving module 1110; through the analog no-load circuit starting module 1120, based on the analog no-load signal, a analog no-load circuit arranged between a screen time sequence control IC and a source electrode driving IC is controlled and started; the screen timing control IC no-load control module 1130 controls the screen timing control IC to be in no-load through the analog no-load circuit; the detection signal output module 1140 detects the received detection signal and outputs a detection return signal indicating whether the screen timing control IC is faulty. Compared with the prior art, the analog no-load circuit is additionally arranged between the screen time sequence control IC and the source electrode driving IC of the display module, and the analog no-load circuit is used for simulating that the screen time sequence control IC is in an no-load state. The output signal of the no-load screen time sequence control IC is obtained on the premise of not damaging the structure of the display module, and whether the screen time sequence control IC is in fault or not is further judged through the waveform of the output signal. The problems that in the prior art, when the screen sequential control IC fault is detected, a connection structure between the screen sequential control IC and a source electrode drive IC needs to be damaged, the process is complex, and the cost is high are solved. The display module manufacturer can optimize the repair process of the display module and control the cost conveniently.
Specifically, in this embodiment, the specific functions of each module of the display module abnormality positioning apparatus may refer to the corresponding descriptions in the display module abnormality positioning method, and are not described herein again.
Based on the above embodiments, the present invention further provides an intelligent device, and a schematic block diagram thereof may be as shown in fig. 12. The intelligent device comprises a processor, a memory, a network interface and a display screen which are connected through a system bus. Wherein the processor of the smart device is configured to provide computing and control capabilities. The memory of the intelligent device comprises a nonvolatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a display module abnormality positioning program. The internal memory provides an environment for the operation of an operating system and an abnormal positioning program of the display module in the nonvolatile storage medium. The network interface of the intelligent device is used for connecting and communicating with an external terminal through a network. When being executed by the processor, the display module abnormity positioning program realizes the steps of any display module abnormity positioning method. The display screen of the intelligent device can be a liquid crystal display screen or an electronic ink display screen.
It will be understood by those skilled in the art that the block diagram of fig. 12 is a block diagram of only a portion of the structure associated with the inventive arrangements and is not intended to limit the smart devices to which the inventive arrangements may be applied, and that a particular smart device may include more or less components than those shown, or may combine certain components, or have a different arrangement of components.
In one embodiment, an intelligent device is provided, where the intelligent device includes a memory, a processor, and a display module exception positioning program stored in the memory and executable on the processor, and the display module exception positioning program performs the following operation instructions when executed by the processor:
detecting the received analog no-load signal;
controlling and starting a simulation no-load circuit arranged between a screen time sequence control IC and a source electrode drive IC based on the simulation no-load signal;
through the simulation no-load circuit, the screen timing sequence is controlled to control the IC to be in no-load;
and detecting the received detection signal and outputting a detection return signal for indicating whether the screen time sequence control IC is in fault.
The embodiment of the invention also provides a storage medium, wherein the storage medium is stored with a display module abnormity positioning program, and the display module abnormity positioning program is executed by a processor to realize the steps of any display module abnormity positioning method provided by the embodiment of the invention.
It should be understood that, the sequence numbers of the steps in the foregoing embodiments do not imply an execution sequence, and the execution sequence of each process should be determined by its function and inherent logic, and should not constitute any limitation to the implementation process of the embodiments of the present invention.
It will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-mentioned division of the functional units and modules is illustrated, and in practical applications, the above-mentioned functions may be distributed as different functional units and modules according to needs, that is, the internal structure of the apparatus may be divided into different functional units or modules to implement all or part of the above-mentioned functions. Each functional unit and module in the embodiments may be integrated in one processing unit, or each unit may exist alone physically, or two or more units are integrated in one unit, and the integrated unit may be implemented in a form of hardware, or in a form of software functional unit. In addition, specific names of the functional units and modules are only for convenience of distinguishing from each other, and are not used for limiting the protection scope of the present invention. The specific working processes of the units and modules in the system may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
In the above embodiments, the descriptions of the respective embodiments have respective emphasis, and reference may be made to the related descriptions of other embodiments for parts that are not described or illustrated in a certain embodiment.
Those of ordinary skill in the art would appreciate that the elements and algorithm steps of the examples described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
In the embodiments provided in the present invention, it should be understood that the disclosed apparatus/terminal device and method may be implemented in other ways. For example, the above-described embodiments of the apparatus/terminal device are merely illustrative, and for example, the division of the above modules or units is only one logical division, and the actual implementation may be implemented by another division, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed.
The integrated modules/units described above may be stored in a storage medium if implemented in the form of software functional units and sold or used as separate products. Based on such understanding, all or part of the flow in the method according to the embodiments of the present invention may also be implemented by a computer program, which may be stored in a storage medium and executed by a processor, to instruct related hardware to implement the steps of the above-described embodiments of the method. The computer program includes computer program code, and the computer program code may be in a source code form, an object code form, an executable file or some intermediate form. The computer readable medium may include: any entity or device capable of carrying the above-mentioned computer program code, recording medium, usb disk, removable hard disk, magnetic disk, optical disk, computer Memory, Read-Only Memory (ROM), Random Access Memory (RAM), electrical carrier wave signal, telecommunication signal, software distribution medium, etc. It should be noted that the contents contained in the storage medium may be increased or decreased as appropriate according to the requirements of legislation and patent practice in the jurisdiction.
The above-mentioned embodiments are only used for illustrating the technical solutions of the present invention, and not for limiting the same; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those skilled in the art; the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the embodiments of the present invention, and they should be construed as being included therein.
Claims (10)
1. A method for positioning abnormity of a display module is characterized by comprising the following steps:
detecting the received analog no-load signal;
controlling and starting a simulation no-load circuit arranged between a screen time sequence control IC and a source electrode drive IC based on the simulation no-load signal;
through the simulation no-load circuit, the screen timing sequence is controlled to control the IC to be in no-load;
and detecting the received detection signal and outputting a detection return signal for indicating whether the screen time sequence control IC is in fault.
2. The method as claimed in claim 1, wherein the step of detecting the received analog no-load signal comprises:
a no-load circuit for simulating no-load of the screen sequential control IC is arranged between the output end of the screen sequential control IC and the input end of the source drive IC in advance.
3. The method as claimed in claim 1, wherein the step of controlling and activating the dummy idle circuit disposed between the panel timing control IC and the source driver IC based on the dummy idle signal comprises:
inputting the analog no-load signal to an input end of the analog no-load circuit;
and starting a simulation no-load circuit arranged between the output end of the screen time sequence control IC and the input end of the source electrode drive IC based on the input simulation no-load signal.
4. The method for locating the abnormality of a display module according to claim 1, wherein the step of controlling the screen timing control IC to be idle by the analog idle circuit includes:
and the connection between the output end of the screen time sequence control IC and the input end of the source electrode drive IC is disconnected through the simulation no-load circuit, so that the screen time sequence control IC is in a no-load state.
5. The method for locating the abnormality of a display module according to claim 1, wherein the step of detecting the reception of the detection signal and outputting a detection return signal indicating whether the screen timing control IC is malfunctioning includes, after the step of detecting the reception of the detection signal:
judging whether the screen timing control IC is normal or not based on the detection return signal;
when the detected return signal waveform is the same as a preset normal waveform, judging that the screen time sequence control IC is normal;
and when the detected return signal waveform is different from a preset normal waveform, judging that the screen time sequence control IC has a fault.
6. The method for locating the abnormality of a display module according to claim 5, wherein the step of detecting the reception of the detection signal and outputting a detection return signal indicating whether the screen timing control IC is faulty further comprises:
when the screen time sequence control IC is judged to be normal;
further detecting that the bonding area is not damaged through OM optical equipment;
and separating the source driving IC from the display panel, and judging whether the source driving IC and the display panel have faults or not by detecting the waveform of the output signal of the source driving IC.
7. An analog no-load circuit, comprising:
the analog no-load signal input end is connected with the screen timing sequence control IC;
and the switch group comprises a plurality of MOS (metal oxide semiconductor) tubes, the base electrode of each MOS tube is connected with the input end of the analog no-load signal, the source electrode of each MOS tube is connected with the output end of the screen time sequence control IC, and the drain electrode of each MOS tube is connected with the input end of the source electrode drive IC.
8. The utility model provides a display module assembly abnormal positioning device which characterized in that, the device includes:
the analog no-load signal receiving module is used for detecting the received analog no-load signal;
the analog no-load circuit starting module is used for controlling and starting an analog no-load circuit arranged between the screen time sequence control IC and the source electrode driving IC based on the analog no-load signal;
the screen time sequence control IC no-load control module is used for controlling the screen time sequence control IC to be in no-load through the simulation no-load circuit;
and the detection signal output module is used for detecting the received detection signal and outputting a detection return signal for indicating whether the screen time sequence control IC has a fault or not.
9. An intelligent device, wherein the intelligent device comprises a memory, a processor, and a display module abnormality positioning program stored in the memory and executable on the processor, and when the display module abnormality positioning program is executed by the processor, the steps of the display module abnormality positioning method according to any one of claims 1 to 6 are implemented.
10. A storage medium, wherein the storage medium stores thereon a display module abnormality positioning program, and the display module abnormality positioning program, when executed by a processor, implements the steps of the display module abnormality positioning method according to any one of claims 1 to 6.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111431452.1A CN114093290A (en) | 2021-11-29 | 2021-11-29 | Display module abnormal positioning method and device, intelligent equipment and storage medium |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111431452.1A CN114093290A (en) | 2021-11-29 | 2021-11-29 | Display module abnormal positioning method and device, intelligent equipment and storage medium |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN114093290A true CN114093290A (en) | 2022-02-25 |
Family
ID=80305380
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202111431452.1A Pending CN114093290A (en) | 2021-11-29 | 2021-11-29 | Display module abnormal positioning method and device, intelligent equipment and storage medium |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114093290A (en) |
Citations (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI259384B (en) * | 2002-07-17 | 2006-08-01 | Chunghwa Picture Tubes Ltd | Return goods analysis process control method for flat panel display |
| KR20060109144A (en) * | 2005-04-15 | 2006-10-19 | 주식회사 대우일렉트로닉스 | Organic light emitting diode |
| CN102184701A (en) * | 2010-12-30 | 2011-09-14 | 友达光电股份有限公司 | Control circuit device of display panel and control method thereof |
| US20120127137A1 (en) * | 2010-11-19 | 2012-05-24 | Silicon Works Co., Ltd | Circuit for controlling non-signal of flat panel display device |
| CN102930808A (en) * | 2011-08-08 | 2013-02-13 | 联咏科技股份有限公司 | Display panel driving device, operation method thereof and source electrode driver of display panel driving device |
| CN103680374A (en) * | 2012-09-26 | 2014-03-26 | 联咏科技股份有限公司 | Panel display device |
| CN103927956A (en) * | 2013-12-24 | 2014-07-16 | 上海中航光电子有限公司 | Drive circuit of display panel, display panel and display device |
| CN104103251A (en) * | 2014-06-06 | 2014-10-15 | 致茂电子(苏州)有限公司 | Time sequence controller detection device and method thereof |
| CN104157258A (en) * | 2014-08-27 | 2014-11-19 | 南京中电熊猫液晶显示科技有限公司 | Source driver and display |
| KR20160092148A (en) * | 2015-01-26 | 2016-08-04 | 엘지디스플레이 주식회사 | Display device |
| KR20170080205A (en) * | 2015-12-31 | 2017-07-10 | 엘지디스플레이 주식회사 | Organic light emitting display device and method for driving the same |
| CN109118954A (en) * | 2018-07-30 | 2019-01-01 | 武汉华星光电半导体显示技术有限公司 | A kind of Straight pull display screen and its compression method |
| KR20190048887A (en) * | 2017-10-31 | 2019-05-09 | 엘지디스플레이 주식회사 | Display device |
| CN111029325A (en) * | 2019-11-26 | 2020-04-17 | 武汉华星光电半导体显示技术有限公司 | Chip on film substrate and flexible organic light emitting diode display device |
| CN111445822A (en) * | 2019-01-17 | 2020-07-24 | 三星显示有限公司 | Display device |
-
2021
- 2021-11-29 CN CN202111431452.1A patent/CN114093290A/en active Pending
Patent Citations (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI259384B (en) * | 2002-07-17 | 2006-08-01 | Chunghwa Picture Tubes Ltd | Return goods analysis process control method for flat panel display |
| KR20060109144A (en) * | 2005-04-15 | 2006-10-19 | 주식회사 대우일렉트로닉스 | Organic light emitting diode |
| US20120127137A1 (en) * | 2010-11-19 | 2012-05-24 | Silicon Works Co., Ltd | Circuit for controlling non-signal of flat panel display device |
| CN102184701A (en) * | 2010-12-30 | 2011-09-14 | 友达光电股份有限公司 | Control circuit device of display panel and control method thereof |
| CN102930808A (en) * | 2011-08-08 | 2013-02-13 | 联咏科技股份有限公司 | Display panel driving device, operation method thereof and source electrode driver of display panel driving device |
| CN103680374A (en) * | 2012-09-26 | 2014-03-26 | 联咏科技股份有限公司 | Panel display device |
| CN103927956A (en) * | 2013-12-24 | 2014-07-16 | 上海中航光电子有限公司 | Drive circuit of display panel, display panel and display device |
| CN104103251A (en) * | 2014-06-06 | 2014-10-15 | 致茂电子(苏州)有限公司 | Time sequence controller detection device and method thereof |
| CN104157258A (en) * | 2014-08-27 | 2014-11-19 | 南京中电熊猫液晶显示科技有限公司 | Source driver and display |
| KR20160092148A (en) * | 2015-01-26 | 2016-08-04 | 엘지디스플레이 주식회사 | Display device |
| KR20170080205A (en) * | 2015-12-31 | 2017-07-10 | 엘지디스플레이 주식회사 | Organic light emitting display device and method for driving the same |
| KR20190048887A (en) * | 2017-10-31 | 2019-05-09 | 엘지디스플레이 주식회사 | Display device |
| CN109118954A (en) * | 2018-07-30 | 2019-01-01 | 武汉华星光电半导体显示技术有限公司 | A kind of Straight pull display screen and its compression method |
| CN111445822A (en) * | 2019-01-17 | 2020-07-24 | 三星显示有限公司 | Display device |
| CN111029325A (en) * | 2019-11-26 | 2020-04-17 | 武汉华星光电半导体显示技术有限公司 | Chip on film substrate and flexible organic light emitting diode display device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN108594792B (en) | Hardware-in-loop test system and test equipment for bidirectional vehicle-mounted charger | |
| CN111816124B (en) | Driving circuit, display device and detection method using time sequence controller | |
| US20120131385A1 (en) | Testing mehtod for unit under test | |
| US20030001561A1 (en) | Inspecting apparatus and inspecting method for circuit board | |
| CN108762243A (en) | A kind of ECU functional tests platform and ECU function test methods | |
| US5539326A (en) | Method for testing the wiring or state of a liquid crystal display and thin film transistor | |
| US6014035A (en) | Test system and test method for liquid crystal display device | |
| CN1987509A (en) | Power detecting system and method | |
| CN114093290A (en) | Display module abnormal positioning method and device, intelligent equipment and storage medium | |
| CN107179972A (en) | For the method for calculation machine, microcontroller, test equipment and test system | |
| US7825680B2 (en) | Componet supplied with an analog value | |
| Kernbaum et al. | Flat screen monitor disassembly and testing for remanufacturing | |
| CN1797357A (en) | Circuit board for testing function of main board | |
| KR20100076641A (en) | An electronic card inspection device of plant control system | |
| CN112881888A (en) | Testing device and method for VGA interface protection circuit of server display card | |
| CN109637405B (en) | Method and device for testing array substrate and storage medium | |
| CN112798939A (en) | Testing device | |
| CN110930912A (en) | Detection method and detection circuit of liquid crystal display panel | |
| KR101864779B1 (en) | Test apparatus and method for touch screen panel of portable communication terminal | |
| CN220820131U (en) | Equipment for testing electrification and de-electrification of MCU (micro control Unit) | |
| JP2008026224A (en) | Self-diagnostic method for function diagnostic device | |
| CN213457239U (en) | Test circuit and chip circuit test device | |
| KR100815146B1 (en) | Apparatus and method for detecting a line error of liquid crystal display panel | |
| CN116088481A (en) | HIL test system and HIL test method for whole vehicle controller | |
| JP3021738U (en) | Inspection device for TFT-LCD |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |