CN1140922C - Method for elimianting leakage current of shallow channel isolation area - Google Patents
Method for elimianting leakage current of shallow channel isolation area Download PDFInfo
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- CN1140922C CN1140922C CNB011188308A CN01118830A CN1140922C CN 1140922 C CN1140922 C CN 1140922C CN B011188308 A CNB011188308 A CN B011188308A CN 01118830 A CN01118830 A CN 01118830A CN 1140922 C CN1140922 C CN 1140922C
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- leakage current
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- isolation area
- channel isolation
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Abstract
The present invention relates to a method for eliminating the leakage current of a shallow trench isolation region, which at least comprises the following steps: a trench is formed in a substrate by an etching process; a thermal oxidizing process is carried out while trans-dichloro polyethylene is introduced as a process gas to grow a lining oxide layer on the surface of the trench and round up a plurality of corners of the trench; an insulation layer is formed to be filled into the trench. The present invention has the function of eliminating the leakage current of a shallow trench isolation region. Moreover, the present invention can not increase costs and can not influence the service life of a machine table.
Description
Technical field
The invention relates to a kind of elimination shallow channel isolation area (shallow trench isolation; The method of leakage current STI) (leakage current), particularly relevant for a kind of by with corner (corner) sphering of groove, with the method for the leakage current of eliminating formed shallow channel isolation area.
Background technology
The LOCOS isolation method that tradition is used is because how beak effect and the smooth restriction of air spots are replaced by STI at the circuit production below 0.25 micron.
The flow process of STI is as described below.At first, pad oxide of growing up on silicon substrate (Pad oxide) and silicon nitride layer (nitride) after lithographic procedures definition isolated area, carry out pad oxide, silicon nitride layer and shallow trench etching in regular turn.Afterwards on the inwall of groove with hot oxygen method growth lining oxide layer (liner), to eliminate the infringement that etching was caused.With in the chemical vapor deposition (CVD) oxide layer filling groove, as grinding stop layer (Polish stop), stay a smooth surface more then with the surperficial material that has more of cmp (CMP) technology removal, and with silicon nitride layer.Again silicon nitride layer and pad oxide are removed at last, to carry out the making of subsequent components.
Yet, when grid strides across isolation edge,, can make the electric crystal characteristic in limit, assembly district cause ahead of time because of the cause of internal field's enhancing if the corner in assembly district (being the corner of groove) is too sharp-pointed, cause (logI
d-V
g) the subcritical district (sub-threshold region) of relation curve occurs one and be swollen with (hump) phenomenon.When channel width diminished, this phenomenon was more obvious, made the start voltage (V of assembly
Th) descend.And, because concentrating of electric field also causes the generation of leakage current easily.
Generally addressing the above problem employed method is, with the corner sphering of groove, with the electric field strength in the passage that reduces isolation edge.At the technical elements with the corner sphering of groove, the someone proposes after etching groove, forms before the lining oxide layer, chip is done high-temperature heat treatment, make the silicon atom migration via high temperature, with corner sphering with groove, by increasing its radius of curvature, to eliminate the phenomenon of leakage current.Its major defect is:
Because heat treatment temperature must carried out more than 1100 ℃, the processing procedure of high temperature can cause the increase of cost like this, and can reduce the useful life of board.
Summary of the invention
The purpose of this invention is to provide a kind of method of eliminating the leakage current of shallow channel isolation area, after in substrate, etching groove, wafer is placed in the oxidation boiler tube, except importing the required oxidizing gas of oxidation process, and import anti-dichloroethylene (TLC) simultaneously to the oxidation boiler tube, during the growth lining oxide layer, with the corner sphering of groove, overcome the drawback of prior art, reach the purpose of the leakage current that reduces follow-up formed shallow channel isolation area.
The object of the present invention is achieved like this: a kind of method of eliminating the leakage current of shallow channel isolation area is characterized in that: comprise the steps: at least
(1) carries out an etch process, in substrate, form groove;
(2) carry out a thermal oxidation processing procedure, and import anti-dichloroethylene simultaneously as process gas, in this flute surfaces lining oxide layer of growing up, and with most corners spherings of this groove;
(3) forming an insulating barrier inserts in this groove.
This thermal oxidation processing procedure is the dry type oxidation process.This thermal oxidation processing procedure is the wet oxidation processing procedure.The content of this anti-dichloroethylene is the 0.5-5.0%Wt of total process gas.The temperature of this thermal oxidation processing procedure is 900-1150 ℃.
The present invention also provides the another kind of method of eliminating the leakage current of shallow channel isolation area, it is characterized in that: comprise the steps: at least
(1) in a substrate, forms a pad oxide and a cover curtain layer in regular turn;
(2) with this pad oxide and cover curtain layer patterning, and be an etching mask with pad oxide behind the patterning and cover curtain layer, this substrate of etching forms a groove in this substrate;
(3) in the thermal oxidation boiler tube, form a lining oxide layer on the surface of this groove, simultaneously with the corner sphering of this groove;
(4) forming an insulating barrier inserts in this groove;
(5) divest this cover curtain layer and pad oxide, to form this channel separating zone.
The surface of this groove forms lining oxide layer, simultaneously with the corner sphering of this groove, is to be process gas with hydrogen, oxygen and anti-dichloroethylene.The content of this anti-dichloroethylene is the 0.5-5.0%Wt of total process gas.The temperature of this thermal oxidation processing procedure is 900-1150 ℃.The surface of this groove forms lining oxide layer, simultaneously with the corner sphering of this groove, is to be process gas with oxygen and anti-dichloroethylene, carries out the thermal oxidation processing procedure in this thermal oxidation boiler tube.The content of this anti-dichloroethylene is the 0.5-5.0%Wt of total process gas.The temperature of this thermal oxidation processing procedure is 900-1150 ℃.
Major advantage of the present invention is to have the leakage current of eliminating shallow channel isolation area, and can not cause the increase of cost, also can not have influence on the useful life of board.
Describe in detail below in conjunction with preferred embodiment and accompanying drawing.
Description of drawings
Fig. 1-Fig. 5 is the flow process generalized section of the corner sphering with shallow channel isolation area of the present invention.
Embodiment
Consult Fig. 1-Fig. 5, a kind of passing through of the present invention with the corner sphering, the flow process of eliminating the leakage current of shallow channel isolation area comprises the steps:
At first consult Fig. 1, one substrate 100 is provided, it for example is silicon base, form pad oxide 102 and cover curtain layer 104 in regular turn on substrate 100 surfaces, the method that wherein forms pad oxide 102 can be thermal oxidation method or chemical vapour deposition technique, the material of cover curtain layer 104 for example is a silicon nitride, and its formation method is a chemical vapour deposition technique.Then, on cover curtain layer 104 surfaces, form one deck patterned photoresist layer 106, and by lithographic process in wherein forming opening 108, the scope of this opening 108 is roughly the scope of assembly isolated area.
Then consult Fig. 2, utilize the patterned photoresist layer 106 of patterning to be used as etching mask, carry out anisotropically etch process, with the design transfer of patterned photoresist layer 106 to cover curtain layer 104 and pad oxide 102.Then, remove patterned photoresist layer 106 with suitable solution or dry-etching program again.
Next, be etching mask with cover curtain layer 104 and pad oxide 102, carry out the anisotropic etching processing procedure, substrate 100 is etched to a desired depth, to form the groove 110 that the degree of depth is about 3000-6000 .
Then consult Fig. 3, entire chip is placed the thermal oxidation boiler tube, form one deck lining oxide layer 114 in the surface of groove 110, and simultaneously with corner 112 spherings of groove 110.This practice is when importing the required process gas of dry type oxidation process or wet oxidation processing procedure in the thermal oxidation boiler tube, to import anti-dichloroethylene (transdi chloro ethylene simultaneously; Be called for short TLC), the content of the TLC that imports accounts for the 0.5-5%wt of total process gas, and required process temperatures is about about 900 ℃-1150 ℃, and the thickness of the lining oxide layer 114 that is generated is about about 50-500 .
As if the lining oxide layer 114 of growing up with the wet oxidation processing procedure, then the process gas of Dao Ruing is that hydrogen, oxygen and content are the TLC of the 0.5-5%wt of total process gas.As if the lining oxide layer 114 of growing up with the dry type oxidation process, then the process gas of Dao Ruing is oxygen and the TLC that accounts for the 0.5-5%Wt of total process gas.
In the present invention, because when oxidation forms lining oxide layer 114, import TLC simultaneously, can reach purpose with corner 112 spherings of groove 110, therefore method is quite simple, and employed process temperatures is lower than tradition makes the required temperature of silicon atom migration, therefore can not cause the increase of cost, can not have influence on the useful life of board yet.In addition, can also be simultaneously with the corner 112 ' sphering of groove 110 bottoms, the stress that is produced when reaching the growth lining oxide layer 114 in this corner 112 ' of mitigation.
Then consult Fig. 4, form a layer insulating 116 in cover curtain layer 104 tops, and insert in the groove 110.The material of insulating barrier 116 can be silica, and its formation method for example is the high-density electric slurry method.Carry out tempering program or Rapid Thermal processing procedure afterwards again, so that the quality densification of insulating barrier 116.
Then consult Fig. 5, after the insulating barrier 116 of cover curtain layer 104 tops is divested, in regular turn cover curtain layer 104 and pad oxide 102 are divested again, to form channel separating zone 116a.Wherein, with divesting the method for the insulating barrier 116 of cover curtain layer 104 tops, can be chemical mechanical milling method; Divesting the method for cover curtain layer 104, for example is with its removal with hot phosphoric acid dip; Divesting the method for pad oxide 102, for example is with hydrofluoric acid dips.
In addition, when divesting pad oxide 102, material is that the insulating barrier 116 of silica also can partly be divested, yet, because the corner 112 of groove 110 has been done sphering and handled, therefore, the thickness of follow-up formed grid oxic horizon is also more even, and, also do not have electric field and concentrate on this regional phenomenon generation because the radius of curvature in groove 110 corners 112 is bigger.
In sum, the present invention provides following advantage at least:
1, the present invention does sphering to its corner simultaneously and handles when flute surfaces forms lining oxide layer.If the wet oxidation processing procedure, then process gas is hydrogen, oxygen and TLC; If the dry type oxidation process, then process gas is oxygen and TLC.
2, the method with the trench corner sphering provided by the present invention does not need extra fabrication steps, so method is quite simple, and, employed process temperatures is lower than tradition makes the required temperature of silicon atom migration, therefore can not cause the increase of cost, also can not have influence on the useful life of board.
3, method provided by the present invention can be handled the top of groove and the corner of bottom simultaneously, make the radius of curvature in these corners become big, therefore can avoid electric field to concentrate on the leakage problem of deriving in this zone, and the stress that is produced during mitigation growth lining oxide layer.
More than be preferred embodiment of the present invention, it is not in order to restriction the present invention, anyly has the knack of this skill person, does without departing from the spirit and scope of the present invention to change and retouch, and all falls within protection scope of the present invention.
Claims (12)
1, a kind of method of eliminating the leakage current of shallow channel isolation area is characterized in that: comprise the steps: at least
(1) carries out an etch process, in substrate, form groove;
(2) carry out a thermal oxidation processing procedure, and import anti-dichloroethylene simultaneously as process gas, in this flute surfaces lining oxide layer of growing up, and with most corners spherings of this groove;
(3) forming an insulating barrier inserts in this groove.
2, the method for the leakage current of elimination shallow channel isolation area according to claim 1 is characterized in that: this thermal oxidation processing procedure is the dry type oxidation process.
3, the method for the leakage current of elimination shallow channel isolation area according to claim 1 is characterized in that: this thermal oxidation processing procedure is the wet oxidation processing procedure.
4, the method for the leakage current of elimination shallow channel isolation area according to claim 1 is characterized in that: the content of this anti-dichloroethylene is the 0.5-5.0%Wt of total process gas.
5, the method for the leakage current of elimination shallow channel isolation area according to claim 1 is characterized in that: the temperature of this thermal oxidation processing procedure is 900-1150 ℃.
6, a kind of method of eliminating the leakage current of shallow channel isolation area is characterized in that: comprise the steps: at least
(1) in a substrate, forms a pad oxide and a cover curtain layer in regular turn;
(2) with this pad oxide and cover curtain layer patterning, and be an etching mask with pad oxide behind the patterning and cover curtain layer, this substrate of etching forms a groove in this substrate;
(3) in the thermal oxidation boiler tube, form a lining oxide layer on the surface of this groove, simultaneously with the corner sphering of this groove;
(4) form an insulating barrier, insert in this groove;
(5) divest this cover curtain layer and pad oxide, to form this channel separating zone.
7, the method for the leakage current of elimination shallow channel isolation area according to claim 6 is characterized in that: this step (3) forms lining oxide layer with the surface of groove, simultaneously with the corner sphering of this groove, is to be process gas with hydrogen, oxygen and anti-dichloroethylene.
8, the method for the leakage current of elimination shallow channel isolation area according to claim 7 is characterized in that: the content of this anti-dichloroethylene is the 0.5-5.0%Wt of total process gas.
9, the method for the leakage current of elimination shallow channel isolation area according to claim 7 is characterized in that: the temperature in this thermal oxidation boiler tube is 900-1150 ℃.
10, the method for the leakage current of elimination shallow channel isolation area according to claim 6, it is characterized in that: this step (3) forms lining oxide layer with the surface of groove, simultaneously with the corner sphering of this groove, be to be process gas, in this thermal oxidation boiler tube, carry out the thermal oxidation processing procedure with oxygen and anti-dichloroethylene.
11, the method for the leakage current of elimination shallow channel isolation area according to claim 10 is characterized in that: the content of this anti-dichloroethylene is the 0.5-5.0%Wt of total process gas.
12, the method for the leakage current of elimination shallow channel isolation area according to claim 10 is characterized in that: the temperature in this thermal oxidation boiler tube is 900-1150 ℃.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB011188308A CN1140922C (en) | 2001-06-18 | 2001-06-18 | Method for elimianting leakage current of shallow channel isolation area |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB011188308A CN1140922C (en) | 2001-06-18 | 2001-06-18 | Method for elimianting leakage current of shallow channel isolation area |
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|---|---|
| CN1392604A CN1392604A (en) | 2003-01-22 |
| CN1140922C true CN1140922C (en) | 2004-03-03 |
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| CNB011188308A Expired - Lifetime CN1140922C (en) | 2001-06-18 | 2001-06-18 | Method for elimianting leakage current of shallow channel isolation area |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100433291C (en) * | 2005-06-30 | 2008-11-12 | 茂德科技股份有限公司（新加坡子公司） | Use of chlorine to fabricate trench dielectric in integrated circuits |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4694769B2 (en) * | 2003-01-27 | 2011-06-08 | エルピーダメモリ株式会社 | Manufacturing method of semiconductor device |
| CN1301546C (en) * | 2003-05-14 | 2007-02-21 | 旺宏电子股份有限公司 | Method for improving dense fast flashing memory trough oxide layer edge electric avalanche utilizing shielding bird's mouth |
| CN103515289A (en) * | 2013-10-18 | 2014-01-15 | 上海华力微电子有限公司 | Method for forming shallow trench isolation structure |
-
2001
- 2001-06-18 CN CNB011188308A patent/CN1140922C/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100433291C (en) * | 2005-06-30 | 2008-11-12 | 茂德科技股份有限公司（新加坡子公司） | Use of chlorine to fabricate trench dielectric in integrated circuits |
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| Publication number | Publication date |
|---|---|
| CN1392604A (en) | 2003-01-22 |
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Owner name: LIANHUA ELECTRONICS CO., LTD. Free format text: FORMER OWNER: XITONG SCIENCE AND TECHNOLOGY CO LTD Effective date: 20050408 |
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Effective date of registration: 20050408 Address after: Hsinchu Science Industrial Park, Taiwan Patentee after: United Microelectronics Corporation Address before: Hsinchu Science Park, Taiwan Patentee before: Xitong Science & Technology Co., Ltd. |
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