CN114079420A

CN114079420A - Overvoltage protection circuit

Info

Publication number: CN114079420A
Application number: CN202010812424.3A
Authority: CN
Inventors: 李荣钦
Original assignee: Global Mixed Mode Technology Inc
Current assignee: Global Mixed Mode Technology Inc
Priority date: 2020-08-13
Filing date: 2020-08-13
Publication date: 2022-02-22

Abstract

An overvoltage protection circuit is used to suppress a voltage surge. The overvoltage protection circuit is coupled to an input terminal for receiving an input voltage. The overvoltage protection circuit comprises a switch circuit, a controller and a comparison unit. When the input voltage is greater than a first voltage, a discharge mechanism is forcibly started to suppress the voltage surge. When the input voltage is less than a second voltage, the discharge mechanism is turned off to resume normal operation.

Description

Overvoltage protection circuit

Technical Field

The present invention relates to an overvoltage protection circuit, and more particularly, to an overvoltage protection circuit applicable to a motor controller.

Background

Fig. 1 shows a conventional hot plug equivalent circuit 10 of a motor controller power supply system. The power supply 110 provides a supply voltage Vps such that the motor controller 100 has an input voltage Vcc. When the switch SW is turned on at time T1, the line resistor R, the line inductor L and the power capacitor C may cause oscillation, which may result in an excessive input voltage Vcc. Fig. 2 is a timing diagram of the relevant signals corresponding to fig. 1. As shown in fig. 2, the input voltage Vcc generates an excessive voltage after time T1. Therefore, when the protection circuit is not provided, the element is easily damaged. Conventionally, a zener diode is added between the switch SW and the motor controller 100 to clamp the voltage surge, but this method will increase the manufacturing cost of the system.

Disclosure of Invention

In view of the foregoing, it is an object of the present invention to provide an overvoltage protection circuit for suppressing a voltage surge.

The invention provides the overvoltage protection circuit, wherein the overvoltage protection circuit can be applied to a single-phase motor or a multi-phase motor. The overvoltage protection circuit is coupled to an input terminal for receiving an input voltage. The overvoltage protection circuit comprises a switch circuit, a controller and a comparison unit. When the input voltage is greater than a first voltage, a discharge mechanism is forcibly started to suppress a voltage surge. When the input voltage is less than a second voltage, the discharge mechanism is turned off to resume normal operation.

Drawings

Fig. 1 shows a hot plug equivalent circuit of a conventional motor controller power supply system.

Fig. 2 is a timing diagram of the relevant signals corresponding to fig. 1.

Fig. 3 is a schematic diagram of an over-voltage protection circuit and a peripheral circuit according to an embodiment of the invention.

Fig. 4 is a timing diagram of the relevant signals corresponding to fig. 3.

Description of reference numerals: 10-a hot plug equivalent circuit of the motor controller power supply system; 100-a motor controller; 110-a power supply; a Vcc input voltage; 20-an overvoltage protection circuit; 21-ambient circuitry; an SW-switch; r-line resistance; an L-line inductance; c-power supply capacitance; 230-a power supply; vps supply voltage; an Ips supply current; GND-terminal; IN-input terminal; vin-input voltage; idis discharge current; 200-a switching circuit; 210-a controller; 220-a comparison unit; 201 a first transistor; 202-a second transistor; 203-a third transistor; 204-a fourth transistor; 205-a fifth transistor; 206-a sixth transistor; c1 — first control signal; c2 — second control signal; c3 — third control signal; c4-fourth control signal; c5-fifth control signal; c6 — sixth control signal; 221-a comparator; 222-a multiplexer; EN-enable signal; v1 — first signal; v2 — second signal; t1-time; a Voh first voltage; vol second voltage.

Detailed Description

The objects, features and advantages of the present invention will become more apparent from the following description. Preferred embodiments according to the present invention will now be described in detail with reference to the accompanying drawings.

Fig. 3 is a schematic diagram of an over-voltage protection circuit 20 and a peripheral circuit 21 according to an embodiment of the invention. The peripheral circuit 21 has a power supply 230 and a switch SW for providing a supply voltage Vps, an input voltage Vin and a power current Ips. The overvoltage protection circuit 20 is coupled to an input terminal IN for receiving the input voltage Vin. The overvoltage protection circuit 20 has a switch circuit 200, a controller 210 and a comparison unit 220. The switch circuit 200 has a first transistor 201, a second transistor 202, a third transistor 203, a fourth transistor 204, a fifth transistor 205, and a sixth transistor 206. The controller 210 generates a first control signal C1, a second control signal C2, a third control signal C3, a fourth control signal C4, a fifth control signal C5, and a sixth control signal C6 for controlling the switching of the first transistor 201, the second transistor 202, the third transistor 203, the fourth transistor 204, the fifth transistor 205, and the sixth transistor 206, respectively. The first transistor 201 is coupled to the input terminal IN and the second transistor 202, and the second transistor 202 is coupled to a terminal GND. The third transistor 203 is coupled to the input terminal IN and the fourth transistor 204, and the fourth transistor 204 is coupled to the node GND. The fifth transistor 205 is coupled to the input terminal IN and the sixth transistor 206, and the sixth transistor 206 is coupled to the node GND. The first transistor 201, the second transistor 202, the third transistor 203, the fourth transistor 204, the fifth transistor 205, and the sixth transistor 206 may be a pmos transistor or an nmos transistor. In fig. 3, the first transistor 201, the third transistor 203 and the fifth transistor 205 are exemplified by three pmos transistors. The second transistor 202, the fourth transistor 204 and the sixth transistor 206 are three nmos transistors, for example.

The comparing unit 220 is coupled to the input terminal IN and receives a first signal V1 and a second signal V2 for generating an enable signal EN to the controller 210, wherein the first signal V1 has a first voltage Voh and the second signal V2 has a second voltage Vol. The first voltage Voh is greater than the second voltage Vol. For example, the comparing unit 220 may be designed to have a comparator 221 and a multiplexer 222. The comparator 221 is coupled to the input terminal IN and an output terminal of the multiplexer 222 for generating the enable signal EN. The multiplexer 222 receives the first signal V1, the second signal V2 and the enable signal EN for generating an output signal to the comparator 221. When the enable signal EN is at a low level L, the multiplexer 222 selects the first signal V1 to be coupled to the comparator 221. When the enable signal EN is at a high level H, the multiplexer 222 selects the second signal V2 to be coupled to the comparator 221.

Please refer to fig. 3 and fig. 4, wherein fig. 4 corresponds to a timing diagram of related signals of fig. 3. When the switch SW is turned on at time T1, the input voltage Vin starts to gradually increase. When the input voltage Vin is greater than the first voltage Voh, a discharging mechanism is forced to be activated to suppress a voltage surge. The enable signal EN is at a high level H to inform the controller 210 to conduct the discharging current Idis flowing into the input terminal IN to the terminal GND. The controller 210 may turn on the first transistor 201 and the second transistor 202 simultaneously or non-simultaneously to generate a discharge path. The controller 210 may also turn on the first transistor 201, the second transistor 202, the third transistor 203, and the fourth transistor 204 simultaneously or non-simultaneously to generate two discharge paths. The controller 210 may also turn on the first transistor 201, the second transistor 202, the third transistor 203, the fourth transistor 204, the fifth transistor 205, and the sixth transistor 206 simultaneously or non-simultaneously to generate three discharge paths. When the input voltage Vin is less than the second voltage Vol, the discharging mechanism is turned off. At this time, the enable signal EN is at a low level L to notify the controller 210 to resume normal operation and close the corresponding discharge path. As shown in fig. 4, the waveform of the input voltage Vin exhibits a sawtooth-shaped oscillation between the first voltage Voh and the second voltage Vol, thereby achieving the purpose of overvoltage protection.

The overvoltage protection circuit 20 of the present invention can suppress voltage surges of the input voltage Vin when a power supply is hot plugged in, and can also suppress voltage surges generated when a motor is decelerated or steered. The overvoltage protection circuit 20 of the present invention can be applied to a single phase motor or a multi-phase motor. Furthermore, the present invention is applicable to an actuator having an inductive characteristic, such as a brushless motor, a direct current motor, a voice coil motor, or an electromagnetic actuator. The invention can reduce the system manufacturing cost because the invention does not need to add external elements (such as Zener diodes).

While the invention has been described by way of examples of preferred embodiments, it is to be understood that: the present invention is not limited to the disclosed embodiments. On the contrary, the invention is intended to cover various modifications and similar arrangements as would be apparent to those skilled in the art. Therefore, it is not intended to be exhaustive or to limit the scope to the precise form disclosed, and all such modifications and similar arrangements are possible.

The above description is only a preferred embodiment of the present invention, and all equivalent changes and modifications made in accordance with the claims of the present invention should be covered by the present invention.

Claims

1. An overvoltage protection circuit for suppressing a voltage surge, the overvoltage protection circuit coupled to an input terminal for receiving an input voltage, the overvoltage protection circuit comprising:

a switching circuit coupled to the input terminal;

a controller coupled to the switching circuit for controlling the switching circuit; and

the comparison unit is coupled to the input end and receives a first signal and a second signal, wherein the comparison unit compares the input voltage with a first voltage and compares the input voltage with a second voltage so as to generate an enabling signal to the controller.

2. The overvoltage protection circuit of claim 1, wherein the first signal has the first voltage and the second signal has the second voltage.

3. The overvoltage protection circuit of claim 2, wherein the comparison unit comprises:

a comparator; and

a multiplexer for receiving the first signal, the second signal and the enable signal and generating an output signal to the comparator.

4. The over-voltage protection circuit of claim 3, wherein the comparator is coupled to the input terminal for generating the enable signal.

5. The over-voltage protection circuit according to claim 4, wherein the multiplexer selects the first signal to be coupled to the comparator when the enable signal is at a low level.

6. The over-voltage protection circuit according to claim 5, wherein the multiplexer selects the second signal to be coupled to the comparator when the enable signal is at a high level.

7. The overvoltage protection circuit of claim 1, wherein said switching circuit comprises:

a first transistor coupled to the input terminal; and

a second transistor coupled to the first transistor and a first terminal.

8. The over-voltage protection circuit of claim 7, wherein the controller generates a first control signal and a second control signal for controlling the switching of the first transistor and the second transistor, respectively.

9. The over-voltage protection circuit of claim 8, wherein the switching circuit further comprises:

a third transistor coupled to the input terminal; and

a fourth transistor coupled to the third transistor and the first terminal.

10. The over-voltage protection circuit of claim 9, wherein the controller further generates a third control signal and a fourth control signal for controlling the switching of the third transistor and the fourth transistor, respectively.

11. The over-voltage protection circuit of claim 10, wherein the switching circuit further comprises:

a fifth transistor coupled to the input terminal; and

a sixth transistor coupled to the fifth transistor and the first terminal.

12. The over-voltage protection circuit of claim 11, wherein the controller further generates a fifth control signal and a sixth control signal for controlling the switching of the fifth transistor and the sixth transistor, respectively.

13. The over-voltage protection circuit as claimed in claim 12, wherein the first transistor, the third transistor and the fifth transistor are each a pmos transistor, and the second transistor, the fourth transistor and the sixth transistor are each an nmos transistor.

14. The overvoltage protection circuit of claim 1, wherein a discharge mechanism is activated to suppress the voltage surge when the input voltage is greater than the first voltage.

15. The over-voltage protection circuit of claim 14, wherein when the input voltage is less than the second voltage, the discharge mechanism is turned off to resume normal operation.

16. The over-voltage protection circuit of claim 1, wherein the waveform of the input voltage exhibits a saw-tooth like oscillation between the first voltage and the second voltage.

17. The overvoltage protection circuit of claim 1, wherein the first voltage is greater than the second voltage.

18. The overvoltage protection circuit of claim 1, wherein the overvoltage protection circuit suppresses the voltage spike when a power supply is hot plugged in.

19. The overvoltage protection circuit of claim 1, wherein the overvoltage protection circuit dampens the voltage surge during deceleration or turning of a motor.

20. The overvoltage protection circuit of claim 1, wherein the overvoltage protection circuit is implemented in a single phase motor or a multi-phase motor.