CN114050718A - Capacitance voltage division soft switching inverter for switching current conversion action point bias voltage - Google Patents

Capacitance voltage division soft switching inverter for switching current conversion action point bias voltage Download PDF

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CN114050718A
CN114050718A CN202111167470.3A CN202111167470A CN114050718A CN 114050718 A CN114050718 A CN 114050718A CN 202111167470 A CN202111167470 A CN 202111167470A CN 114050718 A CN114050718 A CN 114050718A
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time
auxiliary
point
main
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CN114050718B (en
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禹健
樊启航
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Shanxi University
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Shanxi University
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/06—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
    • H02M3/07—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • H02M1/4208—Arrangements for improving power factor of AC input
    • H02M1/4225—Arrangements for improving power factor of AC input using a non-isolated boost converter
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • H02M1/4208—Arrangements for improving power factor of AC input
    • H02M1/4241—Arrangements for improving power factor of AC input using a resonant converter
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

The invention discloses a capacitance voltage division soft switching inverter for switching a current conversion action point bias voltage, which can realize ZVS (zero voltage switching) conduction of a main circuit switch and ZCS (zero voltage switching) conduction of an auxiliary circuit switch. The switching of the bias voltage of the commutation action point is adapted to two states of high and low input voltage. The charge balance makes the capacitor voltage division point keep a constant voltage state. The efficiency and the power density are effectively improved, and the cost and the EMI are reduced.

Description

Capacitance voltage division soft switching inverter for switching current conversion action point bias voltage
Technical Field
The invention relates to the technical field of power electronic conversion, in particular to a capacitance voltage division soft switching inverter with a conversion action point for bias voltage switching.
Background
Power factor correction PFC is commonly employed to increase the power factor PF and reduce total harmonic distortion. Among many PFC circuits, Boost converters are widely used due to their simple structure, continuous input current, and strong uniformity of characteristics. The bridgeless Boost PFC reduces conduction loss by reducing the number of semiconductor devices on a working circuit, and achieves the purpose of improving efficiency. However, the problem of switching loss in the bridgeless PFC is prominent, and when the switching frequency is increased, the switching loss in the circuit is increased, and especially when the circuit operates in CCM, the reverse recovery current of the freewheeling diode increases the switching loss of the switching tube. The operation of high switching frequency is realized, the topological structure and the control scheme of the auxiliary current conversion soft switching converter do not influence the working mode of the original main loop while optimizing parameters, the switching loss is reduced, and the switching stress is not increased.
Divan proposed in 1989 the first modern soft switching converter: an active clamp resonant type DC-Link inverter AC-RDCL. De Doncker proposed an auxiliary resonant commutated pole converter ARCP in 1990. In the first proposed ARCP inverter, the DC-link DC bus capacitor, a bidirectional switch and a resonant inductor form an auxiliary circuit to generate the DC-link DC pulses, i.e. capacitive voltage division is used. The topological structure is simple, and the parameters such as efficiency, output power and power density are improved.
However, the technical bottleneck is that the charge at the voltage division point of the capacitor in the dc link is unbalanced, the voltage is unstable, and the low output frequency is particularly prominent in application. A complex detection and delay control circuit is needed to control the stored energy before the commutation of the commutation inductor according to the voltage of the voltage division point and the load current.
The inverter with inductance voltage division can keep the voltage at the voltage division point stable, and the control is simplified. The coupling inductance voltage division topology comprises a series voltage division type and a parallel voltage division type. Typically a zero voltage switching ZVT inverter with one resonant pole having two coupled inductors. The auxiliary circuit adopts a transformer with a saturated iron core and works at zero load frequency. The peak efficiency of various inverters based on ZVT-2CI is as high as 99%. The problem of the dual of the inductance voltage division inverter is unidirectional reset of the exciting current relative to the capacitance voltage division inverter. The transformer core can not be reset in one switching period, the size of the selected transformer core is large, and two sets of auxiliary loops are needed to realize the auxiliary current conversion work of the main switch under the bidirectional current output; and the auxiliary current conversion diode has no clamping measure, and the voltage stress and EMI are caused by overcharge and ringing.
Disclosure of Invention
In order to solve the defects of the prior art, the capacitor voltage division soft switching inverter for switching the current conversion action point bias voltage is provided, the zero voltage switching-on of the main switch is realized, the efficiency and the power density are effectively improved, and the cost and the EMI are reduced.
The technical scheme adopted by the invention for solving the technical problems is as follows: a capacitance voltage division soft switching inverter with commutation action point bias voltage switching is provided, which comprises: first main switch tube S1A second main switch tube S2And the third main switch tube S3The fourth main switch tube S4Flying capacitor CFMain circuit DC bus capacitor CBAuxiliary loop DC bus capacitor CaBA first auxiliary capacitor Ca1A second auxiliary capacitor Ca2A first auxiliary diode Da1A first auxiliary diode Da2The third auxiliary switch tube Sa3The fourth auxiliary switch tube Sa4The fifth auxiliary diode Da5And the sixth auxiliary switch tube Sa6Seventh auxiliary switch tube Sa7The eighth auxiliary diode Da8Filter inductor LinInput power supply VinAuxiliary commutation inductor Lr；
Wherein the first main switch tube S1Source electrode and second main switch tube S2Is connected to the point a, and a third main switch tube S3Source electrode and fourth main switch tube S4The drain of the second main switch tube S is connected with the point b2Source electrode and third main switching tube S4The drain of the capacitor is connected to the point O, and the flying capacitor CFOne end is connected with the point a, and the other end is connected with the point b; fifth auxiliary diode Da5Anode and first auxiliary diode Da1The cathode of the first auxiliary diode D is connected with the point ca1Anode and second auxiliary diode Da2The cathode of the first auxiliary diode D is connected with the point Da2Positive pole and third auxiliary switch tube Sa3Is connected to the point P, and a third auxiliary switch tube Sa3Emitter and fourth auxiliary switch tube Sa4Is connected to point e, a first auxiliary capacitor Ca1One end connected to point d and the other end connected to point e, and an auxiliary loop DC bus capacitor CaBThe positive electrode is connected to the point c, and the negative electrode is connected to the fourth auxiliary switch tube Sa4An emitter of (1); sixth auxiliary switch tube Sa6Emitter and seventh auxiliary switchPipe Sa7Is connected to the point Q, and a seventh auxiliary switch tube Sa7Emitter of (2) and an eighth auxiliary diode Da8The negative electrodes are connected; second auxiliary capacitor Ca2One end is connected to the point O, and the other end is connected to the seventh auxiliary switch tube Sa7An emitter of (1); auxiliary commutation inductor LrOne end is connected with the point P, and the other end is connected with the point Q; filter inductance LinOne end is connected to the O point, and the other end is connected to the input power supply VinThe positive electrode of (1); first main switch S1Drain electrode and main circuit DC bus capacitor CBIs connected with the positive pole of the fourth main switch tube S4Source electrode of, fourth auxiliary switch tube Sa4Emitter of (2), eighth auxiliary diode Da8Positive electrode of, input power supply VinNegative pole and main circuit DC bus capacitor CBThe negative electrodes are connected;
setting iloadIs a current-passing filter inductor LinInstantaneous current of (I)loadIs a current-passing filter inductor LinAverage current of (d); c1-C4Main switch S1-S4The capacitance values of the equivalent parallel capacitors are all Cm-oss； Ca3-Ca4As an auxiliary switch Sa3-Sa4Equivalent parallel capacitance of Ca6-Ca7As an auxiliary switch Sa6-Sa7The capacitance values of the equivalent parallel capacitors are all Ca-oss(ii) a Current-converting resonant current IrIs defined as: converter resonance inductor LrMaximum current passing through and filter inductance LinCurrent I inloadThe difference, taking into account the requirement for the turn-on time of the main switch ZVS to be commutated and iloadDetermining a measurement error; i.e. iloadFrom an input source VinInflow O point is defined as positive; i.e. iLrPositive is defined by point P flowing into point Q.
When in use
Figure BDA0003291981550000031
When S is presenta6General formula I, Sa7Break, iload>0；
The circuit is in a steady state, S2、S4Is in conductionState, S1、S3And Sa3-Sa4And Sa6-Sa7In an off state; input power supply current iloadBy S2、S4And CFAfterflow;
t0at the moment, the auxiliary switch S is turned ona4And Sa6Delay DA1Then, turn off S2；
Figure BDA0003291981550000032
Off S2After, delay DA2Opening S3；
Figure BDA0003291981550000033
S3Remains on, DA3After that, the auxiliary switch S is turned offa6And Sa4Turning off the main switch S4；
Figure BDA0003291981550000041
TΔ1Controlled by a main loop SPWM;
switch off the main switch S4After, delay DA4Turning on the main switch S1；
Figure BDA0003291981550000042
TΔ2Controlled by a main loop SPWM;
main switch S1Keep on, delay DA5Turning on the auxiliary switch Sa3And Sa6；
DA5＝τ
Tau is controlled by a main loop SPWM;
auxiliary switch Sa3And Sa6Retaining guideOn, delay DA6Then, turn off S1；
Figure BDA0003291981550000043
Off S1After, delay DA7Opening S4；
Figure BDA0003291981550000044
S4Remains on, DA8After that, the auxiliary switch S is turned offa3And Sa6；
Figure BDA0003291981550000045
If it is turned off S3Returning to the initial stable state;
when in use
Figure BDA0003291981550000046
When S is presenta6Breaking, Sa7General, iload>0; the principle of the corresponding switch action is to realize the balance of the charge flowing into and out of the commutation capacitor.
The working process of the circuit running in different modes comprises the following steps:
when in use
Figure BDA0003291981550000047
When S is presenta6General formula I, Sa7Break, iload>0；
Mode 1, t<t0：Circuit arrangementIn a steady state, S2、S4In the on state, S1、S3And Sa3-Sa4And Sa6-Sa7In an off state; input power supply current iloadBy S2、S4And CFAfterflow;
mode 2, t0-t1：t0At the moment of time, the time of day,opening ofAuxiliary switch Sa4And Sa6Auxiliary diode Da2Self-conducting, commutating inductive current iLrIncreases linearly from zero; t is tATime, iLr(t) has a value of Iload；t1At the moment, the current changes the inductive current iLr(t) size and filter inductance LinSum of the current in (1) and the precharge currentload+IrEqual;
Figure BDA0003291981550000051
Figure BDA0003291981550000052
wherein t is0Time tTime 1Time period T in between0-1Comprises the following steps:
Figure BDA0003291981550000053
mode 3, t1-t2：t1At time, turn off S2The potential at the point O begins to decrease, and the commutation inductance L begins to decreaserAnd a main switch S2Equivalent parallel capacitor C2And a main switch S3Equivalent output capacitance C3Resonance occurs, to C2Charging pair C3Discharging; t is t2At the moment, the potential of the point O reaches 0;
the time domain expression of the commutation inductance current is as follows:
Figure BDA0003291981550000054
wherein:
Figure BDA0003291981550000055
Figure BDA0003291981550000056
Figure BDA0003291981550000057
wherein t is1Time t2Time interval T between moments1-2Comprises the following steps:
Figure BDA0003291981550000058
mode 4, t2-t3:t2At the moment, the main switch S3Is turned on by the body diode ofrThe current in (1) starts to decrease linearly, tBAt the moment, the main loop switch S is turned on3，tCTime of day, LrThe current in the capacitor is linearly reduced to Iload；t3Time of day, LrThe current in (1) decreases linearly to 0;
S3ZVS on allowed time period of t2Time tCTime period T between moments2-C：
Figure BDA0003291981550000061
Figure BDA0003291981550000062
Figure BDA0003291981550000063
Wherein t is2Time t3Time interval T between moments2-3Comprises the following steps:
Figure BDA0003291981550000064
mode 5, t3-t4：t3Time of day, auxiliary switch tube Sa6Is disconnected at TΔ1Before, the fourth auxiliary switch tube S is turned off at any timea4(ii) a Wherein T isΔ1Controlled by SPWM (sinusoidal pulse width modulation); wherein t is3Time t4Time interval T between moments3-4Comprises the following steps:
T3-4＝TΔ1
mode 6, t4-t5:t4At all times, the main switching tube S is disconnected4The potential at the point O starts to rise; t is t5At that time, the potential at the point O rises to VDCThird main switch tube S1Natural conduction, delay TΔ2Then, the main switch tube S is opened1(ii) a Wherein T isΔ2Controlled by SPWM; current at S1、S3、Lin、CF、 CBAnd VinThe formed loop circulates;
wherein t is4Time t5Time interval T between moments4-5Comprises the following steps:
Figure BDA0003291981550000065
mode 7, t5-t6：t5+TΔ2At + τ, the auxiliary switch S is turned ona3And Sa6Auxiliary diode Da1Naturally conducted, current-converted inductive current iLrIncreases linearly from zero; t is tDTime, iLr(t) has a value of Iload；t6At the moment, the current changes the inductive current iLr(t) size and filter inductance LinThe sum of the current and the pre-charge current Iload+IrEqual;
Figure BDA0003291981550000066
Figure BDA0003291981550000071
wherein t is5Time t6Time interval T between moments5-6Comprises the following steps:
Figure BDA0003291981550000072
mode 8, t6-t7：t6At time, turn off S1The potential at the point O is reduced, and the current conversion inductance L is reducedrAnd a main switch S1Equivalent output capacitor C1And a main switch S4Equivalent output capacitor C4Resonance occurs, to C1Charging pair C4Discharging; t is t7At the moment, the potential of the point O reaches 0;
the time domain expression of the commutation inductance current is as follows:
Figure BDA0003291981550000073
wherein:
Figure BDA0003291981550000074
Figure BDA0003291981550000075
Figure BDA0003291981550000076
wherein t is6Time t7Time interval T between moments6-7Comprises the following steps:
Figure BDA0003291981550000077
mode 9, t7-t8:t7At the moment, the main switch S4The body diode of (2) is turned on; l isrThe current in (1) starts to decrease linearly, tEAt the moment, the main loop switch S is turned on4，tFTime of day, LrThe current in the capacitor is linearly reduced to Iload；t8Time of day, LrThe current in (1) decreases linearly to 0;
S4ZVS on allowed time period of t7To tFTime period T in between7-F：
Figure BDA0003291981550000078
Figure BDA0003291981550000081
Figure BDA0003291981550000082
Wherein t is7Time t8Time interval T between moments7-8Comprises the following steps:
Figure BDA0003291981550000083
mode 10, t8-t9：t8Time of day, auxiliary switch tube Sa6The auxiliary switch tube S is turned off at any time after the disconnectiona3(ii) a Current at S3、S4And LinThe formed loop circulates; in this state, the main switch S is turned off3Returning to mode 1;
when in use
Figure BDA0003291981550000084
When S is presenta6Breaking, Sa7General, iload>0; the principle of the corresponding switch action is to realize the balance of the charge flowing into and out of the commutation capacitor.
Different from the prior art, the invention provides the capacitance voltage division soft switching inverter with the commutation action point bias voltage switching function, which can realize ZVS conduction of a main loop switch and ZCS conduction of an auxiliary loop switch. The switching of the bias voltage of the commutation action point is adapted to two states of high and low input voltage. The charge balance makes the capacitor voltage division point keep a constant voltage state. The efficiency and the power density are effectively improved, and the cost and the EMI are reduced.
Drawings
The invention will be further described with reference to the accompanying drawings and examples, in which:
fig. 1 is a schematic circuit structure diagram of a capacitance voltage division soft switching inverter with commutation point of action and bias voltage switching provided by the invention.
Fig. 2 is a schematic circuit connection diagram of a mode one operation of a capacitor voltage division soft switching inverter with commutation action point bias voltage switching provided by the invention.
Fig. 3 is a schematic circuit connection diagram of a mode two operation of a capacitor voltage division soft switching inverter with commutation action point bias voltage switching according to the present invention.
Fig. 4 is a schematic circuit connection diagram of a mode three operation of a capacitor voltage division soft switching inverter with commutation action point bias voltage switching according to the present invention.
Fig. 5 is a schematic circuit connection diagram of a capacitor voltage-dividing soft-switching inverter with commutation action point bias voltage switching in a fourth mode during operation.
Fig. 6 is a schematic circuit connection diagram of a mode five when the capacitive voltage division soft switching inverter with commutation action point bias voltage switching provided by the invention operates.
Fig. 7 is a schematic circuit connection diagram of a sixth mode of operation of a capacitive voltage division soft switching inverter with commutation operating point bias voltage switching according to the present invention.
Fig. 8 is a schematic circuit connection diagram of a mode seven when the capacitive voltage division soft switching inverter with commutation action point bias voltage switching provided by the invention operates.
Fig. 9 is a schematic circuit connection diagram of a mode eight when the capacitive voltage division soft switching inverter with commutation action point bias voltage switching operates.
Fig. 10 is a schematic circuit connection diagram of a mode nine time when the capacitive voltage division soft switching inverter with commutation action point bias voltage switching provided by the invention operates.
Fig. 11 is a schematic circuit connection diagram of a ten-mode operation of a capacitive-divided soft switching inverter with commutation-action-point-bias-voltage switching according to the present invention.
Fig. 12 is a schematic diagram of driving pulse signals and node voltage waveforms of each switching tube of a capacitive voltage division soft switching inverter with commutation action point bias voltage switching provided by the invention.
Fig. 13 is a phase plane analysis diagram of a resonant state of a capacitive voltage division soft switching inverter for switching a commutation action point bias voltage.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described are only for illustrating the invention and are not to be construed as limiting the invention. All other embodiments, which can be obtained by a person skilled in the art without making creative efforts based on the embodiments of the present invention, shall fall within the protection scope of the present invention.
As shown in fig. 1, the present invention provides a capacitor voltage-division soft-switching inverter with commutation operating point bias voltage switching, comprising: first main switch tube S1A second main switch tube S2And the third main switch tube S3The fourth main switch tube S4Flying capacitor CFMain loop DC bus capacitor CBAuxiliary loop DC bus capacitor CaBA first auxiliary capacitor Ca1A second auxiliary capacitor Ca2A first auxiliary diode Da1A first auxiliary diode Da2The third auxiliary switch tube Sa3The fourth auxiliary switch tube Sa4The fifth auxiliary diode Da5And the sixth auxiliary switch tube Sa6Seventh auxiliary switch tube Sa7The eighth auxiliary diode Da8Filter inductor LinInput power supply VinAuxiliary commutation inductor Lr；
Wherein the first main switch tube S1Source electrode and second main switch tube S2Is connected to the point a, and a third main switch tube S3Source electrode and fourth main switch tube S4The drain of the second main switch tube S is connected with the point b2Source electrode and third main switching tube S4The drain of the capacitor is connected to the point O, and the flying capacitor CFOne end is connected with the point a, and the other end is connected with the point b; fifth auxiliary diode Da5Anode and first auxiliary diode Da1The cathode of the first auxiliary diode D is connected with the point ca1Anode and second auxiliary diode Da2The cathode of the first auxiliary diode D is connected with the point Da2Positive pole and third auxiliary switch tube Sa3Is connected to the point P, and a third auxiliary switch tube Sa3Emitter and fourth auxiliary switch tube Sa4Is connected to point e, a first auxiliary capacitor Ca1One end connected to point d and the other end connected to point e, and an auxiliary loop DC bus capacitor CaBThe positive electrode is connected to the point c, and the negative electrode is connected to the fourth auxiliary switch tube Sa4An emitter of (1); sixth auxiliary switch tube Sa6Emitter and seventh auxiliary switch tube Sa7Is connected to the point Q, and a seventh auxiliary switch tube Sa7Emitter of (2) and an eighth auxiliary diode Da8The negative electrodes are connected; second auxiliary capacitor Ca2One end is connected to the point O, and the other end is connected to the seventh auxiliary switch tube Sa7An emitter of (1); auxiliary commutation inductor LrOne end is connected with the point P, and the other end is connected with the point Q; filter inductance LinOne end is connected to the O point, and the other end is connected to the input power supply VinThe positive electrode of (1); first main switch S1Drain electrode and main circuit DC bus capacitor CBIs connected with the positive pole of the fourth main switch tube S4Source electrode of, fourth auxiliary switch tube Sa4Emitter of (2), eighth auxiliary diode Da8Positive electrode of, input power supply VinNegative pole and main circuit DC bus capacitor CBThe negative electrodes are connected;
the waveforms of the driving pulse signal and the voltage of the main node of each switch tube are shown in figure 12. Setting iloadIs a current-passing filter inductor LinInstantaneous current of (I)loadIs a current-passing filter inductor LinAverage current of (d); c1-C4Main switch S1-S4The capacitance values of the equivalent parallel capacitors are all Cm-oss；Ca3-Ca4As an auxiliary switch Sa3-Sa4Equivalent parallel capacitance of Ca6-Ca7As an auxiliary switch Sa6-Sa7The capacitance values of the equivalent parallel capacitors are all Ca-oss(ii) a Current-converting resonant current IrIs defined as: commutation resonance inductance LrMaximum current passing through and filter inductance LinCurrent I inloadThe difference is taken into account the requirement of the on-time of the main switch ZVS requiring commutation and iloadDetermining a measurement error; i.e. iloadFrom an input source VinInflow O point is defined as positive; i.e. iLrPositive is defined by point P flowing into point Q. The specific elements and parameters are shown in table 1:
Figure BDA0003291981550000111
TABLE 1 element and parameter table
When in use
Figure BDA0003291981550000112
When S is presenta6General formula I, Sa7Break, iload>0。
The circuit is in a steady state, S2、S4In the on state, S1、S3And Sa3-Sa4And Sa6-Sa7In an off state; input power supply current iloadBy S2、S4And CFAnd then follow current.
t0At the moment, the auxiliary switch S is turned ona4And Sa6Delay DA1Then, turn off S2；
Figure BDA0003291981550000113
Off S2After, delay DA2Opening S3；
Figure BDA0003291981550000114
S3Remains on, DA3After that, the auxiliary switch S is turned offa6And Sa4Turning off the main switch S4；
Figure BDA0003291981550000121
TΔ1Controlled by the main loop SPWM.
Switch off the main switch S4After, delay DA4Turning on the main switch S1；
Figure BDA0003291981550000122
TΔ2Controlled by the main loop SPWM.
Main switch S1Keep on, delay DA5Turning on the auxiliary switch Sa3And Sa6；
DA5＝τ
τ is controlled by the main loop SPWM.
Auxiliary switch Sa3And Sa6Remains on for a delay of DA6Then, turn off S1；
Figure BDA0003291981550000123
Off S1After, delay DA7Opening S4；
Figure BDA0003291981550000124
S4Remains on, DA8After that, the auxiliary switch S is turned offa3And Sa6；
Figure BDA0003291981550000125
If it is turned off S3Then, the initial steady state is returned.
When in use
Figure BDA0003291981550000126
When S is presenta6Breaking, Sa7General, iload>And 0, corresponding to the switching action, the principle is to realize the balance of the charge flowing into and out of the commutation capacitor.
The working process of different modes of circuit operation is as follows:
when in use
Figure BDA0003291981550000127
When S is presenta6General formula I, Sa7Break, iload>0；
As shown in FIG. 2, in the case of mode 1, t<t0：Circuit arrangementIn a steady state, S2、S4In the on state, S1、S3And Sa3-Sa4And Sa6-Sa7In an off state; input power supply current iloadBy S2、S4And CFAfterflow;
as shown in FIG. 3, in the case of mode 2, t0-t1：t0At the moment of time, the time of day,opening ofAuxiliary switch Sa4And Sa6Auxiliary diode Da2Naturally conducted, current-converted inductive current iLrIncrease linearly from zero； tATime, iLr(t) has a value of Iload；t1At the moment, the current changes the inductive current iLr(t) magnitude and filter inductance LinThe sum of the current and the pre-charge current Iload+IrEqual;
Figure BDA0003291981550000131
Figure BDA0003291981550000132
wherein t is0Time tTime 1Time period T in between0-1Comprises the following steps:
Figure BDA0003291981550000133
as shown in FIG. 4, in the case of mode 3, t1-t2：t1At time, turn off S2The potential of the O point begins to decrease, and the commutation inductance L begins to decreaserAnd a main switch S2Equivalent parallel capacitor C2And a main switch S3Equivalent output capacitance C3Resonance occurs, to C2Charging pair C3Discharging; t is t2At the moment, the potential of the point O reaches 0;
the time domain expression of the commutation inductance current is as follows:
Figure BDA0003291981550000134
wherein:
Figure BDA0003291981550000135
Figure BDA0003291981550000136
Figure BDA0003291981550000137
wherein t is1Time t2Time interval T between moments1-2Comprises the following steps:
Figure BDA0003291981550000141
as shown in FIG. 5, in the case of mode 4, t2-t3:t2At the moment, the main switch S3Is conducted with the body diode ofrThe current in (1) starts to decrease linearly, tBAt the moment, the main loop switch S is turned on3，tCTime of day, LrThe current in the capacitor is linearly reduced to Iload；t3Time of day, LrThe current in (1) decreases linearly to 0;
S3ZVS on allowed time period of t2Time tCTime period T between moments2-C：
Figure BDA0003291981550000142
Figure BDA0003291981550000143
Figure BDA0003291981550000144
Wherein t is2Time t3Time interval T between moments2-3Comprises the following steps:
Figure BDA0003291981550000145
as shown in FIG. 6, in the case of mode 5, t3-t4：t3Time of day, auxiliary switch tube Sa6Is disconnected at TΔ1Before, the fourth auxiliary switch tube S is turned off at any timea4(ii) a Wherein T isΔ1Controlled by SPWM (sinusoidal pulse width modulation);
wherein t is3Time t4Time interval T between moments3-4Comprises the following steps:
T3-4＝TΔ1
as shown in FIG. 7, in the case of mode 6, t4-t5:t4At all times, the main switching tube S is disconnected4The potential at the point O starts to rise; t is t5At that time, the potential at the point O rises to VDCThird main switch tube S1Natural conduction, delay TΔ2Then, the main switch tube S is opened1(ii) a Wherein T isΔ2Controlled by SPWM; current at S1、S3、Lin、CF、CBAnd VinThe formed loop circulates;
wherein t is4Time t5Time interval T between moments4-5Comprises the following steps:
Figure BDA0003291981550000146
as shown in FIG. 8, in the case of mode 7, t5-t6：t5+TΔ2At + τ, the auxiliary switch S is turned ona3And Sa6Auxiliary diode Da1Naturally conducted, current-converted inductive current iLrIncreasing linearly from zero; t is tDTime, iLr(t) has a value of Iload；t6At the moment, the current changes the inductive current iLr(t) size and filter inductance LinThe sum of the current and the pre-charge current Iload+IrEqual;
Figure BDA0003291981550000151
Figure BDA0003291981550000152
wherein t is5Time t6Time interval T between moments5-6Comprises the following steps:
Figure BDA0003291981550000153
as shown in FIG. 9, in the case of mode 8, t6-t7：t6At time, turn off S1The potential at the O point is reduced, and the current conversion inductance L is reducedrAnd a main switch S1Equivalent output capacitor C1And a main switch S4Equivalent output capacitor C4Resonance occurs, to C1Charging pair C4Discharging; t is t7At the moment, the potential of the point O reaches 0;
the time domain expression of the commutation inductance current is as follows:
Figure BDA0003291981550000154
wherein:
Figure BDA0003291981550000155
Figure BDA0003291981550000156
Figure BDA0003291981550000157
wherein t is6Time t7Time interval T between moments6-7Comprises the following steps:
Figure BDA0003291981550000158
as shown in FIG. 10, in the case of mode 9, t7-t8:t7At the moment, the main switch S4The body diode of (2) is conducted; l isrThe current in (1) starts to decrease linearly, tEAt the moment, the main loop switch S is turned on4， tFTime of day, LrThe current in the capacitor is linearly reduced to Iload；t8Time of day, LrThe current in (1) decreases linearly to 0;
S4ZVS on allowed time period of t7To tFTime period T in between7-F：
Figure BDA0003291981550000161
Figure BDA0003291981550000162
Figure BDA0003291981550000163
Wherein t is7Time t8Time interval T between moments7-8Comprises the following steps:
Figure BDA0003291981550000164
as shown in FIG. 11, in the case of mode 10, t8-t9：t8Time of day, auxiliary switch tube Sa6The auxiliary switch tube S is turned off at any time after the disconnectiona3(ii) a Current at S3、S4And LinThe formed loop circulates; in this state, the main switch S is turned off3Returning to mode 1;
when in use
Figure BDA0003291981550000165
When S is presenta6Breaking, Sa7General, iload>0; corresponding to the switch actionBalance of charge inflow and outflow of the commutation capacitor is achieved.
While the present invention has been described with reference to the embodiments shown in the drawings, the present invention is not limited to the embodiments, which are illustrative and not restrictive, and it will be apparent to those skilled in the art that various changes and modifications can be made therein without departing from the spirit and scope of the invention as defined in the appended claims.

Claims (3)

1. A capacitive voltage division soft switching inverter with switching of a commutation action point bias voltage, comprising: first main switch tube S1A second main switch tube S2And the third main switch tube S3The fourth main switch tube S4Flying capacitor CFMain circuit DC bus capacitor CBAuxiliary loop DC bus capacitor CaBA first auxiliary capacitor Ca1A second auxiliary capacitor Ca2A first auxiliary diode Da1A first auxiliary diode Da2The third auxiliary switch tube Sa3The fourth auxiliary switch tube Sa4The fifth auxiliary diode Da5And the sixth auxiliary switch tube Sa6Seventh auxiliary switch tube Sa7The eighth auxiliary diode Da8Filter inductor LinInput power supply VinAuxiliary commutation inductor Lr；
Wherein the first main switch tube S1Source electrode and second main switch tube S2The drain of the first main switch tube is connected with the point a, and the third main switch tube S3Source electrode and fourth main switch tube S4The drain of the second main switch tube S is connected with the point b2Source electrode and third main switching tube S3The drain of the capacitor is connected to the point O, and the flying capacitor CFOne end is connected with the point a, and the other end is connected with the point b; fifth auxiliary diode Da5Anode and first auxiliary diode Da1The cathode of the first auxiliary diode D is connected with the point ca1Anode and second auxiliary diode Da2The negative electrode of the first diode is connected with the point d, and the second auxiliary diodePipe Da2Positive pole and third auxiliary switch tube Sa3Is connected to the point P, and a third auxiliary switch tube Sa3Emitter and fourth auxiliary switch tube Sa4Is connected to point e, a first auxiliary capacitor Ca1One end of the auxiliary loop is connected to the point d, the other end of the auxiliary loop is connected to the point e, and the auxiliary loop direct current bus capacitor CaBThe positive electrode is connected to the point c, and the negative electrode is connected to the fourth auxiliary switch tube Sa4An emitter of (1); sixth auxiliary switch tube Sa6Emitter and seventh auxiliary switch tube Sa7Is connected to the point Q, and a seventh auxiliary switch tube Sa7Emitter of (2) and an eighth auxiliary diode Da8The negative electrodes are connected; second auxiliary capacitor Ca2One end is connected to the point O, and the other end is connected to the seventh auxiliary switch tube Sa7An emitter of (1); auxiliary commutation inductor LrOne end is connected with the point P, and the other end is connected with the point Q; filter inductance LinOne end is connected to the O point, and the other end is connected to the input power supply VinThe positive electrode of (1); first main switch S1Drain electrode and main circuit DC bus capacitor CBThe positive pole of the fourth main switch tube S is connected4Source electrode of, fourth auxiliary switch tube Sa4Emitter of (2), eighth auxiliary diode Da8Positive electrode of, input power supply VinNegative pole and main circuit DC bus capacitor CBThe negative electrodes are connected;
setting iloadIs a current-passing filter inductor LinInstantaneous current of (I)loadIs a current-passing filter inductor LinAverage current of (d); c1-C4Main switch S1-S4The capacitance values of the equivalent parallel capacitors are all Cm-oss；Ca3-Ca4As an auxiliary switch Sa3-Sa4Equivalent parallel capacitance of Ca6-Ca7As an auxiliary switch Sa6-Sa7The capacitance values of the equivalent parallel capacitors are all Ca-oss(ii) a Current-converting resonant current IrIs defined as: commutation resonance inductor LrMaximum current passing through and filter inductance LinCurrent I inloadThe difference, considering the requirement of the turn-on time of the main switch ZVS requiring commutation and iloadMeasurement error determinationDetermining; i.e. iloadFrom an input source VinInflow O point is defined as positive; i.e. iLrPositive is defined by point P flowing into point Q.
2. The commutating operating point bias voltage switched capacitor voltage dividing soft switching inverter of claim 1 wherein the circuit operation is divided into two regimes in common, wherein,
the working condition I is as follows: when in use
Figure FDA0003291981540000021
When S is presenta6General formula I, Sa7Break, iload>0；
The circuit is in a steady state, S2、S4In the on state, S1、S3And Sa3-Sa4And Sa6-Sa7In an off state; input power supply current iloadBy S2、S4And CFAfterflow; t is t0At the moment, the auxiliary switch S is turned ona4And Sa6Delay DA1Then, turn off S2；
Figure FDA0003291981540000022
Off S2After, delay DA2Opening S3；
Figure FDA0003291981540000023
S3Remains on, DA3After that, the auxiliary switch S is turned offa6And Sa4Turning off the main switch S4；
Figure FDA0003291981540000024
TΔ1Controlled by a main loop SPWM;
switch off the main switch S4After, delay DA4Turning on the main switch S1；
Figure FDA0003291981540000025
TΔ2Controlled by a main loop SPWM;
main switch S1Keep on, delay DA5Turning on the auxiliary switch Sa3And Sa6；
DA5＝τ
Tau is controlled by a main loop SPWM;
auxiliary switch Sa3And Sa6Remains on for a delay of DA6Then, turn off S1；
Figure FDA0003291981540000031
Off S1After, delay DA7Opening S4；
Figure FDA0003291981540000032
S4Remains on, DA8After that, the auxiliary switch S is turned offa3And Sa6；
Figure FDA0003291981540000033
If it is turned off S3Returning to the initial stable state;
working conditions are as follows: when in use
Figure FDA0003291981540000034
When S is presenta6Breaking, Sa7General, iload>0；
The circuit is in a steady state, S1、S2In the on state, S3、S4And Sa3-Sa4And Sa6-Sa7In an off state; input power supply current iloadBy S1、S2And CBAfterflow;
t0at the moment, the auxiliary switch S is turned ona7And Sa3Delay DA1Then, turn off S1；
Figure FDA0003291981540000035
Off S1After, delay DA2Opening S4；
Figure FDA0003291981540000036
S4Remains on, DA3After that, the auxiliary switch S is turned offa3And Sa7Turning off the main switch S4；
Figure FDA0003291981540000037
TΔ1Controlled by a main loop SPWM;
disconnect Sa3、Sa7And S4After, delay DA4Turning on the main switch S1；
Figure FDA0003291981540000038
TΔ1Controlled by a main loop SPWM;
main switch S1Keep on, delay DA5Turning on the auxiliary switch Sa7And Sa4；
DA5＝τ
Tau is controlled by a main loop SPWM;
auxiliary switch Sa7And Sa4Remains on for a delay of DA6Then, turn off S2；
Figure FDA0003291981540000041
Off S2After, delay DA7Opening S3；
Figure FDA0003291981540000042
S3Remains on, DA8After that, the auxiliary switch S is turned offa7And Sa4；
Figure FDA0003291981540000043
If it is turned off S4Then, the initial steady state is returned.
3. The soft switching inverter with the commutation action point and the switched bias voltage and the capacitor voltage division as claimed in claim 2, wherein the circuit operates under two working conditions in different modes as follows:
the working condition I is as follows: when in use
Figure FDA0003291981540000044
When S is presenta6General formula I, Sa7Break, iload>0；
Mode 1, t<t0：Circuit arrangementIn a steady state, S2、S4In the on state, S1、S3And Sa3-Sa4And Sa6-Sa7In an off state; input power supply current iloadBy S2、S4And CFFollow current；
Mode 2, t0-t1：t0At the moment, the auxiliary switch S is turned ona4And Sa6Auxiliary diode Da2Naturally conducted, current-converted inductive current iLrIncreases linearly from zero; t is tATime, iLr(t) has a value of Iload；t1At the moment, the current changes the inductive current iLr(t) size and filter inductance LinThe sum of the current and the pre-charge current Iload+IrEqual;
Figure FDA0003291981540000045
Figure FDA0003291981540000051
wherein t is0Time tTime 1Time period T in between0-1Comprises the following steps:
Figure FDA0003291981540000052
mode 3, t1-t2：t1At time, turn off S2The potential at the point O begins to decrease, and the commutation inductance L begins to decreaserAnd a main switch S2Equivalent parallel capacitor C2And a main switch S3Equivalent output capacitance C3Resonance occurs, to C2Charging pair C3Discharging; t is t2At the moment, the potential of the point O reaches 0;
the time domain expression of the commutation inductance current is as follows:
Figure FDA0003291981540000053
wherein:
Figure FDA0003291981540000054
Figure FDA0003291981540000055
Figure FDA0003291981540000056
wherein t is1Time t2Time interval T between moments1-2Comprises the following steps:
Figure FDA0003291981540000057
mode 4, t2-t3:t2At the moment, the main switch S3Is turned on by the body diode ofrThe current in (1) starts to decrease linearly, tBAt the moment, the main loop switch S is turned on3，tCTime of day, LrThe current in the capacitor is linearly reduced to Iload；t3Time of day, LrThe current in (1) decreases linearly to 0;
S3ZVS on allowed time period of t2Time tCTime period T between moments2-C：
Figure FDA0003291981540000058
Figure FDA0003291981540000061
Figure FDA0003291981540000062
Wherein t is2Time t3Time interval T between moments2-3Comprises the following steps:
Figure FDA0003291981540000063
mode 5, t3-t4：t3Time of day, auxiliary switch tube Sa6Is disconnected at TΔ1Before, the fourth auxiliary switch tube S is turned off at any timea4(ii) a Wherein T isΔ1Controlled by SPWM (sinusoidal pulse width modulation); wherein t is3Time t4Time interval T between moments3-4Comprises the following steps:
T3-4＝TΔ1
mode 6, t4-t5:t4At all times, the main switching tube S is disconnected4The potential at the point O starts to rise; t is t5At that time, the potential at the point O rises to VDCThird main switch tube S1Natural conduction, delay TΔ2Then, the main switch tube S is opened1(ii) a Wherein T isΔ2Controlled by SPWM; current at S1、S3、Lin、CF、CBAnd VinThe formed loop circulates;
wherein t is4Time t5Time interval T between moments4-5Comprises the following steps:
Figure FDA0003291981540000064
mode 7, t5-t6：t5+TΔ2At + τ, the auxiliary switch S is turned ona3And Sa6Auxiliary diode Da1Naturally conducted, current-converted inductive current iLrIncreases linearly from zero; t is tDTime, iLr(t) has a value of Iload；t6At the moment, the current changes the inductive current iLr(t) size and filter inductance LinThe sum of the current and the pre-charge current Iload+IrEqual;
Figure FDA0003291981540000065
Figure FDA0003291981540000066
wherein t is5Time t6Time interval T between moments5-6Comprises the following steps:
Figure FDA0003291981540000067
mode 8, t6-t7：t6At time, turn off S1The potential at the point O is reduced, and the current conversion inductance L is reducedrAnd a main switch S1Equivalent output capacitor C1And a main switch S4Equivalent output capacitor C4Resonance occurs, to C1Charging pair C4Discharging; t is t7At the moment, the potential of the point O reaches 0;
the time domain expression of the commutation inductance current is as follows:
Figure FDA0003291981540000071
wherein:
Figure FDA0003291981540000072
Figure FDA0003291981540000073
Figure FDA0003291981540000074
wherein t is6Time t7Time interval T between moments6-7Comprises the following steps:
Figure FDA0003291981540000075
mode 9, t7-t8:t7At the moment, the main switch S4The body diode of (2) is turned on; l isrThe current in (1) starts to decrease linearly, tEAt the moment, the main loop switch S is turned on4，tFTime of day, LrThe current in the capacitor is linearly reduced to Iload；t8Time of day, LrThe current in (1) decreases linearly to 0;
S4ZVS on allowed time period of t7To tFTime period T in between7-F：
Figure FDA0003291981540000076
Figure FDA0003291981540000077
Figure FDA0003291981540000078
Wherein t is7Time t8Time interval T between moments7-8Comprises the following steps:
Figure FDA0003291981540000079
mode 10, t8-t9：t8Time of day, auxiliary switch tube Sa6The auxiliary switch tube S is turned off at any time after the disconnectiona3(ii) a Current at S3、S4And LinThe formed loop circulates; in this state, the main switch S is turned off3Returning to mode 1;
working conditions are as follows: when in use
Figure FDA0003291981540000081
When S is presenta6Breaking, Sa7General, iload>0；
Mode 1, t<t0: the circuit is in a steady state, S1、S2In the on state, S3、S4And Sa3-Sa4And Sa6-Sa7In an off state; input power supply current iloadBy S1、S2And CBAfterflow;
mode 2, t0-t1：t0At the moment, the auxiliary switch S is turned ona7And Sa3Auxiliary diode Da1Naturally conducted, current-converted inductive current iLrIncreases linearly from zero; t is tATime, iLr(t) has a value of Iload；t1At the moment, the current changes the inductive current iLr(t) size and filter inductance LinThe sum of the current and the pre-charge current Iload+IrEqual;
Figure FDA0003291981540000082
Figure FDA0003291981540000083
wherein t is0Time t1Time interval T between moments0-1Comprises the following steps:
Figure FDA0003291981540000084
mode 3, t1-t2：t1At time, turn off S1O point ofThe potential begins to drop, and the commutation inductance LrAnd a main switch S1Equivalent parallel capacitor C1And a main switch S4Equivalent output capacitance C4Resonance occurs, to C1Charging pair C4Discharging; t is t2At the moment, the potential of the point O reaches 0;
the time domain expression of the commutation inductance current is as follows:
Figure FDA0003291981540000085
wherein:
Figure FDA0003291981540000086
Figure FDA0003291981540000087
Figure FDA0003291981540000091
wherein t is1Time t2Time interval T between moments1-2Comprises the following steps:
Figure FDA0003291981540000092
mode 4, t2-t3:t2At the moment, the main switch S4Is conducted, the auxiliary diode Da8Natural conduction, LrThe current in (1) starts to decrease linearly, tBAt the moment, the main loop switch S is turned on4，tCTime of day, LrThe current in the capacitor is linearly reduced to Iload；t3Time of day, LrThe current in (1) decreases linearly to 0;
S4has a ZVS on permission period oft2Time tCTime period T between moments2-C：
Figure FDA0003291981540000093
Figure FDA0003291981540000094
Figure FDA0003291981540000095
Wherein t is2Time t3Time interval T between moments2-3Comprises the following steps:
Figure FDA0003291981540000096
mode 5, t3-t4：t3Time of day, auxiliary switch tube Sa7Open, auxiliary diode Da8Naturally break off, at TΔ1Before, the fourth auxiliary switch tube S is turned off at any timea3(ii) a Wherein T isΔ1Controlled by SPWM;
wherein t is3Time t4Time interval T between moments3-4Comprises the following steps:
T3-4＝TΔ1
mode 6, t4-t5:t4At all times, the main switching tube S is disconnected4The potential at the point O starts to rise; t is t5At that time, the potential at the point O rises to
Figure FDA0003291981540000097
Third main switch tube S1Natural conduction, delay TΔ2Then, the main switch tube S is opened1(ii) a Wherein T isΔ2Controlled by SPWM; current at S1、S2、Lin、CBAnd VinThe formed loop circulates;
wherein t is4Time t5Time interval T between moments4-5Comprises the following steps:
Figure FDA0003291981540000101
mode 7, t5-t6：t5+TΔ2At + τ, the auxiliary switch S is turned ona7And Sa4Auxiliary diode Da2Naturally conducted, current-converted inductive current iLrIncreases linearly from zero; t is tDTime, iLr(t) has a value of Iload；t6At the moment, the current changes the inductive current iLr(t) size and filter inductance LinThe sum of the current and the pre-charge current Iload+IrEqual;
Figure FDA0003291981540000102
Figure FDA0003291981540000103
wherein t is5Time t6Time interval T between moments5-6Comprises the following steps:
Figure FDA0003291981540000104
mode 8, t6-t7：t6At time, turn off S2The potential at the point O is reduced, and the current conversion inductance L is reducedrAnd a main switch S2Equivalent output capacitor C2And a main switch S3Equivalent output capacitor C3Resonance occurs, to C2Charging pair C3Discharging; t is t7At the moment, the potential of the point O reaches 0;
the time domain expression of the commutation inductance current is as follows:
Figure FDA0003291981540000105
wherein:
Figure FDA0003291981540000106
Figure FDA0003291981540000107
Figure FDA0003291981540000108
wherein t is6Time t7Time interval T between moments6-7Comprises the following steps:
Figure FDA0003291981540000111
mode 9, t7-t8:t7At the moment, the main switch S3The body diode of (2) is turned on; l isrThe current in (1) starts to decrease linearly, tEAt the moment, the main loop switch S is turned on3，tFTime of day, LrThe current in the capacitor is linearly reduced to Iload；t8Time of day, LrThe current in (1) decreases linearly to 0;
S3ZVS on allowed time period of t7To tFTime period T in between7-F：
Figure FDA0003291981540000112
Figure FDA0003291981540000113
Figure FDA0003291981540000114
Wherein t is7Time t8Time interval T between moments7-8Comprises the following steps:
Figure FDA0003291981540000115
mode 10, t8-t9：t8Time of day, auxiliary switch tube Sa7The auxiliary switch tube S is turned off at any time after the disconnectiona4(ii) a Current at S1、S3、CFAnd LinThe formed loop circulates; in this state, the main switch S is turned off3Mode 1 may be returned to.
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20110019537A (en) * 2009-08-20 2011-02-28 삼성전기주식회사 Soft switching inverter using soft switching converter
CN102281006A (en) * 2011-03-31 2011-12-14 东北大学 Novel three-level soft switching converter
CN106533224A (en) * 2016-12-08 2017-03-22 东北大学 Novel resonant DC-link soft switching inverter and modulation method thereof

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20110019537A (en) * 2009-08-20 2011-02-28 삼성전기주식회사 Soft switching inverter using soft switching converter
CN102281006A (en) * 2011-03-31 2011-12-14 东北大学 Novel three-level soft switching converter
CN106533224A (en) * 2016-12-08 2017-03-22 东北大学 Novel resonant DC-link soft switching inverter and modulation method thereof

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
王强;王天施;侯利民;刘晓琴;: "变压器辅助换流的谐振直流环节软开关逆变器", 电机与控制学报, no. 07 *

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