CN114050150A - Multilayer metal capacitor structure and preparation method thereof - Google Patents

Multilayer metal capacitor structure and preparation method thereof Download PDF

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Publication number
CN114050150A
CN114050150A CN202111327272.9A CN202111327272A CN114050150A CN 114050150 A CN114050150 A CN 114050150A CN 202111327272 A CN202111327272 A CN 202111327272A CN 114050150 A CN114050150 A CN 114050150A
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layer
capacitor
plate
metal
electrode plate
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高学
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Jiangsu Geruibao Electronics Co ltd
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Jiangsu Geruibao Electronics Co ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64Impedance arrangements
    • H01L23/642Capacitive arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • H01L28/60Electrodes

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Abstract

The invention discloses a multilayer metal capacitor structure and a preparation method thereof, wherein the multilayer metal capacitor structure comprises 2 electrodes which are positioned at the top and arranged on the same layer, at least 2 layers of capacitor lower plates which are arranged at intervals in the vertical direction, and a capacitor dielectric layer and a capacitor upper plate which are sequentially overlapped on each layer of capacitor lower plate from bottom to top, wherein the capacitor upper plate of each layer is overlapped in the vertical direction, the capacitor upper plate of each layer and the capacitor lower plate of the adjacent layer are connected with one electrode, and the capacitor lower plate of each layer and the capacitor upper plate of the adjacent layer are connected with one electrode. The invention effectively solves the problem of high production cost of a multilayer structure while keeping high capacitance density.

Description

Multilayer metal capacitor structure and preparation method thereof
Technical Field
The present disclosure relates to metal capacitors, and particularly to a multilayer metal capacitor.
Background
In the current integrated circuit process, the MIM metal capacitor structure has been widely used. In order to increase the capacitance density, a multi-layer capacitor structure is usually adopted, but in the current multi-layer capacitor structure, all upper electrode plates are connected with an electrode, and all lower electrode plates are connected with an electrode; when the upper electrode plate of the capacitor of the layer needs to be designed with a contact area for connecting the through hole, the contact area cannot be shielded by the MIM capacitor of the lower layer; each layer of upper polar plate needs to be formed by an independent photoetching plate through a photoetching process; therefore, the existing multilayer metal capacitor structure greatly increases the capacitor density, but also causes other problems. Because the upper plate of each layer of capacitor needs one photoetching plate to be formed through photoetching technology, and a plurality of photoetching plates are needed for a plurality of layers, the production cost is increased, and the difficulty of popularization and application is increased.
Therefore, it is desired to solve the above problems.
Disclosure of Invention
The purpose of the invention is as follows: a first object of the present invention is to provide a multilayer metal capacitor structure with a great saving in production cost.
The second purpose of the invention is to provide a preparation method of the multilayer metal capacitor structure.
The technical scheme is as follows: in order to achieve the above purpose, the invention discloses a multilayer metal capacitor structure, which comprises 2 electrodes positioned on the top and arranged on the same layer, at least 2 layers of capacitor lower plates arranged at intervals in the vertical direction, and a capacitor dielectric layer and a capacitor upper plate which are sequentially stacked on each layer of capacitor lower plate from bottom to top, wherein the capacitor upper plate of each layer is overlapped in the vertical direction, the capacitor upper plate of each layer and the capacitor lower plate of the adjacent layer are connected with one electrode, and the capacitor lower plate of each layer and the capacitor upper plate of the adjacent layer are connected with one electrode.
Wherein, the capacitor upper polar plate of the next layer is connected with the capacitor lower polar plate of the previous layer.
Preferably, the capacitor upper plates share the same photoetching plate.
And a metal insulating layer is deposited between the two adjacent capacitor lower electrode plates.
Furthermore, a metal insulating layer is deposited between the lower electrode plate of the top capacitor and the 2 electrodes.
Preferably, the capacitor dielectric layer is a silicon nitride layer or a silicon oxynitride layer.
The first layer of capacitor upper electrode plate is connected with the second layer of capacitor lower electrode plate through a contact through hole, the first layer of capacitor lower electrode plate is connected with the first contact metal through the contact through hole, and the first contact metal is connected with the second electrode through the contact through hole; the lower electrode plate of the second layer of capacitor is connected with the first electrode through the contact through hole, and the upper electrode plate of the second layer of capacitor is connected with the second electrode through the contact through hole.
The capacitor further comprises a first layer of capacitor lower pole plate, a second layer of capacitor lower pole plate, first contact metal arranged in the same layer with the second layer of capacitor lower pole plate and second contact metal arranged in the same layer with the third layer of capacitor lower pole plate, wherein the first layer of capacitor upper pole plate is connected with the second layer of capacitor lower pole plate through a contact through hole, the first layer of capacitor lower pole plate is connected with the first contact metal through the contact through hole, and the first contact metal is connected with the third layer of capacitor lower pole plate through the contact through hole; the lower electrode plate of the second layer of capacitor is connected with a second contact metal through a contact through hole, the second contact metal is connected with the first electrode through the contact through hole, and the upper electrode plate of the second layer of capacitor is connected with the lower electrode plate of the third layer of capacitor through the contact through hole; the lower electrode plate of the third layer of capacitor is connected with the second electrode through the contact through hole, and the upper electrode plate of the third layer of capacitor is connected with the first electrode through the contact through hole.
Furthermore, the contact through hole is filled with a conductive material.
The invention relates to a preparation method of a multilayer metal capacitor structure, which comprises the following steps:
(1) firstly, depositing a metal layer, and photoetching to form a first layer of capacitor lower electrode plate;
(2) depositing a first capacitor dielectric layer on the first capacitor lower electrode plate, then depositing a metal layer, and then photoetching to form a first capacitor upper electrode plate;
(3) depositing an oxide layer on the first layer of capacitor lower electrode plate and flattening and grinding to form a first layer of metal insulation layer;
(4) carrying out through hole photoetching on the first layer of metal insulation layer, filling a conductive material in the through hole, and leading out a first layer of capacitor upper electrode plate and a first layer of capacitor lower electrode plate;
(5) depositing a metal layer above the first metal insulating layer, and photoetching to form a second capacitor lower pole plate and first contact metal, wherein the second capacitor lower pole plate is connected with the first capacitor upper pole plate, and the first contact metal is connected with the first capacitor lower pole plate;
(6) depositing a second capacitor dielectric layer on the second capacitor lower electrode plate, depositing a metal layer, and photoetching to form a second capacitor upper electrode plate;
(7) depositing an oxide layer on the lower electrode plate of the second layer of capacitor and the first contact metal, and flattening and grinding to form a second layer of metal insulation layer;
(8) carrying out through hole photoetching on the second layer of metal insulation layer, filling a conductive material in the through hole, and leading out a second layer of capacitor upper electrode plate, a second layer of capacitor lower electrode plate and first contact metal;
(9) repeating the steps (5) to (8), and leading out the Nth layer of capacitor upper electrode plate, the Nth layer of capacitor lower electrode plate and the N-1 th contact metal, wherein N is more than or equal to 2;
(10) when N is an even number, the lower electrode plate of the Nth layer of capacitor is connected with the first electrode, and the upper electrode plate of the Nth layer of capacitor and the N-1 th contact metal are connected with the second electrode; and when N is an odd number, the lower electrode plate of the Nth layer of capacitor is connected with the second electrode, and the upper electrode plate of the Nth layer of capacitor and the N-1 th contact metal are connected with the first electrode.
Has the advantages that: compared with the prior art, the invention has the following remarkable advantages: the invention changes the multilayer metal capacitor structure, so that the upper pole plate of each layer and the lower pole of the adjacent layer are connected with an electrode, and the lower pole plate of each layer and the upper pole plate of the adjacent layer are connected with an electrode; and when the contact area used for connecting the through hole on the upper electrode plate of the capacitor on the layer can be shielded by the metal capacitor on the lower layer; therefore, the upper polar plate can adopt an overlapped design in space, the same photoetching plate can be shared, the production cost is greatly saved, the chip area can be further saved by the overlapped design, and the capacitance density is improved.
Drawings
FIG. 1 is a schematic structural view of example 1 of the present invention;
fig. 2 is a schematic structural diagram of embodiment 2 of the present invention.
Detailed Description
The technical scheme of the invention is further explained by combining the attached drawings.
The invention relates to a multilayer metal capacitor structure, which comprises 2 electrodes, a capacitor lower electrode plate of each layer, a capacitor dielectric layer of each layer, a capacitor upper electrode plate of each layer and a metal insulating layer of each layer. 2 electrodes are located on the top, and the 2 electrodes are arranged in the same layer. At least 2 layers of capacitor lower electrode plates are positioned below 2 electrodes, and at least 2 layers of capacitor lower electrode plates are arranged at intervals along the vertical direction, a capacitor dielectric layer and a capacitor upper electrode plate are sequentially stacked on each layer of capacitor lower electrode plate from bottom to top, a metal insulation layer is deposited between every two adjacent layers of capacitor lower electrode plates, a metal insulation layer is deposited between the top layer of capacitor lower electrode plate and the 2 electrodes, and the capacitor dielectric layer is a silicon nitride layer or a silicon oxynitride layer.
In the invention, the upper electrode plates of each layer of capacitors are overlapped in the vertical direction, and the upper electrode plates of the capacitors share the same photoetching plate; the upper capacitor plate of each layer and the lower capacitor plate of the adjacent layer are connected with an electrode, the lower capacitor plate of each layer and the upper capacitor plate of the adjacent layer are connected with an electrode, and the upper capacitor plate of the next layer is connected with the lower capacitor plate of the previous layer.
The invention relates to a preparation method of a multilayer metal capacitor structure, which comprises the following steps:
(1) firstly, depositing a metal layer, and photoetching to form a first layer of capacitor lower electrode plate;
(2) depositing a first capacitor dielectric layer on the first capacitor lower electrode plate, then depositing a metal layer, and then photoetching to form a first capacitor upper electrode plate;
(3) depositing an oxide layer on the first layer of capacitor lower electrode plate and flattening and grinding to form a first layer of metal insulation layer;
(4) carrying out through hole photoetching on the first layer of metal insulation layer, filling a conductive material in the through hole, and leading out a first layer of capacitor upper electrode plate and a first layer of capacitor lower electrode plate;
(5) depositing a metal layer above the first metal insulating layer, and photoetching to form a second capacitor lower pole plate and first contact metal, wherein the second capacitor lower pole plate is connected with the first capacitor upper pole plate, and the first contact metal is connected with the first capacitor lower pole plate;
(6) depositing a second capacitor dielectric layer on the second capacitor lower electrode plate, depositing a metal layer, and photoetching to form a second capacitor upper electrode plate;
(7) depositing an oxide layer on the lower electrode plate of the second layer of capacitor and the first contact metal, and flattening and grinding to form a second layer of metal insulation layer;
(8) carrying out through hole photoetching on the second layer of metal insulation layer, filling a conductive material in the through hole, and leading out a second layer of capacitor upper electrode plate, a second layer of capacitor lower electrode plate and first contact metal;
(9) repeating the steps (5) to (8), and leading out the Nth layer of capacitor upper electrode plate, the Nth layer of capacitor lower electrode plate and the N-1 th contact metal, wherein N is more than or equal to 2;
(10) when N is an even number, the lower electrode plate of the Nth layer of capacitor is connected with the first electrode, and the upper electrode plate of the Nth layer of capacitor and the N-1 th contact metal are connected with the second electrode; and when N is an odd number, the lower electrode plate of the Nth layer of capacitor is connected with the second electrode, and the upper electrode plate of the Nth layer of capacitor and the N-1 th contact metal are connected with the first electrode.
Example 1
As shown in fig. 1, the multilayer metal capacitor structure in embodiment 1 includes a first electrode 1, a second electrode 2, a first capacitor bottom plate 3, a first capacitor dielectric layer 4, a first capacitor top plate 5, a second capacitor bottom plate 6, a first contact metal 7, a second capacitor dielectric layer 8, a second capacitor top plate 9, and each metal insulating layer.
The first electrode 1 and the second electrode 2 are located on top and the first electrode 1 and the second electrode 2 are arranged in the same layer. The first layer of capacitor lower electrode plate 3 and the second layer of capacitor lower electrode plate 6 are both located below the 2 electrodes, the first layer of capacitor lower electrode plate 3 and the second layer of capacitor lower electrode plate 6 are arranged at intervals along the vertical direction, the first layer of capacitor dielectric layer 4 and the first layer of capacitor upper electrode plate 5 are sequentially stacked on the first layer of capacitor lower electrode plate 3 from bottom to top, and the second layer of capacitor dielectric layer 8 and the second capacitor upper electrode plate 9 are sequentially stacked on the second layer of capacitor lower electrode plate 6 from bottom to top. A metal insulating layer is deposited between the two adjacent capacitor lower polar plates, a metal insulating layer is deposited between the top capacitor lower polar plate and the first electrode 1 and the second electrode 2, and the capacitor dielectric layer is a silicon nitride layer or a silicon dioxide layer; the first contact metal 7 and the second layer of capacitor lower plate 6 are arranged on the same layer.
In the invention, a first capacitor dielectric layer 4, a first capacitor upper electrode plate 5, a second capacitor dielectric layer 8 and a second capacitor upper electrode plate 9 are overlapped in the vertical direction, and the capacitor upper electrode plates share the same photoetching plate; the first layer of capacitor upper electrode plate 5 is connected with the second layer of capacitor lower electrode plate 6 through a contact through hole, the first layer of capacitor lower electrode plate 3 is connected with a first contact metal 7 through a contact through hole, and the first contact metal 7 is connected with the second electrode 2 through a contact through hole; the lower electrode plate 6 of the second layer of capacitor is connected with the first electrode 1 through a contact through hole, and the upper electrode plate 9 of the second layer of capacitor is connected with the second electrode 2 through a contact through hole. The contact through hole is positioned in the metal insulating layer and filled with a conductive material.
The invention relates to a preparation method of a multilayer metal capacitor structure, which comprises the following steps:
(1) firstly, depositing a metal layer, and photoetching to form a first layer of capacitor lower electrode plate;
(2) depositing a first capacitor dielectric layer on the first capacitor lower electrode plate, then depositing a metal layer, and then photoetching to form a first capacitor upper electrode plate;
(3) depositing an oxide layer on the first layer of capacitor lower electrode plate and flattening and grinding to form a first layer of metal insulation layer;
(4) carrying out through hole photoetching on the first layer of metal insulation layer, filling a conductive material in the through hole, and leading out a first layer of capacitor upper electrode plate and a first layer of capacitor lower electrode plate;
(5) depositing a metal layer above the first metal insulating layer, and photoetching to form a second capacitor lower pole plate and first contact metal, wherein the second capacitor lower pole plate is connected with the first capacitor upper pole plate, and the first contact metal is connected with the first capacitor lower pole plate;
(6) depositing a second capacitor dielectric layer on the second capacitor lower electrode plate, depositing a metal layer, and photoetching to form a second capacitor upper electrode plate;
(7) depositing an oxide layer on the lower electrode plate of the second layer of capacitor and the first contact metal, and flattening and grinding to form a second layer of metal insulation layer;
(8) carrying out through hole photoetching on the second layer of metal insulation layer, filling a conductive material in the through hole, and leading out a second layer of capacitor upper electrode plate, a second layer of capacitor lower electrode plate and first contact metal;
(9) and the lower electrode plate of the 2 nd layer capacitor is connected with the first electrode, and the upper electrode plate of the 2 nd layer capacitor and the 1 st contact metal are connected with the second electrode.
Example 2
As shown in fig. 2, the multilayer metal capacitor structure includes a first electrode 1, a second electrode 2, a first capacitor bottom plate 3, a first capacitor dielectric layer 4, a first capacitor top plate 5, a second capacitor bottom plate 6, a first contact metal 7, a second capacitor dielectric layer 8, a second capacitor top plate 9, a third capacitor bottom plate 10, a second contact metal 11, a third capacitor dielectric layer 12, a third capacitor top plate 13, and each metal insulating layer.
The first electrode 1 and the second electrode 2 are located on top and the first electrode 1 and the second electrode 2 are arranged in the same layer. The first layer of capacitor lower electrode plate 3, the second layer of capacitor lower electrode plate 6 and the third layer of capacitor lower electrode plate 10 are all located below 2 electrodes, the first layer of capacitor lower electrode plate 3, the second layer of capacitor lower electrode plate 6 and the third layer of capacitor lower electrode plate 10 are arranged at intervals along the vertical direction, a first layer of capacitor dielectric layer 4 and a first layer of capacitor upper electrode plate 5 are sequentially stacked on the first layer of capacitor lower electrode plate 3 from bottom to top, a second capacitor dielectric layer 8 and a second capacitor upper electrode plate 9 are sequentially stacked on the second layer of capacitor lower electrode plate 6 from bottom to top, and a third capacitor dielectric layer 12 and a third capacitor upper electrode plate 13 are sequentially stacked on the third layer of capacitor lower electrode plate 10 from bottom to top. A metal insulating layer is deposited between the two adjacent capacitor lower polar plates, a metal insulating layer is deposited between the top capacitor lower polar plate and the first electrode 1 and the second electrode 2, and the capacitor dielectric layer is a silicon nitride layer or a silicon dioxide layer; the first contact metal 7 and the second layer of capacitor lower plate 6 are arranged on the same layer, and the second contact metal 11 and the third layer of capacitor lower plate 10 are arranged on the same layer.
In the invention, a first capacitor dielectric layer 4, a first capacitor upper polar plate 5, a second capacitor dielectric layer 8, a second capacitor upper polar plate 9, a third capacitor dielectric layer 12 and a third capacitor upper polar plate 13 are overlapped in the vertical direction, and the capacitor upper polar plates share the same photoetching plate; the first layer of capacitor upper electrode plate 5 is connected with the second layer of capacitor lower electrode plate 6 through a contact through hole, the first layer of capacitor lower electrode plate 3 is connected with a first contact metal 7 through a contact through hole, and the first contact metal 7 is connected with the third layer of capacitor lower electrode plate 10 through a contact through hole; the second layer of capacitor lower plate 6 is connected with a second contact metal 11 through a contact through hole, the second contact metal 11 is connected with the first electrode 1 through the contact through hole, and the second layer of capacitor upper plate 9 is connected with a third layer of capacitor lower plate 10 through the contact through hole; the lower electrode plate 10 of the third layer of capacitor is connected with the second electrode 2 through a contact through hole, and the upper electrode plate 13 of the third layer of capacitor is connected with the first electrode 1 through a contact through hole. The contact through hole is positioned in the metal insulating layer and filled with a conductive material.
The invention relates to a preparation method of a multilayer metal capacitor structure, which comprises the following steps:
(1) firstly, depositing a metal layer, and photoetching to form a first layer of capacitor lower electrode plate;
(2) depositing a first capacitor dielectric layer on the first capacitor lower electrode plate, then depositing a metal layer, and then photoetching to form a first capacitor upper electrode plate;
(3) depositing an oxide layer on the first layer of capacitor lower electrode plate and flattening and grinding to form a first layer of metal insulation layer;
(4) carrying out through hole photoetching on the first layer of metal insulation layer, filling a conductive material in the through hole, and leading out a first layer of capacitor upper electrode plate and a first layer of capacitor lower electrode plate;
(5) depositing a metal layer above the first metal insulating layer, and photoetching to form a second capacitor lower pole plate and first contact metal, wherein the second capacitor lower pole plate is connected with the first capacitor upper pole plate, and the first contact metal is connected with the first capacitor lower pole plate;
(6) depositing a second capacitor dielectric layer on the second capacitor lower electrode plate, depositing a metal layer, and photoetching to form a second capacitor upper electrode plate;
(7) depositing an oxide layer on the lower electrode plate of the second layer of capacitor and the first contact metal, and flattening and grinding to form a second layer of metal insulation layer;
(8) carrying out through hole photoetching on the second layer of metal insulation layer, filling a conductive material in the through hole, and leading out a second layer of capacitor upper electrode plate, a second layer of capacitor lower electrode plate and first contact metal;
(9) depositing a metal layer above the second metal insulating layer, and photoetching to form a third capacitor lower pole plate and a second contact metal, wherein the third capacitor lower pole plate is connected with the second capacitor upper pole plate, the third capacitor lower pole plate is connected with the first contact metal, and the second contact metal is connected with the second capacitor lower pole plate;
(10) depositing a third capacitor dielectric layer on the third capacitor lower electrode plate, then depositing a metal layer, and then photoetching to form a third capacitor upper electrode plate;
(11) depositing an oxide layer on the lower electrode plate of the third capacitor and the second contact metal layer, and flattening and grinding to form a third metal insulating layer;
(12) carrying out through hole photoetching on the third metal insulating layer, filling a conductive material in the through hole, and leading out a third capacitor upper electrode plate, a third capacitor lower electrode plate and second contact metal;
(13) the lower electrode plate of the 3 rd layer capacitor is connected with the second electrode, and the upper electrode plate of the 3 rd layer capacitor and the 2 nd contact metal are connected with the first electrode.

Claims (10)

1. A multilayer metal capacitor structure, comprising: the capacitor comprises 2 electrodes positioned at the top and arranged on the same layer, at least 2 layers of capacitor lower polar plates arranged at intervals in the vertical direction, and a capacitor dielectric layer and a capacitor upper polar plate which are sequentially stacked on each layer of capacitor lower polar plate from bottom to top, wherein the capacitor upper polar plate of each layer is overlapped in the vertical direction, the capacitor upper polar plate of each layer and the capacitor lower polar plate of the adjacent layer are connected with one electrode, and the capacitor lower polar plate of each layer and the capacitor upper polar plate of the adjacent layer are connected with one electrode.
2. The multilayer metal capacitor structure of claim 1, wherein: the upper electrode plate of the capacitor on the next layer is connected with the lower electrode plate of the capacitor on the previous layer.
3. The multilayer metal capacitor structure of claim 1, wherein: the upper electrode plate of the capacitor is shared by the same photoetching plate.
4. The multilayer metal capacitor structure of claim 1, wherein: and a metal insulating layer is deposited between the two adjacent lower electrode plates of the capacitor.
5. The multilayer metal capacitor structure of claim 1, wherein: and a metal insulating layer is deposited between the lower electrode plate of the top capacitor and the 2 electrodes.
6. The multilayer metal capacitor structure of claim 1, wherein: the capacitor dielectric layer is a silicon nitride layer or a silicon oxynitride layer.
7. The multilayer metal capacitor structure of claim 1, wherein: the capacitor comprises a first layer of capacitor lower pole plate, a second layer of capacitor lower pole plate and first contact metal arranged on the same layer as the second layer of capacitor lower pole plate, wherein the first layer of capacitor upper pole plate is connected with the second layer of capacitor lower pole plate through a contact through hole; the lower electrode plate of the second layer of capacitor is connected with the first electrode through the contact through hole, and the upper electrode plate of the second layer of capacitor is connected with the second electrode through the contact through hole.
8. The multilayer metal capacitor structure of claim 1, wherein: the capacitor comprises a first layer of capacitor lower pole plate, a second layer of capacitor lower pole plate, first contact metal arranged on the same layer as the second layer of capacitor lower pole plate and second contact metal arranged on the same layer as the third layer of capacitor lower pole plate, wherein the first layer of capacitor upper pole plate is connected with the second layer of capacitor lower pole plate through a contact through hole; the lower electrode plate of the second layer of capacitor is connected with a second contact metal through a contact through hole, the second contact metal is connected with the first electrode through the contact through hole, and the upper electrode plate of the second layer of capacitor is connected with the lower electrode plate of the third layer of capacitor through the contact through hole; the lower electrode plate of the third layer of capacitor is connected with the second electrode through the contact through hole, and the upper electrode plate of the third layer of capacitor is connected with the first electrode through the contact through hole.
9. A multilayer metal capacitor structure as claimed in claim 7 or 8, wherein: and the contact through hole is filled with a conductive material.
10. The method of manufacturing a multilayer metal capacitor structure as claimed in any one of claims 1 to 9, comprising the steps of:
(1) firstly, depositing a metal layer, and photoetching to form a first layer of capacitor lower electrode plate;
(2) depositing a first capacitor dielectric layer on the first capacitor lower electrode plate, then depositing a metal layer, and then photoetching to form a first capacitor upper electrode plate;
(3) depositing an oxide layer on the first layer of capacitor lower electrode plate and flattening and grinding to form a first layer of metal insulation layer;
(4) carrying out through hole photoetching on the first layer of metal insulation layer, filling a conductive material in the through hole, and leading out a first layer of capacitor upper electrode plate and a first layer of capacitor lower electrode plate;
(5) depositing a metal layer above the first metal insulating layer, and photoetching to form a second capacitor lower pole plate and first contact metal, wherein the second capacitor lower pole plate is connected with the first capacitor upper pole plate, and the first contact metal is connected with the first capacitor lower pole plate;
(6) depositing a second capacitor dielectric layer on the second capacitor lower electrode plate, depositing a metal layer, and photoetching to form a second capacitor upper electrode plate;
(7) depositing an oxide layer on the lower electrode plate of the second layer of capacitor and the first contact metal, and flattening and grinding to form a second layer of metal insulation layer;
(8) carrying out through hole photoetching on the second layer of metal insulation layer, filling a conductive material in the through hole, and leading out a second layer of capacitor upper electrode plate, a second layer of capacitor lower electrode plate and first contact metal;
(9) repeating the steps (5) to (8), and leading out the Nth layer of capacitor upper electrode plate, the Nth layer of capacitor lower electrode plate and the N-1 th contact metal, wherein N is more than or equal to 2;
(10) when N is an even number, the lower electrode plate of the Nth layer of capacitor is connected with the first electrode, and the upper electrode plate of the Nth layer of capacitor and the N-1 th contact metal are connected with the second electrode; and when N is an odd number, the lower electrode plate of the Nth layer of capacitor is connected with the second electrode, and the upper electrode plate of the Nth layer of capacitor and the N-1 th contact metal are connected with the first electrode.
CN202111327272.9A 2021-11-10 2021-11-10 Multilayer metal capacitor structure and preparation method thereof Pending CN114050150A (en)

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Application Number Priority Date Filing Date Title
CN202111327272.9A CN114050150A (en) 2021-11-10 2021-11-10 Multilayer metal capacitor structure and preparation method thereof

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Application Number Priority Date Filing Date Title
CN202111327272.9A CN114050150A (en) 2021-11-10 2021-11-10 Multilayer metal capacitor structure and preparation method thereof

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CN114050150A true CN114050150A (en) 2022-02-15

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