CN114046727A - Interferometer speed information acquisition method based on equivalent clock method - Google Patents

Interferometer speed information acquisition method based on equivalent clock method Download PDF

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CN114046727A
CN114046727A CN202111304637.6A CN202111304637A CN114046727A CN 114046727 A CN114046727 A CN 114046727A CN 202111304637 A CN202111304637 A CN 202111304637A CN 114046727 A CN114046727 A CN 114046727A
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amplifier
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interferometer
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CN114046727B (en
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韩昕
秦玉胜
高闽光
李相贤
童晶晶
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Hefei Institutes of Physical Science of CAS
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01BMEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
    • G01B9/00Measuring instruments characterised by the use of optical techniques
    • G01B9/02Interferometers
    • G01B9/02001Interferometers characterised by controlling or generating intrinsic radiation properties
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01PMEASURING LINEAR OR ANGULAR SPEED, ACCELERATION, DECELERATION, OR SHOCK; INDICATING PRESENCE, ABSENCE, OR DIRECTION, OF MOVEMENT
    • G01P3/00Measuring linear or angular speed; Measuring differences of linear or angular speeds
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Abstract

The invention discloses an interferometer speed information acquisition method based on an equivalent clock method, which comprises the following steps: the laser signal forms an interference signal through an interferometer, and the interference signal is converted into a zero-crossing pulse signal which can be identified by a digital circuit through a photoelectric detection and signal processing circuit; obtaining an optical path difference speed calculation formula through mathematical modeling; inputting a zero-crossing point pulse signal into an FPGA (field programmable gate array), generating an original counting clock signal by a crystal oscillator of the FPGA, realizing equal-phase-difference phase shift of the original counting clock signal through a phase-locked loop, generating N paths of counting clock signals to simultaneously drive N same counters to count, and calculating the total counting number through summation; substituting the total number of counts into an optical path difference speed calculation formula to obtain the value of the optical path difference speed; the invention has the advantages that: and realizing interference signal processing for acquiring speed information.

Description

Interferometer speed information acquisition method based on equivalent clock method
Technical Field
The invention relates to a speed information acquisition method, in particular to an interferometer speed information acquisition method based on an equivalent clock method.
Background
As a high-precision measurement scientific instrument, the Fourier transform infrared spectrometer also puts higher requirements on the performance of the Fourier transform infrared spectrometer along with the continuous deep application of the Fourier transform infrared spectrometer in the fields of atmospheric environment monitoring, meteorological science research, national defense, military and the like, and an interferometer system is used as a core subsystem of the Fourier transform infrared spectrometer, and the motion control precision of the interferometer system is one of the main factors influencing the Fourier transform infrared spectrometer. The current commonly used interferometer control method mainly comprises a digital signal processing compensation method, a PID control method based on position error level and error change rate, an advanced control method based on a speed loop and the like, wherein a feedback control strategy based on an optical path difference speed loop has the advantages of simple design and strong real-time performance, and the key technical difficulty of the method is to acquire speed feedback information.
Aiming at a speed information acquisition method in a control strategy based on a speed feedback interferometer, a multi-component gas analyzer based on an FTIR principle is developed to [ J ] infrared and laser engineering, 2013,42(12): 3175-. In the european meteorological satellite organization, in its main load Infrared Atmospheric Sounding Interferometer (IASI), interferometer speed information is acquired by an optical linear encoder method, which has high requirements on the use environment of an optical encoder and needs to eliminate errors caused by mechanical clearances. Japanese relativistic studies methods for obtaining interferometer velocity information based on a distributed feedback laser diode velocity detection system. The Shanghai technical and physical research institute researches a speed information acquisition method based on a laser interferometry, and speed direction judgment and pulse counting are carried out by utilizing two paths of orthogonal interference optical signals, so that the speed and the direction of movement of an interferometer are obtained.
Because the precision of various encoders is difficult to meet the design requirements of high-precision infrared spectrometers, the laser interferometry is gradually becoming the mainstream design method for acquiring the speed information of the infrared spectrometers. At present, research on the basis of a laser interferometry mainly focuses on light source stability, and research on an interference signal processing method for acquiring speed information is deficient.
Disclosure of Invention
The technical problem to be solved by the invention is that the research based on the laser interferometry mainly focuses on the stability of the light source, and the research on the interference signal processing method for acquiring speed information is deficient.
The invention solves the technical problems through the following technical means: the method for acquiring the speed information of the interferometer based on the equivalent clock method comprises the following steps:
the method comprises the following steps: the laser signal forms an interference signal through an interferometer, and the interference signal is converted into a zero-crossing pulse signal which can be identified by a digital circuit through a photoelectric detection and signal processing circuit;
step two: obtaining an optical path difference speed calculation formula through mathematical modeling;
step three: inputting a zero-crossing point pulse signal into an FPGA (field programmable gate array), generating an original counting clock signal by a crystal oscillator of the FPGA, realizing equal-phase-difference phase shift of the original counting clock signal through a phase-locked loop, generating N paths of counting clock signals to simultaneously drive N same counters to count, and calculating the total counting number through summation;
step four: and substituting the total number of counts into an optical path difference speed calculation formula to obtain the value of the optical path difference speed.
The invention converts interference signals into zero-crossing point pulse signals which can be identified by a digital circuit through a photoelectric detection and signal processing circuit, then models to obtain an optical path difference speed calculation formula, counts the zero-crossing point pulses through an equivalent clock method, substitutes the total count number into the optical path difference speed calculation formula to obtain the value of the optical path difference speed, and realizes the interference signal processing for obtaining speed information.
Further, the second step comprises:
by the formula fhn=uopvhnObtaining a sine wave frequency of the interferometer, wherein uopRepresenting the speed of the optical path difference, vhnRepresents the wave number of the laser signal;
the relation between the zero-crossing pulse frequency and the sine wave frequency of the interferometer is f0=2fhnWherein f is0Representing the zero crossing pulse frequency;
high frequency clock signal frequencyIs fcWhen the number of counts in one period of the zero-crossing point pulse is M, the frequency of the zero-crossing point pulse is
Figure BDA0003339657760000031
The optical path difference speed calculation formula is obtained according to the relation among the sine wave frequency of the interferometer, the zero crossing point pulse frequency and the sine wave frequency of the interferometer and the zero crossing point pulse frequency calculation formula
Figure BDA0003339657760000032
Furthermore, after the step two, before the step three, the method further comprises: and carrying out error analysis on the method for measuring and acquiring the speed information based on the T method.
Furthermore, the specific process of performing error analysis on the method for obtaining speed information based on T-method measurement is as follows: in the T method measurement process, when the rising edge of a pulse signal to be measured arrives, the counter starts to count the rising edge of the high-frequency clock signal, when the rising edge of the next pulse signal to be measured arrives, the counter returns to zero and starts to count again, because the high-frequency clock signal is independent relative to the pulse signal to be measured, the rising edge of the high-frequency clock signal cannot fall right on the edge of the pulse signal to be measured, the error of one clock exists at most in the counting time, namely the error delta e is less than or equal to 1, and the relative error is 1/M.
Furthermore, the clock phases after the phase shift by the equal phase difference in the third step are respectively
Figure BDA0003339657760000033
Furthermore, in the third step, the original counting clock signals are respectively shifted by 0 °, 90 °, 180 ° and 270 ° through phase-locked loops, so as to generate 4 paths of counting clock signals, to simultaneously drive 4 identical counters for counting, and the total number of counts is calculated through summation.
Furthermore, the photoelectric detection and signal processing circuit comprises a photoelectric detector, a pre-amplification circuit, a low-pass filter circuit and a shaping circuit which are connected in sequence.
Furthermore, the preamplifier circuit comprises an amplifier A1, an amplifier A2, a sequentially numbered resistor R1 to a resistor R5, a resistor Rf, a capacitor C and a capacitor C3, wherein the inverting terminal of the amplifier A1, the cathode of the photodetector, one end of the resistor Rf and one end of the capacitor C are connected, the inverting terminal of the amplifier A1, the negative power supply terminal of the amplifier A1 and the anode of the photodetector are connected and grounded, the positive power supply terminal of the amplifier A1 is connected with a power supply VCC, the output terminal of the amplifier A1, the other end of the capacitor C, the other end of the resistor Rf and one end of the capacitor C3 are connected, the other end of the capacitor C3 is connected with one end of the resistor R1, the other end of the resistor R1, one end of the resistor R3 and the inverting terminal of the amplifier A2, the other end of the resistor R3, one end of the resistor R4 and one end of the resistor R5 are connected, the other end of the resistor R5 is grounded, and the other end of the resistor R4 is connected with the output terminal of the amplifier A2, the non-inverting terminal of the amplifier A2 is connected to the negative terminal of its power supply and to ground, and the positive terminal of the power supply of the amplifier A2 is connected to the power supply VCC.
Furthermore, the low-pass filter circuit comprises a resistor R6 to a resistor R9, a capacitor C11, a capacitor C12 and an amplifier A3 which are numbered sequentially, one end of the resistor R6, the positive end of a power supply V1 and the output end of the amplifier A2 are connected, the other end of the resistor R6, one end of the resistor R7, one end of the resistor R8 and one end of the capacitor C12 are connected, the other end of the resistor R8, one end of the capacitor C11 and the inverting end of the amplifier A3 are connected, the other end of the resistor R7, the other end of the capacitor C11, the output end of the amplifier A3 and one end of the resistor R9 are connected, the other end of the capacitor C12, the inverting end of the amplifier A3 and the other end of the resistor R9 are grounded, the positive power supply terminal of the amplifier A3 is connected to a VCC1, and the negative power supply terminal of the amplifier A3 is connected to VCC.
Furthermore, the shaping circuit comprises a resistor R10 to a resistor R13, a diode D1, a diode D2, an amplifier A2, a NOT gate U2 2, a NOT gate U6 2, a flip-flop U4 2, a flip-flop U3 2 and an XOR gate U5 2 which are numbered in sequence, one end of the resistor R2 is connected with the output end of the amplifier A2, the other end of the resistor R2, one end of the resistor R2 and the same-phase end of the amplifier A2 are connected, the inverting end of the amplifier A2 is connected with the ground through the resistor R2, the output end of the amplifier A2 is connected with one end of the resistor R2, the other end of the resistor R2, the anode of the diode D2, the input end of the NOT gate U6 2 and the input end of the NOT gate U2 2, the cathode of the diode D2 is connected with the cathode of the diode D2, the anode of the diode D2 is connected with the ground, the output end of the resistor R2, the output end of the NOT gate U6 2, the input end of the resistor R2 and the capacitor C2 are connected with the trigger C2, the other end of the capacitor C13 is grounded, the output end of the NOT gate U2A is connected with the input end of the flip-flop U4A, the output end of the flip-flop U4A and the output end of the flip-flop U3A are both connected with the input end of the exclusive-OR gate U5A, and the output end of the exclusive-OR gate U5A outputs a processed signal.
The invention has the advantages that: the invention converts interference signals into zero-crossing point pulse signals which can be identified by a digital circuit through a photoelectric detection and signal processing circuit, then models to obtain an optical path difference speed calculation formula, counts the zero-crossing point pulses through an equivalent clock method, substitutes the total count number into the optical path difference speed calculation formula to obtain the value of the optical path difference speed, and realizes the interference signal processing for obtaining speed information.
Drawings
Fig. 1 is a schematic block diagram of a photoelectric detection and signal processing circuit in an interferometer speed information acquisition method based on an equivalent clock method according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a preamplifier circuit of a photodetection and signal processing circuit in the method for acquiring interferometer speed information based on an equivalent clock method according to the embodiment of the present invention;
fig. 3 is a schematic diagram of a low-pass filter circuit of a photodetection and signal processing circuit in the method for acquiring interferometer speed information based on an equivalent clock method according to the embodiment of the present invention;
fig. 4 is an amplitude-frequency characteristic curve of a low-pass filter circuit of a photoelectric detection and signal processing circuit in the method for acquiring interferometer speed information based on an equivalent clock method according to the embodiment of the present invention;
fig. 5 is a phase-frequency characteristic curve of a low-pass filter circuit of a photodetection and signal processing circuit in the method for acquiring interferometer speed information based on an equivalent clock method according to the embodiment of the present invention;
fig. 6 is a schematic diagram of a shaping circuit of a photodetection and signal processing circuit in the method for obtaining interferometer speed information based on an equivalent clock method according to the embodiment of the present invention;
fig. 7 is a simulation result of square wave shaping performed by a shaping circuit of the photodetection and signal processing circuit in the method for acquiring interferometer speed information based on the equivalent clock method according to the embodiment of the present invention;
fig. 8 is a simulation result of zero-crossing pulse shaping performed by a shaping circuit of a photodetection and signal processing circuit in the method for acquiring interferometer speed information based on an equivalent clock method according to the embodiment of the present invention;
fig. 9 is a timing chart of a T-method counting principle in the method for acquiring interferometer speed information based on an equivalent clock method according to the embodiment of the present invention;
fig. 10 is a timing chart of an interferometer speed information acquisition method based on an equivalent clock method according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the embodiments of the present invention, and it is obvious that the described embodiments are some embodiments of the present invention, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The embodiment of the invention provides an interferometer speed information acquisition method based on an equivalent clock method, and the method process of the invention is described in detail in the following through the influence of the optical path difference speed on the signal-to-noise ratio, laser interference signal processing, a speed information acquisition algorithm and other large aspects.
1 Effect of optical path difference velocity on Signal-to-noise ratio
Equal optical path difference sampling has an important influence on the spectral reconstruction quality,when the sampling signal is not uniform, the position error can be generated by equal optical path difference sampling, and according to the Fourier transform relation between the spectrogram and the interferogram of the spectrometer, an additional error is added in the process of reconstructing the spectrogram by the interferogram, and the additional error is reflected on the spectrogram and shows that the signal-to-noise ratio of the spectrogram is reduced. Assumed in wavenumber
Figure BDA0003339657760000072
Where a sample position error Δ x is generated, the signal-to-noise ratio is:
Figure BDA0003339657760000071
where SNR is the signal-to-noise ratio of the spectrogram,
Figure BDA0003339657760000073
is the wavenumber, Δ x is the sampling position error
In order to ensure uniform sampling positions, most spectrometers adopt an equal optical path difference sampling method based on reference laser interference pulse triggering, but if an interferometer system cannot ensure the speed of the optical path difference to be highly stable, laser interference pulse signal frequency fluctuation can be caused, and further sampling position fluctuation is brought, so that equal optical path difference sampling cannot be strictly realized.
According to the speed stability requirement of the optical path difference of Fourier transform spectrometers, i.e.
νerr/ν≤1/SNR (2)
Wherein, verrV is the velocity value and SNR is the signal-to-noise ratio
From the equation (2), the optical path difference speed stability of the interferometer needs to be controlled to be more than 99% to satisfy the requirement that the signal-to-noise ratio is more than 100. Therefore, a high-precision optical path difference speed information acquisition system needs to be designed to ensure that the interferometer closed-loop control system can meet the requirement of optical path difference speed stability.
2 laser interference signal processing
2.1 laser interference signal detection and processing circuit
The photoelectric signal detection and processing circuit mainly has the functions of converting laser interference signals into pulse signals identified by a digital circuit and mainly considering the problems of circuit noise and clock jitter when designing the circuit. The whole design process and idea is shown in fig. 1.
(1) Photoelectric detector and preamplification circuit
In a feedback system of a laser interferometry of an infrared spectrometer, a reference light source selects He-Ne laser with the wavelength of 632.8 nm; the photoelectric detector selects a silicon PIN photodiode S10784, the response center wavelength is 650nm, the response speed is up to 300MHz, the sensitivity is up to 0.45A/W, and the maximum value of dark current is 1000 pA.
As shown in fig. 2, the pre-amplifier circuit is used to convert the weak current signal obtained by the silicon PIN photodiode detector into the voltage signal required by the post-stage circuit. Generally, the stability of the amplifier is reduced and nonlinear distortion is generated due to the fact that the gain of the single-stage operational amplifier is too large. Therefore, in order to meet the high gain requirement of the system, the pre-amplification circuit is designed into a multi-stage amplification mode, the first stage adopts a trans-impedance amplification circuit to realize I-V conversion, and the second stage adopts a T-shaped feedback amplification circuit to meet the requirement of low-noise amplification.
The transimpedance amplifier circuit design is shown in the left half of fig. 2. Amplifier selection MAX4488 operational amplifier with low distortion (0.0002% THD + N), low input voltage noise density
Figure BDA0003339657760000081
And low input current noise density
Figure BDA0003339657760000082
And the like. The input offset voltage of MAX4488 is only 70 μ V, and the input bias current is only 1pA, which has excellent stability, so that the circuit precision requirement can be met. The silicon PIN photodiode detector is used for converting laser interference signals into electric signals and outputting microampere-level alternating current signals. The silicon PIN photodiode is arranged to work in a zero-bias photovoltaic mode, the linearity is high, no dark current is generated, and therefore the output signal-to-noise ratio of the detector is high.
The T-type feedback amplifier circuit is shown in the right half of fig. 2. The T-shaped feedback amplifying circuit can solve the temperature drift problem of the traditional operational amplifying circuit and can also solve the resistance thermal noise problem caused by high gain and high feedback. The amplifier selects a low noise, precision, high speed operational amplifier OP 37. OP37 has the characteristics of low offset (25 μ V) and low drift (0.2 μ V/DEG C), and the input voltage noise density is only
Figure BDA0003339657760000091
Input current noise density of only
Figure BDA0003339657760000092
The requirement of the two-stage amplifying circuit is well met.
(2) Low-pass filter circuit
Due to the two-stage amplification effect of the pre-amplification circuit, high-frequency noise interference laser interference signals can appear at the output end of the circuit, and in order to improve the signal-to-noise ratio of the laser interference signals, a low-pass filter needs to be designed according to system characteristics to reduce the high-frequency noise interference. Common filter types are mainly butterworth, bezier, chebyshev, elliptic, etc. The Butterworth filter is simple in design, excellent in performance, good in linear phase and flat in pass band. The amplitude-frequency response of the system required bandwidth voltage is flat, and a second-order Butterworth low-pass filter is adopted in design.
The transfer function of the second order butterworth low pass filter, which can be found according to kirchhoff's current theorem, is:
Figure BDA0003339657760000093
according to the design requirement of the Fourier transform infrared spectrometer, the optical path difference scanning speed is 0.33cm/s, and the wavelength lambda of the He-Ne laser is 632.8 nm. The modulation frequency of the reference laser interference signal is about 5kHz from the formula f u/λ. Designing a second order Butterworth low-pass filter to cut off frequency f025kHz, pass band gain K1-1, capacitance C11-1 nF, and equivalent quality factor Q-0.707. Computing electricityThe parameters are R6 ═ 5600 Ω, R7 ═ 5600 Ω, R8 ═ 2820 Ω, and C12 ═ 4nF, respectively. The amplifier is selected from an OP37 operational amplifier, R8 and C11 form an integral element of the filter, R6 and C12 form a low-pass stage of the filter, and the two-stage circuit simultaneously shows low-pass characteristics. A second order butterworth low pass filter is shown in fig. 3 in Multisim14 circuit software.
In order to verify the performance of the designed second-order Butterworth low-pass filter, AC analysis was performed in Multisim14 circuit software to obtain the amplitude-frequency characteristic curve and the phase-frequency characteristic curve of the second-order Butterworth low-pass filter, as shown in FIG. 4 and FIG. 5.
As can be seen from the experimental results of the amplitude-frequency characteristic curve in FIG. 4, when the amplitude value of the output signal is reduced to 0.707 times of the peak amplitude value of the output signal, the frequency value of the output signal is 27.6kHz, which is close to the cutoff frequency of 25kHz of the designed filter, and thus the basic requirements of the design are met. As can be seen from the experimental results of the phase-frequency characteristic curve in fig. 5, the frequency of the output signal is substantially stable within the system bandwidth, and meets the design requirements.
(3) Shaping circuit
The laser interference signal after passing through the pre-amplification circuit and the low-pass filter circuit cannot be identified by a subsequent digital circuit, so that the laser interference signal needs to be shaped into a pulse signal required by a system. The laser interference signal shaping circuit is designed into a zero-crossing detection circuit and a pulse shaping circuit.
In the zero crossing point detection circuit, because the laser interference signal is a sinusoidal signal, the laser interference signal can be converted into a square wave signal with consistent frequency by using the voltage comparator. However, the common voltage comparator has poor anti-interference capability, easily generates jitter near the zero point, causes multiple times of zero-crossing misjudgment, and causes unstable output value of the voltage comparator, so that the common voltage comparator can only be applied to occasions insensitive to output value jump. In order to overcome the problem of easy jitter misjudgment, an in-phase hysteresis voltage comparator is designed by utilizing the hysteresis function of a hysteresis comparator, and the magnitude of the hysteresis voltage is delta V which is VccR 11/R13. The schematic diagram of the circuit is shown in the left diagram of fig. 6 (the in-phase hysteresis voltage comparator comprises a resistor R10-a resistor R13, a diode D1, a diode D2 and an amplifier a4), and the square wave signal obtained by simulation in Multisim14 circuit software is shown in fig. 7.
The He — Ne laser beam changes in optical path difference in the interferometer, and generates corresponding interference fringes. As can be seen from Nyquist's sampling theorem, the sampling frequency of the interference fringes is at least 2 times or more the highest frequency of the interferogram. Because the sampling trigger pulse is a pulse signal obtained by shaping the He-Ne laser interference signal, a pulse shaping circuit needs to be designed to shape the square wave signal in the zero-crossing point detection circuit into a zero-crossing point pulse signal. The specific implementation method comprises the following steps: the input square wave signal is divided into two paths of signals, wherein one path of signal is added into an RC delay circuit (the time length of delay is less than half of the period of the input square wave), delay is generated when the upper edge and the lower edge jump each time, the delayed signal and the original signal are subjected to XOR, a short pulse is output when the square wave jumps each time, and the probability of zero-crossing misjudgment is effectively reduced. And the width of the pulse is determined by the RC delay circuit and the subsequent schmitt trigger level. The schematic diagram of the circuit is shown in the right diagram of fig. 6 (the pulse shaping circuit comprises a not gate U2A, a not gate U6A, a flip-flop U4A, a flip-flop U3A and an exclusive or gate U5A), and a zero-crossing pulse signal obtained by simulation in Multisim is shown in fig. 8.
2.2 Circuit noise analysis
The noise calculation of the whole photoelectric detection and processing circuit mainly considers the noise of the photoelectric detector and the noise of the preamplification circuit. The noise of the photoelectric detector includes shot noise and thermal noise, and the noise of the circuit includes resistance thermal noise, current noise and voltage noise.
The transimpedance amplification circuit generates a noise voltage at the output U0:
Figure BDA0003339657760000111
Figure BDA0003339657760000112
the noise voltage of the T-shaped feedback amplifying circuit at the output U1 end:
Figure BDA0003339657760000121
Figure BDA0003339657760000122
by using the star-delta transformation principle, the gain of the T-shaped feedback resistance network operational amplifier circuit is as follows:
Figure BDA0003339657760000123
due to the amplification effect of the second-stage T-shaped feedback amplification circuit, the noise voltage generated at the end of the first-stage transimpedance amplification circuit U0 is amplified to be V 'at the end of the second-stage output U1'n1=AVn1
The total output noise voltage of the preamplifier circuit is as follows:
Figure BDA0003339657760000124
the internal resistance of the silicon PIN photodiode is Rd, the free electron charge amount is q, the generated photocurrent is Ip, the Boltzmann constant is K, the feedback resistance of the transimpedance amplifier circuit is Rf, the absolute temperature is T, the system bandwidth is delta f equal to 30kHz, and the weak current obtained by the photodiode detector is 1 muA. The total noise voltage Vn is 2.62mV, the output end voltage Vs is 2.2V, and the signal-to-noise ratio of the preamplifier circuit at the output end is calculated by an substituting formula:
Figure BDA0003339657760000125
the design of the preamplification circuit realizes the requirement of low-noise amplification and obtains higher signal-to-noise ratio.
3 speed information acquisition algorithm
3.1 mathematical modeling of velocity acquisition
In Fourier transform infrared spectroscopy, using He-Ne excitationThe light constitutes a reference interference system. Because He-Ne laser has good monochromaticity, the He-Ne laser interferogram waveform is a standard sine wave waveform at a constant interferometer scanning speed, and the frequency is determined by the wavelength of the He-Ne laser. Let the optical path difference scan speed be uopHe-Ne laser (wave number v)hn) The sine wave frequency of the interference pattern is
fhn=uopvhn (10)
Through the photoelectric detection and signal processing circuit of the He-Ne laser, the laser interference signal becomes a zero-crossing point pulse signal, the frequency of which is equal to 2 times of the frequency of the He-Ne laser interference signal, namely:
f0=2fhn (11)
according to the traditional T method counting, in one period of zero-crossing point pulse, counting high-speed clock signals, setting the frequency of the high-speed clock signals as fc, and the number of counts in one period of the zero-crossing point pulse as M, the frequency of the zero-crossing point pulse is as follows:
Figure BDA0003339657760000131
using the above equations (10), (11) and (12), the optical path difference velocity is calculated as:
Figure BDA0003339657760000132
from the formula (13), it can be known that the key to the measurement of the optical path difference speed is the accuracy of the number M.
3.2 error analysis of velocity acquisition
The timing diagram of the T method for counting the pulses is shown in fig. 9, and it can be seen from the timing diagram of the T method counting principle of fig. 9 that, in the detection process, when the rising edge of the pulse signal to be detected arrives, the counter starts counting the rising edge of the high-frequency clock signal, and when the rising edge of the next pulse signal to be detected arrives, the counter is zeroed and starts counting again. Because the high-frequency clock signal is independent relative to the pulse signal to be measured, the rising edge of the high-frequency clock signal cannot be exactly positioned at the edge of the pulse signal to be measured, one clock error exists at most in the counting time, namely, delta e is less than or equal to 1, and the relative error is 1/M.
As can be seen from the relative error formula, when the frequency of the zero-crossing point pulse signal is fixed, the higher the frequency of the high-frequency clock signal is, the smaller the relative error is, and therefore, the relative error can be reduced by increasing the frequency of the clock signal.
3.3 equivalent clock method
The counting precision of the T method depends on the frequency of the clock signal, and the higher the frequency of the clock signal is, the smaller the measurement error is. However, the higher the clock signal frequency, the higher the performance requirements of the counter chip, and a series of problems are caused to the material selection of the circuit board, the wiring of the circuit and the processing. In order to further improve the counting precision, the error caused by T-method counting is reduced. Therefore, the present invention provides a counting method using phase difference phase shift of FPGA high frequency clock source, etc., and as shown in fig. 10, the present invention is an equivalent high frequency counting clock generating principle.
Clock _1 is a crystal Clock source with original phase of FPGA, Clock _2 to Clock _ N are same-frequency counting clocks after phase shift with equal phase difference, each counting Clock from Clock _1 to Clock _ N drives a separate counter at the same time, and Clock _ Eq represents an equivalent high-frequency counting Clock. When the clock source frequency of the crystal oscillator of the FPGA is f1The clock phases after the equal phase difference phase shift are respectively equal to
Figure BDA0003339657760000141
During one pulse signal period, when the rising edge of the clock signal arrives, each clock drives the counter to count. And adding the counting results of each path is equivalent to that the T-method counter is driven to count by the clock signal multiplied by N times.
As can be seen from the timing diagram analysis of FIG. 10, this counting with the equivalent clock method is actually equivalent to enlarging the frequency of the original clock signal by N times, i.e. by fcThe high frequency clock of Nf counts and measures the zero crossing point pulse signal, and under the condition of neglecting the relative delay time error between the phase-shifting clock signals, the maximum measurement error is changed to 1/N of the original value. At the same time, the phase-shifting method avoidsA series of chip performance problems caused by clock frequency improvement are solved, the working frequency of the system is improved under the condition that the working frequency of the counting chip is not improved, and the measurement error is reduced.
The counting based on the FPGA realizes the counting by an equivalent clock method, and in order to ensure the precision and the stability of the system, the counting is realized by adopting a loop IV E series FPGA of Intel company, and a high-frequency clock source with the crystal oscillator frequency of 50MHz is arranged in the counting circuit. The crystal oscillator generates an original counting clock signal CLK _1, phase-difference phase shifting (0 degrees, 90 degrees, 180 degrees and 270 degrees respectively) such as an original clock is realized through a phase-locked loop, four paths (N is 4) of counting clock signals are generated to drive four same counters to count, and finally, the total number of counts is calculated through summation.
When the highest frequency of the He-Ne laser interference signal is 9kHz, the simulation result is analyzed through Modelsim simulation, and the relative error of pulse measurement counting of an equivalent clock method is only 0.01 percent.
Through the technical scheme, the performance of the instrument is further improved in order to meet the requirement of the optical path difference speed information acquisition precision of the high-precision infrared spectrometer. The invention designs a high-precision speed information acquisition method based on an equivalent clock method, which comprises the steps of firstly designing a laser interference signal detection circuit, and carrying out noise analysis to obtain a photoelectric signal processing circuit with higher signal-to-noise ratio; then, optical path difference speed feedback measurement is realized based on the interference pulse, and speed information acquisition errors are analyzed; and finally, aiming at the speed information acquisition error, an equivalent clock method is provided for further reducing the speed information acquisition error. Simulation results show that the design has particularly good performance, and when the frequency of the He-Ne laser interference signal is 9kHz, the optical path difference speed information acquisition error based on the equivalent clock method is only 0.01 percent. Therefore, the design method provided by the invention has important significance for improving the control precision of the system, and provides reference for the design of the photoelectric feedback control system with similar characteristics.
The above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.

Claims (10)

1. The interferometer speed information acquisition method based on the equivalent clock method is characterized by comprising the following steps:
the method comprises the following steps: the laser signal forms an interference signal through an interferometer, and the interference signal is converted into a zero-crossing pulse signal which can be identified by a digital circuit through a photoelectric detection and signal processing circuit;
step two: obtaining an optical path difference speed calculation formula through mathematical modeling;
step three: inputting a zero-crossing point pulse signal into an FPGA (field programmable gate array), generating an original counting clock signal by a crystal oscillator of the FPGA, realizing equal-phase-difference phase shift of the original counting clock signal through a phase-locked loop, generating N paths of counting clock signals to simultaneously drive N same counters to count, and calculating the total counting number through summation;
step four: and substituting the total number of counts into an optical path difference speed calculation formula to obtain the value of the optical path difference speed.
2. The method for acquiring interferometer velocity information based on the equivalent clock method according to claim 1, wherein the second step comprises:
by the formula fhn=uopvhnObtaining a sine wave frequency of the interferometer, wherein uopRepresenting the speed of the optical path difference, vhnRepresents the wave number of the laser signal;
the relation between the zero-crossing pulse frequency and the sine wave frequency of the interferometer is f0=2fhnWherein f is0Representing the zero crossing pulse frequency;
high frequency clock signal frequency of fcWhen the number of counts in one period of the zero-crossing point pulse is M, the frequency of the zero-crossing point pulse is
Figure FDA0003339657750000011
The optical path difference speed calculation formula is obtained according to the relation among the sine wave frequency of the interferometer, the zero crossing point pulse frequency and the sine wave frequency of the interferometer and the zero crossing point pulse frequency calculation formula
Figure FDA0003339657750000012
3. The method for acquiring interferometer velocity information based on the equivalent clock method according to claim 2, wherein the step two, the step three, and the step three further comprise: and carrying out error analysis on the method for measuring and acquiring the speed information based on the T method.
4. The method for obtaining interferometer velocity information based on an equivalent clock method according to claim 3, wherein the specific process of performing error analysis on the method for obtaining velocity information based on T-method measurement is as follows: in the T method measurement process, when the rising edge of a pulse signal to be measured arrives, the counter starts to count the rising edge of the high-frequency clock signal, when the rising edge of the next pulse signal to be measured arrives, the counter returns to zero and starts to count again, because the high-frequency clock signal is independent relative to the pulse signal to be measured, the rising edge of the high-frequency clock signal cannot fall right on the edge of the pulse signal to be measured, the error of one clock exists at most in the counting time, namely the error delta e is less than or equal to 1, and the relative error is 1/M.
5. The method for obtaining the speed information of the interferometer based on the equivalent clock method as claimed in claim 1, wherein the clock phases after the constant phase difference phase shifting in the third step are respectively the same phase
Figure FDA0003339657750000021
6. The method for obtaining interferometer speed information based on equivalent clock method according to claim 5, wherein in the third step, 4 counting clock signals are generated by phase-locking loops with equal phase difference of 0 °, 90 °, 180 °, 270 ° to the original counting clock signal, so as to simultaneously drive 4 identical counters for counting, and the total number of counts is calculated by summation.
7. The method as claimed in claim 1, wherein the photodetection and signal processing circuit comprises a photodetector, a pre-amplifier circuit, a low-pass filter circuit, and a shaping circuit, which are connected in sequence.
8. The method as claimed in claim 7, wherein the pre-amplifier circuit includes an amplifier A1, an amplifier A2, a sequentially numbered resistor R1 to a resistor R5, a resistor Rf, a capacitor C, and a capacitor C3, the inverting terminal of the amplifier A1, the cathode of the photodetector, one terminal of the resistor Rf, and one terminal of the capacitor C are connected, the inverting terminal of the amplifier A1, the negative terminal of the power supply of the amplifier A1, and the anode of the photodetector are connected and grounded, the positive terminal of the power supply of the amplifier A1 is connected to a power VCC, the output terminal of the amplifier A1, the other terminal of the capacitor C, and the other terminal of the resistor Rf, and one terminal of the capacitor C3 are connected, the other terminal of the capacitor C3 is connected to one terminal of the resistor R1, the other terminal of the resistor R1, one terminal of the resistor R3, and the inverting terminal of the amplifier A2 are connected, the other terminal of the resistor R3, one terminal of the resistor R4, and one terminal of the resistor R5 are connected, the other end of the resistor R5 is grounded, the other end of the resistor R4 is connected with the output end of the amplifier A2, the in-phase end of the amplifier A2 is connected with the negative end of the power supply thereof and grounded, and the positive end of the power supply of the amplifier A2 is connected with the power supply VCC.
9. The method as claimed in claim 8, wherein the low pass filter circuit includes a resistor R6 to a resistor R9, a capacitor C11, a capacitor C12 and an amplifier A3 which are numbered sequentially, one end of the resistor R6, a positive terminal of a power supply V1 and an output terminal of an amplifier a2 are connected, the other end of the resistor R6, one end of the resistor R7, one end of the resistor R8 and one end of a capacitor C12 are connected, the other end of the resistor R8, one end of the capacitor C11 and an inverting terminal of the amplifier A3 are connected, the other end of the resistor R7, the other end of the capacitor C11, the output terminal of an amplifier A3 and one end of a resistor R9 are connected, the other end of the capacitor C12, the inverting terminal of an amplifier A3 and the other end of a resistor R9 are grounded, a positive terminal of the amplifier A3 is connected to the power supply 1, and a negative terminal of the amplifier A3 is connected to the power supply VCC.
10. The method according to claim 7, wherein the shaping circuit comprises a resistor R10 to a resistor R13, a diode D1, a diode D2, an amplifier A4, a NOT gate U2A, a NOT gate U6A, a flip-flop U4A, a flip-flop U3A and an XOR gate U5A which are numbered in sequence, one end of the resistor R13 is connected with an output end of the amplifier A3, the other end of the resistor R13, one end of the resistor R13 and the same-phase end of the amplifier A13 are connected, an inverting end of the amplifier A13 is grounded through the resistor R13, an output end of the amplifier A13 is connected with one end of the resistor R13, the other end of the resistor R13, an anode of the diode D13, an input end of the NOT gate U6 13 and an input end of the NOT gate U2 13 are connected, a cathode of the diode D13 is connected with a cathode of the diode D13, an anode of the diode D13 is connected with the anode of the diode D13, and an output end of the NOT gate U6 of the resistor R13 is connected with the anode 13, the other end of the resistor R14, one end of the capacitor C13 and the input end of the trigger U3A are connected, the other end of the capacitor C13 is grounded, the output end of the NOT gate U2A is connected with the input end of the trigger U4A, the output end of the trigger U4A and the output end of the trigger U3A are connected with the input end of the exclusive-OR gate U5A, and the output end of the exclusive-OR gate U5A outputs a processed signal.
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