CN114040446B - Method and device for coupling verification between information - Google Patents

Method and device for coupling verification between information Download PDF

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Publication number
CN114040446B
CN114040446B CN202111320741.4A CN202111320741A CN114040446B CN 114040446 B CN114040446 B CN 114040446B CN 202111320741 A CN202111320741 A CN 202111320741A CN 114040446 B CN114040446 B CN 114040446B
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time slot
pdu
multiframe
carried
sequence
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CN114040446A (en
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曹中明
马成友
李世亮
王勇
汤丽
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Harbin Hytera Technology Corp ltd
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Harbin Hytera Technology Corp ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04WWIRELESS COMMUNICATION NETWORKS
    • H04W28/00Network traffic management; Network resource management
    • H04W28/02Traffic management, e.g. flow control or congestion control
    • H04W28/06Optimizing the usage of the radio link, e.g. header compression, information sizing, discarding information
    • H04W28/065Optimizing the usage of the radio link, e.g. header compression, information sizing, discarding information using assembly or disassembly of packets
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04WWIRELESS COMMUNICATION NETWORKS
    • H04W72/00Local resource management
    • H04W72/04Wireless resource allocation
    • H04W72/044Wireless resource allocation based on the type of the allocated resource
    • H04W72/0446Resources in time domain, e.g. slots or frames

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Mobile Radio Communication Systems (AREA)

Abstract

The application discloses a method and a device for checking coupling between information, wherein in a first application scene, when a preset time slot determination condition is met, at least one first multiframe is acquired sequentiallyThe PDU values carried by each continuous time slot respectively, and the target time slot where the current communication processing is located is determined according to the target value sequence formed by the PDU values in sequence, thus the application only needs to consumeThe number of time slots (for example, 8 time slots of a multiframe in the FDD mode of a TDMA system, the length of a 2-bit PDU (protocol data unit) only needs to consume 2 time slots), and the accurate time slot where the current received information is located can be determined without complex processing on information carried on each time slot, so that the time required for resynchronizing the acknowledgement time slot for each transceiving conversion is shortened, and meanwhile, the possibility is provided for the business application of frequent transceiving conversion.

Description

Method and device for coupling verification between information
Technical Field
The present application relates to the field of communications technologies, and in particular, to a method and an apparatus for checking coupling between information.
Background
In TDMA (Time division multiple access ) systems, in FDD (Frequency Division Duplexing, frequency division duplex) mode, each multiframe contains eight time slots, 30ms each.
In order to be compatible with a MAC (MEDIA ACCESS Control, medium access Control layer) layer frame structure under a PDT (Police Digital Trunking ) system, the CACH (Common Announcement Channel, public broadcast channel) in the TDMA system multiframe structure no longer carries the time slot number information of the current time slot. Therefore, when the communication module changes from the transmitting state to the receiving state to resynchronize the confirmation time slot, the communication module consumes at least 4 time slots and at most 7 time slots, and the accurate time slot where the current received information is positioned can be finally confirmed through complex processing of the information carried on each time slot, so that each receiving and transmitting conversion needs a long time to resynchronize the confirmation time slot, and meanwhile, the realization of service functions in a specific scene is limited.
Disclosure of Invention
In view of this, the present application provides a method and apparatus for checking coupling between information, so as to solve the problems in the prior art, shorten the time required for re-synchronizing the acknowledgement time slot for each transceiver conversion, and provide a possibility for the service application of frequent transceiver conversion.
The specific technical scheme is as follows:
a method of inter-information coupling verification, comprising:
In a first application scenario, determining whether a predetermined time slot determination condition is satisfied; the time slot determining condition is used for triggering and confirming the time slot where the current communication processing is located in a first multiframe, wherein the first multiframe comprises x time slots, and x is an integer larger than 2; the information carried by the time slot of the first multiframe does not carry the time slot identification of the time slot where the current communication processing is located;
if yes, sequentially acquiring at least the first multiframe The value of the protocol data unit PDU carried by each successive time slot is obtained by at leastA target value sequence formed by the values of the PDU in sequence; m represents the length of the PDU;
and determining a target time slot where the current communication processing is located according to the target value sequence.
Optionally, in the first application scenario, determining whether a predetermined time slot determination condition is met includes:
Determining whether the communication module is subjected to receiving-transmitting state conversion in a frequency division duplex FDD mode of the time division multiple access TDMA system;
and if the communication module generates the receiving and transmitting state conversion, determining that the time slot determination condition is met.
Alternatively, x=8, m=2;
Said sequentially obtaining at least said first multiframe The value of the protocol data unit PDU carried by each continuous time slot comprises the following steps:
and sequentially acquiring the values of the PDUs respectively carried by the 2 continuous time slots of the first multiframe.
Optionally, the determining, according to the target value sequence, a target time slot in which the current communication process is located includes:
And determining a time slot matched with the target value sequence according to the corresponding relation between different value sequences of the preset PDU value and different time slots of the first multiframe, so as to obtain the target time slot.
Optionally, different value sequences of PDU values in the corresponding relation are uniformly represented by a sequence pattern; the value sequence is a sequence composed of p PDU values, wherein p is greater thanIs an integer of (2);
Each value sequence in the corresponding relation is as follows: one subsequence in the sequence pattern, or a sequence formed by sequentially connecting a corresponding tail subsequence and a head subsequence in the sequence pattern.
Optionally, the first multiframe is a multiframe in a TDMA system and an FDD mode, the PDU is a PDU of starting/ending LCSS of uplink control of a common broadcast channel CACH, the CACH is carried in a time slot of the first multiframe, the CACH is compatible with a media access control MAC layer frame structure in a digital trunking PDT system for police, and the CACH does not carry a time slot identifier of the time slot where the current communication processing is located.
Optionally, the method further comprises:
in a second application scene, acquiring a time slot identifier carried in information carried by a current time slot of a second multiframe, and at least acquiring a PDU value of the PDU carried in the information carried by the current time slot;
And at least carrying out correctness checking treatment on the time slot identification of the second multiframe according to the PDU value carried in the information carried by the current time slot.
Optionally, the second application scenario is a scenario of communication processing under the PDT system;
the second multiframe includes 2 time slots.
An apparatus for checking coupling between information, comprising:
The first determining module is used for determining whether a predetermined time slot determining condition is met in a first application scene; the time slot determining condition is used for triggering and confirming the time slot where the current communication processing is located in a first multiframe, wherein the first multiframe comprises x time slots, and x is an integer larger than 2; the information carried by the time slot of the first multiframe does not carry the time slot identification of the time slot where the current communication processing is located;
An acquisition module, configured to sequentially acquire at least the first multiframe if the first multiframe is satisfied The value of the protocol data unit PDU carried by each successive time slot is obtained by at leastA target value sequence formed by the values of the PDU in sequence; m represents the length of the PDU;
And the second determining module is used for determining the target time slot where the current communication processing is positioned according to the target value sequence.
Optionally, the device further includes:
A verification module for:
in a second application scene, acquiring a time slot identifier carried in information carried by a current time slot of a second multiframe, and at least acquiring a PDU value of the PDU carried in the information carried by the current time slot;
And at least carrying out correctness checking treatment on the time slot identification of the second multiframe according to the PDU value carried in the information carried by the current time slot.
An electronic device, comprising:
A memory for storing a set of computer instructions;
a processor for implementing a method of checking for coupling between information as described in any preceding claim by executing a set of instructions stored on a memory.
A storage medium having stored therein a set of computer instructions operable, when executed, to implement a method of inter-information coupling verification as claimed in any preceding claim.
According to the above scheme, the method and the device for checking the coupling between the information disclosed by the application can be used for sequentially acquiring at least a first multiframe when a predetermined time slot determination condition is met in a first application sceneThe PDU values carried by each continuous time slot respectively, and the target time slot where the current communication processing is located is determined according to the target value sequence formed by the PDU values in sequence, thus the application only needs to consumeThe number of time slots (for example, 8 time slots of a multiframe in the FDD mode of a TDMA system, the length of a 2-bit PDU (protocol data unit) only needs to consume 2 time slots), and the accurate time slot where the current received information is located can be determined without complex processing on information carried on each time slot, so that the time required for resynchronizing the acknowledgement time slot for each transceiving conversion is shortened, and meanwhile, the possibility is provided for the business application of frequent transceiving conversion.
Drawings
In order to more clearly illustrate the embodiments of the application or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
Fig. 1 is a multi-frame structure in TDMA system and FDD mode according to an embodiment of the present application;
FIG. 2 is a process flow diagram of a method for checking coupling between information according to an embodiment of the present application;
FIG. 3 shows an example of a length-8 sequence pattern disclosed in an embodiment of the present application;
FIG. 4 is another process flow diagram of a method for checking coupling between information according to an embodiment of the present application;
FIG. 5 is a multi-frame structure under a PDT system disclosed in an embodiment of the application;
FIG. 6 is a schematic diagram of checking a time slot number under a PDT system according to an embodiment of the present application;
fig. 7 is a schematic structural diagram of an apparatus for checking coupling between information according to an embodiment of the present application.
Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
In combination with the multiframe structure of fig. 1, in TDMA system, FDD mode, each multiframe contains eight timeslots, 30ms each, each carrying CACH information. In contrast, the next multiframe of the PDT system only contains 2 time slots, the TC used for indicating the time slot number in the CACH of the PDT system only has one bit correspondingly, and the current time slot is represented by the different values (0, 1) of the 1 bit as the time slot number. In order to be compatible with the MAC layer frame structure under the PDT system, the CACH under the TDMA system adopts the same structure as under the PDT system, i.e. the TC in the CACH under the TDMA system also includes 1 bit, which results in that the current time slot cannot be indicated for eight time slots of the multiframe under the TDMA system FDD mode, i.e. the CACH in the TDMA system multiframe structure no longer carries the time slot number information of the current time slot.
LCSS (Link Control Start/Stop, link Control start/end) is used to characterize the start, middle and end of LC (Link Control) signaling, the contents of which are shown in table 1 below:
TABLE 1
The conventional technique uses LCSS and one bit (0/1 to indicate the first half or the second half of the frame after the frame number, but the time slots 0/1 must be resolved after the time slots 0-3 or 4-7). Taking the value of LCSS as 13321332 for example, a multiframe of slots 0-7, a minimum of 4 slots (0-3 or 4-7) and a maximum of 7 slots (1-7 or 5-3) are consumed, and a bit (e.g., bit 0/1 of the oval symbol circle in fig. 1) after multiframe number is needed to be decoded according to each collected slot number, so that the accurate slot where the current received information is located can be finally confirmed. Resulting in a longer time for each transception-transition to resynchronize the acknowledgment slots and limiting the implementation of traffic functions in a specific scenario (e.g., traffic applications that cannot support frequent transception-transitions).
In order to solve the above problems, an embodiment of the present application discloses a method and an apparatus for checking coupling between information, where a process flow of the method for checking coupling between information is shown in fig. 2, and specifically includes:
step 201, in a first application scenario, it is determined whether a predetermined time slot determination condition is satisfied.
The time slot determining condition is used for triggering and confirming the time slot where the current communication processing is located in a first multiframe, wherein the first multiframe comprises x time slots, and x is an integer larger than 2; and the information carried by the time slot of the first multiframe does not carry the time slot identification of the time slot where the current communication processing is located.
Optionally, the first multiframe is a multiframe in an FDD mode of the TDMA system, and each first multiframe includes eight time slots, each time slot being 30ms.
When the communication module performs a transmit-receive state transition, such as each time a transmit state is changed back to a receive state, the time slot needs to be re-synchronized for confirmation, and the CACH in the FDD mode of the TDMA system no longer carries the time slot number information of the current time slot, so that in order to determine the time slot in which the current communication process is located in the FDD mode of the TDMA system, in this embodiment, the first application field Jing Sheding is as follows: communication processing scene in frequency division duplex FDD mode of TDMA system, and setting time slot determining condition as follows: in the frequency division duplex FDD mode of TDMA systems, the communication module undergoes a transmit-receive state transition.
In step 201, it is determined whether the communication module is in a transmission/reception state transition in the frequency division duplex FDD mode of the TDMA system, and if the communication module is in a transmission/reception state transition, if the communication module is in a reception state transition from the transmission state, it is determined that the time slot determination condition is satisfied.
Step 202, if yes, sequentially obtaining at least one first multiframeThe value of the protocol data unit PDU carried by each successive time slot is obtained by at leastA target value sequence formed by the values of the PDU in sequence; m represents the length of the PDU.
In the embodiment of the present application, the PDU is specifically a PDU of LCSS on the common broadcast channel CACH. The length of the PDU specifically refers to the number of bits included in the PDU, and in this embodiment, the scheme will be described by taking the length m=2 of the PDU, the tdma system, and the number x=8 of slots included in the multiframe in the FDD mode as an example.
Preferably, the first multiframe is acquired specifically when it is determined that the time slot determination condition is satisfiedThe PDU carried by each continuous time slot is valued to obtain the PDU carried by each continuous time slotThe PDU values are sequentially formed into a target value sequence.
Taking x=8 and m=2 as examples, the values of the PDUs carried by the 2 continuous time slots of the multiframe can be sequentially obtained, and a target value sequence formed by the values of the 2 PDUs in sequence is correspondingly obtained.
Step 203, determining a target time slot where the current communication processing is located according to the target value sequence.
And then, determining the time slot matched with the target value sequence according to the corresponding relation between different value sequences of the preset PDU value and different time slots of the first multiframe to obtain the target time slot.
Optionally, in the above correspondence, the different value sequences of the predetermined PDU values are uniformly represented based on a sequence pattern, where the value sequence is a sequence composed of p PDU values, where p is greater thanIs an integer of (2); and each value sequence in the corresponding relation is as follows: a subsequence in the sequence pattern, or a sequence formed by sequentially splicing a corresponding tail subsequence and a head subsequence in the sequence pattern.
Specifically, in order to support the confirmation of the time slot where the current communication process is located in the TDMA system and the FDD mode, the present application proposes a method of redefining the meaning of the specific value of the PDU of LCSS without changing the existing protocol architecture and without using the PDU reserved word (e.g. "00" in table 1), taking the 2-bit PDU of LCSS and the multiframe containing 8 time slots in the TDMA system and the FDD mode as an example, where "1" in the PDU of LCSS is not specified any more, and "2" is represented by the first piece of LC signaling, "3" is represented by the last piece of LC, and "3" is represented by the middle piece of LC, and the corresponding values of the two bits (e.g. "01" is represented by the value 1 "and" 10 "is represented by the value 2" and "11") are used to form a sequence pattern with the length of 8, so that the specific time slot where the current location is located can be determined after receiving the information of any two time slots.
Since LCSS PDUs of each slot have three possible values of 1, 2, and 3, there are nine possible values of the sequence of values of two consecutive PDUs of LCSS: 11. 12, 13, 21, 22, 23, 31, 32, 33. The multi-frame has eight time slots, which can be completely represented by the nine value sequences, and the specific time slot can be confirmed after receiving the information (namely the value of PDU) carried by any two time slots.
In the above example, p=2, that is, the number of PDU values constituting the value sequence (or the target value sequence) is 2, the PDU value is 1 corresponding to bit data "01" in the 2bit PDU, the value 2 corresponding to "10" or the value 3 corresponding to "11", the value sequence constituted by 2 (p=2) PDU values may be any one of the nine value 11, 12, 13, 21, 22, 23, 31, 32, 33, and the sequence pattern may be a sequence pattern 11213233, 11213223, 11231332 with a length of 8, etc. described below, for uniformly characterizing the nine value sequences, and the target value sequence is specifically a value sequence constituted by PDU values of 2 consecutive slots actually received, such as PDU value sequences 11, 12, 21, 13, etc. as received in the following example.
Referring to fig. 3 in combination, a sequence pattern 11213233 of length 8 (8 slots of a multiframe) is taken as an example:
receiving PDU value sequence 11, determining current time slot 1;
receiving the PDU value sequence 12, determining that the PDU is currently in the time slot number 2;
the PDU value sequence 21 is received, and the current time slot 3 can be determined;
the PDU value sequence 13 is received, and the current time slot 4 can be determined;
the PDU value sequence 32 is received, and the current time slot 5 can be determined;
the PDU value sequence 23 is received, and the current time slot 6 can be determined;
receiving PDU value sequence 33, determining that the PDU is currently in time slot 7;
the received PDU value sequence 31 may determine that it is currently in slot number 0.
Taking a sequence pattern 11213223 with length of 8 as an example:
receiving PDU value sequence 11, determining current time slot 1;
receiving the PDU value sequence 12, determining that the PDU is currently in the time slot number 2;
the PDU value sequence 21 is received, and the current time slot 3 can be determined;
the PDU value sequence 13 is received, and the current time slot 4 can be determined;
the PDU value sequence 32 is received, and the current time slot 5 can be determined;
the PDU value sequence 22 is received, and the current time slot 6 can be determined;
The PDU value sequence 23 is received, and the current time slot 7 can be determined;
the received PDU value sequence 31 may determine that it is currently in slot number 0.
In addition to sequence patterns 11213233 and 11213223, which effectively identify all possible sequence patterns of 8 slots of a multiframe, up to hundreds of other sequences are included, several examples of which are provided below: 11213323, 11221323, 11223132, 11223213, 11231322, 11231332.
Thus, according to the method of the embodiment of the application, for a multiframe containing x time slots and a given PDU length of m bits, each time slot of the multiframe can be defined by a minimum length ofThe PDU value sequence of (2) is uniquely determined.
The method of the application can be further described, in extension, from two dimensions:
1) Maximum number of elements
The length of a given PDU is m bits, which can represent 2 m states altogether;
Given that the length of a value sequence consisting of different values of the PDU is n, 2 mn states can be represented altogether;
The number of the elements can be uniquely determined to be not more than any information (time slot number, multiframe number) of 2 mn by the PDU with the length of m (bit) and the PDU with the length of n.
2) Minimum PDU length
Giving any information, such as a time slot number, wherein the number of elements in the set is x;
The length of a given PDU value sequence is n;
the information can be composed of a minimum length of Is uniquely determined by the PDU.
The method provided by the application can ensure that the time of the time slot is redetermined by each time of receiving-transmitting conversion, which is shortened from 120ms to 210ms to 60ms, has no influence on the existing protocol architecture of a P-IoT (Professional Internet of Things, private network internet of things) system, and is completely compatible.
According to the above scheme, in the method for checking the coupling between information disclosed by the application, in the first application scene, when the predetermined time slot determining condition is satisfied, at least one first multiframe is acquired sequentially(For the existing 8 time slots, 2bit PDU length, only 2 time slots are needed to be consumed) the values of protocol data units PDU respectively carried by the continuous time slots, and the target time slot where the current communication processing is located is determined according to the target value sequence formed by the values of the PDU in sequence, so that the application only needs to be consumed(For example, for the existing 8 time slots, the PDU length of 2 bits, only 2 time slots need to be consumed) and the current time slot can be determined without performing complex processing on the information carried on each time slot, so that the time required for resynchronizing the acknowledgement time slot for each time of receiving and transmitting conversion is shortened, and meanwhile, the method also provides possibility for service application of frequent receiving and transmitting conversion.
In an embodiment, referring to fig. 4, the method for checking the coupling between information disclosed in the present application may further include the following processes:
Step 204, in the second application scenario, acquiring a time slot identifier carried in information carried by a current time slot of the second multiframe, and at least acquiring a PDU value of a PDU carried in the information carried by the current time slot.
Optionally, the second application scenario is a scenario in which communication processing is performed under the PDT system.
The second multiframe is a multiframe in the second application scene, and correspondingly can be a multiframe in the PDT system.
In the PDT system, one multiframe contains 2 slots.
Step 205, performing correctness checking processing on the time slot identifier of the second multiframe at least according to the PDU value carried in the information carried by the current time slot.
In the PDT system, a TC is used to indicate a slot number, the TC includes 1 bit, specifically, different slot numbers are represented based on 0 and 1 bit values, and 4 bits of the TC, the AT (ACCESS TYPE ) and LCSS are coded by using a (7, 4) hamming channel. Wherein, the AT occupies 1 bit, LCSS occupies 2 bits, and the method can be specifically combined with the multi-frame structure under the PDT system shown in FIG. 5.
Since the (7, 4) hamming code can only correct 1 bit error, the situation that the slot number in TC is reversed, such as 0 to 1 or 1 to 0, often occurs in CACH downstream decoding.
In order to solve the problem, under the PDT system, at least the PDU value (for example, the value 1 corresponding to "10", the value 2 corresponding to "10", the value 3 corresponding to "11") of the PDU carried in the information carried in the current time slot of the multiple frames is obtained for the time slot identifier (for example, 0 or 1) carried in the information carried in the current time slot, and the correctness checking process is performed on the current time slot identifier of the multiple frames of the PDT system based on at least the PDU value.
Specifically, under the PDT system, the PDU value of LCSS always carries out infinite loop in 1332 sequence.
The present embodiment does not change any information of the existing PDT system, and only performs coupling check on the PDUs of two independent information units TC and LCSS, where, referring to fig. 6 in combination, when tc=0, only when LCSS =1 or 3 is correct; when tc=1, it is correct only when LCSS =2 or 3; when LCSS =3, a further time slot is needed to be received to confirm the correctness; when the value of two consecutive slots LCSS is 32, the first slot tc=0 can be confirmed; when the value of two consecutive slots LCSS is 33, the first slot tc=1 can be confirmed.
If the time slot number carried in the TC is verified to be wrong, the time slot number can be corrected, and relevant communication processing is carried out based on the corrected time slot number.
In this embodiment, under the PDT system, only two independent information units TC and LCSS PDU are coupled and checked, so that the correctness of TC information can be further checked, and the defect that (7, 4) hamming channel coding only can correct 1 bit error is overcome.
Corresponding to the above method, the embodiment of the present application further discloses a device for checking coupling between information, as shown in fig. 7, where the device includes:
A first determining module 701, configured to determine, in a first application scenario, whether a predetermined time slot determining condition is satisfied; the time slot determining condition is used for triggering and confirming the time slot where the current communication processing is located in a first multiframe, wherein the first multiframe comprises x time slots, and x is an integer larger than 2; the information carried by the time slot of the first multiframe does not carry the time slot identification of the time slot where the current communication processing is located;
An acquisition module 702, configured to sequentially acquire at least the first multiframe when a time slot determination condition is satisfied The value of the protocol data unit PDU carried by each successive time slot is obtained by at leastA target value sequence formed by the values of the PDU in sequence; m represents the length of the PDU;
a second determining module 703, configured to determine, according to the value sequence, a target time slot in which the current communication process is located.
In an alternative implementation manner of the embodiment of the present application, the first determining module 701 is specifically configured to:
Determining whether the communication module is subjected to receiving-transmitting state conversion in a frequency division duplex FDD mode of the time division multiple access TDMA system;
and if the communication module generates the receiving and transmitting state conversion, determining that the time slot determination condition is met.
In an alternative implementation of the embodiment of the present application, x=8, m=2;
the obtaining module 702 is specifically configured to: and sequentially acquiring the values of protocol data units PDU carried by 2 continuous time slots of the first multiframe.
In an alternative implementation manner of the embodiment of the present application, the second determining module 703 is specifically configured to:
And determining a time slot matched with the target value sequence according to the corresponding relation between different value sequences of the preset PDU value and different time slots of the first multiframe to obtain the target time slot.
In an optional implementation manner of the embodiment of the present application, different value sequences of PDU values in the corresponding relationship are uniformly represented by a sequence pattern; the value sequence is a sequence composed of p PDU values, wherein p is larger than the value sequenceIs an integer of (2);
each value sequence in the corresponding relation is as follows: one subsequence in the sequence pattern, or a sequence formed by sequentially connecting a corresponding tail subsequence and a head subsequence in the sequence pattern.
In an optional implementation manner of the embodiment of the present application, the first multiframe is a multiframe in a TDMA system and an FDD mode, the PDU is a PDU of a common broadcast channel CACH uplink control start/end LCSS, the CACH is carried in a time slot of the first multiframe, the CACH is compatible with a MAC layer frame structure of a medium access control layer in the digital trunking PDT system for police, and the CACH does not carry a time slot identifier of a time slot in which the current communication processing is located.
In an optional implementation manner of the embodiment of the present application, the foregoing apparatus further includes a verification module, configured to:
in a second application scene, acquiring a time slot identifier carried in information carried by a current time slot of a second multiframe, and at least acquiring a PDU value of the PDU carried in the information carried by the current time slot;
And at least carrying out correctness checking treatment on the time slot identification of the second multiframe according to the PDU value carried in the information carried by the current time slot.
In an optional implementation manner of the embodiment of the present application, the second application scenario is a scenario of communication processing under the PDT system;
The second multiframe includes 2 slots.
The device for checking the coupling between information disclosed in the embodiment of the present application corresponds to the method for checking the coupling between information disclosed in the embodiment of the method, so that the description is relatively simple, and the relevant similarities are only required to refer to the description of the corresponding embodiment of the method, and are not described in detail herein.
The embodiment of the application also discloses an electronic device, which specifically comprises:
A memory for storing a set of computer instructions;
The set of computer instructions may be implemented in the form of a computer program.
A processor for implementing a method of inter-information coupling verification as disclosed in any of the method embodiments above by executing a set of computer instructions.
The processor may be a central processing unit (Central Processing Unit, CPU), application-specific integrated circuit (ASIC), digital Signal Processor (DSP), application-specific integrated circuit (ASIC), field-programmable gate array (FPGA) or other programmable logic device, etc.
In addition, the electronic device may include communication interfaces, communication buses, and the like. The memory, processor and communication interface communicate with each other via a communication bus.
The communication interface is used for communication between the electronic device and other devices. The communication bus may be a peripheral component interconnect standard (PERIPHERAL COMPONENT INTERCONNECT, PCI) bus, or an extended industry standard architecture (Extended Industry Standard Architecture, EISA) bus, etc., and may be classified as an address bus, a data bus, a control bus, etc.
In addition, the embodiment of the application also discloses a storage medium, wherein a computer instruction set is stored in the storage medium, and the stored computer instruction set can be used for realizing the method for checking the coupling between the information disclosed in the embodiment of the method Wen Ren.
In the present specification, each embodiment is described in a progressive manner, and each embodiment is mainly described in a different point from other embodiments, and identical and similar parts between the embodiments are all enough to refer to each other. For the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant points refer to the description of the method section.
Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative elements and steps are described above generally in terms of functionality in order to clearly illustrate the interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. The software modules may be disposed in Random Access Memory (RAM), memory, read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (10)

1. A method for checking coupling between information, comprising:
In a first application scenario, determining whether a predetermined time slot determination condition is satisfied; the time slot determining condition is used for triggering and confirming the time slot where the current communication processing is located in a first multiframe, wherein the first multiframe comprises x time slots, and x is an integer larger than 2; the information carried by the time slot of the first multiframe does not carry the time slot identification of the time slot where the current communication processing is located;
if yes, sequentially acquiring at least the first multiframe The value of the protocol data unit PDU carried by each successive time slot is obtained by at leastA target value sequence formed by the values of the PDU in sequence; m represents the length of the PDU;
Determining a target time slot where the current communication processing is located according to the target value sequence;
In the first application scenario, determining whether a predetermined time slot determination condition is satisfied includes:
Determining whether the communication module is subjected to receiving-transmitting state conversion in a frequency division duplex FDD mode of the time division multiple access TDMA system;
and if the communication module generates the receiving and transmitting state conversion, determining that the time slot determination condition is met.
2. The method of claim 1, wherein x = 8 and m = 2;
Said sequentially obtaining at least said first multiframe The value of the protocol data unit PDU carried by each continuous time slot comprises the following steps:
and sequentially acquiring the values of the PDUs respectively carried by the 2 continuous time slots of the first multiframe.
3. The method of claim 1, wherein determining the target time slot in which the current communication process is located according to the target sequence of values comprises:
And determining a time slot matched with the target value sequence according to the corresponding relation between different value sequences of the preset PDU value and different time slots of the first multiframe, so as to obtain the target time slot.
4. A method according to claim 3, wherein different value sequences of the predetermined PDU values in the correspondence are uniformly characterized by a sequence pattern; the value sequence is a sequence composed of p PDU values, wherein p is greater thanIs an integer of (2);
Each value sequence in the corresponding relation is as follows: one subsequence in the sequence pattern, or a sequence formed by sequentially connecting a corresponding tail subsequence and a head subsequence in the sequence pattern.
5. The method as recited in claim 1, further comprising:
in a second application scene, acquiring a time slot identifier carried in information carried by a current time slot of a second multiframe, and at least acquiring a PDU value of the PDU carried in the information carried by the current time slot;
And at least carrying out correctness checking treatment on the time slot identification of the second multiframe according to the PDU value carried in the information carried by the current time slot.
6. The method of claim 5, wherein the second application scenario is a scenario in which communication processing is performed under a PDT system;
the second multiframe includes 2 time slots.
7. An apparatus for checking coupling between information, comprising:
The first determining module is used for determining whether a predetermined time slot determining condition is met in a first application scene; the time slot determining condition is used for triggering and confirming the time slot where the current communication processing is located in a first multiframe, wherein the first multiframe comprises x time slots, and x is an integer larger than 2; the information carried by the time slot of the first multiframe does not carry the time slot identification of the time slot where the current communication processing is located;
An acquisition module, configured to sequentially acquire at least the first multiframe if the first multiframe is satisfied The value of the protocol data unit PDU carried by each successive time slot is obtained by at leastA target value sequence formed by the values of the PDU in sequence; m represents the length of the PDU;
the second determining module is used for determining a target time slot where the current communication processing is located according to the target value sequence;
the first determining module is specifically configured to:
Determining whether the communication module is subjected to receiving-transmitting state conversion in a frequency division duplex FDD mode of the time division multiple access TDMA system;
and if the communication module generates the receiving and transmitting state conversion, determining that the time slot determination condition is met.
8. The apparatus as recited in claim 7, further comprising:
A verification module for:
in a second application scene, acquiring a time slot identifier carried in information carried by a current time slot of a second multiframe, and at least acquiring a PDU value of the PDU carried in the information carried by the current time slot;
And at least carrying out correctness checking treatment on the time slot identification of the second multiframe according to the PDU value carried in the information carried by the current time slot.
9. An electronic device, comprising:
A memory for storing a set of computer instructions;
A processor for implementing a method of checking coupling between information according to any of claims 1-6 by executing a set of instructions stored on a memory.
10. A storage medium having stored therein a set of computer instructions which, when executed by a processor, is operable to carry out a method of checking for coupling between information according to any one of claims 1 to 6.
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CN112996101B (en) * 2021-03-17 2024-06-11 福建科立讯通信有限公司 Time slot synchronization method and device applied to DMR and PDT standards
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CN112996101A (en) * 2021-03-17 2021-06-18 福建科立讯通信有限公司 Time slot synchronization method and device applied to DMR and PDT standards

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