CN114040446A - Method and device for coupling verification between information - Google Patents
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- H04W28/06—Optimizing the usage of the radio link, e.g. header compression, information sizing, discarding information
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- H—ELECTRICITY
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Abstract
In a first application scenario, when a predetermined time slot determination condition is satisfied, at least a first multiframe is acquired in sequence
The value of PDU carried by each continuous time slot, and the target time slot of the current communication processing is determined according to the target value sequence composed of the PDU values in sequence, therefore, the application only needs to consume
Each time slot (for example, for 8 time slots of multiframes in an FDD mode of a TDMA system, the length of 2bit PDU only needs to consume 2 time slots), and the accurate time slot of the current received information can be determined without performing complex processing on the information carried on each time slot, thereby shortening the time for receiving and transmitting information each timeThe time required for switching the resynchronization confirmation time slot also provides possibility for the service application which frequently receives and transmits switching.
Description
Technical Field
The present application relates to the field of communications technologies, and in particular, to a method and an apparatus for coupling verification between information.
Background
In a TDMA (Time Division multiple access) system and FDD (Frequency Division duplex), each multiframe includes eight timeslots, each timeslot being 30 ms.
In order to be compatible with a MAC (Media Access Control) layer frame structure under a PDT (policy Digital Trunking) system, the CACH (Common notification Channel) in the TDMA system multiframe structure no longer carries the timeslot number information of the current timeslot. Therefore, when the communication module is switched back to the receiving state from the transmitting state to resynchronize the confirmation time slot each time, at least 4 time slots and at most 7 time slots are consumed, and the accurate time slot of the current receiving information can be finally confirmed through complex processing of the information carried on each time slot, so that the time slot is resynchronized and confirmed in each transceiving conversion for a long time, and the realization of service functions under a specific scene is limited.
Disclosure of Invention
In view of the above, the present application provides a method and an apparatus for checking coupling between information, so as to solve the problems in the prior art, shorten the time required for re-synchronizing the acknowledgment slot for each transceiving conversion, and provide possibility for service application with frequent transceiving conversion.
The specific technical scheme is as follows:
a method of checking coupling between information, comprising:
in a first application scenario, determining whether a predetermined time slot determination condition is satisfied; the time slot determining condition is used for triggering and confirming a time slot in which the current communication processing is positioned in a first multiframe, wherein the first multiframe comprises x time slots, and x is an integer larger than 2; the information carried by the time slot of the first multiframe does not carry the time slot identification of the time slot in which the current communication processing is positioned;
if so, sequentially acquiring at least the first multiframes
The value of the protocol data unit PDU respectively carried by each continuous time slot is obtained
The PDU values form a target value sequence in sequence; m represents the length of the PDU;
and determining the target time slot in which the current communication processing is positioned according to the target value sequence.
Optionally, in the first application scenario, the determining whether a predetermined time slot determination condition is met includes:
determining whether a communication module generates transceiving state conversion or not in a Frequency Division Duplex (FDD) mode of a Time Division Multiple Access (TDMA) system;
and if the communication module generates the transceiving state conversion, determining that the time slot determining condition is met.
Alternatively, x is 8, m is 2;
said sequentially acquiring at least of said first multiframes
The value of the protocol data unit PDU respectively carried by each continuous time slot includes:
and sequentially acquiring values of the PDU (protocol data unit) respectively carried by the 2 continuous time slots of the first multiframe.
Optionally, the determining a target timeslot where the current communication processing is located according to the target value sequence includes:
and determining a time slot matched with the target value sequence according to the corresponding relation between different value sequences of the preset PDU value and different time slots of the first multiframe to obtain the target time slot.
Optionally, different value sequences of PDU values in the correspondence relationship are uniformly represented by a sequence pattern; the value sequence is a sequence formed by taking values of p PDUs, wherein p is more than
An integer of (d);
each value sequence in the corresponding relation is as follows: and one subsequence in the sequence pattern or a sequence formed by sequentially splicing a corresponding tail subsequence and a corresponding head subsequence in the sequence pattern.
Optionally, the first multiframe is a multiframe in a TDMA system or an FDD mode, the PDU is a PDU of a start/end lcs for a link control on a common broadcast channel CACH, the CACH is carried in a timeslot of the first multiframe, the CACH is compatible with a MAC layer frame structure of a medium access control in a digital cluster PDT system for police, and the CACH does not carry a timeslot identifier of a timeslot where current communication processing is performed.
Optionally, the method further includes:
in a second application scene, acquiring a time slot identifier carried in information carried by a current time slot of a second multiframe, and at least acquiring a PDU value of the PDU carried in the information carried by the current time slot;
and carrying out correctness check processing on the time slot identifier of the second multiframe at least according to the PDU value carried in the information carried by the current time slot.
Optionally, the second application scenario is a scenario in which communication processing is performed under the PDT system;
the second multiframe includes 2 time slots.
An apparatus for verifying coupling between information, comprising:
the device comprises a first determining module, a second determining module and a control module, wherein the first determining module is used for determining whether a preset time slot determining condition is met or not in a first application scene; the time slot determining condition is used for triggering and confirming a time slot in which the current communication processing is positioned in a first multiframe, wherein the first multiframe comprises x time slots, and x is an integer larger than 2; the information carried by the time slot of the first multiframe does not carry the time slot identification of the time slot in which the current communication processing is positioned;
an obtaining module, configured to sequentially obtain at least the first multiframes if the first multiframe is satisfied with the first multiframe
The value of the protocol data unit PDU respectively carried by each continuous time slot is obtained
The PDU values form a target value sequence in sequence; m represents the length of the PDU;
and the second determining module is used for determining the target time slot in which the current communication processing is positioned according to the target value sequence.
Optionally, the apparatus further includes:
a verification module to:
in a second application scene, acquiring a time slot identifier carried in information carried by a current time slot of a second multiframe, and at least acquiring a PDU value of the PDU carried in the information carried by the current time slot;
and carrying out correctness check processing on the time slot identifier of the second multiframe at least according to the PDU value carried in the information carried by the current time slot.
An electronic device, comprising:
a memory for storing a set of computer instructions;
a processor for implementing a method of checking coupling between information as claimed in any one of the preceding claims by executing a set of instructions stored in a memory.
A storage medium having stored therein a set of computer instructions, which when executed, is operable to implement a method of checking coupling between information as claimed in any one of the preceding claims.
According to the above scheme, in the first application scenario, when the predetermined time slot determination condition is satisfied, at least the first multiframe is sequentially acquired by the method and the device for checking coupling between information disclosed in the present application
The values of PDU carried by each continuous time slot are determined, and the target time slot in which the current communication processing is positioned is determined according to the target value sequence formed by the sequential PDU values, thereby the applicationPlease only need to consume
For each time slot (for example, for 8 time slots of multiframes in an FDD mode of a TDMA system, the length of 2bit PDU only needs to consume 2 time slots), and the accurate time slot of the current received information can be determined without performing complex processing on the information carried on each time slot, so that the time required for re-synchronizing and confirming the time slot in each transceiving conversion is shortened, and meanwhile, the possibility is provided for the service application of frequent transceiving conversion.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a multiframe structure in an FDD mode of a TDMA system according to an embodiment of the present disclosure;
FIG. 2 is a flowchart of a process of a method for coupling verification between information according to an embodiment of the present disclosure;
fig. 3 is an exemplary length-8 sequence pattern disclosed in an embodiment of the present application;
FIG. 4 is a flowchart of another process of a method for coupling verification between information according to an embodiment of the present disclosure;
FIG. 5 is a multiframe structure under a PDT system as disclosed in an embodiment of the present application;
FIG. 6 is a schematic diagram illustrating the verification of a time slot number in a PDT system according to an embodiment of the present disclosure;
fig. 7 is a schematic structural diagram of an apparatus for verifying coupling between information according to an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In conjunction with the multiframe structure of fig. 1, in a TDMA system, FDD, each multiframe contains eight timeslots, each timeslot carrying 30ms of CACH information. The difference is that the next multiframe of the PDT system only contains 2 time slots, the TC used for indicating the time slot number in the CACH under the PDT system has only one bit correspondingly, and the time slot number representing the current time slot is represented by different values (0, 1) of the 1 bit. In order to be compatible with the MAC layer frame structure in the PDT system, the CACH in the TDMA system adopts the same structure as that in the PDT system, i.e., the TC in the CACH in the TDMA system also includes 1 bit, which results in that the current time slot cannot be indicated for eight time slots of the multiframe in the FDD mode of the TDMA system, i.e., the CACH in the multiframe structure of the TDMA system no longer carries the time slot number information of the current time slot.
The LCs (Link Control Start/Stop) is used to characterize the Start, middle and end of LC (Link Control) signaling, and the contents thereof are shown in table 1 below:
TABLE 1
The conventional technique uses the LCSS and a bit (0/1, indicating whether the first half multiframe or the second half multiframe, but the 0/1 can be solved by collecting the 0-3 or 4-7 timeslots) after the multiframe number to confirm the timeslot. Taking the 0-7 timeslot of a multiframe as an example, the value of the lcs is 13321332, which consumes at least 4 timeslots (0-3 or 4-7) and at most 7 timeslots (1-7 or 5-3), and it is necessary to solve a bit (e.g., the circled bit 0/1 of the oval symbol in fig. 1) after the multiframe number according to each collected timeslot number to finally confirm the exact timeslot where the currently received information is located. Resulting in a long time required for re-synchronizing the acknowledgment slots for each transceive transition and limiting the implementation of service functions in specific scenarios (e.g., service applications that support frequent transceive transitions cannot be supported).
In order to solve the above problem, an embodiment of the present application discloses a method and an apparatus for coupling verification between information, where a processing flow of the method for coupling verification between information is shown in fig. 2, and specifically includes:
The time slot determining condition is used for triggering and determining a time slot in which the current communication processing is located in a first multiframe, wherein the first multiframe comprises x time slots, and x is an integer greater than 2; and the information carried by the time slot of the first multiframe does not carry the time slot identification of the time slot in which the current communication processing is positioned.
Optionally, the first multiframe is a multiframe in an FDD mode of a TDMA system, and each first multiframe includes eight time slots, and each time slot is 30 ms.
In view of the above, in order to determine the timeslot in which the current communication processing is performed in the FDD mode of the TDMA system, the first application scenario in this embodiment is set as: a communication processing scenario in a Frequency Division Duplex (FDD) mode of a TDMA system, and time slot determining conditions are set as follows: in the FDD mode of the TDMA system, the communication module undergoes a transmit/receive state transition.
In step 201, it is correspondingly determined whether the communication module is in a transmit-receive state transition in a frequency division duplex FDD mode of the TDMA system, and if the communication module is in a transmit-receive state transition, if the communication module is in a transmit state transition to a receive state, it is determined that the time slot determination condition is satisfied.
In the embodiment of the present application, the PDU is specifically a PDU of an lcs on a common broadcast channel CACH. The length of the PDU specifically refers to the number of bits included in the PDU, and this embodiment will describe the scheme by taking the length m of the PDU as 2, and the number x of time slots included in a multiframe as 8 in the TDMA system and FDD mode as an example.
Preferably, the first multiframe is specifically acquired when it is determined that the time slot determination condition is satisfied
The value of PDU respectively carried by each continuous time slot is obtained
And taking the PDU values to form a target value sequence in sequence.
Taking x as 8 and m as 2 as examples, values of PDUs respectively carried by 2 consecutive timeslots of the multiframe can be sequentially obtained, and accordingly, a target value sequence composed of 2 PDU values in sequence is obtained.
And 203, determining a target time slot in which the current communication processing is positioned according to the target value sequence.
And then, further determining the time slot matched with the target value sequence according to the corresponding relation between the different value sequences of the preset PDU value and the different time slots of the first multiframe, and obtaining the target time slot.
Optionally, in the above correspondence, different value sequences of the predetermined PDU values are uniformly represented based on a sequence pattern, and the value sequence is a sequence composed of p PDU values, where p is greater than p
An integer of (d); and each value sequence in the corresponding relation is as follows: a subsequence in the sequence pattern, or a sequence formed by sequentially joining a corresponding tail subsequence and a head subsequence in the sequence pattern.
Specifically, in order to support the confirmation of the time slot in which the current communication processing is performed in the TDMA system and the FDD mode, the present application proposes a method for redefining only the meaning of the specific value of the PDU of the LCs without changing the existing protocol architecture and using a PDU reserved word (as "00" in table 1), which takes as an example the 2-bit PDU of the LCs and the multiframe including 8 time slots in the TDMA system and the FDD mode, wherein "1" in the PDU of the LCs represents the first slice of the LC signaling, "2" represents the last slice of the LC, "3" represents the middle slice of the LC, but the values corresponding to the two bits (e.g., value 1 corresponding to "01," value 2 corresponding to "10," value 3 corresponding to "11") are used to form a sequence pattern with a length of 8, so that the specific time slot in which the current time slot is located can be determined after the information of any two time slots is received.
Because the PDU of the lcs of each timeslot has three possible values, 1, 2, and 3, the value sequence of the PDU values of two consecutive lcs has nine possible values: 11. 12, 13, 21, 22, 23, 31, 32, 33. And a multiframe has eight time slots, which can be completely represented by the nine value sequences, and the current specific time slot can be confirmed after information (namely PDU values) carried by any two time slots is received.
In the above example, p ═ 2, that is, the number of PDU values constituting the value sequence (or target value sequence) is 2, the PDU value is 1 corresponding to bit data "01" in 2-bit PDU, and the value 2 corresponding to "10" or the value 3 corresponding to "11", the value sequence constituted based on 2(p ═ 2) PDU values may correspond to any one of the above nine values 11, 12, 13, 21, 22, 23, 31, 32, and 33, and the sequence pattern may be a sequence pattern 11213233, 11213223, and 11231332 with a length of 8, which is described below, and is used to uniformly characterize the above nine value sequences, and the target value sequence is specifically a value sequence constituted based on actually received PDU values of 2 consecutive slots, such as the PDU value sequence 11, 12, 21, and 13 received in the following example.
Referring to fig. 3 in combination, a sequence pattern 11213233 with a length of 8 (8 slots in a multiframe) is taken as an example:
receiving a PDU value sequence 11, and determining that the current time slot is No. 1;
receiving a PDU value sequence 12, determining that the current time slot is No. 2;
receiving PDU value sequence 21, determining the current number 3 time slot;
receiving a PDU value sequence 13, and determining that the current time slot is No. 4;
receiving PDU value sequence 32, determining the current number 5 time slot;
receiving PDU value sequence 23, determining the current number 6 time slot;
receiving a PDU value sequence 33, determining that the current time slot is No. 7;
the PDU value sequence 31 is received, and it can be determined that the current time slot is 0.
Taking sequence pattern 11213223 with length 8 as an example:
receiving a PDU value sequence 11, and determining that the current time slot is No. 1;
receiving a PDU value sequence 12, determining that the current time slot is No. 2;
receiving PDU value sequence 21, determining the current number 3 time slot;
receiving a PDU value sequence 13, and determining that the current time slot is No. 4;
receiving PDU value sequence 32, determining the current number 5 time slot;
receiving PDU value sequence 22, determining number 6 time slot currently;
receiving PDU value sequence 23, determining number 7 time slot currently;
the PDU value sequence 31 is received, and it can be determined that the current time slot is 0.
In addition to the sequence patterns 11213233 and 11213223, which effectively identify all possible sequence patterns for 8 slots of a multiframe, including up to hundreds of other sequences, several examples are provided below: 11213323, 11221323, 11223132, 11223213, 11231322, 11231332.
Thus, for a multiframe comprising x timeslots and a given PDU length of m bits, the method according to the embodiments of the present application may be used to select the minimum length of each timeslot of the multiframe to be m bits
The PDU value sequence is uniquely determined.
By extension, the methods of the present application can also be described in two dimensions:
1) maximum number of elements
The length of a given PDU is m bits, which can collectively represent 2mA seed status;
given that the length of a value sequence formed by different values of the PDU is n, 2 can be represented in totalmnA seed status;
the PDU with the length of m (bit) and the PDU value sequence with the length of n can uniquely determine that the number of elements does not exceed 2mnAny information (slot number, multiframe number).
2) Minimum PDU length
Giving any information, such as a time slot number, wherein the number of elements in a set is x;
giving the length of a PDU value sequence as n;
the information may each be of a minimum length of
Is uniquely determined.
The above manner provided by the application can shorten the time for re-determining the timeslot in each transceiving conversion from 120ms to 210ms to 60ms, and has no influence on the existing protocol architecture of a P-IoT (Professional Internet of Things) system, so that the system is completely compatible.
According to the above solutions, in the first application scenario, when the predetermined time slot determination condition is satisfied, the method for checking coupling between information disclosed in the present application sequentially obtains at least the first multiframe
(for example, only 2 time slots need to be consumed for the existing PDU length of 8 time slots and 2 bits) the values of the protocol data units PDU carried by each continuous time slot, and the current value sequence is determined according to the target value sequence formed by the values of all PDUs in sequenceThe target time slot in which the communication process is located, and thus, the application only needs to consume
(for example, for the length of the existing 8 time slots and 2-bit PDU, only 2 time slots need to be consumed) time slots, and the current time slot can be determined without performing complex processing on the information carried on each time slot, so that the time required for re-synchronizing the confirmation time slot in each transceiving conversion is shortened, and meanwhile, the possibility is provided for the service application of frequent transceiving conversion.
In an embodiment, referring to fig. 4, the method for checking coupling between information disclosed in the present application may further include the following processes:
Optionally, the second application scenario is a scenario in which communication processing is performed under the PDT system.
The second multiframe is a multiframe in a second application scene, and correspondingly can be a multiframe in a PDT system.
Under the PDT system, a multiframe contains 2 time slots.
In the PDT system, a TC is used to indicate a timeslot number, the TC includes 1 bit, specifically, different timeslot numbers are represented based on 0 and 1 bit values thereof, and a (7, 4) hamming channel code is used for 4 bits of the TC, an Access Type (AT), and an lcs (lcs). Wherein, AT occupies 1 bit, LCSS occupies 2 bits, and specifically, the multiframe structure under the PDT system shown in fig. 5 can be combined.
Since the (7, 4) hamming code can only correct 1 bit error, the slot number in TC is often reversed in CACH downlink decoding, e.g. 0 becomes 1, or 1 becomes 0.
In order to solve the problem, under the PDT system, at least a PDU value (e.g. 1 corresponding to "10", "2 corresponding to" 10 ", and" 3 corresponding to "11") of a PDU carried in information carried in a current timeslot of a multiframe of the PDT system is obtained for a timeslot identifier (e.g. 0 or 1) carried in the information carried in the current timeslot, and correctness checking processing is performed on the current timeslot identifier of the PDT system multiframe based on at least the PDU value.
Specifically, in the PDT system, the PDU value of the LCSS always circulates indefinitely in a sequence of 1332.
The present embodiment does not change any information of the existing PDT system, and only performs coupling check on two independent information units TC and PDU of the lcs, where, referring to fig. 6 in combination, when TC is 0, it is correct only when lcs is 1 or 3; when TC is 1, it is correct only when lcs 2 or 3; when the LCSS is 3, a time slot needs to be received again to confirm the correctness; when the value of two consecutive timeslots lcs is 32, it may be confirmed that the first timeslot TC is 0; when the value of two consecutive timeslots lcs is 33, it can be confirmed that the first timeslot TC is 1.
If the time slot number carried in the TC is wrong after verification, the TC can be corrected, and relevant communication processing is carried out based on the corrected time slot number.
In the embodiment, the correctness of TC information can be further verified by coupling and verifying two independent information units TC and PDU of the LCSS under the PDT system, so that the defect that (7, 4) Hamming channel coding can only correct errors of 1 bit is overcome.
Corresponding to the above method, an embodiment of the present application further discloses an apparatus for verifying coupling between information, as shown in fig. 7, the apparatus includes:
a first determining module 701, configured to determine whether a predetermined time slot determining condition is met in a first application scenario; the time slot determining condition is used for triggering and confirming a time slot in which the current communication processing is positioned in a first multiframe, wherein the first multiframe comprises x time slots, and x is an integer larger than 2; the information carried by the time slot of the first multiframe does not carry the time slot identification of the time slot in which the current communication processing is positioned;
an obtaining module 702, configured to sequentially obtain the time slots when the time slot determination condition is satisfiedTaking at least the first multiframe
The value of the protocol data unit PDU respectively carried by each continuous time slot is obtained
The PDU values form a target value sequence in sequence; m represents the length of the PDU;
a second determining module 703 is configured to determine, according to the value sequence, a target timeslot where the current communication processing is located.
In an optional implementation manner of the embodiment of the present application, the first determining module 701 is specifically configured to:
determining whether a communication module generates transceiving state conversion or not in a Frequency Division Duplex (FDD) mode of a Time Division Multiple Access (TDMA) system;
and if the communication module generates the transceiving state conversion, determining that the time slot determining condition is met.
In an alternative embodiment of the embodiments of the present application, x is 8, and m is 2;
the obtaining module 702 is specifically configured to: and sequentially acquiring values of Protocol Data Units (PDU) respectively carried by 2 continuous time slots of the first multiframe.
In an optional implementation manner of the embodiment of the present application, the second determining module 703 is specifically configured to:
and determining a time slot matched with the target value sequence according to the corresponding relation between different value sequences of the preset PDU value and different time slots of the first multiframe to obtain the target time slot.
In an optional implementation manner of the embodiment of the present application, different value sequences of PDU values in the correspondence are uniformly represented by a sequence pattern; the value sequence is a sequence consisting of p PDU values, wherein p is larger than the PDU value
An integer of (d);
each value sequence in the corresponding relation is as follows: a subsequence in the sequence pattern, or a sequence formed by sequentially joining a corresponding tail subsequence and a head subsequence in the sequence pattern.
In an optional implementation manner of the embodiment of the present application, the first multiframe is a multiframe in a TDMA system and an FDD mode, the PDU is a PDU of a start/end lcs of uplink control on a common broadcast channel CACH, the CACH is carried in a timeslot of the first multiframe, the CACH is compatible with a MAC layer frame structure of a medium access control layer in a digital trunking PDT system for police, and the CACH does not carry a timeslot identifier of a timeslot where current communication processing is performed.
In an optional implementation manner of the embodiment of the present application, the apparatus further includes a verification module, configured to:
in a second application scene, acquiring a time slot identifier carried in information carried by a current time slot of a second multiframe, and at least acquiring a PDU value of the PDU carried in the information carried by the current time slot;
and carrying out correctness check processing on the time slot identifier of the second multiframe at least according to the PDU value carried in the information carried by the current time slot.
In an optional implementation manner of the embodiment of the present application, the second application scenario is a scenario in which communication processing is performed under the PDT system;
the second multiframe includes 2 time slots.
For the device for checking coupling between information disclosed in the embodiment of the present application, since it corresponds to the method for checking coupling between information disclosed in the above method embodiment, the description is relatively simple, and for the relevant similar points, please refer to the description of the above corresponding method embodiment, and detailed description is omitted here.
The embodiment of the present application further discloses an electronic device, which specifically includes:
a memory for storing a set of computer instructions;
the set of computer instructions may be embodied in the form of a computer program.
A processor for implementing a method for coupling verification between information as disclosed in any of the above method embodiments by executing a set of computer instructions.
The processor may be a Central Processing Unit (CPU), an application-specific integrated circuit (ASIC), a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device.
Besides, the electronic device may further include a communication interface, a communication bus, and the like. The memory, the processor and the communication interface communicate with each other via a communication bus.
The communication interface is used for communication between the electronic device and other devices. The communication bus may be a Peripheral Component Interconnect (PCI) bus, an Extended Industry Standard Architecture (EISA) bus, or the like, and may be divided into an address bus, a data bus, a control bus, and the like.
In addition, the embodiment of the present application further discloses a storage medium, in which a computer instruction set is stored, and when the stored computer instruction set is executed, the method for checking coupling between pieces of information disclosed in any one of the above method embodiments can be implemented.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.
Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative components and steps have been described above generally in terms of their functionality in order to clearly illustrate this interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in Random Access Memory (RAM), memory, Read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (11)
1. A method for checking coupling between information, comprising:
in a first application scenario, determining whether a predetermined time slot determination condition is satisfied; the time slot determining condition is used for triggering and confirming a time slot in which the current communication processing is positioned in a first multiframe, wherein the first multiframe comprises x time slots, and x is an integer larger than 2; the information carried by the time slot of the first multiframe does not carry the time slot identification of the time slot in which the current communication processing is positioned;
if so, sequentially acquiring at least the first multiframes
The value of the protocol data unit PDU respectively carried by each continuous time slot is obtained
The PDU values form a target value sequence in sequence; m represents the length of the PDU;
and determining the target time slot in which the current communication processing is positioned according to the target value sequence.
2. The method of claim 1, wherein in the first application scenario, determining whether a predetermined time slot determination condition is met comprises:
determining whether a communication module generates transceiving state conversion or not in a Frequency Division Duplex (FDD) mode of a Time Division Multiple Access (TDMA) system;
and if the communication module generates the transceiving state conversion, determining that the time slot determining condition is met.
3. The method of claim 1, wherein x-8, m-2;
said sequentially acquiring at least of said first multiframes
The value of the protocol data unit PDU respectively carried by each continuous time slot includes:
and sequentially acquiring values of the PDU (protocol data unit) respectively carried by the 2 continuous time slots of the first multiframe.
4. The method of claim 1, wherein the determining a target timeslot in which a current communication process is located according to the target value sequence comprises:
and determining a time slot matched with the target value sequence according to the corresponding relation between different value sequences of the preset PDU value and different time slots of the first multiframe to obtain the target time slot.
5. The method according to claim 4, wherein different value sequences of the predetermined PDU values in the correspondence are characterized uniformly by a sequence pattern; the value sequence is a value group formed by p PDUsIs a sequence of
An integer of (d);
each value sequence in the corresponding relation is as follows: and one subsequence in the sequence pattern or a sequence formed by sequentially splicing a corresponding tail subsequence and a corresponding head subsequence in the sequence pattern.
6. The method of claim 1, further comprising:
in a second application scene, acquiring a time slot identifier carried in information carried by a current time slot of a second multiframe, and at least acquiring a PDU value of the PDU carried in the information carried by the current time slot;
and carrying out correctness check processing on the time slot identifier of the second multiframe at least according to the PDU value carried in the information carried by the current time slot.
7. The method as claimed in claim 6, wherein said second application scenario is a scenario of communication processing under a PDT system;
the second multiframe includes 2 time slots.
8. An apparatus for verifying coupling between information, comprising:
the device comprises a first determining module, a second determining module and a control module, wherein the first determining module is used for determining whether a preset time slot determining condition is met or not in a first application scene; the time slot determining condition is used for triggering and confirming a time slot in which the current communication processing is positioned in a first multiframe, wherein the first multiframe comprises x time slots, and x is an integer larger than 2; the information carried by the time slot of the first multiframe does not carry the time slot identification of the time slot in which the current communication processing is positioned;
an obtaining module, configured to sequentially obtain at least the first multiframes if the first multiframe is satisfied with the first multiframe
The value of the protocol data unit PDU respectively carried by each continuous time slot is obtained
The PDU values form a target value sequence in sequence; m represents the length of the PDU;
and the second determining module is used for determining the target time slot in which the current communication processing is positioned according to the target value sequence.
9. The apparatus of claim 8, further comprising:
a verification module to:
in a second application scene, acquiring a time slot identifier carried in information carried by a current time slot of a second multiframe, and at least acquiring a PDU value of the PDU carried in the information carried by the current time slot;
and carrying out correctness check processing on the time slot identifier of the second multiframe at least according to the PDU value carried in the information carried by the current time slot.
10. An electronic device, comprising:
a memory for storing a set of computer instructions;
a processor for implementing the method of checking coupling between information as claimed in any one of claims 1 to 7 by executing a set of instructions stored in a memory.
11. A storage medium having stored therein a set of computer instructions operable when executed to implement a method of inter-information coupling verification as claimed in any one of claims 1 to 7.
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