CN114036892A - Parallel processing method and system for single fine granularity in capacitance extraction by random walk - Google Patents
Parallel processing method and system for single fine granularity in capacitance extraction by random walk Download PDFInfo
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Abstract
The invention relates to the technical field of computer aided design of integrated circuits, in particular to a single-fine-granularity parallel processing method and a single-fine-granularity parallel processing system which walk randomly in capacitance extraction, wherein interconnection line information is obtained, and a physical three-dimensional structure of an integrated circuit is obtained by matching with a process file; configuring a plurality of threads and convergence precision according to the user requirement and the number of the processor operation cores; forming a closed, wrapped gaussian surface for each conductor; calculating probability density according to the area of the Gaussian surface; selecting a plurality of points from the Gaussian surface according to the probability density; putting the selected point into an operation queue as a single operation unit; each thread sequentially extracts points on a Gaussian surface from the operation queue to execute random walking, if the random walking reaches the surface of the conductor or the boundary, one-time random walking is completed, and the random walking result is stored until the operation queue is empty; if the random walking result reaches the convergence precision, stopping capacitance extraction and outputting an extraction result; the invention has high parallelism and strong expansibility.
Description
Technical Field
The invention relates to the technical field of computer aided design of integrated circuits, in particular to a parallel processing method and system for single fine granularity in capacitance extraction by random walking.
Background
The integrated circuit design process generally needs to be divided into software and hardware, and the design is basically divided into two parts: and chip hardware design and software collaborative design. Wherein, chip hardware design includes: 1. a functional design stage; 2. design description and behavioral level verification; 3. performing logic synthesis; 4. verifying the physical design; 5. placement and routing. In physical design verification, an important link is called parasitic parameter extraction. In order to improve the calculation precision, parameters such as inductance and capacitance need to be extracted and calculated more accurately, a random walk capacitance extraction algorithm can provide accurate extraction and calculation, and the existing random walk parallel processing methods mainly include two methods:
1. parallel processing based on net. The main processing method is the extraction on different computational cores of the capacitive extraction distribution on different nets, which is a problem of uneven calculation time length of each computational core, especially for large nets in circuits, such as power net (power circuit) extraction, which causes the whole extraction time to be dragged by the large net.
2. Grid-based parallel processing. The main processing method is to cut the whole circuit layout into grids with equal size, and different grids are extracted on different computing cores, so that the parallel extraction method can basically ensure the load balance of each computing core, but the precision of the grid boundary cannot be ensured, and the accuracy of the final capacitance result is influenced.
Disclosure of Invention
Aiming at the defects in the prior art, the invention aims to provide a single-fine-granularity parallel processing method and a single-fine-granularity parallel processing system for capacitor extraction by random walking, and solves the problem that the conventional random walking parallel processing method cannot give consideration to both accuracy and high efficiency.
In order to achieve the purpose, the invention adopts the following specific technical scheme:
a parallel processing method for single fine granularity in capacitance extraction by random walking specifically comprises the following steps:
and 3, extracting the capacitance among multiple conductors to find the relation between the conductor charge and the potential, and according to the Gaussian theorem: the electric flux passing through any closed curved surface is equal to the algebraic sum of all the electric charges enclosed by the closed curved surface divided by the dielectric constant of the dielectric, and the relation of the electric charges is as follows:
f (r) is a dielectric constant,
for the potential at the point r to be,
is the normal direction of the Gaussian surface at the point r;
to obtain the charge quantity, a closed, covered gaussian surface is firstly constructed for each conductor;
step 4, calculating probability density according to the area of the Gaussian surface;
to pair
The integral of (a) is obtained by adopting a random sampling mode, the random sampling mode calculates probability density PDF according to the area of the Gaussian surface, and f (x) is the probability density of each Gaussian surface;
step 5, selecting a plurality of points from the Gaussian surface according to the probability density of the Gaussian surface;
step 6, the electric potential of the r point adopts the following relational expression:
the potential of each r point is calculated independently, and
the integration of (2) is processed in parallel;
putting the selected point on the Gaussian surface into an operation queue as a single operation unit;
step 7, each thread sequentially extracts points on the Gaussian surface from the operation queue to execute random walking, if the random walking reaches the surface of the conductor or the boundary, one-time random walking is completed, and a random walking result r (t) is stored;
step 8, after each thread finishes one random walk, continuing the step 7 until the operation queue is empty;
step 9, suspending all threads when the operation queue is empty, stopping capacitance extraction and outputting an extraction result according to whether a random walking result corresponding to the operation queue meets convergence accuracy c (r) < (r (t) — r (t-1))/r (t) or not and if the convergence accuracy c is reached; if the convergence accuracy c is not reached, step 5 is performed.
Preferably, the processor in step 2 is a CPU or a GPU or an FPGA.
Preferably, the method further comprises the following steps:
and step 10, recording the total times of random walking and the accuracy of the extraction result, executing the steps 6-9 by increasing or decreasing the number of selected points in the step 5, recording the corresponding total times of random walking and the accuracy of the extraction result, and circulating the steps to obtain a database of the total times of random walking and the accuracy of the extraction result.
A random walk single fine granularity in capacitive decimation parallel processing system comprising:
the data acquisition module is used for acquiring interconnection line information of the physical design of the integrated circuit and obtaining a three-dimensional structure of the physical design of the integrated circuit by matching with a process file;
the parameter configuration module is used for configuring a plurality of threads and convergence accuracy c according to user requirements and the number of the operation cores of the processor;
the Gaussian processing module is used for constructing a closed and wrapped Gaussian surface for each conductor, calculating probability density according to the area of the Gaussian surface, and selecting a plurality of points from the Gaussian surface according to the probability density of the Gaussian surface;
the operation queue module is used for acquiring points on the Gaussian surface, using the points as a single operation unit and sequencing the single operation unit;
and the thread calculation module comprises a plurality of threads, each thread extracts points on a Gaussian surface from the operation queue in sequence to execute random walking, if the random walking reaches the surface of the conductor or the boundary, one-time random walking is finished and the random walking result r (t) is stored until the operation queue is empty, all the threads are suspended when the operation queue is empty, and according to whether the random walking result corresponding to the operation queue meets the convergence precision c (r) (r (t) -r (t-1))/r (t)), if the convergence precision c is reached, the capacitance extraction is stopped, and the extraction result is output.
Preferably, the thread computing module is formed by a CPU, a GPU or an FPGA.
Preferably, the method further comprises the following steps:
the feedback module is used for recording the total times of random walking and the accuracy of the extraction result, and obtaining a database of the total times of random walking and the accuracy of the extraction result by increasing or decreasing the number of selected points and recording the corresponding total times of random walking and the accuracy of the extraction result;
the Gaussian processing module can also select a corresponding number of points from the Gaussian surface according to the probability density of the Gaussian surface and the accuracy of the required extraction result.
Preferably, a closed, enveloping gaussian surface is formed for each conductor, specifically:
the capacitance extraction between multiple conductors needs to find the relation between the conductor charge and the potential, according to the gaussian theorem: the electric flux passing through any closed curved surface is equal to the algebraic sum of all the electric charges enclosed by the closed curved surface divided by the dielectric constant of the dielectric, and the relation of the electric charges is as follows:
f (r) is a dielectric constant,
for the potential at the point r to be,
is the normal direction of the Gaussian surface at the point r;
a closed, enveloping gaussian surface is formed for each conductor in order to obtain the charge quantity.
Preferably, for
The integral of (a) is obtained by adopting a random sampling mode, the random sampling mode calculates probability density PDF according to the area of the Gaussian surface, and f (x) is the probability density of each Gaussian surface;
Preferably, the step of placing the selected point on the gaussian surface as a single operation unit into the operation queue specifically means:
the potential of each r point is calculated independently, and
the integration of (2) is processed in parallel;
the potential at point r adopts the following relation:
The invention has the beneficial effects that:
1. the parallelism is high: a single random walk is used as a single fine-grained operation unit, and the performance of an operation core is better and fully utilized. Compared with the parallel processing of the arithmetic unit with coarse granularity based on net, the method and the device have the advantages that the parallelism is better improved, and the extraction speed is better improved.
2. The precision is high: compared with a parallel processing method for cutting the layout, the method avoids the problem that the cutting edge precision cannot be guaranteed. The accuracy is ensured to be consistent with that of a single operation core.
3. Easy expansibility is strong: the fine-grained operation units have no dependency relationship with each other, and each random walk is biased to pure calculation. The pure calculation mode is easier to expand, and the operation units with fine granularity have no dependency relationship with each other and can support heterogeneous calculation.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a schematic diagram of random walk capacitance extraction;
FIG. 2 is a flow chart of a parallel processing method of single fine granularity in capacitance extraction by random walk according to the invention;
FIG. 3 is a schematic diagram of a parallel processing system with random walk and single fine granularity in capacitance decimation according to the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. Other embodiments, which can be derived by one of ordinary skill in the art from the embodiments given herein without any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it should be noted that the terms "vertical", "upper", "lower", "horizontal", and the like indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience of describing the present invention and simplifying the description, but do not indicate or imply that the referred device or element must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present invention.
In the description of the present invention, it should also be noted that, unless otherwise explicitly specified or limited, the terms "disposed," "mounted," "connected," and "connected" are to be construed broadly and may, for example, be fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
As shown in fig. 1, it is a schematic diagram of random walk capacitance extraction, where reference numeral 1 in fig. 1 represents Dirichlet (Dirichlet boundary condition), reference numeral 2 in fig. 1 represents Self walk (random walk to itself), and reference numeral 3 in fig. 1 represents Gaussian (Gaussian surface). To calculate the coupling capacitance from conductor i to conductor j, a gaussian surface surrounding conductor i is first constructed, and then several random walking paths are sent out from the surface, as shown in fig. 1, a cube (called "transfer cube") which is the largest and does not intersect with the conductor is found with the current point of random walking as the center, and then the next landing point of random walking is a certain random position on the surface of the transfer cube. And repeating the process of constructing the transfer cube and randomly taking points on the surface of the transfer cube until the current point reaches a certain conductor surface, and finishing a random walking path. And returning an estimated value of the coupling capacitance of the corresponding conductor to each path according to the difference of the finally arrived conductors, wherein the mean value of the estimated values of the capacitances corresponding to all the random walking paths is the extracted capacitance value, if the conductor i is finally arrived, the extracted result is output to be the estimated value of the self-capacitance, and if the conductor j is reached, the extracted result is output to be the estimated value of the coupling capacitance from the conductor i to the conductor j.
As shown in fig. 2, the present invention provides a single-fine-grained parallel processing method in capacitor extraction by random walking, and specifically refers to capacitor extraction in an integrated circuit design flow, wherein each random walking is treated as a fine-grained parallel processing unit in a capacitor extraction process by random walking, so as to improve parallelism in the whole extraction process. The method specifically comprises the following steps:
and 3, extracting the capacitance among multiple conductors to find the relation between the conductor charge and the potential, and according to the Gaussian theorem: the electric flux passing through any closed curved surface is equal to the algebraic sum of all the electric charges enclosed by the closed curved surface divided by the dielectric constant of the dielectric, and the relation of the electric charges is as follows:
f (r) is a dielectric constant,
for the potential at the point r to be,
is the normal direction of the Gaussian surface at the point r;
to obtain the charge quantity, a closed, covered gaussian surface is firstly constructed for each conductor;
step 4, calculating probability density according to the area of the Gaussian surface;
to pair
The integral of (a) is obtained by adopting a random sampling mode, the random sampling mode calculates probability density PDF according to the area of the Gaussian surface, and f (x) is the probability density of each Gaussian surface;
step 5, selecting a plurality of points from the Gaussian surface according to the probability density of the Gaussian surface;
step 6, the electric potential of the r point adopts the following relational expression:
the potential of each r point is calculated independently, and
the integration of (2) is processed in parallel;
putting the selected point on the Gaussian surface into an operation queue as a single operation unit;
step 7, each thread sequentially extracts points on the Gaussian surface from the operation queue to execute random walking, if the random walking reaches the surface of the conductor or the boundary, one-time random walking is completed, and a random walking result r (t) is stored;
step 8, after each thread finishes one random walk, continuing the step 7 until the operation queue is empty;
step 9, suspending all threads when the operation queue is empty, stopping capacitance extraction and outputting an extraction result according to whether a random walking result corresponding to the operation queue meets convergence accuracy c (r) < (r (t) — r (t-1))/r (t) or not and if the convergence accuracy c is reached; if the convergence accuracy c is not reached, step 5 is performed.
Preferably, the processor in step 2 is a CPU or a GPU or an FPGA.
Preferably, the method further comprises the following steps:
and step 10, recording the total times of random walking and the accuracy of the extraction result, executing the steps 6-9 by increasing or decreasing the number of selected points in the step 5, recording the corresponding total times of random walking and the accuracy of the extraction result, and circulating the steps to obtain a database of the total times of random walking and the accuracy of the extraction result.
As shown in fig. 3, the present invention further provides a parallel processing system with random walk in single granularity in capacitance decimation, including:
the data acquisition module is used for acquiring layout interconnection line information and obtaining a layout three-dimensional structure by matching with a process file;
the parameter configuration module is used for configuring a plurality of threads and convergence accuracy c according to user requirements and the number of the operation cores of the processor;
the Gaussian processing module is used for constructing a closed and wrapped Gaussian surface for each conductor, calculating probability density according to the area of the Gaussian surface, and selecting a plurality of points from the Gaussian surface according to the probability density of the Gaussian surface;
the operation queue module is used for acquiring points on the Gaussian surface, using the points as a single operation unit and sequencing the single operation unit;
and the thread calculation module comprises a plurality of threads, each thread extracts points on a Gaussian surface from the operation queue in sequence to execute random walking, if the random walking reaches the surface of the conductor or the boundary, one-time random walking is finished and the random walking result r (t) is stored until the operation queue is empty, all the threads are suspended when the operation queue is empty, and according to whether the random walking result corresponding to the operation queue meets the convergence precision c (r) (r (t) -r (t-1))/r (t)), if the convergence precision c is reached, the capacitance extraction is stopped, and the extraction result is output.
Preferably, the thread computing module is formed by a CPU, a GPU or an FPGA.
Preferably, the system of the present invention further comprises: the feedback module is used for recording the total times of random walking and the accuracy of the extraction result, and obtaining a database of the total times of random walking and the accuracy of the extraction result by increasing or decreasing the number of selected points and recording the corresponding total times of random walking and the accuracy of the extraction result;
the Gaussian processing module can also select a corresponding number of points from the Gaussian surface according to the probability density of the Gaussian surface and the accuracy of the required extraction result.
The formation of a closed, enveloping gaussian surface for each conductor means in particular:
the capacitance extraction between multiple conductors needs to find the relation between the conductor charge and the potential, according to the gaussian theorem: the electric flux passing through any closed curved surface is equal to the algebraic sum of all the electric charges enclosed by the closed curved surface divided by the dielectric constant of the dielectric, and the relation of the electric charges is as follows:
f (r) is a dielectric constant,
for the potential at the point r to be,
is the normal direction of the Gaussian surface at the point r;
a closed, enveloping gaussian surface is formed for each conductor in order to obtain the charge quantity.
Preferably, for
The integral of (a) is obtained by adopting a random sampling mode, the random sampling mode calculates probability density PDF according to the area of the Gaussian surface, and f (x) is the probability density of each Gaussian surface;
Preferably, the step of placing the selected point on the gaussian surface as a single operation unit into the operation queue specifically means:
the potential of each r point is calculated independently, and
the integration of (2) is processed in parallel;
the potential at point r adopts the following relation:
The invention has the beneficial effects that:
1. the parallelism is high: a single random walk is used as a single fine-grained operation unit, and the performance of an operation core is better and fully utilized. Compared with the parallel processing of the arithmetic unit with coarse granularity based on net, the method and the device have the advantages that the parallelism is better improved, and the extraction speed is better improved.
2. The precision is high: compared with a parallel processing method for cutting the layout, the method avoids the problem that the cutting edge precision cannot be guaranteed. The accuracy is ensured to be consistent with that of a single operation core.
3. Easy expansibility is strong: the fine-grained operation units have no dependency relationship with each other, and each random walk is biased to pure calculation. This purely computational approach is more easily scalable.
In light of the foregoing description of the preferred embodiments of the present invention, those skilled in the art can now make various alterations and modifications without departing from the scope of the invention. The technical scope of the present invention is not limited to the contents of the specification, and must be determined according to the scope of the claims.
Claims (9)
1. A parallel processing method for single fine granularity in capacitance extraction by random walking is characterized by comprising the following steps:
step 1, obtaining interconnection line information of the physical design of the integrated circuit, and matching with a process file to obtain a three-dimensional structure of the physical design of the integrated circuit;
step 2, configuring a plurality of threads and convergence accuracy c according to user requirements and the number of the processor operation cores;
and 3, extracting the capacitance among multiple conductors to find the relation between the conductor charge and the potential, and according to the Gaussian theorem: the electric flux passing through any closed curved surface is equal to the algebraic sum of all the electric charges enclosed by the closed curved surface divided by the dielectric constant of the dielectric, and the relation of the electric charges is as follows:
f (r) is a dielectric constant,
for the potential at the point r to be,
is the normal direction of the Gaussian surface at the point r;
to obtain the charge quantity, a closed, covered gaussian surface is firstly constructed for each conductor;
step 4, for
The integral of (a) is obtained by adopting a random sampling mode, the random sampling mode calculates the probability density PD according to the area of the Gaussian surface, and f (x) is the probability density of each Gaussian surface;
step 5, selecting a plurality of points from the Gaussian surface according to the probability density of the Gaussian surface;
step 6, the electric potential of the r point adopts the following relational expression:
the potential of each r point is calculated independently, and
the integration of (2) is processed in parallel;
putting the selected point on the Gaussian surface into an operation queue as a single operation unit;
step 7, each thread sequentially extracts points on the Gaussian surface from the operation queue to execute random walking, if the random walking reaches the surface of the conductor or the boundary, one-time random walking is completed, and a random walking result r (t) is stored;
step 8, after each thread finishes one random walk, continuing the step 7 until the operation queue is empty;
step 9, suspending all threads when the operation queue is empty, stopping capacitance extraction and outputting an extraction result according to whether a random walking result corresponding to the operation queue meets convergence accuracy c (r) < (r (t) — r (t-1))/r (t) or not and if the convergence accuracy c is reached; if the convergence accuracy c is not reached, step 5 is performed.
2. The random walk single fine granularity parallel processing method in capacitance extraction according to claim 1, wherein the processor in the step 2 is a CPU or a GPU or an FPGA.
3. The method for parallel processing of single fine granularity in capacitive decimation by random walk according to claim 1, further comprising the steps of:
and step 10, recording the total times of random walking and the accuracy of the extraction result, executing the steps 6-9 by increasing or decreasing the number of selected points in the step 5, recording the corresponding total times of random walking and the accuracy of the extraction result, and circulating the steps to obtain a database of the total times of random walking and the accuracy of the extraction result.
4. A random walk single granularity parallel processing system in capacitive decimation, comprising:
the data acquisition module is used for acquiring interconnection line information of the physical design of the integrated circuit and obtaining a three-dimensional structure of the physical design of the integrated circuit by matching with a process file;
the parameter configuration module is used for configuring a plurality of threads and convergence accuracy c according to user requirements and the number of the operation cores of the processor;
the Gaussian processing module is used for constructing a closed and wrapped Gaussian surface for each conductor, calculating probability density according to the area of the Gaussian surface, and selecting a plurality of points from the Gaussian surface according to the probability density of the Gaussian surface;
the operation queue module is used for acquiring points on the Gaussian surface, using the points as a single operation unit and sequencing the single operation unit;
and the thread calculation module comprises a plurality of threads, each thread extracts points on a Gaussian surface from the operation queue in sequence to execute random walking, if the random walking reaches the surface of the conductor or the boundary, one-time random walking is finished and the random walking result r (t) is stored until the operation queue is empty, all the threads are suspended when the operation queue is empty, and according to whether the random walking result corresponding to the operation queue meets the convergence precision c (r) (r (t) -r (t-1))/r (t)), if the convergence precision c is reached, the capacitance extraction is stopped, and the extraction result is output.
5. The random walk single fine granularity parallel processing system in capacitance decimation according to claim 4, wherein the thread computation module is constructed using a CPU or a GPU or an FPGA.
6. The random walk single granularity parallel processing system in capacitive decimation according to claim 4, further comprising:
the feedback module is used for recording the total times of random walking and the accuracy of the extraction result, and obtaining a database of the total times of random walking and the accuracy of the extraction result by increasing or decreasing the number of selected points and recording the corresponding total times of random walking and the accuracy of the extraction result;
the Gaussian processing module can also select a corresponding number of points from the Gaussian surface according to the probability density of the Gaussian surface and the accuracy of the required extraction result.
7. The random walk single grain parallel processing system in capacitive decimation according to claim 4 wherein a closed, wrapped Gaussian surface is constructed for each conductor, specifically:
the capacitance extraction between multiple conductors needs to find the relation between the conductor charge and the potential, according to the gaussian theorem: the electric flux passing through any closed curved surface is equal to the algebraic sum of all the electric charges enclosed by the closed curved surface divided by the dielectric constant of the dielectric, and the relation of the electric charges is as follows:
f (r) is a dielectric constant,
for the potential at the point r to be,
is the normal direction of the Gaussian surface at the point r;
a closed, enveloping gaussian surface is formed for each conductor in order to obtain the charge quantity.
8. The random walk single granularity parallel processing system in capacitive decimation as claimed in claim 7, wherein
Is obtained by means of random sampling according toCalculating probability density PDF according to the area of the Gaussian surface, wherein f (x) is the probability density of each Gaussian surface;
9. The random walk single-granularity parallel processing system in capacitive decimation according to claim 8, wherein placing the selected point on the gaussian surface as a single operation unit in the operation queue specifically means:
the potential of each r point is calculated independently, and
the integration of (2) is processed in parallel;
the potential at point r adopts the following relation:
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| CN114691375A (en) * | 2022-06-02 | 2022-07-01 | 青岛展诚科技有限公司 | Integrated circuit resistance extraction method based on parallel algorithm |
| WO2023193812A1 (en) * | 2022-04-08 | 2023-10-12 | 杭州行芯科技有限公司 | Parasitic capacitance extraction method, electronic device, and storage medium |
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