CN114036512A - Method, device, equipment and storage medium for preventing chip from being cracked - Google Patents
Method, device, equipment and storage medium for preventing chip from being cracked Download PDFInfo
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Abstract
The application relates to the technical field of information security, in particular to a method, a device, equipment and a storage medium for preventing a chip from being cracked, wherein the method comprises the steps of respectively storing a program of a development mode part and a program of a security mode part in different address intervals; in the program running process, randomly judging the current life cycle, obtaining the current mode information of the chip, and judging whether the address of the current running program is in the address interval corresponding to the current mode; and if the address of the currently running program is positioned outside the address interval corresponding to the current mode, stopping the program from running. The problem that the content of the chip is obtained or tampered due to the fact that the existing chip is easily cracked after being attacked by a mistake generation technology and a program returns to a development mode from a security mode is solved. The method and the device have the advantages of reducing the situation that the content of the chip is obtained or tampered, greatly increasing the cracking difficulty of the chip and preventing the chip from being cracked by external attack.
Description
Technical Field
The present application relates to the field of information security technologies, and in particular, to a method, an apparatus, a device, and a storage medium for preventing a chip from being cracked.
Background
With the increasing popularization of security chips, various cracking methods are developed. The cracking methods mainly include two categories: invasive attacks and non-invasive attacks. Invasive attacks require destruction of the package, which can be accomplished with the aid of precision instruments; non-invasive attacks do not require physical damage to the chip, but rather attack by external means, such as "error-generating techniques" that use voltage surges or clock surges to force the processor to perform erroneous operations, which in some cases can affect the decoding and execution of instructions. Furthermore, the equipment required by the non-invasive attack can be made and upgraded by self, and is very cheap and low in cost. Non-invasive attacks are particularly dangerous in some situations.
The mode switching method of the existing security chip generally utilizes the identification bit stored in the EFUSE module to switch. By operating the BOOT program to judge the identification bit at the beginning and then jumping to operate the program in the corresponding mode, the method is likely to be attacked from the outside to cause the judgment error to enter the wrong mode, thereby breaking the chip and obtaining or tampering the internal information of the chip.
In view of the above related technologies, the inventor believes that there is a defect that the existing chip is easily cracked after being attacked by the error generation technology, and the program returns to the development mode from the secure mode, so that the content of the chip is acquired or tampered.
Disclosure of Invention
In order to reduce the situation that the content of a chip is obtained or tampered, the application provides a method, a device, equipment and a storage medium for preventing the chip from being cracked.
In a first aspect, the present application provides a method for preventing a chip from being cracked, which has a feature of reducing the content of the chip from being obtained or tampered.
The application is realized by the following technical scheme:
a method for preventing chips from being cracked comprises the following steps,
storing the program of the development mode part and the program of the safety mode part in different address intervals respectively;
in the program running process, randomly judging the current life cycle, obtaining the current mode information of the chip, and judging whether the address of the current running program is in the address interval corresponding to the current mode;
and if the address of the currently running program is positioned outside the address interval corresponding to the current mode, stopping the program from running.
For the existing scheme, because the safe mode program and the development mode program have no obvious boundary and use many common functions such as a delay function, a printing function, an opening and closing function of some modules and the like during running, it is difficult to judge which mode the currently executed program is, once the chip is attacked and enters the wrong mode, the wrong program is run, the chip cannot self-check and process the problem, so that the judgment is easy to make a mistake, and then the chip enters the development mode from the safe mode, the chip content is obtained or tampered, therefore, the scheme makes the program of the development mode part and the program of the safe mode part respectively stored in different address intervals, and randomly judges the current life cycle and the program running address during the program running process, so as to distinguish the development mode program and the safe mode program by a clear address boundary, the method is beneficial to accurately judging which mode the currently executed program is, and after the chip is attacked, the chip can judge whether the address of the currently running program conforms to the address interval corresponding to the current mode by self-checking so as to find that the chip is attacked more quickly and take measures in time; in the program running process, the current life cycle and the program running address are judged randomly, because the judgment times are increased, the probability of successful cracking of the chip is greatly reduced, an attacker can be effectively prevented from predicting and attacking each judgment accurately, and further when the chip is attacked by using an error generation technology, a common method needs to be bypassed, namely, the life cycle is judged at the beginning of the program, and the later inspection operation of the life cycle and the address interval needs to be bypassed accurately, so that the cracking difficulty is greatly increased; if the address of the currently running program is located outside the address interval corresponding to the current mode, the program stops running, so that measures are taken to protect the program content entering the development mode in time, the chip content can be effectively prevented from being obtained or tampered in time, the chip is prevented from being cracked by external attack, and the protection capability of the chip content is improved.
The present application may be further configured in a preferred example to: the method comprises the following steps of randomly judging the current life cycle in the program running process, obtaining the current mode information of the chip, and judging whether the address of the current running program is in the address interval corresponding to the current mode, wherein the steps comprise:
setting a timer interrupt based on a true random number;
and when the timed interrupt is generated, judging the current life cycle of the chip and the program running address.
By adopting the technical scheme, the timing interruption is set based on a true random number, and when the timing interruption is generated, the current life cycle of the chip is judged; judging whether the program running address is in a ROM address interval of the development mode program at the moment when the program running address is judged to be in the development mode; judging whether the program running address is in the ROM address interval of the safe mode program at the moment if the program running address is in the safe mode; if the ROM address interval of the program in the current mode is met, the program continues to run; otherwise, relevant data is cleared, and the program stops running.
The present application may be further configured in a preferred example to: when the timer interrupt is generated, the method further comprises the following steps:
and generating a true random number again, resetting a new timing interrupt based on the new true random number, and replacing the original timing interrupt.
By adopting the technical scheme, when the timing interruption is generated, the true random number is generated again, the new timing interruption is reset based on the new true random number, and the original timing interruption is replaced, so that the purpose of judging the current life cycle and the program running address by the unpredictable random timing interruption is realized.
The present application may be further configured in a preferred example to: the program of the development mode part and the program of the security mode part are stored in a ROM area inside the chip.
By adopting the technical scheme, the program of the development mode part and the program of the safety mode part are stored in the ROM area in the chip, namely the program of the development mode part and the program of the safety mode part are respectively stored in different ROM address intervals.
The present application may be further configured in a preferred example to: the life cycle is stored in the EFUSE module in the chip in the form of life cycle identification bits, and the life cycle identification bits are used for indicating that the chip is in a development mode or a safety mode.
By adopting the technical scheme, the life cycle is stored in the EFUSE module in the chip in the form of the life cycle identification bit so as to be used for marking that the chip is in a development mode or a safety mode, the EFUSE module is otp (One Time programmable), the chip is burnt after being produced, the chip cannot be changed and cleared again after being burnt, and the safety of life cycle information is ensured.
The present application may be further configured in a preferred example to: further comprising the steps of:
presetting sensitive operation;
before the sensitive operation is executed, a subprogram executing the sensitive operation judges the current life cycle, obtains the current mode information of the chip, and judges whether the address of the current running program is in the address interval corresponding to the current mode;
and if the address of the currently running program is positioned outside the address interval corresponding to the current mode, stopping the program from running.
By adopting the technical scheme, sensitive operation is preset, and before the sensitive operation is executed by the program, the address corresponding to the current life cycle and the program operation of the chip is fixedly checked again, so that the life cycle and the program operation address can be checked again before the sensitive area of the program is executed each time, the protection capability of the chip is favorably improved, when an attacker conducts sensitive operation on the chip, the chip can be self-checked in time, and further when the chip is attacked by using an 'error generation technology', not only a common method needs to be bypassed, namely judgment on the life cycle is started at the beginning of the program, but also accurate attack bypassing on the inspection operation in the life cycle and the address interval is needed before the sensitive operation is executed later, warning information that the program enters a development mode from a security mode by mistake is favorably known as soon as possible, and the chip is found to be attacked and measures are taken in time, further increasing the cracking difficulty of the chip.
The present application may be further configured in a preferred example to: the sensitive operations include operations that may threaten the security of the chip.
By adopting the technical scheme, the sensitive operation of the program can be any operation which possibly threatens the safety of the chip so as to cover more sensitive operations of the program, the detection can be carried out in time before the sensitive operation is executed by the program, the protection on the chip is more comprehensive, and the cracking difficulty of the chip is further increased.
In a second aspect, the present application provides an apparatus for preventing a chip from being cracked, which has a feature of reducing the content of the chip from being obtained or tampered.
The application is realized by the following technical scheme:
an apparatus for preventing cracking of a chip, comprising:
the preset module is used for enabling the program of the development mode part and the program of the safety mode part to be stored in different address intervals respectively;
the second judgment module is used for randomly judging the current life cycle in the program running process, obtaining the current mode information of the chip and judging whether the address of the current running program is in the address interval corresponding to the current mode;
and the execution module is used for stopping the program from running when the address of the currently running program is positioned outside the address interval corresponding to the current mode.
In a third aspect, the present application provides a computer device having features to reduce the acquisition or tampering of chip contents.
The application is realized by the following technical scheme:
a computer device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, the processor implementing the steps of a method of preventing cracking of a chip as described above when executing the computer program.
In a fourth aspect, the present application provides a computer-readable storage medium having features to reduce acquisition or tampering of chip contents.
The application is realized by the following technical scheme:
a computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, carries out the steps of a method of preventing a chip from being broken as described above.
In summary, the present application includes at least one of the following beneficial technical effects:
1. a method for preventing the chip from being cracked is through making the partial procedure of development mode and partial procedure of the safe mode store in different address intervals separately, distinguish development mode procedure and safe mode procedure in definite address boundary, help to judge exactly which procedure under the mode that the procedure that is carried out at present is, and learn the warning information that the procedure enters the development mode from the mistake of the safe mode as soon as possible, in order to find the chip is attacked and take the measure in time more quickly, greatly increase and crack the difficulty, reduce the situation that the chip content is got or tampered, prevent the chip from being attacked and cracked by the outside;
2. setting a timed interrupt based on the true random number, and judging the current life cycle and the program running address of the chip by using the timed interrupt so as to increase the judgment times and greatly reduce the probability of successful cracking of the chip; meanwhile, a true random number is generated again when the timed interrupt is generated, and a new timed interrupt is reset based on the new true random number so as to realize unpredictable random timed interrupt, thereby effectively preventing an attacker from predicting and accurately attacking each judgment and greatly increasing the cracking difficulty;
3. when an attacker carries out sensitive operation on the chip, the chip can be self-checked in time so as to find that the chip is attacked and take measures in time more quickly, and the cracking difficulty of the chip is further increased;
4. the sensitive operation of the program can be any operation which possibly threatens the safety of the chip so as to cover more sensitive operations of the program, the detection can be carried out in time before the sensitive operation of the program is executed, the protection on the chip is more comprehensive, and the cracking difficulty of the chip is further increased.
Drawings
Fig. 1 is an overall flowchart of a method for preventing a chip from being cracked according to an embodiment of the present application.
Fig. 2 is a flowchart of the steps for randomly determining the current life cycle and the program run address.
Fig. 3 is a block diagram of an apparatus for preventing a chip from being cracked according to an embodiment of the present disclosure.
Detailed Description
The present embodiment is only for explaining the present application, and it is not limited to the present application, and those skilled in the art can make modifications of the present embodiment without inventive contribution as needed after reading the present specification, but all of them are protected by patent law within the scope of the claims of the present application.
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In addition, the term "and/or" herein is only one kind of association relationship describing an associated object, and means that there may be three kinds of relationships, for example, a and/or B, which may mean: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the character "/" herein generally indicates that the former and latter related objects are in an "or" relationship, unless otherwise specified.
At present, the secure chip generally has at least two modes, i.e. a development mode and a secure mode. In the development mode, no security identification such as a secret key and a unique ID is burnt in the security chip, a test interface can be opened at will, an application program is a plaintext, and decryption is not needed during operation; in the safe mode, a secret key, a unique ID, a life cycle and other safe identifications are burnt in the safe chip, the test interface is closed, the application program is a ciphertext, and decryption is needed during operation. The development mode is a mode for debugging programs of chip application manufacturers, burning keys and the like; when the program is stably debugged and finally a product is formed, the life cycle is also burned into a safe mode when the program is burned on the batch burning production line.
With the existing solution, there are no obvious boundaries between the secure mode program and the development mode program, and many common functions, such as a delay function, a print function, and the opening and closing functions of some modules, are used during the running process, so that it is difficult to determine which mode the currently executed program is in.
The non-invasive attack 'error generation technology' easily returns the security chip from a security mode to a development mode in the following two places, acquires or tampers with the content of the chip, and then cracks the chip.
1. When the boot program executes the statement for judging the life cycle, making a chip go wrong by using an error generation technology, so that the program runs to a branch of a development mode;
2. when the boot program executes the jump instruction, the error generation technology is used to make the chip go wrong, so that the program jumps to the branch of the development mode.
Therefore, the method for preventing the chip from being cracked is provided so as to effectively protect the chip from being cracked by the 'mistake generation technology'.
The embodiments of the present application will be described in further detail with reference to the drawings attached hereto.
Referring to fig. 1, an embodiment of the present application provides a method for preventing a chip from being cracked, and main steps of the method are described as follows.
S1: storing the program of the development mode part and the program of the safety mode part in different address intervals respectively;
s31: in the program running process, randomly judging the current life cycle, obtaining the current mode information of the chip, and judging whether the address of the current running program is in the address interval corresponding to the current mode;
s4: and if the address of the currently running program is positioned outside the address interval corresponding to the current mode, stopping the program from running.
Specifically, the program of the development mode portion and the program of the security mode portion are stored in a ROM area inside the chip. Because the Boot program can be divided into two branches during operation, a development mode branch and a security mode branch, S1: the programs of the development mode part and the programs of the safety mode part are respectively stored in different address intervals, namely the programs of the two parts are respectively stored in different ROM address intervals, and then the programs of the two branches are respectively compiled in different running intervals, so that the programs used in the safety mode and the programs used in the development mode are completely independent intentionally and respectively occupy an irrelevant address space, the accurate judgment of which mode the currently executed program is in is facilitated, and after the chip is attacked, the chip can judge whether the address of the currently running program accords with the address interval corresponding to the current mode through self-checking, and then the chip is more quickly found to be attacked and measures are taken in time. For example, the development mode branch program is compiled in the range of 0x 70001000-0 x70001 fff; and compiling the safe mode branch program in the range of 0x 70002000-0 x70002 fff.
And then, powering on the chip and operating the Boot program.
S2: before the program starts, the life cycle is judged, and the program with the corresponding mode is selected to run.
Specifically, when the program starts to run, the life cycle is first determined, and the program corresponding to the mode is selected to run.
The life cycle is stored in the EFUSE module in the chip in the form of life cycle identification bits, and the life cycle identification bits are used for indicating that the chip is in a development mode or a safety mode. The life cycle is stored in the EFUSE module, the power-off data cannot be lost, and once the life cycle is fixed, the power-off data cannot be modified, so that the safety of life cycle information is ensured.
In this embodiment, the life cycle is one byte, when the life cycle is 0x5a, the mode corresponding to the program is the development mode, and the other values are the security mode.
When the development mode is judged, the PC pointer jumps to the development mode program to run; and when the safety mode is judged, the PC pointer jumps to the safety mode program to run.
The address pointed by the PC pointer is the current program running address, the life cycle and the program running address are fixedly checked before sensitive operation is executed, and the program running address can be obtained from the PC pointer
The address pointed by the return pointer is the address interrupted by the interrupt when the current program runs, namely the life cycle and the program running address are checked in the timed interrupt, and the program running address at the moment can be obtained from the return pointer.
S31: in the program running process, the current life cycle is randomly judged, the mode information of the chip at present is obtained, and whether the address of the program currently running is in the address interval corresponding to the current mode is judged.
Referring to fig. 2, in the program running process, the step of randomly determining the current life cycle, obtaining the current mode information of the chip, and determining whether the address of the currently running program is in the current mode includes:
s311: setting a timer interrupt based on a true random number;
s312: when the timed interrupt is generated, judging the current life cycle of the chip and the program running address;
s313: meanwhile, when the timed interrupt is generated, a true random number is generated again, and a new timed interrupt is reset based on the new true random number to replace the original timed interrupt.
Specifically, the life cycle of the program is judged again by the interrupt processing function. When the program is judged to be in the development mode, judging whether the program running address is in the ROM address interval of the development mode program; when the program running address is judged to be in the safe mode, judging whether the program running address is in the ROM address interval of the safe mode program at the moment so as to acquire whether the program running address accords with the ROM address interval of the current mode program; the purpose of judging the current life cycle and the program running address by unpredictable random timed interrupt is achieved.
In the embodiment, when the life cycle is judged to be the development mode, the program running address is read, and whether the running address is within the range of 0x 70001000-0 x70001fff at the moment is judged; and when the life cycle is judged to be in the safe mode, reading the program running address, and judging whether the running address is in the range of 0x 70002000-0 x70002 fff.
Therefore, when the life cycle is checked each time, the program running address is checked, and whether the current Boot program running mode is legal or not is known by judging whether the life cycle is matched with the program running address or not.
S4: if the address of the currently running program is located outside the address interval corresponding to the current mode, stopping the program from running; otherwise, the program runs normally.
Specifically, when the obtained program running address is located outside the address interval of the corresponding mode, the program is stopped to run; and when the obtained program running address is positioned in the address interval of the corresponding mode, enabling the program to run normally.
For example, if the running address of the program in the development mode is outside the range of 0x 70001000-0 x70001fff, clearing some intermediate data of the operation and stopping running the program; and if the running address of the program in the safe mode is outside the range of 0x 70002000-0 x70002fff, clearing the data and stopping running the program.
And when the running address of the program in the development mode is within the range of 0x 70001000-0 x70001fff or the running address of the program in the safety mode is within the range of 0x 70002000-0 x70002fff, finishing interrupt processing, and returning the program to the address corresponding to the running interrupt to continue executing.
Further, the method for preventing the chip from being cracked further comprises the following steps:
s321: presetting sensitive operation;
s322: before the sensitive operation is executed, the subprogram executing the preset sensitive operation judges the current life cycle, obtains the current mode information of the chip, and judges whether the address of the current running program is in the address interval corresponding to the current mode.
Wherein the predetermined sensitive operation includes an operation that may threaten the security of the chip. In this embodiment, the sensitive operation may be an operation of opening a test interface, reading an internal key, and the like. The sensitive operation may be any operation that may threaten the security of the chip to cover more program sensitive operations.
Before the sensitive operation is executed, a subprogram executing the sensitive operation judges the current life cycle, obtains the current mode information of the chip, and judges whether the address of the current running program is in the address interval corresponding to the current mode; and then all can in time detect before carrying out sensitive operation, more comprehensive to the protection of chip, further increased the degree of difficulty that explains of chip.
If the address of the currently running program is located outside the address interval corresponding to the current mode, stopping the program from running; and the chip is defended by taking measures in time when being attacked, so that the cracking difficulty of the chip is further increased.
And if the address of the currently running program is located in the address interval corresponding to the current mode, returning the program to the address corresponding to the operation interruption for continuous execution.
The existing chip defense mode only judges the life cycle when a program starts, and the chip can be easily cracked once the chip is attacked by the outside to bypass the check; the life cycle of the existing chip is not segmented in an independent address space intentionally, and the current running program cannot be judged in which mode; once the security chip is returned to the development mode by external attack, the chip operation in the development mode has a great degree of freedom, and important information such as a secret key and an identity mark in the chip can be acquired.
The method not only judges the life cycle at the beginning, but also checks the life cycle and the program running address at any time during the program running, and even before the sensitive area of the program is executed, the life cycle and the program running address can be checked again.
This is equivalent to an attack using the "error generation technology" that not only needs to bypass the judgment of the life cycle from the beginning of the program, but also needs to bypass all the subsequent checking operations on the life cycle and the program running address, which greatly increases the difficulty of cracking the chip, prevents the secure chip from being attacked from the outside and returning to the development mode from the secure mode to cause the chip content to be obtained or tampered, so as to find the attack as soon as possible and take measures in time, protects the chip content, reduces the situation of obtaining or tampering the chip content, prevents the chip from being cracked by external attacks, and achieves the protection effect.
Meanwhile, the method is simple to implement, the hardware cost of a chip is not required to be additionally increased, and the cost of peripheral devices is not required to be increased.
It should be understood that, the sequence numbers of the steps in the foregoing embodiments do not imply an execution sequence, and the execution sequence of each process should be determined by its function and inherent logic, and should not constitute any limitation to the implementation process of the embodiments of the present application.
Referring to fig. 3, an embodiment of the present application further provides a device for preventing chips from being cracked, where the device for preventing chips from being cracked corresponds to the method for preventing chips from being cracked in the foregoing embodiment one to one. The device for preventing the chip from being cracked comprises:
the preset module is used for enabling the program of the development mode part and the program of the safety mode part to be stored in different address intervals respectively;
the first judgment module is used for judging the life cycle before the program starts and selecting the program in the corresponding mode to run;
the second judgment module is used for randomly judging the current life cycle in the program running process, obtaining the current mode information of the chip and judging whether the address of the current running program is in the address interval corresponding to the current mode;
the third judging module is used for judging the current life cycle of the subprogram executing the sensitive operation before executing the sensitive operation, obtaining the current mode information of the chip, and judging whether the address of the current running program is in the address interval corresponding to the current mode;
and the execution module is used for stopping the program from running when the address of the currently running program is positioned outside the address interval corresponding to the current mode.
Further, the second determination module includes:
the true random number submodule is used for generating a true random number;
and the time interruption submodule is used for setting the timed interruption based on the true random number and judging the current life cycle of the chip and the program running address when the timed interruption is generated.
For the specific definition of the device for preventing the chip from being broken, refer to the above definition of a method for preventing the chip from being broken, and are not described herein again. All or part of each module in the device for preventing the chip from being cracked can be realized by software, hardware and a combination thereof. The modules can be embedded in a hardware form or independent from a processor in the computer device, and can also be stored in a memory in the computer device in a software form, so that the processor can call and execute operations corresponding to the modules.
In one embodiment, a computer device is provided, which may be a server. The computer device includes a processor, a memory, a network interface, and a database connected by a system bus. Wherein the processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device comprises a nonvolatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program, and a database. The internal memory provides an environment for the operation of an operating system and computer programs in the non-volatile storage medium. The network interface of the computer device is used for communicating with an external terminal through a network connection. The computer program is executed by a processor to implement a method of preventing a chip from being hacked.
In one embodiment, a computer-readable storage medium is provided, comprising a memory, a processor, and a computer program stored on the memory and executable on the processor, the processor implementing the following steps when executing the computer program:
storing the program of the development mode part and the program of the safety mode part in different address intervals respectively;
in the program running process, randomly judging the current life cycle, obtaining the current mode information of the chip, and judging whether the address of the current running program is in the address interval corresponding to the current mode;
and if the address of the currently running program is positioned outside the address interval corresponding to the current mode, stopping the program from running.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by hardware instructions of a computer program, which can be stored in a non-volatile computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. Any reference to memory, storage, database, or other medium used in the embodiments provided herein may include non-volatile and/or volatile memory, among others.
It will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-mentioned division of the functional units and modules is illustrated, and in practical applications, the above-mentioned function distribution may be performed by different functional units and modules according to needs, that is, the internal structure of the system is divided into different functional units or modules to perform all or part of the above-mentioned functions.
Claims (10)
1. A method for preventing a chip from being cracked is characterized by comprising the following steps,
storing the program of the development mode part and the program of the safety mode part in different address intervals respectively;
in the program running process, randomly judging the current life cycle, obtaining the current mode information of the chip, and judging whether the address of the current running program is in the address interval corresponding to the current mode;
and if the address of the currently running program is positioned outside the address interval corresponding to the current mode, stopping the program from running.
2. The method for preventing the chip from being cracked as claimed in claim 1, wherein the step of randomly judging the current life cycle during the program running process, obtaining the current mode information of the chip, and judging whether the address of the currently running program is in the address interval corresponding to the current mode includes:
setting a timer interrupt based on a true random number;
and when the timed interrupt is generated, judging the current life cycle of the chip and the program running address.
3. The method for preventing the chip from being cracked as claimed in claim 2, further comprising the following steps when the timer interrupt is generated:
and generating a true random number again, resetting a new timing interrupt based on the new true random number, and replacing the original timing interrupt.
4. The method for preventing cracking of a chip according to claim 1, wherein the program of the development mode part and the program of the security mode part are stored in a ROM area inside the chip.
5. The method for preventing the chip from being cracked as claimed in claim 1, wherein the life cycle is stored in the EFUSE module inside the chip in the form of life cycle identification bits, and the life cycle identification bits are used for indicating that the chip is in a development mode or a security mode.
6. The method for preventing the chip from being cracked according to any one of claims 1 to 5, further comprising the following steps:
presetting sensitive operation;
before the sensitive operation is executed, a subprogram executing the sensitive operation judges the current life cycle, obtains the current mode information of the chip, and judges whether the address of the current running program is in the address interval corresponding to the current mode;
and if the address of the currently running program is positioned outside the address interval corresponding to the current mode, stopping the program from running.
7. The method of claim 6, wherein the sensitive operation comprises an operation that may compromise the security of the chip.
8. An apparatus for preventing a chip from being cracked, comprising:
the preset module is used for enabling the program of the development mode part and the program of the safety mode part to be stored in different address intervals respectively;
the second judgment module is used for randomly judging the current life cycle in the program running process, obtaining the current mode information of the chip and judging whether the address of the current running program is in the address interval corresponding to the current mode;
and the execution module is used for stopping the program from running when the address of the currently running program is positioned outside the address interval corresponding to the current mode.
9. A computer device comprising a memory, a processor and a computer program stored on the memory, the processor executing the computer program to perform the steps of the method of any one of claims 1 to 7.
10. A computer-readable storage medium, characterized in that the computer-readable storage medium stores a computer program which, when being executed by a processor, carries out the steps of the method according to any one of claims 1 to 7.
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| CN115114190A (en) * | 2022-07-20 | 2022-09-27 | 上海合见工业软件集团有限公司 | SRAM data reading system based on prediction logic |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN115114190A (en) * | 2022-07-20 | 2022-09-27 | 上海合见工业软件集团有限公司 | SRAM data reading system based on prediction logic |
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