CN114024507B - Power amplification circuit, radio frequency front end circuit, electronic device and signal amplification method - Google Patents

Power amplification circuit, radio frequency front end circuit, electronic device and signal amplification method Download PDF

Info

Publication number
CN114024507B
CN114024507B CN202210023473.8A CN202210023473A CN114024507B CN 114024507 B CN114024507 B CN 114024507B CN 202210023473 A CN202210023473 A CN 202210023473A CN 114024507 B CN114024507 B CN 114024507B
Authority
CN
China
Prior art keywords
signal
amplification
power amplifier
radio frequency
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202210023473.8A
Other languages
Chinese (zh)
Other versions
CN114024507A (en
Inventor
王统
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Honor Device Co Ltd
Original Assignee
Honor Device Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honor Device Co Ltd filed Critical Honor Device Co Ltd
Priority to CN202210023473.8A priority Critical patent/CN114024507B/en
Publication of CN114024507A publication Critical patent/CN114024507A/en
Application granted granted Critical
Publication of CN114024507B publication Critical patent/CN114024507B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/0205Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/04Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in discharge-tube amplifiers
    • H03F1/06Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in discharge-tube amplifiers to raise the efficiency of amplifying modulated radio frequency waves; to raise the efficiency of amplifiers acting also as modulators
    • H03F1/07Doherty-type amplifiers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/52Circuit arrangements for protecting such amplifiers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/56Modifications of input or output impedances, not otherwise provided for
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189High frequency amplifiers, e.g. radio frequency amplifiers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/211Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F3/21Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F3/217Class D power amplifiers; Switching amplifiers
    • H03F3/2178Class D power amplifiers; Switching amplifiers using more than one switch or switching amplifier in parallel or in series

Abstract

The invention discloses a power amplification circuit, a radio frequency front-end circuit, electronic equipment and a signal amplification method. Wherein, power amplifier circuit includes: a first radio frequency input and a second radio frequency input; a first radio frequency output terminal and a second radio frequency output terminal; a first amplification path and a second amplification path; the first amplification path includes a first power amplifier and the second amplification path includes a second power amplifier. In a single transmitting mode, the power amplifying circuit forms a Doherty power amplifier; the first radio frequency input end is used for receiving a first signal; the first radio frequency output end is used for outputting the amplified first signal. In the dual transmission mode, the first radio frequency input end is used for receiving a second signal, the second radio frequency input end is used for receiving a third signal, the first power amplifier is used for amplifying the second signal, the second power amplifier is used for amplifying the third signal, the first radio frequency output end is used for outputting the amplified second signal, and the second radio frequency output end is used for outputting the amplified third signal.

Description

Power amplification circuit, radio frequency front end circuit, electronic device and signal amplification method
Technical Field
The present application relates to the field of radio frequency amplification technologies, and in particular, to a power amplification circuit, a radio frequency front end circuit, an electronic device, and a signal amplification method.
Background
The PA is an important component of a radio frequency front-end circuit in the electronic device, and is responsible for amplifying and transmitting the power of a radio frequency signal to be transmitted, so as to realize communication with a base station or a WiFi hotspot. As electronic devices have higher requirements for communication quality, the output power of the PA is also higher. For example, as a wireless network develops, a mobile communication spectrum gradually shifts to a high frequency, attenuation of wireless signals is increased in a propagation process, so that a base station cannot cover a frequency band corresponding to the wireless signals, for example, a 4G frequency band is in a relatively high frequency B41 frequency band, thereby reducing a coverage area of the base station and deteriorating communication quality. In order to improve the coverage of the base station and improve the communication quality, these frequency bands need to support the PC2, which has twice the power requirement of the PC3, which requires the PA in the rf front-end circuit to output higher power.
In addition, there is a dual transmission requirement for some frequency bands (e.g., B41), that is, two rf signals in the frequency band are transmitted through two antennas simultaneously, so that two PAs are required to amplify and transmit the two rf signals respectively.
Disclosure of Invention
The embodiment of the application provides a power amplification circuit, a radio frequency front-end circuit, electronic equipment and a signal amplification method. The power amplifying circuit can meet the requirements of high output power and dual emission of electronic equipment during single emission.
In a first aspect, the present application provides a power amplification circuit. The power amplifying circuit has a single transmission mode and a dual transmission mode. The single transmit mode is used for amplifying a single transmit signal and the dual transmit mode is used for amplifying a dual transmit signal. The single transmission signal is a first signal, and the dual transmission signals are a second signal and a third signal. The power amplification circuit includes: the radio frequency amplifier comprises a first radio frequency input end, a second radio frequency input end, a first radio frequency output end, a second radio frequency output end and an amplifying circuit. The amplifying circuit comprises a first amplifying path and a second amplifying path; the first amplification path is provided with a first power amplifier, and the second amplification path is provided with a second power amplifier. Wherein, in the single transmitting mode, the power amplifying circuit forms a Doherty power amplifier; the first radio frequency input end is used for receiving a first signal; the amplifying circuit is used for amplifying the first signal through the first power amplifier and the second power amplifier when the first signal is in a first state; the amplifying circuit is also used for amplifying the first signal through the first power amplifier when the first signal is in a second state; the first radio frequency output end is used for outputting the amplified first signal. Wherein, the first signal is in a first state: the input voltage of the first signal is greater than a preset threshold value; the first signal is in the second state: the input voltage of the first signal is less than a preset threshold. In the dual transmission mode, the first radio frequency input end is used for receiving a second signal, the second radio frequency input end is used for receiving a third signal, the first power amplifier is used for amplifying the second signal, the second power amplifier is used for amplifying the third signal, the first radio frequency output end is used for outputting the amplified second signal, and the second radio frequency output end is used for outputting the amplified third signal.
First, it is explained that the input voltage of the first signal having the output power of a high power class (e.g., PC 2) is large, and the input voltage of the first signal having the output power of a low power class (e.g., PC3 or a power class smaller than PC 3) is small. By adjusting the preset threshold, the input voltage of the first signal with high power level can be made smaller than the preset threshold (i.e. the first state), and the input voltage of the first signal with low power level can be made larger than the preset threshold (i.e. the first state).
In the power amplifying circuit, when the single transmitting signal needs to be amplified, the power amplifying circuit is switched to a single transmitting mode. Under the single-transmitting mode, the power amplifying circuit forms a Doherty power amplifier. It should be noted that the Doherty power amplifier has the following characteristics: when the input voltage of the first signal is smaller than the preset threshold (namely, in the second state), only one PA of the first power amplifier participates in the work and works in the high-efficiency state, so that the Doherty power amplifier can realize the high-efficiency output of the first signal with a low power level in the single transmission. And when the input voltage of the first signal is greater than the preset threshold (i.e. the first state), the first power amplifier and the second power amplifier operate simultaneously. In this case, the maximum output power of the Doherty power amplifier is the superposition of the maximum output powers of the two PAs. Namely, the Doherty power amplifier is equivalent to overlapping the limited maximum output power of each PA, and the maximum output power of the Doherty power amplifier is improved, so that the Doherty power amplifier can realize the output of a first signal with high power level in single transmission. Therefore, in the single-transmission mode, the power amplification circuit can not only meet the requirement of high output power during single transmission, but also perform high-efficiency output in the backspacing power stage (backspacing from a high power level to a low power level) of single transmission.
When the dual-transmission signal needs to be amplified, the power amplification circuit is switched to a dual-transmission mode. Under the double-transmission mode, a first radio frequency input end receives a second signal, the amplification is realized by using a first power amplifier, and then the amplified second signal is output through a first radio frequency output end; and receiving the third signal through the second radio frequency input end, amplifying by using the second power amplifier, and outputting the amplified third signal through the second radio frequency output end. Therefore, in the dual-transmission mode, the power amplification circuit can meet the dual-transmission requirement of the electronic device. It should be noted that, in dual transmission, there is no high output power requirement, and based on this, the second signal and the third signal also belong to the back-off power range for the first power amplifier and the second power amplifier. In the present application, the amplification of the second signal and the third signal in the dual transmission mode is similar to the amplification of the first signal in the single transmission mode, and both the amplification and the amplification are performed through one PA in one amplification path, so that the power amplification circuit can also achieve high-efficiency output in the dual transmission mode.
In addition, in the power amplification circuit, the second power amplifier is used in both the single transmission mode and the double transmission mode, and the second power amplifier is multiplexed in the two working modes, so that the integration level of the power amplification circuit is higher, the area of the power amplification circuit can be reduced, and the cost is reduced.
In some embodiments of the present application, in a single transmission mode, an input terminal of the first amplification path and an input terminal of the second amplification path are both connected to the first radio frequency input terminal, an output terminal of the first amplification path and an output terminal of the second amplification path are both connected to the first radio frequency output terminal, the first power amplifier operates in a first bias state, and the second power amplifier operates in a second bias state; the turn-on voltage of the second power amplifier in the second bias state is higher than the turn-on voltage of the first power amplifier in the first bias state; the preset threshold is the turn-on voltage of the second power amplifier. In a dual emission mode, an input end of a first amplification path is connected to a first radio frequency input end, an input end of a second amplification path is connected to a second radio frequency input end, an output end of the first amplification path is connected to a first radio frequency output end, and an output end of the second amplification path is connected to a second radio frequency output end; the first power amplifier and the second power amplifier are both operated in a first bias state.
In this embodiment, in the single transmission mode, the input end of the second amplification path is connected to the input end of the first amplification path and the first radio frequency input end, the output end of the second amplification path is connected to the output end of the first amplification path and the first radio frequency output end, and the second amplification path is connected to the first amplification path, so that a hardware condition that the Doherty power amplifier needs two PAs can be formed. The first power amplifier works in a first bias state with lower starting voltage, and the second power amplifier works in a second bias state with higher starting voltage, so that a software condition that the Doherty power amplifier needs two PAs can be formed.
The on voltage is a voltage that can turn on and amplify the power amplifier. Since the preset threshold is the turn-on voltage of the second power amplifier, when the input voltage of the first signal is greater than the preset threshold, that is, greater than the turn-on voltage of the second power amplifier, the second power amplifier is turned on to operate. Moreover, since the turn-on voltage of the first power amplifier is lower, the input voltage of the first signal is also greater than the turn-on voltage of the first power amplifier, and the first power amplifier is also turned on to operate. When the input voltage of the first signal is less than the preset threshold, that is, less than the turn-on voltage of the second power amplifier, the second power amplifier will not be turned on. At this time, the first power amplifier is turned on to operate because the turn-on voltage of the first power amplifier is lower.
In short, the first power amplifier in the first bias state is turned on when the first signal is in both the first state and the second state; the second power amplifier in the second bias state is turned on only when the first signal is in the first state, and is not turned on when the first signal is in the second state, so that the characteristics of high-efficiency output and high-power output of the Doherty power amplifier are exerted.
In addition, when the first power amplifier in the first bias state operates in the first bias state, the turn-on voltage is low, the first signal with low power level can make it turn on and be in the high efficiency state, and based on this, the second signal with low power level can also make it turn on and be in the high efficiency state. And, the second power amplifier in the first bias state also has the same low turn-on voltage, so the third signal with small power level can make the second power amplifier turn-on and operate and be in a high efficiency state, thereby realizing high efficiency output in dual transmission.
Illustratively, the first bias state is a Class AB state and the second bias state is a Class C state. When the first bias state is a Class AB state and the second bias state is a Class C state, the input voltage corresponding to the first signal of the PC2 may turn on the first power amplifier and the second power amplifier, thereby achieving high power output of the first signal of the PC 2; the input voltage corresponding to the first signal of the PC3 can turn on the first power amplifier but cannot turn on the second power amplifier, thereby realizing high-efficiency output of the first signal of the PC 3.
Specifically, the amplifying circuit further includes a first channel configuration unit and a second channel configuration unit. The first channel configuration unit is respectively connected with the first radio frequency input end, the second radio frequency input end, the input end of the first amplification path and the input end of the second amplification path. The second channel configuration unit is respectively connected with the output end of the second amplification channel, the output end of the first amplification channel and the second radio frequency output end. In the single-transmission mode, the first channel configuration unit is used for respectively communicating the first radio frequency input end to the input end of the first amplification channel and the input end of the second amplification channel; the second channel configuration unit is used for communicating the output end of the second amplification passage to the output end of the first amplification passage. In the dual emission mode, the first channel configuration unit is further used for communicating the first radio frequency input end to the input end of the first amplification passage and communicating the second radio frequency input end to the input end of the second amplification passage; the second channel configuration unit is also used for communicating the output end of the second amplification channel to the second radio frequency output end.
In this embodiment, the second amplification path may be connected to the first amplification path through the channel switching function of the first channel configuration unit and the second channel configuration unit, so as to implement high power output in a single transmission mode and high efficiency output of a backoff power segment in the single transmission mode, and the second amplification path may not be connected to the first amplification path, so as to implement high efficiency output in a dual transmission mode. That is to say, the multiplexing of the second amplification path in the single transmission mode and the dual transmission mode is realized through the channel switching function of the first channel configuration unit and the second channel configuration unit.
In other embodiments of the present application, in a single transmission mode, when a first signal is in a first state, an input terminal of a first amplification path, an input terminal of a second amplification path, and a first radio frequency input terminal are connected, an output terminal of the first amplification path, an output terminal of the second amplification path, and a first radio frequency output terminal are connected, a first power amplifier operates in a first bias state, and a second power amplifier operates in a second bias state; the turn-on voltage of the second power amplifier in the second bias state is higher than the turn-on voltage of the first power amplifier in the first bias state; the preset threshold is the starting voltage of the second power amplifier; when the first signal is in the second state, the input end of the first amplification path is connected with the first radio frequency input end, the input end of the second amplification path is not connected with the first radio frequency input end, the output end of the first amplification path is connected with the first radio frequency output end, the output end of the second amplification path is not connected with the output end of the first amplification path, and the first power amplifier works in the first bias state. The first power amplifier in the first bias state is started when the first signal is in a first state and a second state; the second power amplifier in the second bias state is turned on when the first signal is in the first state and is not turned on when the first signal is in the second state. In a dual emission mode, an input end of a first amplification path is connected to a first radio frequency input end, an input end of a second amplification path is connected to a second radio frequency input end, an output end of the first amplification path is connected to a first radio frequency output end, and an output end of the second amplification path is connected to a second radio frequency output end; the first power amplifier and the second power amplifier are both operated in a first bias state.
It should be appreciated that the Doherty power amplifier only uses two PAs when the first signal is in the first state; only the first power amplifier is used when the first signal is in the second state. Therefore, unlike the aforementioned embodiment in which the second amplification channel is always connected to the first amplification path in the single transmission mode, this embodiment connects the second amplification channel to the first amplification path only when the first signal is in the first state, and does not connect the second amplification channel to the first amplification path when the first signal is in the second state.
Specifically, the amplifying circuit further includes a first channel configuration unit and a second channel configuration unit. The first channel configuration unit is respectively connected with the first radio frequency input end, the second radio frequency input end, the input end of the first amplification path and the input end of the second amplification path. The second channel configuration unit is respectively connected with the output end of the second amplification channel, the output end of the first amplification channel and the second radio frequency output end. In the single-transmission mode, the first channel configuration unit is used for respectively communicating the first radio frequency input end to the input end of the first amplification access and the input end of the second amplification access when the first signal meets a first state; the second channel configuration unit is used for communicating the output end of the second amplification channel to the output end of the first amplification channel when the first signal meets the first state; the first channel configuration unit is also used for communicating the first radio frequency input end to the input end of the first amplification channel and not communicating the first radio frequency input end to the input end of the second amplification channel when the first signal meets the second state; the second channel configuration unit is used for not communicating the output end of the second amplification passage to the output end of the first amplification passage when the first signal meets the second state. In the dual emission mode, the first channel configuration unit is further used for communicating the first radio frequency input end to the input end of the first amplification passage and communicating the second radio frequency input end to the input end of the second amplification passage; the second channel configuration unit is also used for communicating the output end of the second amplification channel to the second radio frequency output end.
In this embodiment, the second amplification channel is switched into the first amplification path only when the first signal is in the first state, and the second amplification channel is not switched into the first amplification path when the first signal is in the second state. The channel switching function of the first channel configuration unit and the second channel configuration unit needs to be controlled by the state of the first signal, that is, when the first signal is in the first state, the second amplification path can be connected to the first amplification path to realize high-power output in the single transmission mode, and when the first signal is the second signal, the second amplification path is not connected to the first amplification path to realize high-efficiency output in the single transmission mode.
Exemplarily, the first channel configuration unit is a first switch module. The first switch module comprises an inner periphery port side and an outer periphery port side; the inner periphery port side of the first switch module comprises a first inner periphery port and a second inner periphery port, and the outer periphery port side of the first switch module comprises a first outer periphery port and a second outer periphery port. The first inner-periphery port of the first switch module is connected with the first radio-frequency input end; a second inner-periphery port of the first switch module is connected with a second radio-frequency input end; a first peripheral port of the first switch module is connected with the input end of the first amplification path; the second peripheral port of the first switch module is connected with the input end of the second amplification path.
Further, the second channel configuration unit is a second switch module. The second switch module comprises an inner periphery port side and an outer periphery port side; the inner periphery port side of the second switch module comprises a first inner periphery port, and the outer periphery port side of the second switch module comprises a first outer periphery port and a second outer periphery port. The first inner peripheral port of the second switch module is connected with the output end of the second amplification path; a first peripheral port of the second switch module is connected with the output end of the first amplification access; and a second peripheral port of the second switch module is connected with the second radio frequency output end.
Optionally, the first amplification path further comprises a first input matching tuning network and a first impedance transformation circuit. Wherein, the input end of the first input matching tuning network is the input end of the first amplification path; the output end of the first input matching tuning network is connected with the input end of the first power amplifier; the first input matching tuning network is used for adjusting the input impedance of the first power amplifier when the first power amplifier is switched between the first working state and the second working state so as to carry out input matching on the first power amplifier. Wherein the first power amplifier is in a first operating state when the first power amplifier performs amplification of a first signal in a first state; the first power amplifier is in the second operating state when the first power amplifier performs amplification of the first signal in the second state or when the first power amplifier performs amplification of the second signal. The input end of the first impedance transformation circuit is connected with the output end of the first power amplifier, and the output end of the first impedance transformation circuit is the output end of the first amplification path; the first impedance transformation circuit is used for adjusting the load impedance of the first power amplifier when the first power amplifier is switched between the first working state and the second working state so as to perform output matching on the first power amplifier. The first impedance transformation circuit is used for adjusting the load impedance of the first power amplifier to be high when the first power amplifier is switched from the first working state to the second working state.
It should be noted that, when the first power amplifier performs amplification of the first signal in the first state, the first power amplifier is in the first working state, and the second amplification path is to be connected to the first amplification path; when the first power amplifier performs amplification of the first signal in the second state or when the first power amplifier performs amplification of the second signal, the first power amplifier is in the second operation state, and the second amplification path will not be accessed to the first amplification path. It will be appreciated that as the second amplification path in the power amplification circuit will or will not be switched into the first amplification path, a change in the input impedance and load impedance of the first power amplifier will result. In order to realize input matching and output matching of the first power amplifier and avoid occurrence of a reflection phenomenon, when the second amplification path is switched between connection or disconnection of the first amplification path, it is necessary to adjust input impedance and load impedance of the first power amplifier. Based on this, the tunable first input matching tuning network and the first impedance transformation circuit are provided in the embodiment of the present application.
In addition, the first power amplifier is used for outputting a first signal with high power level when working in the first working state; the second power amplifier is operated in a second operating state to output the first signal or the second signal with a small power level. In this embodiment, when the first power amplifier is switched from the first operating state to the second operating state, the first impedance transformation circuit increases the load impedance of the first power amplifier, so that the Doherty power amplifier can enter a pre-saturation state in advance, and thus, high-efficiency output of the first signal or the second signal at a low power level is achieved during single transmission.
Optionally, the second amplification path further comprises a second input matching tuning network and a phase compensation circuit. The input of the second input match tuning network is the input of the second amplification path. The second input matching tuning network is used for adjusting the input impedance of the second power amplifier when the second power amplifier is switched between the third working state and the fourth working state so as to carry out input matching on the second power amplifier. Wherein when the second power amplifier performs amplification of the first signal in the first state, the second power amplifier is in a third operating state; when the second power amplifier performs amplification of the third signal, the second power amplifier is in a fourth operating state. The input end of the phase compensation circuit is connected with the output end of the second input matching tuning network; the output end of the phase compensation circuit is connected with the input end of the second power amplifier; the output end of the second power amplifier is the output end of the second amplification path; the phase compensation circuit is used for compensating the phase difference of the first amplification path and the second amplification path.
Similarly, as the second amplification path in the power amplification circuit is connected or not connected to the first amplification path, the input impedance of the second power amplifier will be changed. In order to realize the input matching of the second power amplifier and avoid the occurrence of the reflection phenomenon, when the second amplification path is switched between the connection or disconnection of the first amplification path, the input impedance of the second power amplifier needs to be adjusted. Based on this, the tunable second input matching tuning network is provided in the embodiment of the present application. Further, it should be noted that when the components on the first amplification path and the second amplification path are not the same, there will be a phase difference. It should be understood that when there is a phase difference between the first amplification path and the second amplification path, the rf signal output by the first amplification path and the rf signal output by the second amplification path may cancel each other instead of being superimposed when they are combined, thereby causing loss of the rf signal and reducing the rf performance. In this embodiment, the first amplification path is provided with a first impedance conversion circuit more than the second amplification path. The first impedance transformation circuit will cause a phase difference to exist between the first amplification path and the second amplification path. Based on this, the phase parameter to be compensated by the phase compensation circuit can be set according to the phase difference caused by the first impedance transformation circuit.
In some embodiments, the amplification circuit further comprises a second impedance transformation circuit. The output end of the first amplification path is connected with the input end of the second impedance transformation circuit, and the output end of the second impedance transformation circuit is connected with the first radio frequency output end. The second impedance transformation circuit is used for carrying out output matching on the first amplification path. In this embodiment, the second impedance transformation circuit is arranged to perform output matching on the first amplification path, so as to avoid a reflection phenomenon caused by impedance mismatching between the first amplification path and a transmission line connected to the output end of the first amplification path.
In some embodiments, the amplification circuit further comprises a third impedance transformation circuit. The output end of the second amplification path is connected with the input end of the third impedance transformation circuit, and the output end of the third impedance transformation circuit is connected with the second radio frequency output end. The third impedance transformation circuit is used for carrying out output matching on the second amplification path. In this embodiment, the third impedance transformation circuit is arranged to perform output matching on the second amplification path, so as to avoid a reflection phenomenon caused by impedance mismatching between the second amplification path and a transmission line connected to the output end of the second amplification path.
In a second aspect, the present application further provides a radio frequency front end circuit. The rf front-end circuit includes the power amplification circuit according to any one of the embodiments of the first aspect.
In a third aspect, the present application further provides an electronic device. The electronic device includes: a baseband processor. And the radio frequency chip is connected with the baseband processor. And the radio frequency front-end circuit according to the second aspect, connected to the radio frequency chip.
In a fourth aspect, the present application further provides a signal amplification method, which is applied to the power amplification circuit described in any embodiment of the first aspect, and is used for amplifying a single transmission signal and a dual transmission signal, where the single transmission signal is a first signal, and the dual transmission signal is a second signal and a third signal. The signal amplification method comprises the following steps: when single transmission of a first signal is carried out, the power amplification circuit is controlled to work in a single transmission mode; in a single transmitting mode, the power amplifying circuit forms a Doherty power amplifier; when the first signal is in a first state, amplifying the first signal through a first power amplifier and a second power amplifier; when the first signal is in a second state, amplifying the first signal through a first power amplifier; the first state is a state that the first signal enables the second power amplifier to be started; the second state is a state in which the first signal leaves the second power amplifier non-turned on. When the second signal and the third signal are transmitted in a double mode, the power amplification circuit is controlled to work in the double transmission mode; in the dual transmission mode, the first power amplifier amplifies the second signal, and the second power amplifier amplifies the third signal.
The technical effects brought by the second aspect to the fourth aspect can be referred to the technical effects brought by different design manners in the first aspect, and are not described herein again.
Drawings
Fig. 1 is a schematic structural diagram of an electronic device according to an embodiment of the present disclosure;
fig. 2 is a first schematic structural diagram of a power amplifier circuit according to some embodiments of the present disclosure;
fig. 3 is a schematic structural diagram of a power amplifier circuit according to another embodiment of the present application;
fig. 4 is a schematic structural diagram of a power amplification circuit according to another embodiment of the present application;
fig. 5 is a schematic structural diagram of a first switch module according to some embodiments of the present disclosure;
fig. 6 is a schematic structural diagram of a first switch module according to another embodiment of the present application;
fig. 7 is a first connection diagram of the power amplifier circuit shown in fig. 4 when switched to a single transmission mode;
fig. 8 is a schematic diagram illustrating a connection relationship when the power amplifier circuit shown in fig. 4 is switched to a dual transmission mode;
fig. 9 is a second connection diagram of the power amplifier circuit shown in fig. 4 when switched to a single transmission mode;
fig. 10 is a fourth schematic structural diagram of a power amplification circuit according to another embodiment of the present application.
Detailed Description
First, technical terms related to the embodiments of the present application will be explained.
1. Matching: when two transmission lines with different characteristic impedances are connected or when the load impedance is not equal to the characteristic impedance of the transmission line, a reflection phenomenon is generated due to impedance mismatching, so that the power capacity and the transmission efficiency of a transmission system are reduced. Based on this, a matching circuit needs to be added between two transmission lines or between a load or a transmission line to perform impedance matching, so as to reduce the reflection phenomenon caused by impedance mismatching.
2. Power Amplifier Module (PAMiD) of integrated filter/duplexer: in order to reduce the area occupied by the RF front end, a Power Amplifier (PA), a filter (filter), a duplexer (duplexer), and an RF Switch (RF Switch) are integrated into one chip, so as to form a PAMiD.
3. Power amplifier module PAMiD (LNA and power amplifier module with integrated product, L-PAMiD) integrating Low Noise Amplifier (LNA): and further integrating the LNA on the basis of the PAMiD to form the L-PAMiD.
4. Multi-mode multi-band power amplifier (MMMB PA): when the multi-mode multi-band technology is applied to the wireless communication equipment, in order to minimize the area occupied by the radio frequency front-end device, the MMMB PA supporting the broadband and high integration is generated.
5. Power class 3 (power class 3, PC 3): the PC3 limits the maximum output power of a user terminal (UE) to a level of 23dBm ± 2.
6. Power class 2 (power class 2, PC 2): the PC2 limits the maximum output power of the UE to a level of 26dBm ± 2.
It should be noted that 30dBm =1000mW, and the power is doubled when 3dB is added; every 3dB reduction, the power becomes half of the original power. Based on this, 26dBm can be converted to 400mW, 23dBm can be converted to 200mW, and it can be seen that PC2 improves the UE by 3dB on the basis of PC3, which almost doubles the maximum output power of the UE.
7.B41(band 41)
B41 represents the frequency band corresponding to the LTE frequency band number 41, namely 2496Mhz to 2690 Mhz.
Referring to fig. 1, fig. 1 is a schematic structural diagram of an electronic device according to an embodiment of the present disclosure. The electronic device may be various mobile phones, tablet computers, wearable devices, vehicle-mounted devices, Augmented Reality (AR)/Virtual Reality (VR) devices, notebook computers, ultra-mobile personal computers (UMPCs), netbooks, Personal Digital Assistants (PDAs), and the like, which have a wireless communication function. For convenience of understanding, the following embodiments are exemplified by taking the electronic device as a mobile phone.
As shown in fig. 1, the electronic device may include an application subsystem, a memory (memory), a mass storage (mass storage), a baseband subsystem, a radio frequency subsystem formed by a Radio Frequency Integrated Circuit (RFIC) and a Radio Frequency Front End (RFFE) device, and an antenna (antenna, ANT), which may be coupled via various interconnect buses or other electrical connections.
In fig. 1, ANT _1 denotes a first antenna, ANT _ N denotes an nth antenna, and N is a positive integer greater than 1. Tx denotes a transmit path, Rx denotes a receive path, and different numbers denote different paths. FBRx denotes a feedback reception path, PRx denotes a main reception path, and DRx denotes a diversity reception path. HB denotes high frequency, LB denotes low frequency, and both denote relative high and low frequencies. BB denotes baseband. It should be understood that the labels and components in fig. 1 are for illustrative purposes only, as only one possible implementation, and that other implementations are also encompassed by the present embodiments.
The RF subsystem may be further divided into a radio frequency receive path (RF receive path) and a radio frequency transmit path (RF transmit path). The rf receive channel may receive an rf signal via an antenna, process (e.g., amplify, filter, downconvert, and analog-to-digital convert) the rf signal to obtain a baseband signal, and transmit the baseband signal to the baseband subsystem. The rf transmission channel may receive a baseband signal from the baseband subsystem, perform rf processing (such as up-conversion, amplification, filtering, and digital-to-analog conversion) on the baseband signal to obtain an rf signal, and finally radiate the rf signal into space through an antenna. In particular, the rf subsystem may include rf switches, duplexers, antenna tuners, LNAs, PAs, mixers (mixers), Local Oscillators (LOs), filters, and other electronic devices, which may be integrated into one or more chips as desired. Antennas may sometimes also be considered part of the rf subsystem.
For example, the electronic devices may be separately disposed in the antenna, the rf front-end circuit, and the rf chip as needed. The radio frequency chip can be composed of a mixer, a local oscillator, a filter and the like. The local oscillator is used for providing local oscillation signals; the frequency mixer is used for mixing the radio frequency signal with a local oscillation signal provided by the local oscillator. The radio frequency chip is sometimes also referred to as a receiver, transmitter, or transceiver. The radio frequency front-end circuit can be composed of electronic devices such as a filter, a low noise amplifier, a power amplifier, a radio frequency switch and the like. The radio frequency switch is used for realizing the switching of the receiving and the transmitting of the radio frequency signals and the switching among different frequency bands; the duplexer is used for isolating a transmitting path and a receiving path of the radio-frequency signal, thereby ensuring that the receiving and the transmitting can work normally under the condition of sharing the same antenna; the filter is used for reserving signals in a specific frequency band and filtering signals outside the specific frequency band; the low-noise amplifier is used for amplifying the radio-frequency signal of the receiving channel; the power amplifier is used for amplifying the radio frequency signal of the transmission path. It should be noted that, in a specific implementation process, the specific implementation of the power amplifier may be in the form of a single mode single band power amplifier (SMSB PA), an MMMB PA, or the like, and may be an independent device, or may be integrated in a PAMiD or an L-PAMiD, which is not specifically limited in this embodiment of the present invention.
In this case, the antenna, the rf front-end circuit, and the rf chip are independent and may be manufactured and sold separately. Of course, the rf subsystem may also adopt different devices or different integration modes based on the requirements of power consumption and performance. For example, some devices belonging to the rf front-end circuit are integrated into a rf chip, and even the antenna and the rf front-end circuit are integrated into a rf chip, which may also be referred to as a rf antenna module or an antenna module.
The baseband subsystem may extract useful information or data bits from the baseband signal or convert the information or data bits to a baseband signal to be transmitted. These information or data bits may be data representing user data or control information such as voice, text, video, etc. For example, the baseband subsystem may perform signal processing operations such as modulation and demodulation, encoding and decoding. There is often not exactly the same baseband signal processing operation for different radio access technologies, such as 5G NR and 4G LTE. Therefore, to support convergence of multiple mobile communication modes, the baseband subsystem may simultaneously include multiple processing cores, or multiple HACs. The baseband subsystem is typically integrated into one or more chips.
Illustratively, the baseband subsystem may be implemented as a stand-alone chip, which may be referred to as a modem (modem) chip. The hardware components of the baseband subsystem may be manufactured and sold in units of modem chips. modem chips are also sometimes referred to as baseband chips or baseband processors. In addition, the baseband subsystem can be further integrated in an SoC chip, and manufactured and sold in units of SoC chips. The software components of the baseband subsystem may be built in the hardware components of the chip before the chip leaves factory, or may be imported into the hardware components of the chip from other nonvolatile memories after the chip leaves factory, or may be downloaded and updated in an online manner through a network.
In addition, since the rf signal is an analog signal, the signal processed by the baseband subsystem is mainly a digital signal, and an analog-to-digital conversion device is also required in the electronic device. The analog-to-digital conversion device includes an analog-to-digital converter (ADC) that converts an analog signal into a digital signal, and a digital-to-analog converter (DAC) that converts a digital signal into an analog signal. It should be understood that the analog-to-digital conversion device may be disposed in the baseband subsystem, and may also be disposed in the rf subsystem.
The application subsystem can be used as a main control system or a main computing system of the electronic equipment, is used for running a main operating system and an application program, manages software and hardware resources of the whole electronic equipment, and can provide a user operation interface for a user. The application subsystem may include one or more processing cores. In addition, driver software associated with other subsystems (e.g., baseband subsystem) may also be included in the application subsystem. The baseband subsystem may also include one or more processing cores, as well as Hardware Accelerators (HACs) and buffers, among others.
Therefore, in the rf front-end circuit, the PA is an important component in the transmission path, and is responsible for amplifying and transmitting the power of the rf signal to be transmitted, so as to implement communication with the base station or the WiFi hotspot. As electronic devices have higher requirements for communication quality, the output power of the PA is also higher. For example, as a wireless network develops, a mobile communication spectrum gradually shifts to a high frequency, attenuation of wireless signals is increased in a propagation process, so that a base station cannot cover a frequency band corresponding to the wireless signals, for example, a 4G frequency band is in a relatively high frequency B41 frequency band, thereby reducing a coverage area of the base station and deteriorating communication quality. In order to improve the coverage of the base station and improve the communication quality, these frequency bands need to support the PC2, which has twice the power requirement of the PC3, which requires the PA in the rf front-end circuit to output higher power. The current devices such as the SMSB PA, the MMMB PA, the PAMiD, the L-PAMiD and the like all face the requirement of improving the output power. In addition, there is a dual transmission requirement for some frequency bands (e.g., B41), that is, two rf signals in the frequency band are transmitted through two antennas simultaneously, so that two PAs are required to amplify and transmit the two rf signals respectively. It should be noted that dual transmission typically does not require a high power level (e.g., PC 2) for transmission.
Based on this, in order to meet the requirements of high output power and dual emission of an electronic device, embodiments of the present application provide a power amplification circuit. The power amplifying circuit may be used in some or all of PA devices such as SMSB PA, MMMB PA, PAMiD, and L-PAMiD, and is applied to the rf front-end circuit of the electronic device shown in fig. 1 for power amplification. The power amplifying circuit can have higher output power when the electronic equipment realizes a single-transmitting function, so that the high output power requirement of the electronic equipment is met, and simultaneously, the electronic equipment respectively amplifies and transmits two paths of double-transmitted radio frequency signals when the electronic equipment realizes a double-transmitting function, so that the requirement of the electronic equipment on double transmission is met. The power amplifier circuit according to the embodiment of the present application will be specifically described below with reference to fig. 2 to 10.
First, as a method of increasing the output power of the power amplifier circuit, there are generally two methods: firstly, the number of PAs (or the area of power amplification tubes) in the power amplification circuit is increased; second, the supply voltage of the PA is increased. The second approach requires a Boost power supply, which is costly. Based on this, in practical applications, especially in systems requiring the same voltage to be used by PC2 and PC3, the first way is usually to implement PC 2. Based on this, the embodiments shown in the following figures all increase the output power of the power amplifying circuit in a first way to support the PC 2.
Referring to fig. 2, fig. 2 is a first schematic structural diagram of a power amplifier circuit according to some embodiments of the present disclosure. The power amplification circuit shown in fig. 2 includes a control unit, a first path, and a second path. The first path may be used to amplify a radio frequency signal with a high output power requirement in single transmission, and to output a radio frequency signal with a high power level (such as PC 2), or amplify a radio frequency signal with a low output power requirement in single transmission, and to output a radio frequency signal with a low power level (such as PC3 and a power level smaller than PC 3), and may also be used to amplify one of the radio frequency signals in dual transmission. The second path may be used to amplify the other rf signal for dual transmission. Here, we describe the amplification principle of the power amplification circuit shown in fig. 2 in detail by using the flow direction of the radio frequency signal in the power amplification circuit.
First, a radio frequency signal in single transmission is taken as an example of the first signal for explanation.
When the first signal is transmitted singly, the first signal is amplified by the first path of the power amplifying circuit. Specifically, the first signal enters the first path of the power amplifying circuit from the radio frequency input terminal RF _ in 1. When the RF input terminal RF _ in1 receives a first signal, the first signal is split into two paths of RF signals with half power (half power of the signal represents a 3dB loss of the signal) after passing through the splitter, wherein one path of RF signal is amplified by the PA1, the other path of RF signal is amplified by the PA2, and then the two paths of RF signals amplified by the PA1 and the PA2 are combined at the combiner (when the two paths of RF signals are equal in size and have no phase difference, the power of the RF signal combined by the combiner is doubled, that is, 3dB of increase), and then the first signal with amplified power is output through the RF output terminal RF _ out1 of the power amplification circuit.
It can be seen that the power of the first signal finally output by the power amplifying circuit is the sum of the power of the radio frequency signal output by the PA1 and the power of the radio frequency signal output by the PA 2. Based on this, it can be understood that the maximum output power of the power amplification circuit is also the sum of the maximum output power of the PA1 and the maximum output power of the PA 2. It should be noted that the maximum output power of each PA is limited and cannot be continuously boosted. Based on this, in the power amplification circuit shown in fig. 2, the limited maximum output power of each PA is added, so that the maximum output power of the power amplification circuit is greatly improved compared with that of a single PA, and therefore the power amplification circuit shown in fig. 2 can realize the output of the first signal with high power level. It can be seen that the power amplification circuit shown in fig. 2 achieves a high power level first signal output by combining the PA1 and the PA2 in the first path.
It should be understood that when the power amplifying circuit shown in fig. 2 has the capability of outputting the first signal with a high power level, the same can be used for outputting the first signal with a low power level. Specifically, by reducing the input power of the first signal received by the RF input terminal RF _ in1 and adjusting the gains of the PA1 and the PA2 through the control unit, the powers of the RF signals output by the PA1 and the PA2 can be reduced, so that the output power of the first signal synthesized by the combiner is also reduced, and the output of the first signal with a low power level is realized. It can be seen that when the first signal output of a small power level is realized, it can also be realized by using the PA1 and PA2 in the first path for synthesis. In addition, when the power amplification circuit shown in fig. 2 is used to output a radio frequency signal with a low power level, if the radio frequency signal is amplified by one of the PA1 and the PA2 in the first path, the radio frequency signal will have a 3dB loss (power is halved) through the combiner, which results in a power back-off.
Next, the radio frequency signals in the dual transmission are respectively the second signal and the third signal.
The second signal is amplified by the first path of the power amplification circuit and the third signal is amplified by the second path of the power amplification circuit. Specifically, the second signal enters the first channel of the power amplification circuit from the radio frequency input terminal RF _ in1, and the flow direction of the second signal in the power amplification circuit is similar to the single transmission process, and the second signal is amplified by two amplifiers, PA1 and PA2, which can be referred to for implementation and will not be described herein again. For the third signal, the third signal enters the second channel of the power amplifying circuit from the RF input terminal RF _ in 2. When the radio frequency input terminal RF _ in2 receives the third signal, the third signal is amplified by the PA3, and then the power-amplified third signal is output through the radio frequency output terminal RF _ out 2. It should be noted that, in dual transmission, high power (such as PC 2) is usually not required for transmission, and therefore, the second signal is amplified by an amplifier, PA3, to meet the power requirement.
It can be seen that the power amplifier circuit shown in fig. 2 can meet both the requirement of the electronic device for high output power during single emission and the requirement of the electronic device for dual emission. However, through the above analysis, in the power amplification circuit shown in fig. 2, the first path is implemented by combining the PA1 and the PA2 when the output of the radio frequency signal with a high power level is implemented, and is also implemented by combining the PA1 and the PA2 when the output of the radio frequency signal with a back-off power section, that is, a low power level is implemented, which causes a problem that the efficiency of the PA1 and the PA2 is low.
For example, to achieve PC2=400mW, the maximum output power of PA1 and PA2 needs to be up to 200 mW. When a first signal of 400mW needs to be output, the PA1 and the PA2 with the capability of outputting 200mW work at 200mW, so that the PA1 and the PA2 synthesize a radio frequency signal of outputting 400 mW; when the first signal of 100mW needs to be output, the PAs 1 and PA2 with the capability of outputting 200mW need to be backed to 50mW operation, so that the PAs 1 and PA2 synthesize a radio frequency signal of 100mW output. It should be noted that, when the maximum output power of the PA is constant, the efficiency of the PA increases with the increase of the output power, and the efficiency is higher closer to the maximum output power. Obviously, the efficiency of the PA1 and PA2 decreases a lot when the power amplification circuit outputs a radio frequency signal of a small power level.
It should be noted that, the PA is one of the main energy consumption devices in the electronic equipment, and the level of its efficiency directly affects the cruising ability of the electronic equipment. Therefore, in order to improve the endurance of current electronic devices, there is a high demand on the efficiency of the PA. Current PA devices such as SMSB PA, MMMB PA, PAMiD, L-PAMiD, etc., all face the need for improved efficiency. Based on this, in order to improve the efficiency of the back-off power section, the embodiment of the present application further provides the power amplification circuit shown in fig. 3.
Fig. 3 is a schematic structural diagram of a power amplification circuit according to another embodiment of the present application. The power amplifier circuit shown in fig. 3 also includes a control unit, a first path, and a second path. The control unit may control the gain and bias states of the PA1 and the PA2, and the specific configuration and amplification principle of the second path are the same as those in fig. 2, and may be used to amplify another path of radio frequency signal during dual transmission, which is not described herein again. The first path may be used to amplify a radio frequency signal with a high output power requirement during single transmission or amplify a radio frequency signal with a low output power requirement during single transmission, and may also be used to amplify one of the radio frequency signals during dual transmission.
It can be seen that the power amplifying circuit shown in fig. 3 can also meet the requirement of the electronic device for dual emission. Unlike the power amplifier circuit shown in fig. 2, in the power amplifier circuit shown in fig. 3, a Doherty power amplifier is used as the first path, and the description of the first path is repeated below.
First, in this embodiment, only the characteristics of the Doherty power amplifier in the first path are described, and the specific structure and the operation principle of the Doherty power amplifier are described in detail in the embodiment shown in fig. 4, which can be referred to for implementation, and are not described herein again.
Specifically, the Doherty power amplifier includes two PAs, PA1 and PA2 respectively. Wherein, PA1 is main PA (carrier PA), and the bias state is Class AB state; PA2 is a secondary PA (peak PA) whose bias state is Class C state. When the input is small, only the main PA participates in the work of the Doherty power amplifier and works in a high-efficiency state, so that the high-efficiency requirement is met when a radio-frequency signal with a low power level is output; when the input is large, the main PA and the auxiliary PA work simultaneously, the output power of the Doherty power amplifier is the superposition of the output power of the main PA and the output power of the auxiliary PA, and therefore the Doherty power amplifier works in a high-output power state, and the output of radio-frequency signals with high power level is achieved.
It can be seen that, compared to the power amplifier circuit shown in fig. 2, the power amplifier circuit shown in fig. 3 can not only meet the requirements of high output power and dual emission when the electronic device performs single emission, but also meet the requirement of high efficiency when the electronic device performs single emission or dual emission at a low power level.
However, the power amplifier circuit shown in fig. 2 and the power amplifier circuit shown in fig. 3 have a problem of low integration level when meeting the high output power requirement and the dual transmission requirement when the electronic device performs single transmission, so that the area of the power amplifier circuit is large, which is not favorable for miniaturization of the electronic device, especially a mobile phone. Based on this, in order to meet the requirements of the electronic device on high output power during single transmission, high efficiency of the back-off power stage during single transmission, and dual transmission, the embodiment of the present application further provides the power amplification circuit shown in fig. 4.
Fig. 4 is a third power amplification circuit diagram according to another embodiment of the present application. Referring to fig. 4, the power amplifier circuit includes a RF input terminal RF _ in1 (i.e., a first RF input terminal), a RF input terminal RF _ in2 (i.e., a second RF input terminal), a RF output terminal RF _ out1 (i.e., a first RF output terminal), a RF output terminal RF _ out2 (i.e., a second RF output terminal), a control unit, and an amplifier circuit.
The amplification circuit comprises a first channel configuration unit 1, a second channel configuration unit 2, a first amplification path and a second amplification path.
The first channel configuration unit 1 is connected to the RF input terminal RF _ in1, the RF input terminal RF _ in2, the input terminal of the first amplification path, and the input terminal of the second amplification path. The first channel configuration unit 1 is connected to the control unit, and channel switching can be performed under a control instruction of the control unit (indicated by a solid line with an arrow connected to the first channel configuration unit 1 in the figure), so that the radio frequency input terminal RF _ in1 can be communicated to the input terminal of the first amplification path, or the radio frequency input terminal RF _ in1 can be communicated to the input terminals of the first amplification path and the second amplification path, and the radio frequency input terminal RF _ in2 can be communicated to the input terminal of the second amplification path.
In some embodiments, the first channel configuration unit 1 may be a first switch module. The first switch module comprises an inner peripheral port side and a peripheral port side, the inner peripheral port side of the first switch module comprises a first inner peripheral port A and a second inner peripheral port B, and the peripheral port side of the first switch module comprises a first peripheral port a and a second peripheral port B. The first inner peripheral port a of the first switch module is connected to the RF input terminal RF _ in 1. The second inner peripheral port B of the first switch module is connected to the RF input terminal RF _ in 2. The first peripheral port a of the first switch module is connected with the input end of the first amplification path. The second peripheral port b of the first switch module is connected with the input end of the second amplification path.
It should be understood that when the first inner peripheral port a of the first switch module is connected to the first outer peripheral port a of the first switch module, the radio frequency input terminal RF _ in1 can be communicated to the input terminal of the first amplifying path; when the first inner peripheral port a of the first switch module is connected to the first and second outer peripheral ports a and b of the first switch module, the radio frequency input terminal RF _ in1 may be simultaneously communicated to the input terminal of the first amplification path and the input terminal of the second amplification path. When the second inner peripheral port B of the first switch module is connected to the second outer peripheral port B of the first switch module, the radio frequency input terminal RF _ in2 may be communicated to the input terminal of the second amplification path.
For example, referring to fig. 5, fig. 5 is a schematic structural diagram of a first switch module according to some embodiments of the present application. The first switch module comprises seven MOS tubes of MOS1-MOS 7.
The gate G of each MOS tube in the MOS1-MOS7 is connected with the controller unit and used for receiving a control command from the controller unit, and the control command is used for controlling the on and off of the MOS1-MOS 7. The drain D of the source S, MOS4 of the source S, MOS2 of the MOS1 is connected to the first inner peripheral port a of the first switch module; the drains D of the drains D, MOS6 of the MOS1 are connected with the first peripheral port a of the first switch module; the source S of the drain D, MOS3 of the MOS5 is connected with the second inner peripheral port B of the first switch module; the drain electrodes D of the drain electrodes D, MOS7 of the drain electrodes D, MOS3 of the MOS2 are connected with the second peripheral port b of the first switch module; the source S of the MOS4 is connected with the source S of the MOS5 and then is connected to the ground; the source S of MOS7 is connected to the source S of MOS6 and then to ground.
In the first switch module shown in fig. 5, the MOS1-MOS3 function to turn on different ports of the first switch module, and the MOS4-MOS7 function to increase the isolation between the ports.
Specifically, when the first internal peripheral port a of the first switch module needs to be connected to the first peripheral port a of the first switch module and the second peripheral port b of the first switch module, the control unit issues a control instruction to turn on the MOS1, the MOS2 and the MOS5, and turn off the MOS3, the MOS4, the MOS6 and the MOS 7.
In this case, the conduction of the MOS1 makes the first inner peripheral port a of the first switch module connected to the first outer peripheral port a of the first switch module; the conduction of the MOS2 enables the first inner peripheral port A of the first switch module to be connected to the second outer peripheral port b of the first switch module; the disconnection of the MOS3 can prevent the first internal port a of the first switch module from being connected to the second external port b of the first switch module; the disconnection of the MOS4, the MOS6 and the MOS7 can prevent the radio frequency signal input from the first inner peripheral port a of the first switch module from being transmitted to the first outer peripheral port a and the second outer peripheral port b of the first switch module respectively without passing through the MOS1 and the MOS2, but passing through the MOS4, the MOS6 and the MOS 7. It should be noted that, in the case that the MOS3 is turned off, there still exists a parasitic capacitance, so that the MOS3 is not turned off ideally, and in this case, an interference signal existing at the second internal peripheral port B of the first switch module may be transmitted to the second external peripheral port B of the first switch module through the MOS3, so as to cause interference to the radio frequency signal transmitted from the first internal peripheral port a of the first switch module to the second external peripheral port B of the first switch module, thereby causing noise. Based on this, the conduction of the MOS5 can couple the interference signal existing at the second internal port B of the first switch module to the ground, thereby increasing the isolation between the first internal port a of the first switch module and the second internal port B of the first switch module.
When the first inner peripheral port a of the first switch module needs to be connected to the first outer peripheral port a of the first switch module, the control unit sends a control instruction to turn on the MOS1, the MOS5 and the MOS7, and turn off the MOS2, the MOS3, the MOS4 and the MOS 6. In this case, the conduction of the MOS1 makes the first inner peripheral port a of the first switch module connected to the first outer peripheral port a of the first switch module; the disconnection of the MOS2 can prevent the first internal port a of the first switch module from being connected to the second external port b of the first switch module; the disconnection of the MOS3 can prevent the first internal port a of the first switch module from being connected to the second external port b of the first switch module; the disconnection of the MOS4 and the MOS6 can prevent the rf signal input from the first inner peripheral port a of the first switch module from being transmitted to the MOS1 and then to the first outer peripheral port a of the first switch module, but through the MOS4 and the MOS 6. In addition, in order to avoid the interference signals existing in the second inner peripheral port B of the first switch module and the second outer peripheral port B of the first switch module from being coupled to the first inner peripheral port a of the first switch module through the incompletely closed MOS2 and MOS3, the interference is caused to the radio frequency signal of the first inner peripheral port a of the first switch module, and noise is caused. Based on this, the conduction of the MOS5 and the MOS7 can couple the interference signals existing in the second inner peripheral port B of the first switch module and the second outer peripheral port B of the first switch module to the ground, respectively, thereby increasing the isolation between the second inner peripheral port B of the first switch module, the second outer peripheral port B of the first switch module, and the first inner peripheral port a of the first switch module.
When the first inner peripheral port a of the first switch module needs to be connected to the first peripheral port a of the first switch module and the second inner peripheral port B of the first switch module needs to be connected to the second peripheral port B of the first switch module, the control unit sends a control instruction to enable the MOS1 and the MOS3 to be switched on, and the MOS2, the MOS4, the MOS5, the MOS6 and the MOS7 to be switched off. In this case, the conduction of the MOS1 makes the first inner peripheral port a of the first switch module connected to the first outer peripheral port a of the first switch module; the disconnection of the MOS2 can prevent the first internal port a of the first switch module from being connected to the second external port b of the first switch module; the conduction of the MOS3 can make the first internal port a of the first switch module connected to the second external port b of the first switch module; the disconnection of the MOS4-MOS7 can prevent the rf signals input from the first inner peripheral port a of the first switch module and the second inner peripheral port B of the first switch module from being transmitted to the first peripheral port a of the first switch module and the second peripheral port B of the first switch module respectively through the MOS1 and the MOS3, and from being transmitted to the lower side through the MOS4-MOS 7.
In addition, the MOS4-MOS7 can also play an electrostatic-static discharge (ESD) protection role. Specifically, the MOS4 can protect against the ESD event occurring at the first inner peripheral port a of the first switch module, and when the ESD event occurs at the first inner peripheral port a of the first switch module, the ESD current is discharged to the ground by breaking down the MOS4, so as to prevent the ESD current from damaging the MOS 1.
MOS5 may protect against ESD events occurring at second inner port B of the first switch module. Specifically, the MOS5 can protect the ESD event occurring at the second internal port B of the first switch module, and when the ESD event occurs at the second internal port B of the first switch module, the ESD current is discharged to the ground by breaking the MOS5, so as to prevent the ESD current from damaging the MOS 3.
The MOS6 can protect the first peripheral port a of the first switch module from ESD events. Specifically, the MOS6 can protect the ESD event occurring at the first peripheral port a of the first switch module, and when the ESD event occurs at the first peripheral port a of the first switch module, the ESD current is discharged to the ground by breaking down the MOS6, so as to prevent the ESD current from damaging the MOS 1.
MOS7 may protect the second peripheral port b of the first switch module from ESD events. Specifically, the MOS7 can protect the ESD event occurring at the second peripheral port b of the first switch module, and when the ESD event occurs at the second peripheral port b of the first switch module, the ESD current is discharged to the ground by breaking down the MOS7, so as to prevent the ESD current from damaging the MOS 3.
In other embodiments, the connection relationship between the source S and the drain D of each MOS transistor may be exchanged, and this is not specifically limited in this embodiment of the application. In addition, each MOS transistor in fig. 5 has only one stage of MOS, and in other embodiments, each MOS transistor may be implemented by an amplifier transistor formed by cascading multiple stages of MOS. It should be noted that fig. 5 illustrates a MOS transistor as a transistor, and in other embodiments, the MOS transistor may be implemented by other types of transistors instead.
For example, referring to fig. 6, fig. 6 is a schematic structural diagram of a first switch module according to another embodiment of the present application. The first switch module comprises a shunt and a double-pole double-throw switch.
Wherein the splitter comprises one input (i.e. port O) and two outputs (port m and port n, respectively). The double pole double throw switch includes two inner ports (port C and port D, respectively) and two outer ports (port C and port D, respectively).
The port O of the shunt is connected with the first inner peripheral port A of the first switch module, the port m of the shunt is connected with the first outer peripheral port a of the first switch module, the port n of the shunt is connected with the port C of the double-pole double-throw switch, the second inner peripheral port B of the first switch module is connected with the port D of the double-pole double-throw switch, the port C of the double-pole double-throw switch is connected with the resistor, and the port D of the double-pole double-throw switch is connected with the second outer peripheral port B of the first switch module. Here, the impedance of the resistor is the impedance of the transmission line, and is usually 50 Ω.
In the first switch module shown in fig. 6, when the first inner peripheral port a of the first switch module needs to be connected to the first outer peripheral port a of the first switch module, the control unit sends a control instruction to connect the port C of the double-pole double-throw switch to the port C, and connect the port D to the port D. Of course, in other embodiments, port D and port D may not be connected.
When the first internal peripheral port a of the first switch module needs to be connected to the first peripheral port a of the first switch module and the second peripheral port b of the first switch module (i.e. double-open), the control unit sends a control instruction, so that the port C of the double-pole double-throw switch is connected to the port D, and the port D is connected to the port C. Of course, in other embodiments, port D and port c may not be connected.
When the first inner peripheral port a of the first switch module needs to be connected to the first peripheral port a of the first switch module and the second inner peripheral port B of the first switch module needs to be connected to the first peripheral port B of the first switch module, the control unit sends a control instruction to enable the port C of the double-pole double-throw switch to be connected to the port C and the port D to be connected to the port D, and the connection relation is consistent with the condition that the first inner peripheral port a of the first switch module is only connected to the first peripheral port a of the first switch module.
It should be noted that, in the subsequent content of fig. 4, since the switching between the peripheral port and the inner port of the first switch module will cause the input impedance of the PA1 and the PA2 to change, the input impedance of the PA1 and the PA2 needs to be adjusted by the first input matching tuning network and the second input matching tuning network, so as to perform input matching on the PA1 and the PA2 again. When the first switch module shown in fig. 6 is used, since the splitter has the characteristic of matching the load impedance of the two output terminals to the input impedance of the input terminal, when the internal port and the external port of the first switch module are switched, the input impedance of the PA1 and the PA2 will not be changed, and thus the input impedance adjustment of the first input matching tuning network and the second input matching tuning network to the PA1 and the PA2 is not needed. Based on this, the first input matching tuning network and the second input matching tuning network in the subsequent content of fig. 4 may be omitted. In a specific implementation process, the double-pole-double-throw switch in fig. 6 may also be constructed by other switch assemblies capable of providing at least two inner peripheral ports and at least two outer peripheral ports, such as a three-pole-three-throw switch, a four-pole-four-throw switch, or a single-pole-single-throw switch and a single-pole-single-throw switch, which is not limited in this application.
The second channel configuration unit 2 is connected to the output terminal of the second amplification path, the output terminal of the first amplification path, and the RF output terminal RF _ out2, respectively. The second channel configuration unit 2 is connected to the control unit and can be switched under control commands of the control unit (indicated by the solid line with an arrow connected to the second channel configuration unit 2 in the figure) so that the output of the second amplification path can be connected to the output of the first amplification path or the radio frequency output RF _ out 2.
In some embodiments, the second channel configuration unit 2 may be a second switch module. The second switch module comprises an inner periphery port side and a peripheral port side, the inner periphery port side of the second switch module comprises a first inner periphery port A, and the peripheral port side of the second switch module comprises a first peripheral port a and a second peripheral port b. The first inner-periphery port A of the second switch module is connected with the output end of the second amplification path; the first peripheral port a of the second switch module and the output end of the first amplification path are connected to a combining point X; the second peripheral port b of the second switch module is connected to the RF output RF _ out 2.
It should be understood that when the first inner peripheral port a of the second switch module is connected to the first outer peripheral port a of the second switch module, the output end of the second amplification path may be communicated to the output end of the first amplification path; when the first internal port a of the second switch module is connected to the second external port b of the second switch module, the output end of the second amplification path can be connected to the RF output end RF _ out 2.
In a specific implementation process, the second switch module may be a single-pole double-throw switch, and may also be other switch components capable of providing at least one internal peripheral port and at least two external peripheral ports, such as a single-pole triple-throw switch, a double-pole four-throw switch, and the like, which is not limited in this application.
Wherein the first amplification path includes a first input matching tuning network, a PA1 (i.e., a first power amplifier), and a first impedance transformation circuit. The first input matching tuning network, the PA1, and the first impedance transformation circuit are serially connected in sequence.
The input end of the first input matching tuning network is used as the input end of the first amplification path and is connected with the first peripheral port a of the first switch module. The first input matching tuning network is also connected to the control unit, and the input impedance of the PA1 can be adjusted under the control instruction of the control unit (indicated by a solid line with an arrow connected to the first input matching tuning network in the figure), so that the PA1 can be input-matched.
The following cases one and two are described for the reason and procedure that the first input matching tuning network needs the input impedance of PA1 to be adjusted, and are not described in detail here. In a specific implementation, the first input matching tuning network may be implemented by a plurality of capacitive devices and a plurality of inductive device arrays. One device is controlled by one switch, and the control unit can control the number of capacitors and inductors connected into the first input matching tuning network by controlling the switches of the devices, so that the impedance of the first input matching tuning network is adjusted, and the input impedance of the PA1 is further adjusted.
The PA1 is connected to the control unit, and can amplify the passing rf signal under the control command of the control unit (shown by the solid line with arrow connected to the PA 1).
Specifically, the PA1 may be composed of one or more transistors and a matching circuit. It should be noted that the control unit may control the bias state of the PA 1. The starting voltage of PA1 differs for different bias conditions. The turn-on voltage here refers to a voltage that can turn on the PA1 without being in an off state (i.e., an off state).
It should be appreciated that the PA1 can be turned on for amplification only when the input voltage of the rf signal is greater than the turn-on voltage, and those rf signals with input voltages less than the turn-on voltage of the PA1 will not turn on the PA 1. Of course, in other embodiments, the control unit may perform more control on the PA1, for example, the gain value of the PA1 may be adjusted, and this is not specifically limited in this embodiment of the application.
The output terminal of the first impedance transformation circuit is used as the output terminal of the first amplification path, is connected with the input terminal of the second impedance transformation circuit, and is used for adjusting the load impedance of the PA1 so as to perform output matching on the PA 1. The following cases one and two are described for the reason and procedure that the first impedance transformation circuit needs to adjust the load impedance of the PA1, and are not described in detail here.
In some embodiments, the first impedance transformation circuit may be implemented by a quarter-wavelength transmission line, such as a quarter-wavelength microstrip line, in which case the first impedance transformation circuit adjusts the load impedance of the PA1 in a passive manner, without being driven by a control unit, and is simple to implement. It should be noted that the impedance of a quarter-wave transmission line is usually the square root of the product of the impedances matched at its two ends.
In other embodiments, the first impedance transformation circuit may also be implemented by a structure similar to the first input matching tuning network, in which case the way in which the first impedance transformation circuit modulates the load impedance of the PA1 is an active adjustment, so that the first impedance transformation circuit is further connected to the control unit, and the load impedance of the PA1 may be adjusted under a control instruction of the control unit (indicated by a dashed line with an arrow connected to the first impedance transformation circuit in the figure).
In other embodiments, the first impedance transformation circuit may also be a passive matching tuning circuit built for a capacitor, an inductor, and the like, and may realize the same function as a quarter-wavelength transmission line without active adjustment.
It should be noted that, since the first impedance transformation circuit can operate in an active or passive manner, the control command of the control unit is illustrated by a dotted line with an arrow in the figure.
The second amplification path includes a second input matching tuning network, a phase compensation circuit, and a PA2 (i.e., a second power amplifier), and the second input matching tuning network, the phase compensation circuit, and the PA2 are connected in series. In other embodiments, the positions of the second input matching tuning network and the phase compensation circuit may be exchanged, which is not specifically limited in this embodiment of the present application.
And the input end of the second input matching tuning network is used as the input end of the second amplification path and is connected with the second peripheral port b of the first switch module. The second input matching tuning network is also connected to the control unit, and the input impedance of the PA2 can be adjusted under the control instruction of the control unit (indicated by a solid line with an arrow connected to the second input matching tuning network in the figure), so as to perform input matching on the second power amplifier. It should be noted that, for the specific implementation of the second input matching tuning network, reference may be made to the first input matching tuning network, and details are not described here.
In addition, the reason and process that the second input matching tuning network needs to adjust the input impedance of PA2 is explained in the following cases one and two, and will not be described in detail here.
The phase compensation circuit is used for compensating the phase difference of the first amplification path and the second amplification path. It should be noted that when the components on the first amplification path and the second amplification path are different, there will be a phase difference.
It should be understood that when there is a phase difference between the first amplification path and the second amplification path, the rf signal output by the first amplification path and the rf signal output by the second amplification path may cancel each other instead of overlapping when combined at the combining point X, thereby causing loss of the rf signal and reducing the rf performance. As can be seen from fig. 4, the first amplification path is more than the second amplification path by the first impedance transformation circuit. The first impedance transformation circuit will cause a phase difference to exist between the first amplification path and the second amplification path. Based on this, the phase parameter to be compensated by the phase compensation circuit can be set according to the phase difference caused by the first impedance transformation circuit.
The PA2 is connected to the control unit, and can amplify a radio frequency signal in response to a control instruction from the control unit (a solid line with an arrow in the figure connected to the PA 2). It should be noted that, the control function of the control unit on the PA2 and the specific implementation of the PA2 may refer to the PA1, which are not described herein again.
The input end of the second impedance transformation circuit is connected with the output end of the first amplification path, the output end of the second impedance transformation circuit is connected with the radio frequency output end RF _ out1, and the second impedance transformation circuit is used for performing output matching on the first amplification path. The second impedance transformation circuit may be implemented by referring to a specific implementation of the first impedance transformation circuit, which is not specifically limited in this embodiment of the application.
The power amplifier circuit shown in fig. 4 has two operation modes, a single transmission mode and a dual transmission mode. The single-transmitting mode is used for amplifying a single-transmitting signal so as to support a single-transmitting function; the dual transmit mode is used to amplify the dual transmit signal to support the dual transmit function. The power amplification circuit shown in fig. 4 can be switched between a single transmission mode and a dual transmission mode by adjusting the connection relationship between each component and the port and controlling the bias states of the PA1 and the PA 2. The following describes how the power amplifier circuit switches between the single transmission mode and the dual transmission mode by taking the single transmission signal as the first signal and the dual transmission signal as the second signal and the third signal, respectively, as an example, and the operation process in each operation mode is described.
Specifically, referring to fig. 7, when the control unit detects that it is necessary to switch to the single transmission mode to implement single transmission of the first signal, the control unit issues a control command to connect the radio frequency input terminal RF _ in1 to the input terminal of the first amplification path and the input terminal of the second amplification path, respectively; the output end of the second amplification passage is communicated to the output end of the first amplification passage; PA1 operates in a first bias state (e.g., Class AB state) and PA2 operates in a second bias state (e.g., Class C state). Wherein the turn-on voltage of the PA2 in the second bias state is higher than the turn-on voltage of the PA1 in the first bias state. At this time, the power amplifying circuit forms a Doherty power amplifier, the PA1 forms a main PA of the Doherty power amplifier, and the PA2 forms an auxiliary PA of the Doherty power amplifier. In this case, the power amplification circuit operates in a single transmission mode. In the single transmission mode, the radio frequency input terminal RF _ in1 is used for receiving a first signal; the amplifying circuit is used for amplifying the first signal; the RF output terminal RF _ out1 is used for outputting the amplified first signal. The process of amplifying the first signal by the amplifying circuit will be described below with reference to the operating principle of the Doherty power amplifier.
First, the Doherty power amplifier adopts an active load pulling technique, that is, the load of the main PA changes with the input voltage of the input signal (in this embodiment, the input signal is the first signal). The Doherty power amplifier approximately works in three stages by dividing the input voltage of the first signal: small signal phase, medium signal phase and large signal phase.
A small signal stage:
as can be seen from the above, the PA1 operating under the first bias condition has a lower turn-on voltage, and the PA2 operating under the second bias condition has a higher turn-on voltage. As can be seen from the foregoing, the power amplifier can be turned on only when the input voltage of the rf signal is greater than the turn-on voltage of the power amplifier.
Based on this, when the input voltage of the first signal is greater than the turn-on voltage of the main PA but less than the turn-on voltage of the auxiliary PA (i.e., a preset threshold value, and a state in which the input voltage of the first signal is less than the preset threshold value is subsequently referred to as a second state), the first signal may turn on the main PA but not enough to operate the auxiliary PA. Therefore, the auxiliary PA is in a cut-off state, an open circuit state is presented, and the impedance is infinite. In this case, the second amplification path is not actually connected to the first amplification path, and therefore the second amplification path is not merged into the output of the first amplification path, forming a load for the output of the first amplification path.
At this time, the load impedance of the first amplification path is minimum, the load of the equivalent load of the main PA at this time is also minimum originally, the load of the main PA is changed to be maximum by the first impedance circuit (R is changed to 2R, R is the impedance of the first impedance circuit), and the load voltage is raised to be maximum, so that the main PA enters a pre-saturation state in advance and is in a maximum efficiency state.
And (II) signal phase:
when the input voltage of the first signal is gradually increased, and when the input voltage of the first signal is greater than the start voltage of the auxiliary PA (i.e., a preset threshold, and a state in which the input voltage of the first signal is greater than the preset threshold is subsequently referred to as a first state), the auxiliary PA is gradually started, the load of the auxiliary PA is also gradually reduced (the state is changed from infinity in an open-circuit state to R), the current is gradually increased, and an active modulation effect occurs. The second amplification path is equivalent to an impedance incorporated at the output end of the main PA, the load impedance of the first amplification path gradually increases with the decrease of the load of the auxiliary PA, the equivalent load of the main PA originally increases, but due to the existence of the first impedance circuit, the equivalent load of the main PA gradually decreases with the decrease of the load of the auxiliary PA (decreases from 2R to R but does not reach R), and the output voltage of the main PA is kept in a pre-saturation state under the control of the auxiliary PA, so that high efficiency is continuously kept.
It should be noted that even if the output voltage of the main PA is constant (the output voltage is saturated and stable in the pre-saturation state), the output power of the main PA continues to increase due to the decrease of the load (the current flowing through the load increases due to the decrease of the load). Thus, the Doherty power amplifier is converted from the maximum efficiency state to the maximum output power state, and the efficiency of the main PA is basically kept unchanged.
(III) large signal stage:
with the gradual increase of the first signal, the load of the auxiliary PA is smaller and smaller, the load of the main PA is also reduced continuously due to the reduction of the auxiliary PA, the currents of the main PA and the auxiliary PA are increased, the output voltage of the main PA is unchanged, and high efficiency is still kept.
As the input voltage of the first signal continues to increase (greater than the turn-on voltage of the auxiliary PA), the auxiliary PA will turn on fully. And with the continuous increase of the input voltage of the first signal, when the auxiliary PA reaches saturation, the main PA and the auxiliary PA both reach saturation, the currents of the main PA and the auxiliary PA both reach maximum values, and the load is reduced to minimum (at this time, the loads are both R and no longer have a restraining function). Under the condition, the main PA and the auxiliary PA reach the maximum output power, at the moment, the output power of the Doherty power amplifier is synthesized by the maximum output power of the main PA and the maximum output power of the auxiliary PA at a combining point X, and the Doherty power amplifier works in the maximum output power state.
It should be noted that, in some embodiments, a state in which the input voltage of the first signal is equal to the turn-on voltage of the auxiliary PA (i.e., the input voltage of the first signal is equal to the preset threshold) may be regarded as the first state. In other embodiments, a state in which the input voltage of the first signal is equal to the turn-on voltage of the auxiliary PA (i.e., the input voltage of the first signal is equal to the preset threshold) may also be regarded as the first state.
Based on the analysis of the working process of the Doherty power amplifier, when the first signal is amplified, the amplifying circuit uses different PAs to realize high-efficiency output or high-power output along with the change of the input voltage of the first signal.
Specifically, the amplifying circuit is configured to operate in a maximum efficiency state by amplifying the first signal through the PA1 when the first signal is in the second state, so as to achieve high efficiency output, that is, when the input voltage of the first signal is small, only the PA1 of the two PAs is turned on to participate in amplification in the power amplifying circuit shown in fig. 4. The efficiency of using a single PA in fig. 4 is higher compared to the scheme of the power amplification circuit shown in fig. 2, which still uses two PAs to synthesize the same output power when the input voltage of the first signal is small.
For example, assuming that the maximum output power of the PA1 and the PA2 in fig. 2 and fig. 4 are both 200mW, the turn-on voltage of the PA1 and the PA2 is 0.5V, and both fig. 2 and fig. 4 receive the rf signal with the input voltage of 0.1V, and the rf signal with the output power of 200mW is required to be output, in the power amplifying circuit shown in fig. 4, the output power of the PA1 is required to be 200 mW; in the power amplifier circuit shown in fig. 2, the PA1 and the PA2 in fig. 2 are both required to be 100mW, so that the PA1 and the PA2 are combined to realize an output of 200mW, and obviously, the power amplifier circuit shown in fig. 4 is more efficient.
In addition, the amplifying circuit is further configured to amplify the first signal through the PA1 and the PA2 when the first signal is in the first state, so as to operate in a state with higher output power, and with the increase of the input voltage of the first signal, even operate in a maximum output power state, so as to achieve high power output, that is, when the first signal is larger, the PA1 and the PA2 are both turned on to participate in amplification, and at this time, the output power of the power amplifying circuit shown in fig. 4 is a superposition of the output power of the PA1 and the output power of the PA 2. And, as the input voltage of the first signal increases, the output power of the PA1 and the PA2 will increase accordingly, even reaching the maximum output power, and when the PA1 and the PA2 output the maximum output power, the power amplification circuit shown in fig. 4 also outputs the maximum output power, thereby operating in the maximum output power state. It can be seen that the power amplification circuit shown in fig. 4 is equivalent to superimposing the limited maximum output power of each PA, so that the maximum output power of the power amplification circuit is greatly improved compared with that of a single PA. This is similar to the scheme of figure 2.
For example, assuming that the maximum output power of each of PA1 and PA2 in fig. 4 is 200mW, the turn-on voltage of PA1 and PA2 is 0.5V, and each of fig. 2 and fig. 4 receives a radio frequency signal with an input voltage of 0.7V and requires a radio frequency signal with an output power of 400mW, in the power amplification circuit shown in fig. 4, when each of PA1 and PA2 operates in the maximum output power state (i.e., each outputs 200 mW), 400mW output can be achieved through PA1 and PA2 synthesis. However, the maximum output power of a single PA is 200mW, and the output of a radio frequency signal of 400mW cannot be realized.
It should be noted that the PA1 and the PA2 have different bias states and different turn-on voltages, and thus have different input voltages of the corresponding first signals when they are not turned on (operating at the maximum efficiency state), start to turn on (operating at the state of increasing output power), fully turn on (operating at the state of increasing output power), and saturation (operating at the maximum output power state). In other words, by adjusting the bias states of PA1 and PA2, the magnitude of the input voltage of the amplified first signal when PA1 and PA2 operate in the maximum efficiency state or the maximum output power state can be adjusted.
For example, the input voltage corresponding to the first signal with the output power of a small power level is small. If the PA2 is in the non-on state by adjusting the bias states of the PA1 and the PA2 so that the input voltage of the first signal with the small power level is greater than the on voltage of the PA1 and less than the on voltage of the PA2, the power amplification circuit shown in fig. 4 can output the first signal with the small power level in the maximum efficiency state. Based on this, when the power amplification circuit shown in fig. 4 is used for single transmission, the output of the radio frequency signal with a low power level can be realized, and the high efficiency requirement of the back-off power section during single transmission is met.
For another example, the first signal with high output power level corresponds to a large input voltage. If the input voltage of the first signal with high power level is greater than the on-state voltage of the PA2 and the PA2 can be brought into saturation by adjusting the bias states of the PA1 and the PA2, the power amplifying circuit shown in fig. 4 can output the first signal with high power level in the maximum output power state. Based on this, when the power amplification circuit shown in fig. 4 is used for single transmission, the output of a radio frequency signal with a high power level can be realized, and the requirement of high output power during single transmission is met.
In the specific implementation process, taking the high power level as PC2 and the low power level as PC3 as an example, the first bias state may be a Class AB state; the second bias state may be a Class C state. In this case, the power amplifying circuit shown in fig. 4 will output the rf signal of the PC3 in the maximum efficiency state and the rf signal of the PC2 in the maximum output power state.
In other embodiments, the first bias state may be another bias state, and the second bias state may also be another bias state. Illustratively, the first bias state is a Class a state and the second bias state is a Class B state; or the first bias state is a Class AB state, and the second bias state is a Class B state; or the first bias state is a Class B state, and the second bias state is a Class C state, which is not specifically limited in this embodiment.
The above description explains how the power amplification circuit switches to the single transmission mode and operates in the single transmission mode. The following describes how the power amplifier circuit is switched to the dual transmission mode and operates in the dual transmission mode.
Specifically, referring to fig. 8, when the control unit detects that it needs to switch to the dual transmission mode to realize dual transmission of the second signal and the third signal, the control unit issues a control instruction (solid line with arrow in the figure) to connect the RF input terminal RF _ in1 to the input terminal of the first amplification path, connect the RF input terminal RF _ in2 to the input terminal of the second amplification path, and connect the output terminal of the second amplification path to the RF output terminal RF _ out 2; both PA1 and PA2 operate in a first bias state (e.g., Class AB state). In this case, the power amplifying circuit operates in the dual transmission mode. In the dual transmission mode, the RF input terminal RF _ in1 is used for receiving a second signal; the radio frequency input terminal RF _ in2 is used for receiving a third signal; the first amplification power device is used for amplifying the second signal; the second amplification power device is used for amplifying the third signal; the RF output terminal RF _ out1 is for outputting the amplified second signal, and the RF output terminal RF _ out2 is for outputting the amplified third signal.
It can be seen that in the dual transmit mode, the output of the second amplification path is connected to the RF output RF _ out2, and the first amplification path is no longer connected, and the first amplification path and the second amplification path belong to completely independent paths, each of which is used independently for amplification of the second signal and the third signal.
It should be noted that the dual-transmitted second signal and the third signal belong to radio frequency signals with small power levels. It can be seen that in the dual transmission mode, when the output of the second signal of a small power level is realized, the amplification is realized only by the PA1 of the first amplification path in the first bias state. In the single transmission mode, when the first signal with low power level is realized, the PA2 is not turned on, and the second amplification path is equivalent to the first amplification path which is not accessed, that is, in the single transmission mode, when the first signal with low power level is realized, the amplification is realized only by the PA1 of the first amplification path in the first bias state. That is, the transmission of the radio frequency signal of a low power level in the dual transmission mode and the transmission of the radio frequency signal of a single transmission mode are completely the same, so that the power amplification circuit shown in fig. 4 can naturally achieve the same high efficiency performance of the back-off power segment in the single transmission when amplifying the second signal of the dual transmission signal.
In addition, in the dual transmission mode, the bias state of the PA2 is switched from the second bias state in the single transmission mode to the first bias state, for realizing the output of the third signal of a small power level. As can be seen from the content of the single transmission mode, the PA in the first bias state has a lower turn-on voltage. Based on this, in the dual transmission mode, when the output of the third signal of the low power level is realized, the input voltage of the third signal of the low power level may turn on the PA2 of the second amplification path in the first bias state to realize the amplification. Further, since only one PA2 participates in amplification in outputting the third signal with a small power level, high efficiency can be achieved.
In summary, in the power amplification circuit shown in fig. 4, by the channel switching function of the first channel configuration unit 1 and the second channel configuration unit 2, the second amplification path can be connected to the first amplification path to implement high power output in the single transmission mode, and the second amplification path can also be disconnected from the first amplification path to implement high efficiency output of the backoff power stage in the single transmission mode and high efficiency output in the dual transmission mode. That is to say, in the power amplification circuit shown in fig. 4, multiplexing of the second amplification path in the single transmission mode and the dual transmission mode is realized through the channel switching function of the first channel configuration unit 1 and the second channel configuration unit 2, and compared with the power amplification circuit shown in fig. 2 and fig. 3, the integration level is higher, and the PA3 is saved, so that the area of the power amplification circuit can be reduced, and the cost can be reduced.
It should be noted that, in the embodiment shown in fig. 4, in the single transmission mode, the second amplification path is only needed to participate when the first signal is in the first state, and the second amplification path is not needed to participate when the first signal is in the second state. Based on this, in other embodiments, when the control unit detects that it needs to switch to the single transmission mode to implement single transmission of the first signal, referring to fig. 9, the control unit may issue a control instruction when the first signal is in the second state, so that the radio frequency input terminal RF _ in1 is connected to the input terminal of the first amplification path, and the PA1 operates in the first bias state. Since the second amplification path is not required, the input of the second amplification path may not be connected to the radio frequency input RF _ in 1. At this time, the second amplification path may be connected to the RF input terminal RF _ in2 (not shown) or floating (shown). In this case, the PA2 is in any bias state and has no effect on the first signal. When the first signal is in the first state, referring to fig. 7, the control unit only issues a control command to connect the RF input terminal RF _ in1 to the input terminal of the first amplifying path and the input terminal of the second amplifying path, respectively; the output end of the second amplification passage is communicated to the output end of the first amplification passage; the PA1 operates in a first bias state and the PA2 operates in a second bias state.
In addition, the embodiment shown in fig. 4 has been explained by taking an example in which the power amplification circuit includes a control unit. In other embodiments, the power amplification circuit may not include a control unit. Alternatively, the control unit may be integrated in the RFIC shown in fig. 1.
When the power amplifier circuit shown in fig. 4 is connected to fig. 1, the RF input terminal RF _ in1, the RF input terminal RF _ in2, the RF output terminal RF _ out1, and the RF output terminal RF _ out2 all need to be connected to each other through transmission lines. In order to avoid the reflection phenomenon caused by impedance mismatch, the power amplifier circuit shown in fig. 4 needs to be input-matched and output-matched, so that the RF input terminal RF _ in1, the RF input terminal RF _ in2, the RF output terminal RF _ out1 and the RF output terminal RF _ out2 reach the impedance of the transmission line used. The transmission line used for connection is usually 50 Ω, and based on this, the impedance of the transmission line is described below as 50 Ω.
It should be understood that as the amplified rf signal changes, the second amplification path in the power amplification circuit shown in fig. 4 will be connected or not connected to the first amplification path, resulting in changes in the input impedance and load impedance of the PA1 and PA2 shown in fig. 4, and therefore the PA1 and PA2 need to adjust the input impedance and load impedance to achieve input matching and output matching. The following is discussed in cases:
the first condition is as follows: the second amplification path is connected to the first amplification path.
Specifically, in the single transmission mode, when the PA1 performs amplification of the first signal in the first state (i.e., the PA1 operates in the first operating state), and the PA2 also performs amplification of the first signal in the first state (i.e., the PA2 operates in the third operating state), the second amplification path switches into the first amplification path.
At this time, the impedances of the RF input terminal RF _ in1 and the RF output terminal RF _ out1 are determined by the input impedances of PA1 and PA 2. To match the radio frequency input RF _ in1 to 50 Ω, the first input matching tuning network may be adjusted to match the input impedance of PA1 to a first impedance greater than 50 Ω (e.g., 100 Ω), and the second input matching tuning network may be adjusted to match the input impedance of PA2 to a second impedance greater than 50 Ω (e.g., 100 Ω). In this case, the first impedance (e.g., 100 Ω) and the second impedance (e.g., 100 Ω) are connected in parallel to be 50 Ω, so that the RF input terminal RF _ in1 is matched to be 50 Ω. To match the RF output RF _ out1 to 50 Ω, the first impedance transformation circuit (e.g., a quarter-wavelength transmission line with an impedance R =50 Ω, 100 Ω may be adjusted to 25 Ω, and 50 Ω may be adjusted to 50 Ω) may match the load impedance of PA1 from a third impedance (e.g., 50 Ω) to a fourth impedance (e.g., 50 Ω), and the load impedance of PA2 is 50 Ω. In this case, the third impedance (e.g., 50 Ω) is connected in parallel with the 50 Ω to form a fifth impedance (e.g., 25 Ω) smaller than 50 Ω, and the second impedance transformation circuit (e.g., a quarter-wavelength transmission line of 37.5 Ω, and 25 Ω can be adjusted to 50 Ω) can match the impedance of the combining point X (i.e., the output end of the first amplification path) from the fifth impedance (e.g., 25 Ω) to 50 Ω, thereby matching the RF output RF _ out1 to 50 Ω.
Case two: the second amplification path is not connected to the first amplification path.
Specifically, in the single transmission mode, when the PA1 performs amplification of the first signal in the second state (i.e., the PA1 operates in the second operating state), or, in the dual transmission mode, when the PA1 performs amplification of the second signal (i.e., the PA1 is in the second operating state), and the PA2 performs amplification of the third signal (i.e., the PA2 is in the fourth operating state), the second amplification path does not switch into the first amplification path.
At this time, the impedances of the RF input terminal RF _ in1 and the RF output terminal RF _ out1 are determined by the first amplification path, and the impedances of the RF input terminal RF _ in2 and the RF output terminal RF _ out2 are determined by the second amplification path. Based on this, to match the radio frequency input RF _ in1 to 50 Ω, the first input matching tuning network may be adjusted to match the input impedance of the PA1 to 50 Ω, thereby matching the radio frequency input RF _ in1 to 50 Ω; and adjusts the second input matching tuning network to match the input impedance of PA2 to 50 Ω, thereby matching the radio frequency input RF _ in2 to 50 Ω. To match the RF output RF _ out1 to 50 Ω, the first impedance transformation circuit (e.g., a quarter-wavelength transmission line with R =50 Ω, 100 Ω may be adjusted to 25 Ω, and 50 Ω may be adjusted to 50 Ω) may directly match the load impedance of the PA1 from the sixth impedance (e.g., 100 Ω) to the fifth impedance (e.g., 25 Ω), and the second impedance transformation circuit may match the impedance of the combining point X from the fifth impedance (e.g., 25 Ω) to 50 Ω, thereby matching the RF output RF _ out1 to 50 Ω. The output impedance of the PA2 is 50 Ω, and the RF output RF out2 can be matched to 50 Ω without matching.
It can be seen that, in the power amplifying circuit shown in fig. 4, in both the first case and the second case, the fifth impedance of the combining point X is smaller than 50 Ω, and therefore, in order to match the RF output terminal RF _ out1 to 50 Ω, the second impedance transformation circuit is further required to match the load impedance of the combining point X to 50 Ω. It should be understood that in other embodiments, if the fifth impedance of the combining point X in the first and second cases can be directly matched to 50 Ω, the second impedance transformation circuit can be omitted, thereby reducing the loss of the first amplification path. Based on this, the embodiment of the present application also provides a power amplification circuit shown in fig. 10.
Referring to fig. 10, fig. 10 is a fourth schematic structural diagram of a power amplifier circuit according to another embodiment of the present application. In contrast to fig. 4, the power amplification circuit shown in fig. 10 no longer includes the second impedance transformation circuit. Instead, the power amplification circuit comprises a third impedance transformation circuit, the input of which is connected to the output of the second amplification path via the second channel configuration unit 2, and the output of which is connected to the radio frequency output RF _ out 2.
In the first case, the first impedance transformation circuit (e.g., a quarter-wavelength transmission line with an impedance R =100 Ω, which may be adjusted to 100 Ω, and 200 Ω to 50 Ω) may match the load impedance of the PA1 from the third impedance (e.g., 100 Ω) to the fourth impedance (e.g., 100 Ω), and the load impedance of the PA2 is the seventh impedance (e.g., 100 Ω) higher than 50 Ω. In this case, the third impedance (e.g., 100 Ω) and the seventh impedance (e.g., 100 Ω) are connected in parallel such that the load impedance of the combining point X is matched to 50 Ω, thereby matching the radio frequency output RF _ out1 to 50 Ω.
In the second case, in order to match the RF output terminal RF _ out1 to 50 Ω, the first impedance transformation circuit (e.g., a quarter-wavelength transmission line with R =100 Ω, 100 Ω may be adjusted to 100 Ω, and 200 Ω may be adjusted to 25 Ω) may directly match the load impedance of the PA1 to 50 Ω from the sixth impedance (e.g., 200 Ω), and at this time, the impedance of the combining point X is also matched to 50 Ω, so as to match the RF output terminal RF _ out1 to 50 Ω. And the third impedance transformation circuit (e.g., a quarter-wavelength transmission line of 70.7 Ω, which can adjust 100 Ω to 50 Ω) can match the load impedance of PA2 from a seventh impedance (e.g., 100 Ω) to 50 Ω, thereby matching the RF output RF _ out2 to 50 Ω.
It can be seen that in the power amplification circuit shown in fig. 10, in order to match the impedance of the combining point X to 50 Ω and to omit the second impedance transformation circuit, the load impedance of the PA2 should be greater than 50 Ω. Therefore, in order to perform output matching on the PA2 and reduce the reflection phenomenon of the third signal during amplification, a third impedance transformation circuit is added to adjust the load impedance of the PA 2.
In the embodiment shown in fig. 10, the third impedance transformation circuit is exemplified as a quarter transmission line. In other embodiments, the third impedance transformation circuit may also be an active matching tuning network similar to the first input matching adjustment network, and may also be a passive matching tuning circuit built up by a capacitor, an inductor, and other devices.
In addition, in the embodiments of fig. 4 and 10, when the first signal is in the second state, the first impedance transformation circuit increases the load impedance of the PA1, so as to improve the efficiency of the power amplification circuit in the back-off power band. It should be noted that, in other embodiments, by designing the PA1 (for example, integrating the first impedance transformation circuit inside the PA 1), the PA1 may be in a high-efficiency state when its load impedance is small, and in a high-output state when its load impedance is large.
Based on this, the first impedance transformation circuit can also be omitted on the basis of the embodiments of fig. 4 and 10. In this way, when the input voltage of the first signal is small and is in the second state, the second amplification path is not incorporated as a load into the first amplification path, and the load impedance of the PA1 is minimized, so that a state of high efficiency is achieved. When the second amplification path is merged into the first amplification path as a load in the first state as the input voltage of the first signal increases, the load impedance of the PA1 gradually becomes larger, and the state of high output power is achieved.
In this case, since the first amplification path does not have the first impedance transformation circuit before the combining point X, the phase difference between the second amplification path and the first amplification path will be changed. Based on this, the phase compensation circuit needs to be adjusted. For example, in the power amplifying circuits shown in fig. 4 and 10, the phase parameter compensated by the phase compensation circuit needs to be adjusted.
It should be noted that, in the electronic device shown in fig. 1, the antenna, the rf front-end circuit, and the rf chip are independent and can be manufactured and sold separately.
Based on this, an embodiment of the present application further provides an rf front-end circuit, which includes the power amplification circuit shown in fig. 2 to 10, and is configured to amplify an rf signal.
In addition, an embodiment of the present application further provides a signal amplification method, which is applied to the power amplification circuit in fig. 4 or fig. 10, where the signal amplification method includes:
when single transmission of a first signal is carried out, the power amplification circuit is controlled to work in a single transmission mode; in a single transmitting mode, the power amplifying circuit forms a Doherty power amplifier; when the first signal is in a first state, amplifying the first signal through a first power amplifier and a second power amplifier; when the first signal is in a second state, amplifying the first signal through a first power amplifier; the first state is a state that the first signal enables the second power amplifier to be started; the second state is a state in which the first signal leaves the second power amplifier non-turned on.
When the second signal and the third signal are transmitted in a double mode, the power amplification circuit is controlled to work in the double transmission mode; in the dual transmission mode, the first power amplifier amplifies the second signal, and the second power amplifier amplifies the third signal.
In the above embodiments, the terms "first", "second", and the like are only used for distinguishing different objects, and are not used for describing a specific order, and are not understood to indicate or imply relative importance or to implicitly indicate the number of indicated technical features. Thus, a feature defined as "first," "second," etc. may explicitly or implicitly include one or more of that feature.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of such elements in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein can be combined with other embodiments.
The above description is only an embodiment of the present application, but the scope of the present application is not limited thereto, and any changes or substitutions within the technical scope disclosed in the present application should be covered within the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (14)

1. A power amplification circuit, wherein the power amplification circuit has a single transmit mode and a dual transmit mode; the single transmission mode is configured to amplify a single transmission signal, the dual transmission mode is configured to amplify a dual transmission signal, the single transmission signal is a first signal, the dual transmission signal is a second signal and a third signal, and the power amplification circuit includes:
a first radio frequency input and a second radio frequency input;
a first radio frequency output terminal and a second radio frequency output terminal;
an amplification circuit comprising a first amplification path and a second amplification path; a first power amplifier is arranged on the first amplification path, and a second power amplifier is arranged on the second amplification path;
in the single transmission mode, the input end of the first amplification path and the input end of the second amplification path are both connected with the first radio frequency input end, the output end of the first amplification path and the output end of the second amplification path are both connected with the first radio frequency output end, and the power amplification circuit forms a Doherty power amplifier; the first radio frequency input end is used for receiving the first signal; the amplifying circuit is used for amplifying the first signal through the first power amplifier and the second power amplifier when the first signal is in a first state; the amplifying circuit is further used for amplifying the first signal through the first power amplifier when the first signal is in a second state; the first radio frequency output end is used for outputting the amplified first signal; wherein, the first signal is in a first state: the input voltage of the first signal is greater than a preset threshold value; the first signal is in a second state: the input voltage of the first signal is smaller than the preset threshold value;
in the dual emission mode, an input end of the first amplification path is connected to the first radio frequency input end, an input end of the second amplification path is connected to the second radio frequency input end, an output end of the first amplification path is connected to the first radio frequency output end, and an output end of the second amplification path is connected to the second radio frequency output end; the first radio frequency input end is used for receiving the second signal, the second radio frequency input end is used for receiving the third signal, the first power amplifier is used for amplifying the second signal, the second power amplifier is used for amplifying the third signal, the first radio frequency output end is used for outputting the amplified second signal, and the second radio frequency output end is used for outputting the amplified third signal.
2. The power amplification circuit of claim 1,
in the single transmission mode, the first power amplifier operates in a first bias state, and the second power amplifier operates in a second bias state; the turn-on voltage of the second power amplifier in the second bias state is higher than the turn-on voltage of the first power amplifier in the first bias state; the preset threshold is the starting voltage of the second power amplifier;
in the dual transmit mode, the first power amplifier and the second power amplifier both operate at the first bias state.
3. The power amplification circuit of claim 2, wherein the amplification circuit further comprises:
a first channel configuration unit, connected to the first rf input terminal, the second rf input terminal, the input terminal of the first amplification path, and the input terminal of the second amplification path, respectively;
the second channel configuration unit is respectively connected with the output end of the second amplification access, the output end of the first amplification access and the second radio frequency output end;
in the single transmission mode, the first channel configuration unit is configured to connect the first radio frequency input end to an input end of the first amplification path and an input end of the second amplification path, respectively; the second channel configuration unit is used for communicating the output end of the second amplification passage to the output end of the first amplification passage;
in the dual emission mode, the first channel configuration unit is further configured to communicate the first radio frequency input terminal to an input terminal of the first amplification path, and communicate the second radio frequency input terminal to an input terminal of the second amplification path; the second channel configuration unit is further configured to communicate an output end of the second amplification channel to the second radio frequency output end.
4. The power amplification circuit of claim 1,
in the single transmission mode, when the first signal is in the first state, an input end of the first amplification path, an input end of the second amplification path, and the first radio frequency input end are connected, an output end of the first amplification path, an output end of the second amplification path, and the first radio frequency output end are connected, the first power amplifier operates in a first bias state, and the second power amplifier operates in a second bias state; the turn-on voltage of the second power amplifier in the second bias state is higher than the turn-on voltage of the first power amplifier in the first bias state; the preset threshold is the starting voltage of the second power amplifier; when the first signal is in the second state, an input end of the first amplification path is connected with the first radio frequency input end, an input end of the second amplification path is not connected with the first radio frequency input end, an output end of the first amplification path is connected with the first radio frequency output end, an output end of the second amplification path is not connected with an output end of the first amplification path, and the first power amplifier operates in the first bias state;
in the dual emission mode, an input end of the first amplification path is connected to the first radio frequency input end, an input end of the second amplification path is connected to the second radio frequency input end, an output end of the first amplification path is connected to the first radio frequency output end, and an output end of the second amplification path is connected to the second radio frequency output end; the first power amplifier and the second power amplifier are both operated in the first bias state.
5. The power amplification circuit of claim 4, wherein the amplification circuit further comprises:
a first channel configuration unit, connected to the first rf input terminal, the second rf input terminal, the input terminal of the first amplification path, and the input terminal of the second amplification path, respectively;
the second channel configuration unit is respectively connected with the output end of the second amplification channel, the output end of the first amplification channel and the second radio frequency output end;
in the single transmission mode, the first channel configuration unit is configured to communicate the first radio frequency input end to the input end of the first amplification path and the input end of the second amplification path respectively when the first signal satisfies the first state; the second channel configuration unit is used for communicating the output end of the second amplification passage to the output end of the first amplification passage when the first signal meets the first state; the first channel configuration unit is further configured to communicate the first radio frequency input to the input of the first amplification path, and not communicate the first radio frequency input to the input of the second amplification path, when the first signal satisfies the second state; the second channel configuration unit is used for not communicating the output end of the second amplification passage to the output end of the first amplification passage when the first signal meets the second state;
in the dual emission mode, the first channel configuration unit is further configured to communicate the first radio frequency input terminal to an input terminal of the first amplification path, and communicate the second radio frequency input terminal to an input terminal of the second amplification path; the second channel configuration unit is further configured to communicate an output end of the second amplification channel to the second radio frequency output end.
6. The power amplification circuit of claim 3 or 5, wherein the first channel configuration unit is a first switch module;
the first switch module comprises an inner periphery port side and an outer periphery port side; the inner peripheral port side of the first switch module comprises a first inner peripheral port and a second inner peripheral port, and the outer peripheral port side of the first switch module comprises a first outer peripheral port and a second outer peripheral port;
a first inner-periphery port of the first switch module is connected with the first radio-frequency input end; a second inner-periphery port of the first switch module is connected with the second radio-frequency input end;
a first peripheral port of the first switch module is connected with an input end of the first amplification path; and the second peripheral port of the first switch module is connected with the input end of the second amplification path.
7. The power amplification circuit of claim 3 or 5, wherein the second channel configuration unit is a second switch module;
the second switch module comprises an inner periphery port side and an outer periphery port side; the inner peripheral port side of the second switch module comprises a first inner peripheral port, and the outer peripheral port side of the second switch module comprises a first outer peripheral port and a second outer peripheral port;
the first inner peripheral port of the second switch module is connected with the output end of the second amplification path; a first peripheral port of the second switch module is connected with the output end of the first amplification path; and a second peripheral port of the second switch module is connected with the second radio frequency output end.
8. The power amplification circuit of claim 7, wherein the first amplification path further comprises:
a first input match tuning network, an input of the first input match tuning network being an input of the first amplification path; the output end of the first input matching tuning network is connected with the input end of the first power amplifier; the first input matching tuning network is used for adjusting the input impedance of the first power amplifier when the first power amplifier is switched between a first working state and a second working state so as to carry out input matching on the first power amplifier; wherein the first power amplifier is in the first operating state when the first power amplifier performs amplification of the first signal in the first state; when the first power amplifier performs amplification of the first signal in the second state, or when the first power amplifier performs amplification of the second signal, the first power amplifier is in the second operating state;
the input end of the first impedance transformation circuit is connected with the output end of the first power amplifier, and the output end of the first impedance transformation circuit is the output end of the first amplification path; the first impedance transformation circuit is used for adjusting the load impedance of the first power amplifier when the first power amplifier is switched between the first working state and the second working state so as to perform output matching on the first power amplifier; the first impedance transformation circuit is used for adjusting the load impedance of the first power amplifier to be high when the first power amplifier is switched from the first working state to the second working state.
9. The power amplification circuit of claim 8, wherein the second amplification path further comprises:
a second input matching tuning network, an input end of the second input matching tuning network being an input end of the second amplification path; the second input matching tuning network is used for adjusting the input impedance of the second power amplifier when the second power amplifier is switched between a third working state and a fourth working state so as to carry out input matching on the second power amplifier; wherein the second power amplifier is in the third operating state when the second power amplifier performs amplification of the first signal in the first state; when the second power amplifier performs amplification of the third signal, the second power amplifier is in the fourth operating state;
the input end of the phase compensation circuit is connected with the output end of the second input matching tuning network; the output end of the phase compensation circuit is connected with the input end of the second power amplifier; the output end of the second power amplifier is the output end of the second amplification path; the phase compensation circuit is used for compensating the phase difference of the first amplification path and the second amplification path.
10. A power amplifying circuit according to claim 3 or 5, wherein said amplifying circuit further comprises a second impedance transformation circuit;
the output end of the first amplification path is connected with the input end of the second impedance transformation circuit, and the output end of the second impedance transformation circuit is connected with the first radio frequency output end;
the second impedance transformation circuit is used for carrying out output matching on the first amplification path.
11. The power amplification circuit of claim 3 or claim 5, wherein the first bias state is a Class AB state and the second bias state is a Class C state.
12. A radio frequency front end circuit comprising the power amplification circuit of any one of claims 1 to 11.
13. An electronic device, comprising:
a baseband processor;
the radio frequency chip is connected with the baseband processor;
the rf front-end circuit of claim 12, connected to the rf chip.
14. A signal amplification method applied to the power amplification circuit of any one of claims 1 to 11, for amplifying a single transmission signal and a dual transmission signal, wherein the single transmission signal is a first signal, and the dual transmission signal is a second signal and a third signal, the signal amplification method comprising:
when the single transmission of the first signal is carried out, controlling the power amplification circuit to work in the single transmission mode; in the single transmitting mode, the power amplifying circuit forms a Doherty power amplifier; when the first signal is in a first state, amplifying the first signal through the first power amplifier and the second power amplifier; when the first signal is in a second state, amplifying the first signal through the first power amplifier; the first state is a state in which the first signal turns on the second power amplifier; the second state is a state in which the first signal causes the second power amplifier to be not turned on;
when the double transmission of the second signal and the third signal is carried out, controlling the power amplification circuit to work in the double transmission mode; in the dual transmission mode, the first power amplifier amplifies the second signal, and the second power amplifier amplifies the third signal.
CN202210023473.8A 2022-01-10 2022-01-10 Power amplification circuit, radio frequency front end circuit, electronic device and signal amplification method Active CN114024507B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202210023473.8A CN114024507B (en) 2022-01-10 2022-01-10 Power amplification circuit, radio frequency front end circuit, electronic device and signal amplification method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202210023473.8A CN114024507B (en) 2022-01-10 2022-01-10 Power amplification circuit, radio frequency front end circuit, electronic device and signal amplification method

Publications (2)

Publication Number Publication Date
CN114024507A CN114024507A (en) 2022-02-08
CN114024507B true CN114024507B (en) 2022-07-01

Family

ID=80069851

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202210023473.8A Active CN114024507B (en) 2022-01-10 2022-01-10 Power amplification circuit, radio frequency front end circuit, electronic device and signal amplification method

Country Status (1)

Country Link
CN (1) CN114024507B (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114759946B (en) * 2022-06-14 2022-11-11 荣耀终端有限公司 Radio frequency front end module and method for controlling radio frequency front end module
WO2024026629A1 (en) * 2022-08-01 2024-02-08 华为技术有限公司 Power amplification device, radio remote unit, base station, and communication system
CN115913128B (en) * 2022-12-31 2024-04-23 尚睿微电子(上海)有限公司 Doherty power amplifier, radio frequency chip and electronic equipment

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW453051B (en) * 1998-06-24 2001-09-01 Conexant Systems Inc Dual band cellular phone with two power amplifiers and power control circuit therefore
GB2437335A (en) * 2006-04-21 2007-10-24 Motorola Inc An efficient RF transmitter for high peak-to-average ratio (PAR) signals
CN106257827A (en) * 2015-06-17 2016-12-28 中兴通讯股份有限公司 Symmetrical Doherty Doherty power amplifier device and power amplifier
CN109962686A (en) * 2019-02-27 2019-07-02 宁波大学 A kind of double mode radio-frequency power amplification system

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103780209B (en) * 2012-10-22 2017-04-12 瑞昱半导体股份有限公司 Multi-mode power amplifying circuit, multi-mode wireless transmitting module and method thereof
CN106470015A (en) * 2015-08-20 2017-03-01 中兴通讯股份有限公司 Symmetrical Doherty Doherty power amplifier device and power amplifier
US9991851B1 (en) * 2016-11-15 2018-06-05 Qorvo Us, Inc. Multi-mode radio frequency (RF) power amplifier circuit

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW453051B (en) * 1998-06-24 2001-09-01 Conexant Systems Inc Dual band cellular phone with two power amplifiers and power control circuit therefore
GB2437335A (en) * 2006-04-21 2007-10-24 Motorola Inc An efficient RF transmitter for high peak-to-average ratio (PAR) signals
CN106257827A (en) * 2015-06-17 2016-12-28 中兴通讯股份有限公司 Symmetrical Doherty Doherty power amplifier device and power amplifier
CN109962686A (en) * 2019-02-27 2019-07-02 宁波大学 A kind of double mode radio-frequency power amplification system

Also Published As

Publication number Publication date
CN114024507A (en) 2022-02-08

Similar Documents

Publication Publication Date Title
CN114024507B (en) Power amplification circuit, radio frequency front end circuit, electronic device and signal amplification method
US10536116B2 (en) Envelope tracking with fast error amplifiers for multiple input multiple output communications
EP1604509B1 (en) Load variation tolerant radio frequency (rf) amplifier
US7696841B2 (en) Power amplifier utilizing quadrature hybrid for power dividing, combining and impedance matching
EP2005578B1 (en) High efficiency load insensitive power amplifier
US8253485B2 (en) Power amplifier
WO2017176369A1 (en) High power user equipment (hpue) using coherently combined power amplifiers
US6996376B2 (en) Antenna switch
EP1569353A2 (en) High frequency circuit device
Zhang et al. A high performance balanced power amplifier and its integration into a front-end module at PCS band
KR101481852B1 (en) Switching device with selectable phase shifting modes for reduced intermodulation distortion
US7853290B2 (en) Transmitter arrangement
Balteanu Linear front end module for 4G/5G LTE advanced applications
EP3022839B1 (en) Dual-band high efficiency doherty amplifiers with hybrid packaged power devices
WO2019244757A1 (en) High-frequency amplification circuit and communication device
KR20090030896A (en) Hybrid balanced power amplifier
WO2023142407A1 (en) Radio frequency front-end module and corresponding radio frequency front-end system, chip and electronic device
US20240056033A1 (en) Systems, devices, and methods related to power amplifier employing cascode stage output switching to eliminate band select switch
WO2006088604A2 (en) Method and apparatus for an improved power amplifier
EP1854209A4 (en) Method and apparatus for an improved power amplifier
Yang et al. GaAs bi-directional amplifier for low cost electronic scanning array antenna
CN113572439A (en) Power amplifying circuit
CN117674882A (en) Radio frequency circuit, radio frequency module and electronic equipment
CN117579005A (en) Low noise amplifier and RF front-end module
GB2376383A (en) Antenna switch arrangement

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant