CN117579005A - Low noise amplifier and RF front-end module - Google Patents

Abstract

The application discloses a low noise amplifier and radio frequency front end module, the low noise amplifier includes signal input end, signal output end, multiple amplifying branches, at least one bypass branch and multiplexing switch, the first end of each amplifying branch is connected together to form a first public end connected with the signal input end, the second end of each amplifying branch is connected together to form a second public end connected with the signal output end; the first end of the bypass branch is connected to the first common end, and the second end of the bypass branch is connected together to form a third common end; the first end of the multiplexing switch is connected with the third common end, and the second end of the multiplexing switch is connected to the second common end. According to the radio frequency front end module, one of the switches on the bypass branch is multiplexed into the multiplexing switch, and the parasitic capacitance in the bypass branch is reduced to reduce the total parasitic capacitance of the output end of the low-noise amplifier, so that the gain of the low-noise amplifier can be effectively improved.

Description

Low noise amplifier and RF front-end module

Technical Field

The application relates to the technical field of radio frequency, in particular to a low-noise amplifier and a radio frequency front-end module.

Background

In the rf technology, a low noise amplifier is used as an important component in the rf front-end module, and is configured to receive the rf signal transmitted from the antenna and amplify the received rf signal. In the related art, since the bypass branch in the low noise amplifier generates a large parasitic capacitance in the off state, the gain of the low noise amplifier is affected.

Disclosure of Invention

The application provides a low noise amplifier and a radio frequency front end module, which solve the problem of smaller gain of a low noise amplifier in the related technology.

In a first aspect, the present application provides a low noise amplifier comprising: a signal input terminal and a signal output terminal; the first ends of the amplifying branches are connected together to form a first common end which is connected with the signal input end, and the second ends of the amplifying branches are connected together to form a second common end which is connected with the signal output end; at least one bypass leg, a first end of the bypass leg being connected to the first common end, and a second end of the bypass leg being connected together to form a third common end; and the first end of the multiplexing switch is connected with the third common end, and the second end of the multiplexing switch is connected to the second common end.

According to the radio frequency front end module, one of the switches on the bypass branch is multiplexed into the multiplexing switch, and the parasitic capacitance in the bypass branch is reduced to reduce the total parasitic capacitance of the output end of the low-noise amplifier, so that the gain of the low-noise amplifier can be effectively improved. Meanwhile, the number of switches connected in series on the bypass branch can be reduced, the performance of the bypass branch is improved, and the cost is reduced.

In a second aspect, the present application also provides a low noise amplifier, the low noise amplifier comprising: a plurality of signal inputs and a signal output; the system comprises a plurality of amplifying branches and a plurality of bypass branches, wherein the first end of each amplifying branch is connected with one signal input end, the second end of each amplifying branch is connected together to form a fourth common end which is connected with the signal output end, the first end of each bypass branch is connected with the first end of the corresponding amplifying branch, and the second end of each bypass branch is connected together to form a fifth common end; and the first end of the multiplexing switch is connected with the fifth common end, and the second end of the multiplexing switch is connected to the fourth common end.

According to the radio frequency front end module, one of the switches on the bypass branch is multiplexed into the multiplexing switch, and the parasitic capacitance in the bypass branch is reduced to reduce the total parasitic capacitance of the output end of the low-noise amplifier, so that the gain of the low-noise amplifier can be effectively improved. Meanwhile, as the first end of the multiplexing switch is connected with the third common end formed by connecting the second ends of the bypass branches together, the second end of the multiplexing switch is connected with the second common end formed by connecting the second ends of the amplifying branches together instead of being connected with the signal output end, the radio frequency signals on the bypass branches can be adjusted by utilizing a rear-stage circuit between the second common end and the signal output end, and better echo effect is achieved.

In a third aspect, the present application further provides a radio frequency front end module, where the radio frequency front end module includes the low noise amplifier described above.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

Fig. 1 is a schematic structural diagram of a radio frequency front end module according to an embodiment of the present application;

fig. 2 is a schematic circuit diagram of a low noise amplifier according to an embodiment of the present application;

fig. 3 is a schematic circuit diagram of another low noise amplifier according to an embodiment of the present disclosure;

fig. 4 is a schematic circuit diagram of another low noise amplifier according to an embodiment of the present disclosure;

fig. 5 is a schematic circuit diagram of another low noise amplifier according to an embodiment of the present disclosure;

fig. 6 is a schematic circuit diagram of another low noise amplifier according to an embodiment of the present disclosure;

fig. 7 is a schematic layout diagram of a low noise amplifier on a substrate according to an embodiment of the present application;

fig. 8 is a schematic circuit diagram of another low noise amplifier according to an embodiment of the present disclosure;

fig. 9 is a schematic circuit diagram of another low noise amplifier according to an embodiment of the present disclosure;

fig. 10 is a schematic circuit diagram of another low noise amplifier according to an embodiment of the present disclosure;

fig. 11 is a schematic circuit diagram of another low noise amplifier according to an embodiment of the present disclosure;

fig. 12 is a schematic circuit diagram of another low noise amplifier according to an embodiment of the present disclosure;

FIG. 13 is a schematic diagram of a layout of another LNA on a substrate according to an embodiment of the present disclosure;

fig. 14 is a schematic circuit diagram of another low noise amplifier according to an embodiment of the present disclosure;

fig. 15 is a schematic circuit diagram of another low noise amplifier according to an embodiment of the present disclosure;

fig. 16 is a schematic circuit diagram of another low noise amplifier according to an embodiment of the present disclosure;

fig. 17 is a schematic circuit diagram of another low noise amplifier according to an embodiment of the present disclosure;

fig. 18 is a schematic circuit diagram of another low noise amplifier according to an embodiment of the present application.

Detailed Description

The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are some, but not all, of the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art without undue burden from the present disclosure, are within the scope of the present disclosure.

The flow diagrams depicted in the figures are merely illustrative and not necessarily all of the elements and operations/steps are included or performed in the order described. For example, some operations/steps may be further divided, combined, or partially combined, so that the order of actual execution may be changed according to actual situations.

It is to be understood that the terminology used in the description of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in this specification and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

It should also be understood that the term "and/or" as used in this specification and the appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes such combinations.

Some embodiments of the present application are described in detail below with reference to the accompanying drawings. The following embodiments and features of the embodiments may be combined with each other without conflict.

In the related art, a bypass branch in a low noise amplifier generally includes a plurality of switches connected in series. Because the low noise amplifier is equivalent to the capacitor Coff in the switch off state, when the low noise amplifier comprises a plurality of bypass branches, or the number of switches in the bypass branches is large, the low noise amplifier is equivalent to connecting a plurality of parasitic capacitors in parallel with the output end of the low noise amplifier, so that the parasitic capacitance of the output end of the low noise amplifier is large, the gain of the low noise amplifier is reduced, and the output quality of radio frequency signals of the radio frequency front end module is further reduced.

Therefore, the embodiment of the application provides a low noise amplifier and a radio frequency front end module, wherein one switch on a bypass branch is multiplexed into a multiplexing switch, a first end of the multiplexing switch is connected with a third public end formed by connecting a second end of the bypass branch together, and the second end of the multiplexing switch is connected with a second public end formed by connecting the second ends of the amplifying branches together. Hereinafter, how to increase the gain of the low noise amplifier will be described in detail.

Referring to fig. 1, fig. 1 is a schematic structural diagram of an rf front-end module 10 according to an embodiment of the present disclosure, and as shown in fig. 1, the rf front-end module 10 may include a low noise amplifier 100.

It should be noted that, the rf front-end module 10 is an element that integrates one or more discrete devices such as an rf switch, a low noise amplifier, a filter, a duplexer, and a power amplifier into a single module, so as to improve the integration level and the hardware performance, and reduce the size. The rf front-end module 10 of the present embodiment is capable of supporting carrier aggregation (Carrier Aggregation) and dual connectivity (Dual connectivity) and multiple-input multiple-output (MIMO).

Specifically, the rf front-end module 10 may be applied to a communication device such as a smart phone, a tablet computer, a smart watch, a router, and the like. The communication device may include electronic devices such as a smart phone, a tablet computer, a smart watch, and may further include communication devices such as a base station, an NFC (Near Field Communication ) device, and the like. The rf front-end module 10 may receive or transmit rf signals through an antenna in the communication device, and the low noise amplifier 100 is configured to amplify the received rf signals.

Referring to fig. 2, fig. 2 is a schematic circuit diagram of a low noise amplifier 100 according to an embodiment of the present application, and as shown in fig. 2, the low noise amplifier 100 may include a signal input terminal 101, a signal output terminal 102, a plurality of amplifying branches 103, at least one bypass branch 104, and a multiplexing switch 105.

Wherein the first ends of each amplifying branch 103 are connected together to form a first common terminal 106 connected to the signal input terminal 101, and the second ends of each amplifying branch 103 are connected together to form a second common terminal 107 connected to the signal output terminal 102. The first end of the bypass leg 104 is connected to a first common terminal 106 and the second ends of the bypass leg 104 are connected together to form a third common terminal 108. The first terminal of the multiplexing switch 105 is connected to the third common terminal 108 and the second terminal of the multiplexing switch 105 is connected to the second common terminal 107.

The amplifying branch 103 is used to amplify the rf signal, and the bypass branch 104 is used to transmit the rf signal that does not need to be amplified or transmit the rf signal that needs to be attenuated (e.g., a low gain gear including a low noise amplifier). For example, the bypass branch 104 may be turned off when the radio frequency signal is amplified by the amplifying branch 103. For another example, the amplifying branch 103 may be turned off when transmitting radio frequency signals through the bypass branch 104. Wherein the bypass leg 104 may comprise a plurality of switches. In the embodiment of the present application, one of the switches of each bypass branch 104 may be multiplexed into the multiplexing switch 105, so that not only the number of switches connected in series on the bypass branch may be reduced, but also the parasitic capacitance in the bypass branch 104 may be reduced, so as to reduce the total parasitic capacitance of the output end of the low noise amplifier 100.

By way of example, the multiplexing switch 105 may include, but is not limited to, a transistor, a field-effect transistor (MOS), an insulated gate bipolar transistor (Insulated Gate Bipolar Transistor, IGBT), a relay, an optocoupler, and the like.

Illustratively, as shown in fig. 2, the signal input 101 of the low noise amplifier 100 may be one, i.e., the low noise amplifier 100 is a single-input amplifier, and the low noise amplifier 100 may be configured to receive a radio frequency signal in a single frequency band. The plurality of amplifying branches 103 may amplify the radio frequency signal of the single band input to the low noise amplifier 100 simultaneously or individually. The number of branches amplified by the amplifying branch 103 may be determined according to the gain required by the low noise amplifier 100, for example, the larger the gain required by the low noise amplifier 100, the larger the number of branches amplified by the amplifying branch 103 is. The working frequency band of the radio frequency signal input to the low noise amplifier 100 is not specifically limited in this embodiment.

In this embodiment of the present application, one of the switches on the bypass branch 104 is multiplexed into the multiplexing switch 105, so that the total parasitic capacitance of the output end of the low noise amplifier 100 is reduced by reducing the parasitic capacitance in the bypass branch 104, thereby effectively improving the gain of the low noise amplifier 100 and further improving the output quality of the radio frequency signal of the radio frequency front end module 10. Meanwhile, the number of switches connected in series on the bypass branch 104 can be reduced, the performance of the bypass branch 104 is improved, and the cost is reduced.

Further, as shown in fig. 2, since the second terminal of the multiplexing switch 105 in the present embodiment is directly connected to the second common terminal 107, the subsequent circuit is not provided first at the second common terminal 107 and then the multiplexing switch 105 is connected. The latter circuit may include an attenuator and/or a matcher and/or a change-over switch, among others. In the related art, the second terminal of the multiplexing switch 105 is usually connected to the signal output terminal, that is, the second common terminal 107 corresponding to the plurality of amplifying branches 103 is connected to the subsequent circuit first, and then is connected to the second terminal of the multiplexing switch 105. In the embodiment of the present application, in order to achieve a better echo effect of the radio frequency signal, the second terminal of the multiplexing switch 105 is directly connected to the second common terminal 107, instead of being connected to the signal output terminal, and a post-stage circuit is disposed between the second common terminal 107 and the signal output terminal. For example, the multiplexing switch 105 may be connected to the second common terminal 107 and then connected to an attenuator and/or a matcher, so that the radio frequency signal on the bypass branch 104 may be adjusted by using attenuation/matching of the later stage circuit, so as to achieve a better echo effect. In addition, by arranging an attenuator at the connection point between the multiplexing switch 105 and the second common terminal 107, the radio frequency signal on the bypass branch 104 can be attenuated to different degrees by using the attenuator, so as to realize more flexible signal gear adjustment.

Referring to fig. 3, fig. 3 is a schematic circuit diagram of another low noise amplifier 100 according to the embodiment of the present application, as shown in fig. 3, the number of amplifying branches 103 is the same as the number of bypass branches 104, each amplifying branch 103 is correspondingly connected to one bypass branch 104, a first end of each bypass branch 104 is connected to a first end of the corresponding amplifying branch 103, and a second end of each bypass branch 104 is connected together to form a third common end 108.

Referring to fig. 4, fig. 4 is a schematic circuit diagram of another low noise amplifier 100 according to the embodiment of the present application, as shown in fig. 4, the low noise amplifier 100 may further include a plurality of matching inductors 109, wherein a first end of each matching inductor 109 is connected to a first end of a corresponding bypass branch 104, and a second end of the matching inductor 109 is connected to a first end of a corresponding amplifying branch 103.

The matching inductor 109 is connected to the signal input path of the low noise amplifier 100, and is used to achieve impedance matching at the input end of the low noise amplifier 100.

In this embodiment of the present application, by setting the matching inductor 109 between the input end (e.g., the a end in fig. 4) of the amplifying branch 103 and the input end (e.g., the B end in fig. 4) of the bypass branch 104, not only the input end of the amplifying branch 103 and the input end of the bypass branch 104 can be isolated, but also the equivalent parasitic capacitance generated by the bypass branch 104 can be offset, so as to weaken the feedback of the bypass branch 104 to the amplifying branch 103, reduce the parasitic capacitance and miller effect of the amplifying branch 103, and thereby improve the gain of the low noise amplifier 100. At the same time, the impedance of the bypass branch 104 can be improved, and the performance of the bypass branch 104 can be improved.

In the inverting amplification circuit, the miller effect refers to that the distributed capacitance or parasitic capacitance between the input and the output is increased by 1+k times by the amplification effect of the amplifier, where k is the voltage amplification factor of the stage amplification circuit. The equivalent parasitic capacitance refers to the capacitance Coff equivalent to the switch in the bypass branch 104 in the off state.

It can be appreciated that by connecting the input end of the bypass branch 104 to the first end of the matching inductor 109 in advance, when the radio frequency signal is transmitted through the bypass branch 104, the radio frequency signal can be directly input into the bypass branch 104 without passing through the matching inductor 109, so that the imaginary part (inductive reactance) of the equivalent impedance of the bypass branch 104 can be reduced, the impedance of the bypass branch 104 can be further improved, and the performance of the bypass branch 104 can be improved.

Referring to fig. 5, fig. 5 is a schematic circuit diagram of another low noise amplifier 100 according to the embodiment of the present application, as shown in fig. 5, in the low noise amplifier 100, the bypass branch 104 is one, a first end of the bypass branch 104 is connected to the first common terminal 106, and a second end of the bypass branch 104 is connected to the first end of the multiplexing switch 105.

It can be understood that, in the scenario where the low noise amplifier 100 transmits a single-band rf signal, since the low noise amplifier 100 only needs to transmit an rf signal in one band, when the bypass branch 104 is adopted for bypass, all the amplifying branches 103 are turned off, and the rf signal can be transmitted through one bypass branch 104. Thus, in the scenario where the low noise amplifier 100 inputs a single-band radio frequency signal, the plurality of amplifying branches 103 may share one bypass branch 104.

In this embodiment of the present application, in the scenario of a single-band radio frequency signal, by sharing one bypass branch 104, the number of bypass branches 104 can be reduced, so that the layout space occupied by the radio frequency front end module 10 is reduced, the overall structure of the radio frequency front end module 10 is more compact and miniaturized, and the cost can be reduced.

Referring to fig. 6, fig. 6 is a schematic circuit diagram of another low noise amplifier 100 according to an embodiment of the present application, where, as shown in fig. 6, the low noise amplifier 100 may further include a matching inductor 109; a first terminal of the matching inductance 109 is connected to a first terminal of the bypass branch 104, and a second terminal of the matching inductance 109 is connected to the first common terminal 106.

It should be noted that, in the embodiment of the present application, in a scenario of sharing one bypass branch 104, multiple amplifying branches 103 may share one matching inductance 109. By connecting the first end of the matching inductor 109 to the first end of the bypass branch 104, and connecting the second end of the matching inductor 109 to the first common end 106, it is possible to realize that the plurality of amplifying branches 103 share one matching inductor 109, not only can the bypass branch 104 and the input end of each amplifying branch 103 be isolated by the matching inductor 109, the gain of the low noise amplifier 100 is improved, but also the number of the matching inductors 109 can be reduced, and the cost is reduced.

Referring to fig. 7, fig. 7 is a schematic layout diagram of a low noise amplifier 100 on a substrate, as shown in fig. 7, the low noise amplifier 100 may further include a matching inductor 109 and a signal amplifying chip 110, the signal amplifying chip 110 is disposed on the substrate 20, the matching inductor 109 is disposed in the substrate 109, and the plurality of amplifying branches 103, the at least one bypass branch 104 and the multiplexing switch 105 are all disposed in the signal amplifying chip 110.

The signal amplifying chip 110 may include a first pad 1100 and a second pad 1101, the first pad 1100 being connected to the first common terminal 106 and to the second terminal of the matching inductance 109, and the second pad 1101 being connected to the first terminal of the bypass branch 104 and to the first terminal of the matching inductance 109.

In this embodiment of the present application, in a scenario that the amplifying branch 103 and the bypass branch 104 are configured in the signal amplifying chip 110, by providing the first pad 1100 and the second pad 1101 on the signal amplifying chip 110, the first pad 1100 may be connected to the first common terminal 106 and the second terminal of the matching inductor 109, and the second pad 1101 may be connected to the first terminal of the bypass branch 104 and the second terminal of the matching inductor 109, so that not only the input terminal of the amplifying branch 103 and the input terminal of the bypass branch 104 may be isolated by the matching inductor 109, but also the equivalent parasitic capacitance generated by the bypass branch 104 may be offset, so as to weaken the feedback of the bypass branch 104 to the amplifying branch 103, reduce the parasitic capacitance and the miller effect of the amplifying branch 103, and thereby improve the gain of the low noise amplifier 100.

Referring to fig. 8, fig. 8 is a schematic circuit diagram of another low noise amplifier 100 according to an embodiment of the present application, and as shown in fig. 8, the low noise amplifier 100 may further include a plurality of first switches 111; each first switch 111 is connected in series with a corresponding one of the amplifying branches 103.

The first switch 111 may be connected to a first end of the corresponding amplifying branch 103, or may be connected to a second end of the corresponding amplifying branch 103. For example, as shown in fig. 8, the first switch 111 may be connected to a first end of the corresponding amplifying branch 103.

By way of example, the first switch 111 may include, but is not limited to, a transistor, a field effect transistor, an insulated gate bipolar transistor, a relay, an optocoupler, and the like.

It should be noted that, when the first switch 111 is connected to the first end of the corresponding amplifying branch 103, the first switch 111 is used to control the amplifying branch 103 to be turned on and off so as to adjust the gain of the low noise amplifier 100. For example, the gain of the low noise amplifier 100 is maximized when the first switch 111 of each amplification branch 103 in series is closed. When the first switch 111 is connected to the second end of the corresponding amplifying branch 103, the first switch 111 can be used to avoid the signal on the bypass branch 104 leaking into the amplifying transistor of the amplifying branch 103, besides controlling the on/off of the amplifying branch 103 to adjust the gain of the low noise amplifier 100. For example, when the bypass branch 104 is adopted for bypass, the first switch 111 connected in series with the amplifying branch 103 can be controlled to be turned off, so that the radio frequency signal transmitted on the bypass branch 104 can be prevented from leaking into the amplifying transistor of the amplifying branch 103.

Referring to fig. 9, fig. 9 is a schematic circuit diagram of another low noise amplifier 100 according to the embodiment of the present application, as shown in fig. 9, the post-stage circuit may further include an attenuator 112, a first end of the attenuator 112 is connected to the second end of the multiplexing switch 105, and a second end of the attenuator 112 is connected to the signal output end 102.

In this embodiment of the present application, the second common terminal 107 formed by connecting the second ends of the multiple amplifying branches 103 is connected to the attenuator 112 after being connected to the second end of the multiplexing switch 105, so that the attenuator 112 can attenuate the radio frequency signal output by the bypass branch 104 to different degrees, and more flexible signal gear adjustment is realized. The specific structure of the attenuator 112 may be referred to in the related art, and is not limited herein.

In the related art, the second terminal of the multiplexing switch 105 is usually directly connected to the signal output terminal, that is, the second common terminal 107 corresponding to the amplifying branches 103 is connected to the subsequent circuit, and then connected to the second terminal of the multiplexing switch 105, and the second terminal of the multiplexing switch 105 is directly connected to the signal output terminal. In the embodiment of the present application, in order to achieve a better echo effect of the radio frequency signal, the second terminal of the multiplexing switch 105 is directly connected to the second common terminal 107, instead of being connected to the signal output terminal, and a post-stage circuit is disposed between the second common terminal 107 and the signal output terminal. For example, the connection point between the multiplexing switch 105 and the second common terminal 107 may be connected to the attenuator 112, so that the attenuation of the post-stage circuit may be used to adjust the radio frequency signal on the bypass branch 104, so as to achieve a better echo effect.

Referring to fig. 10, fig. 10 is a schematic circuit diagram of another low noise amplifier 100 according to an embodiment of the present application, as shown in fig. 10, the low noise amplifier 100 may further include a matcher 113, wherein a first end of the matcher 113 is connected to a second end of the attenuator 112, and a second end of the matcher 113 is connected to the signal output end 102.

In the embodiment of the present application, by setting the matcher 113 at the output end of the attenuator 112, impedance matching of the attenuated radio frequency signal output by the attenuator 112 by the matcher 113 can be achieved, so as to reduce distortion of the radio frequency signal and improve power transmission efficiency, and achieve a better echo effect. The specific structure of the matcher 113 may be referred to in the related art, and is not limited herein.

Referring to fig. 11, fig. 11 is a schematic circuit diagram of another low noise amplifier 100 according to an embodiment of the present application, and as shown in fig. 11, the low noise amplifier 100 may include a plurality of signal input terminals 101, a signal output terminal 102, a plurality of amplifying branches 103, a plurality of bypass branches 104, and a multiplexing switch 105. Wherein a first end of each amplifying branch 103 is connected to one signal input 101, a second end of each amplifying branch 103 is connected together to form a fourth common terminal 114 connected to the signal output 102, a first end of each bypass branch 104 is connected to a first end of the corresponding amplifying branch 103, and a second end of each bypass branch 104 is connected together to form a fifth common terminal 115. A first terminal of the multiplexing switch 105 is connected to the fifth common terminal 105, and a second terminal of the multiplexing switch 105 is connected to the fourth common terminal 114.

In the embodiment of the present application, one of the switches on each bypass branch 104 is multiplexed into the multiplexing switch 105, so that the total parasitic capacitance of the output end of the low noise amplifier 100 is reduced by reducing the parasitic capacitance in the bypass branch 104, thereby effectively improving the gain of the low noise amplifier 100. Meanwhile, the number of switches connected in series on the bypass branch 104 can be reduced, the performance of the bypass branch 104 is improved, and the cost is reduced.

It should be noted that, in fig. 11, by providing a plurality of signal input terminals 101, the low noise amplifier 100 may be adapted to an application scenario of a multi-band radio frequency signal, for example, the plurality of signal input terminals 101 input radio frequency signals of a plurality of different frequency bands into corresponding amplifying circuits, and the plurality of amplifying branches selectively amplify the radio frequency signals of the corresponding frequency bands.

As shown in fig. 11, the second terminal of the multiplexing switch 105 is directly connected to the second common terminal 107, instead of being connected to the signal output terminal, that is, the second common terminal 107 is not connected to the subsequent circuit first, and then the multiplexing switch 105 is connected. Wherein the back-end circuit may comprise an attenuator and/or a matcher. In the related art, the second terminal of the multiplexing switch 105 is usually connected to the signal output terminal, that is, the second common terminal 107 corresponding to the plurality of amplifying branches 103 is connected to the subsequent circuit first, and then is connected to the second terminal of the multiplexing switch 105. In the embodiment of the present application, in order to achieve a better echo effect of the radio frequency signal, the second terminal of the multiplexing switch 105 is connected to the second common terminal 107, instead of being connected to the signal output terminal, and a post-stage circuit is disposed between the second common terminal 107 and the signal output terminal. For example, the multiplexing switch 105 may be connected to the second common terminal 107 and then connected to an attenuator and/or a matcher, so that the radio frequency signal on the bypass branch 104 may be adjusted by using attenuation/matching of the later stage circuit, so as to achieve a better echo effect. In addition, by arranging an attenuator between the multiplexing switch 105 and the second common terminal 107, the radio frequency signal on the bypass branch 104 can be attenuated to different degrees by using the attenuator, so as to realize more flexible signal gear adjustment.

Referring to fig. 12, fig. 12 is a schematic circuit diagram of another low noise amplifier 100 according to an embodiment of the present application, where, as shown in fig. 12, the low noise amplifier 100 may further include a plurality of matching inductors 109; a first end of each matching inductance 109 is connected to a first end of the corresponding bypass branch 104, and a second end of the matching inductance 109 is connected to a first end of the corresponding amplifying branch 103.

It should be noted that, in this embodiment of the present application, by setting the matching inductor 109 between the input end of the amplifying branch 103 and the input end of the bypass branch 104, not only the input end of the amplifying branch 103 and the input end of the bypass branch 104 can be isolated, but also the equivalent parasitic capacitance generated by the bypass branch 104 can be offset, so as to weaken the feedback of the bypass branch 104 to the amplifying branch 103, reduce the parasitic capacitance and miller effect of the amplifying branch 103, and thus improve the gain of the low noise amplifier 100. At the same time, the impedance of the bypass branch 104 can be improved, and the performance of the bypass branch 104 can be improved.

Referring to fig. 13, fig. 13 is a schematic layout diagram of another low noise amplifier 100 on a substrate according to an embodiment of the present application, as shown in fig. 13, the low noise amplifier 100 may further include a signal amplifying chip 110, where the signal amplifying chip 110 and a plurality of matching inductors 109 are disposed on the substrate 20, and a plurality of amplifying branches 103, a plurality of bypass branches 104 and a multiplexing switch 105 are all configured in the signal amplifying chip 110.

By disposing the plurality of amplifying branches 103 and the plurality of bypass branches 104 in the signal amplifying chip 110 and disposing the matching inductors 109 on the substrate 20, as shown in fig. 13, the input ends of the corresponding amplifying branches 103 and the input ends of the corresponding bypass branches 104 can be isolated by the matching inductors 109, and the equivalent parasitic capacitance generated by the bypass branches 104 can be offset, so that the feedback of the bypass branches 104 to the amplifying branches 103 is weakened, the parasitic capacitance and the miller effect of the amplifying branches 103 are reduced, and the gain of the low noise amplifier 100 is improved. As an example, the matching inductor 109 may be provided on the substrate 20 in the form of a surface mount technology (SMD), or may be provided on the substrate 20 in the form of a wire-wound structure.

Referring to fig. 14, fig. 14 is a schematic circuit diagram of another low noise amplifier 100 according to the embodiment of the present application, as shown in fig. 14, the low noise amplifier 100 may further include a plurality of signal amplifying chips 110 and a switch chip 116, where the plurality of signal amplifying chips 110, the switch chip 116 and the plurality of matching inductors 109 are disposed on the substrate 20, each amplifying branch 103 and the bypass branch 104 correspondingly connected are disposed in a corresponding signal amplifying chip 110, and the multiplexing switch 105 is disposed in the switch chip 116.

It should be noted that, by disposing the plurality of matching inductors 109 on the substrate 20 and disposing each amplifying branch 103 and the bypass branch 104 correspondingly connected in the corresponding signal amplifying chip 110, it is possible to dispose the matching inductors 109 between the input end of the amplifying branch 103 and the input end of the bypass branch 104, so that not only the input end of the amplifying branch 103 and the input end of the bypass branch 104 can be isolated, but also the equivalent parasitic capacitance generated by the bypass branch 104 can be offset, so as to weaken the feedback of the bypass branch 104 to the amplifying branch 103, reduce the parasitic capacitance and miller effect of the amplifying branch 103, and thereby improve the gain of the low noise amplifier 100. By providing the multiplexing switch 105 on the switch chip 116, the multiplexing switch 105 can be isolated from the amplifying branch 103 and the bypass branch 104, thereby improving the isolation of the low noise amplifier 100.

Referring to fig. 15, fig. 15 is a schematic circuit diagram of another low noise amplifier 100 according to the embodiment of the present application, as shown in fig. 15, the low noise amplifier 100 may further include a plurality of second switches 117, wherein a first end of each second switch 117 is connected to a second end of a corresponding amplifying branch 103, and a second end of each second switch 117 is connected to a fourth common end 114.

In the embodiment of the present application, in the scenario of transmitting the multi-band radio frequency signal, the second switch 117 is used to avoid the signal on the bypass branch 104 leaking into the amplifying transistor of the amplifying branch 103. For example, when the bypass branch 104 is adopted for bypass, the second switch 117 connected in series with the amplifying branch 103 can be controlled to be turned off, so that the radio frequency signal transmitted on the bypass branch 104 can be prevented from leaking into the amplifying transistor of the amplifying branch 103.

Referring to fig. 16, fig. 16 is a schematic circuit diagram of another low noise amplifier 100 according to the embodiment of the present application, as shown in fig. 16, the low noise amplifier 100 may further include an attenuator 112, wherein a first end of the attenuator 112 is connected to a second end of the multiplexing switch 105, and a second end of the attenuator 112 is connected to the signal output terminal 102.

By connecting the second common terminal 107 formed by connecting the second ends of the amplifying branches 103 with the second end of the multiplexing switch 105 and then connecting the second common terminal with the attenuator 112, the attenuation of the radio frequency signal output by the bypass branch 104 by the attenuator 112 to different degrees can be realized, and more flexible signal gear adjustment can be realized. The specific structure of the attenuator 112 may be referred to in the related art, and is not limited herein.

In the related art, the second terminal of the multiplexing switch 105 is usually connected to the signal output terminal, that is, the second common terminal 107 corresponding to the plurality of amplifying branches 103 is connected to the subsequent circuit first, and then is connected to the second terminal of the multiplexing switch 105. In the embodiment of the present application, in order to achieve a better echo effect of the radio frequency signal, the second terminal of the multiplexing switch 105 may be connected to the second common terminal 107, and then a post-stage circuit may be disposed after the connection point. For example, an attenuator 112 may be disposed after the connection point between the multiplexing switch 105 and the second common terminal 107, so that the attenuation of the later stage circuit may be used to adjust the radio frequency signal on the bypass branch 104, so as to achieve a better echo effect.

Referring to fig. 17, fig. 17 is a schematic circuit diagram of another low noise amplifier 100 according to an embodiment of the present application, as shown in fig. 17, the low noise amplifier 100 may further include a matcher 113, wherein a first end of the matcher 113 is connected to a second end of the attenuator 112, and a second end of the matcher 113 is connected to the signal output terminal 102.

In the embodiment of the present application, by setting the matcher 113 at the output end of the attenuator 112, impedance matching of the attenuated radio frequency signal output by the attenuator 112 by the matcher 113 can be achieved, so as to reduce distortion of the radio frequency signal and improve power transmission efficiency, and achieve a better echo effect.

Referring to fig. 18, fig. 18 is a schematic circuit diagram of another low noise amplifier 100 according to the embodiment of the present application, and as shown in fig. 18, the amplifying branch 103 may include a first capacitor C1, a first amplifying transistor T1, a first inductor L1, a second amplifying transistor T2, a second inductor L2, and a second capacitor C2. The bypass branch 104 may comprise a third capacitance C3 and at least one switch K. Wherein, in each bypass branch 104, at least one switch K is connected between the first end of the matching inductance 109 and the first end of the third capacitor C3 after being connected in series, the second end of the third capacitor C3 is connected to the fifth common terminal 115, the fifth common terminal 115 is connected to the first end of the multiplexing switch 105, and the second end of the multiplexing switch 105 is connected to the fourth common terminal 114.

As an example, each bypass branch 104 includes a third capacitor C3 and a switch K. The switch K may include, but is not limited to, a transistor, a field-effect transistor (MOS), an insulated gate bipolar transistor (Insulated Gate Bipolar Transistor, IGBT), and the like. In this embodiment, since the first end of the multiplexing switch 105 is connected to the fifth common end 115 formed by connecting the second ends of the bypass branches 104 together, and the second end of the multiplexing switch 105 is connected to the fourth common end 114 formed by connecting the second ends of the amplifying branches 103 together, the multiplexing switch 105 is a switch multiplexed by each bypass branch 104, so that parasitic capacitance in the bypass branch 104 can be reduced, and total parasitic capacitance of the output end of the low noise amplifier 100 can be reduced, so that gain of the low noise amplifier 100 can be effectively improved, and radio frequency signals on the bypass branches 104 can be adjusted by using a post circuit between the fourth common end 114 and the signal output end 102, so as to achieve a better echo effect.

One end of the first capacitor C1 is connected to the second end of the matching inductor 109, the other end is connected to the first end of the first amplifying transistor T1, and the second end of the first amplifying transistor T1 is grounded through the first inductor L1. The first end of the second amplifying transistor T2 is connected to the bias control end, the second end of the second amplifying transistor T2 is connected to the third end of the first amplifying transistor T1, the third end of the second amplifying transistor T2 is connected to the first end of the second capacitor C2, and the second end of the second capacitor C2 is connected to the fourth common end 114. The bias control terminal is a port connected to a bias circuit, which is not shown in the figure. The first end of the second inductor L2 is connected to the common end between the third end of the second amplifying transistor T2 and the second capacitor C2, and the second end of the second inductor L2 is connected to the power supply terminal Vdd. Wherein the second inductor L2 is used to block direct current or provide output matching.

Illustratively, the first end of the first amplifying transistor T1 is a gate, the second end of the first amplifying transistor T1 is a drain, and the third end of the first amplifying transistor T1 is a source; the first end of the second amplifying transistor T2 is a gate, the second end of the second amplifying transistor T2 is a source, and the third end of the second amplifying transistor T2 is a drain. Or, the first end of the first amplifying transistor T1 is a gate, the second end of the first amplifying transistor T1 is a source, and the third end of the first amplifying transistor T1 is a drain; the first end of the second amplifying transistor T2 is a gate, the second end of the second amplifying transistor T2 is a drain, and the third end of the first amplifying transistor T2 is a source.

It should be noted that the switch K is used to control on or off of the bypass branch 104, so as to control whether the rf signal input to the low noise amplifier 100 is bypassed. The third capacitor C3 is used for blocking direct current. The circuit configuration of the amplifying branch 103 and the bypass branch 104 may be adaptively adjusted according to actual requirements, which is not limited herein.

In this embodiment of the present application, at least one switch K in the bypass branch 104 is connected to the first end of the matching inductor 109 after being connected in series, and the second end of the matching inductor 109 is connected to the first end of the amplifying branch 103, so that not only can the input end of the amplifying branch 103 and the input end of the bypass branch 104 be isolated by the matching inductor 109, but also the equivalent parasitic capacitance generated by the bypass branch 104 can be offset, so as to weaken the feedback of the bypass branch 104 to the amplifying branch 103, reduce the parasitic capacitance and miller effect of the amplifying branch 103, and thereby improve the gain of the low noise amplifier 100.

The foregoing is merely a specific embodiment of the present application, but the protection scope of the present application is not limited thereto, and any equivalent modifications or substitutions will be apparent to those skilled in the art within the scope of the present application, and these modifications or substitutions should be covered in the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims (17)

1. A low noise amplifier, comprising:

a signal input terminal and a signal output terminal;

the first ends of the amplifying branches are connected together to form a first public end which is connected with the signal input end, the second ends of the amplifying branches are connected together to form a second public end which is connected with the signal output end through a rear-stage circuit;

at least one bypass leg, a first end of the bypass leg being connected to the first common end, and a second end of the bypass leg being connected together to form a third common end;

and the first end of the multiplexing switch is connected with the third common end, and the second end of the multiplexing switch is connected to the second common end.

2. The low noise amplifier of claim 1, wherein the number of amplifying branches is the same as the number of bypass branches, each of the amplifying branches being connected to a respective one of the bypass branches, a first end of each of the bypass branches being connected to a respective first end of the amplifying branch, and a second end of each of the bypass branches being connected together to form the third common terminal.

3. The low noise amplifier of claim 2, further comprising a plurality of matching inductors; the first end of each matching inductor is connected to the first end of the corresponding bypass branch, and the second end of each matching inductor is connected to the first end of the corresponding amplifying branch.

4. The low noise amplifier of claim 1, wherein the bypass branch is one, a first end of the bypass branch is connected to the first common terminal, and a second end of the bypass branch is connected to the first end of the multiplexing switch.

5. The low noise amplifier of claim 4, further comprising a matching inductance;

the first end of the matching inductance is connected to the first end of the bypass branch, and the second end of the matching inductance is connected to the first common end.

6. The low noise amplifier of claim 1, further comprising a matching inductance and a signal amplification chip, the signal amplification chip being disposed on a substrate, the matching inductance being disposed in the substrate, the plurality of amplification branches, the at least one bypass branch, and the multiplexing switch being disposed in the signal amplification chip;

The signal amplifying chip comprises a first bonding pad and a second bonding pad, wherein the first bonding pad is used for being connected with the first common end and the second end of the matching inductor, and the second bonding pad is used for being connected with the first end of the bypass branch and the first end of the matching inductor.

7. The low noise amplifier of any of claims 1-6, further comprising a plurality of first switches; each of the first switches is connected in series with a corresponding one of the amplifying branches.

8. The low noise amplifier of claim 1, wherein the post-stage circuit comprises an attenuator, a first terminal of the attenuator being connected to the second terminal of the multiplexing switch, a second terminal of the attenuator being connected to the signal output terminal.

9. The low noise amplifier of claim 8, wherein the post-stage circuit further comprises a matcher, a first end of the matcher being connected to the second end of the attenuator, a second end of the matcher being connected to the signal output.

10. A low noise amplifier, comprising:

a plurality of signal inputs and a signal output;

The system comprises a plurality of amplifying branches and a plurality of bypass branches, wherein the first end of each amplifying branch is connected with a signal input end, the second end of each amplifying branch is connected together to form a fourth common end, the fourth common end is connected with the signal output end through a rear-stage circuit, the first end of each bypass branch is connected with the first end of the corresponding amplifying branch, and the second end of each bypass branch is connected together to form a fifth common end;

and the first end of the multiplexing switch is connected with the fifth common end, and the second end of the multiplexing switch is connected to the fourth common end.

11. The low noise amplifier of claim 10, further comprising a plurality of matching inductors; the first end of each matching inductor is connected to the first end of the corresponding bypass branch, and the second end of each matching inductor is connected to the first end of the corresponding amplifying branch.

12. The low noise amplifier of claim 11, further comprising a signal amplification chip, the signal amplification chip and the plurality of matching inductance setting substrates, the plurality of amplification branches, the plurality of bypass branches, and the multiplexing switch being all configured in the signal amplification chip.

13. The low noise amplifier of claim 11, further comprising a plurality of signal amplifying chips and a switch chip, the plurality of signal amplifying chips, the switch chip and the plurality of matching inductance setting substrates, each amplifying branch and the bypass branch correspondingly connected being provided in a corresponding one of the signal amplifying chips, the multiplexing switch being provided in the switch chip.

14. The low noise amplifier of any of claims 10-13, further comprising a plurality of second switches, a first terminal of each of the second switches being connected to a second terminal of a corresponding one of the amplifying branches, a second terminal of each of the second switches being connected to the fourth common terminal.

15. A low noise amplifier according to any of claims 10-13, wherein the back-end circuit comprises an attenuator, a first end of the attenuator being connected to the second end of the multiplexing switch, a second end of the attenuator being connected to the signal output.

16. The low noise amplifier of claim 15, wherein the post-stage circuit further comprises a matcher, a first end of the matcher being connected to the second end of the attenuator, a second end of the matcher being connected to the signal output.

17. A radio frequency front end module comprising a low noise amplifier according to any of claims 1 to 9 or a low noise amplifier according to any of claims 10 to 16.