CN114024463A - Novel pulse width compensation current-sharing control method for medium-speed wire-moving pulse power supply - Google Patents

Novel pulse width compensation current-sharing control method for medium-speed wire-moving pulse power supply Download PDF

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CN114024463A
CN114024463A CN202111143817.0A CN202111143817A CN114024463A CN 114024463 A CN114024463 A CN 114024463A CN 202111143817 A CN202111143817 A CN 202111143817A CN 114024463 A CN114024463 A CN 114024463A
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switching tube
current
tube
fpga
switch tube
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CN114024463B (en
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杨飞
王新鹏
刘亚运
李玉坤
张建超
张开翔
蔡卫峰
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Nanjing University of Science and Technology
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Nanjing University of Science and Technology
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M11/00Power conversion systems not covered by the preceding groups
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23HWORKING OF METAL BY THE ACTION OF A HIGH CONCENTRATION OF ELECTRIC CURRENT ON A WORKPIECE USING AN ELECTRODE WHICH TAKES THE PLACE OF A TOOL; SUCH WORKING COMBINED WITH OTHER FORMS OF WORKING OF METAL
    • B23H7/00Processes or apparatus applicable to both electrical discharge machining and electrochemical machining
    • B23H7/02Wire-cutting
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23HWORKING OF METAL BY THE ACTION OF A HIGH CONCENTRATION OF ELECTRIC CURRENT ON A WORKPIECE USING AN ELECTRODE WHICH TAKES THE PLACE OF A TOOL; SUCH WORKING COMBINED WITH OTHER FORMS OF WORKING OF METAL
    • B23H7/00Processes or apparatus applicable to both electrical discharge machining and electrochemical machining
    • B23H7/02Wire-cutting
    • B23H7/04Apparatus for supplying current to working gap; Electric circuits specially adapted therefor
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/02Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/157Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators with digital control
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/02Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/02Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • H02M3/1584Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • Mechanical Engineering (AREA)
  • Electrical Discharge Machining, Electrochemical Machining, And Combined Machining (AREA)

Abstract

The invention discloses a current equalizing method applied to a medium-speed wire-moving pulse power supply and a control method thereof. The design is carried out aiming at a cutting-one processing mode, and the first knife is used for cutting the workpiece. When the current threshold value set in the FPGA is increased, the FPGA controls four circuits to be switched on at the same time by controlling the four circuits in a staggered switching-on sequence, and when a single machining discharge period is completed, the FPGA controls the four circuits to be switched off at the same time. The invention realizes the control of the conduction sequence of the four circuits for one-time processing and the balance of the average processing current of the circuits in each period of time, achieves the accurate control of the processing current, reduces the processing current ripple, prevents the single circuit from overheating, and ensures the smoothness of the surface of the workpiece and the stability of the power supply operation.

Description

Novel pulse width compensation current-sharing control method for medium-speed wire-moving pulse power supply
Technical Field
The invention belongs to the field of current control of high-frequency pulse power supplies for machining in occasions such as wire cut electrical discharge machining and shaped electrical discharge machining, and particularly relates to a novel current sharing control method with pulse width compensation for a high-speed reciprocating wire-moving (medium-wire-moving) pulse power supply.
Background
The principle of the electric spark machining is that in a certain working solution, continuous high-frequency pulses are applied between a wire electrode and a workpiece to form a spark discharge channel, so that metal materials are melted and subjected to gas etching and removal machining. In order to solve the contradiction between higher processing efficiency and processed surface quality, the reciprocating wire-moving electric spark wire-moving cutting with the function of multiple times of cutting, namely the 'middle wire-moving' processing technology is generally accepted, and a new research idea and method are provided for further promoting the development of the wire-moving cutting processing technology.
The problem that the autonomous manufacturing capability of key parts in China is insufficient is more obvious, and the requirements on high-efficiency, high-precision and high-quality processing technologies are more urgent. The pulse power supply used by the existing machine tool still adopts a resistance type, the current cannot be controlled, and the energy loss is serious, so that the existing traditional mechanical processing mode is difficult to meet the requirements of the prior art. With the development of power electronic technology, at present, a learner applies a Buck converter to an electric spark pulse power supply, and replaces a resistor of a resistance type pulse power supply with an energy storage inductor of the Buck converter, so that energy conservation and controllable current in a machining process are realized. Meanwhile, in order to reduce current ripples and improve the controllability of machining current, the prior scholars use four-way Buck converters to be connected in parallel in a staggered mode to form a novel electric spark pulse power supply. However, in actual processing, the condition that a certain Buck converter heats more seriously than other Buck converters can occur, the continuous processing time and the long-time processing stability of the pulse power supply can be influenced, the problem is caused by uneven current flowing through each Buck converter, and in order to solve the problem, the invention provides a novel pulse width compensation current-sharing control method for the medium-speed wire-passing pulse power supply.
Disclosure of Invention
In order to solve the technical problems, the invention aims to provide a novel current-sharing control method for a medium-speed wire-moving pulse power supply, which guarantees long-time stable processing of an electric spark pulse power supply.
The technical solution for realizing the purpose of the invention is as follows: a novel current-sharing control method of a medium-speed wire-moving pulse power supply comprises a main power circuit, a voltage and current detection circuit, an FPGA control circuit, a drive circuit and a switching circuit, wherein the main power circuit is used in one-time processing of wire-cut electrical discharge machining; the voltage and current detection circuit is used for detecting and collecting gap voltage and gap current; the FPGA control circuit generates a switching tube on-off control signal according to a certain rule in a single discharge machining period by adjusting the PWM wave sequence based on the timing control of the counter; the driving circuit is used for amplifying the control signal output by the FPGA and generating a driving signal to switch on and off a switching tube in the driving circuit;
the high-power processing circuit comprises a first switching tube Q1A second switch tube Q2And a third switching tube Q3And a fourth switching tube Q4And a cutting pipe QoffThe fifth switch tube Q5And a sixth switching tube Q6Seventh switch tube Q7The eighth switch tube Q8(ii) a First inductance L1A second inductor L2A third inductor L3A fourth inductor L4First, aAnti-backflow diode D1And a second anti-reflux diode D2And the third prevention reflux diode D3And a fourth anti-reflux diode D4
Wherein the first switch tube Q1A second switch tube Q2And a third switching tube Q3And a fourth switching tube Q4Is connected with an input voltage source, and the source electrodes are respectively connected with a first inductor L1A second inductor L2A third inductor L3A fourth inductor L4The other end of the inductor is respectively connected with a first anti-reflux diode D1And a second anti-reflux diode D2And the third prevention reflux diode D3And a fourth anti-reflux diode D4Is connected to the anode of the first anti-reflux diode D1And a second anti-reflux diode D2And the third prevention reflux diode D3And a fourth anti-reflux diode D4Cathode and cut-off tube QoffIs connected to the drain electrode of the cutting tube QoffA source electrode connected to a workpiece, a first switch tube Q1And a first inductor L1A second switch tube Q2And a second inductor L2A third switching tube Q3And a third inductor L3Fourth switch tube Q4And a fourth inductor L4Are respectively connected with a fifth switch tube Q5And a sixth switching tube Q6Seventh switch tube Q7The eighth switch tube Q8Is connected with the drain electrode of the fifth switching tube Q5And a sixth switching tube Q6Seventh switch tube Q7The eighth switch tube Q8Is grounded.
Further, the first switch tube Q1A second switch tube Q2And a third switching tube Q3And a fourth switching tube Q4The fifth switch tube Q5And a sixth switching tube Q6Seventh switch tube Q7The eighth switch tube Q8And a cut-off tube QoffThe metal oxide semiconductor field effect transistor is selected. First anti-reflux diode D1And a second anti-reflux diode D2And the third prevention reflux diode D3And a fourth anti-reflux diode D4MBR40250TG type diode is selectedAn inductor L1A second inductor L2A third inductor L3A fourth inductor L4A flat copper wire inductor is used.
The current detection circuit is formed by combining a current detection chip ACS732 and a two-stage operational amplifier AD4084, wherein the current detection chip ACS732 receives gap current signals and converts the gap current signals into voltage signals, and the voltage signals are converted into an acceptable voltage range of the FPGA analog-to-digital conversion module through the two-stage operational amplifier AD 4084.
The voltage detection circuit adopts a differential sampling circuit, and the voltage is output through a differential sampling gap and is converted into an acceptable voltage range of the FPGA analog-to-digital conversion module.
The FPGA digital control circuit adopts AX515, the analog-to-digital conversion module adopts ALINX9226, and the digital isolation chip adopts ADUM 1100. The analog-to-digital conversion module ALINX9226 receives the gap voltage and current analog signals, converts the gap voltage and current analog signals into digital signals and transmits the digital signals to the FPGA, and the FPGA generates a corresponding PWM control driving chip UCC 21521.
A novel current-sharing control method of a medium-speed wire-passing pulse power supply is characterized in that on the basis of the medium-speed wire-passing pulse power supply, switching-on and switching-off control is performed on a switching tube according to the conditions of gap voltage and gap current, and the average current of each Buck converter in a single discharge machining period is equal by controlling the switching tube to be circularly and repeatedly switched on according to a certain rule, and the method comprises the following specific steps:
step 1: setting the switching frequency f of the pulse power supply according to the processing material and the thickness of the processed workpiecesInput voltage V1Voltage sampling frequency kvCurrent sampling frequency ki
Step 2: when the first knife cuts at high power, the current waveform is selected to be rectangular wave;
and step 3: according to the switching frequency fsAnd current waveform determining the time T for applying the pulseonAnd deionization time ToffSetting a rectangular wave peak current Iset
And 4, step 4: in the pulse applying stage, the first switch tube Q is controlled1A second switch tube Q2And a third switching tube Q3And a fourth switching tube Q4Is conducted to enable the gap to be storedCan rise at the fastest rate;
and 5: sampling the voltage signal and the current signal of the gap in real time, respectively performing AD conversion to obtain digital signals of the gap voltage and the gap current, and detecting that the gap voltage has a steep drop and is less than a breakdown voltage threshold value VgapGreater than the short-circuit voltage threshold VshortAnd the gap current is larger than the breakdown current threshold IgapWhen the gap is broken down, a current sharing control strategy is introduced, the FPGA generates a PWM signal, and the first switch tube Q is controlled by the driving chip1A second switch tube Q2And a third switching tube Q3And a fourth switching tube Q4Continue to conduct simultaneously when the gap current rises to IsetThen, pressing 1, 2, 3 and 4; 2. 3, 4, 1; 3. 4, 1, 2 … … in the time of flow equalizing, corresponding low tube shutoff when the upper tube switches on, corresponding low tube shutoff when the upper tube switches off, so regular cycle reciprocating control switch tube switches on in turn for every way circuit current average value equals.
Step 6: after the current discharge is finished, deionization is carried out;
and 7: and repeating the steps 3-6, and carrying out the next processing period.
Compared with the prior art, the invention has the following remarkable advantages:
1. the control method can enable the average current of each circuit to be equal in the discharge machining process, avoid single-path overheating and improve the long-time machining stability of the medium-speed wire-moving pulse power supply.
2. The system has good current-sharing transient response characteristics and is stable, can be applied to a first knife in online cutting machining, and controls the waveform of machining current to be rectangular wave.
3. Compared with the traditional analog control circuit, the control circuit has lower cost, higher control precision, more convenient control and adjustment of the on-off sequence of the switching tube and continuous and adjustable processing current peak value by adopting the FPGA architecture and adopting a digital control method.
4. The main circuit of the invention adopts a high-power topology to be connected in parallel at two ends of the gap, uses the switch tube to control a processing circuit which needs to be used, removes a charging resistor and a current-limiting resistor in the traditional pulse power supply, and improves the efficiency of the pulse power supply system.
Drawings
Fig. 1 is a schematic diagram of a medium-speed wire pulse power supply framework of the invention.
Fig. 2 is a schematic diagram of an isolated high-side and low-side dual-output driver chip selected for use in the driver circuit.
Fig. 3 is a schematic diagram of the compensated duty cycle.
FIG. 4 is a schematic diagram of rectangular wave current processing of the pulsed power supply of the invention.
Fig. 5 is a schematic diagram of current sharing control of the medium-speed wire-feeding pulse power supply according to the present invention.
Fig. 6 is a main circuit topology of the medium-speed wire pulse power supply of the invention.
Detailed Description
The invention is described in further detail below with reference to the accompanying drawings.
The present invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.
As shown in figures 1 and 2, the pulse power supply for the wire moving in the electric spark can be used for high-power rough machining and fine finishing, and comprises a main power circuit, a detection circuit, a control circuit and a driving circuit. The main power circuit is used for a first tool machining process of wire electrical discharge machining; the detection circuit is used for detecting gap voltage and gap current; the control circuit realizes current sharing control of each current of the first cutting of the medium-speed wire-moving pulse power supply based on FPGA, and takes a single discharge machining period as an example, the average value of each current is equal by generating signals for controlling the on and off of a switching tube according to a certain rule in a circulating and reciprocating manner; the driving circuit is used for amplifying the control signal output by the FPGA and generating a driving signal to switch on and off a switching tube in the driving circuit;
the main power circuit comprises a first switch tube Q1A second switch tube Q2And a third switching tube Q3And the fourthSwitch tube Q4And a cutting pipe QoffThe fifth follow current switch tube Q5The sixth freewheeling switch tube Q6The seventh follow current switch tube Q7An eighth freewheeling switching tube Q8, a first inductor L1A second inductor L2A third inductor L3A fourth inductor L4A first anti-reflux diode D1And a second anti-reflux diode D2And the third prevention reflux diode D3And a fourth anti-reflux diode D4Wherein the first switch tube Q1A second switch tube Q2And a third switching tube Q3And a fourth switching tube Q4Is connected with an input voltage source, and the source electrodes are respectively connected with a first inductor L1A second inductor L2A third inductor L3A fourth inductor L4The other end of the inductor is respectively connected with a first anti-reflux diode D1And a second anti-reflux diode D2And the third prevention reflux diode D3And a fourth anti-reflux diode D4Is connected to the cathode of the cutting tube QoffA source electrode connected to a workpiece, a first switch tube Q1And a first inductor L1A second switch tube Q2And a second inductor L2A third switching tube Q3And a third inductor L3Fourth switch tube Q4And a fourth inductor L4Are respectively connected with a fifth follow current switch tube Q5The sixth freewheeling switch tube Q6The seventh follow current switch tube Q7The eighth follow current switch tube Q8Is connected with the drain electrode of the fifth follow current switching tube Q5The sixth freewheeling switch tube Q6The seventh follow current switch tube Q7The eighth follow current switch tube Q8Is grounded.
The switch tube in the main power circuit of the invention is a Metal Oxide Semiconductor Field Effect Transistor (MOSFET). Based on different semiconductor materials, power MOSFETs with different withstand voltages, different operating frequencies and suitable for different power occasions are available in the industry at present. As the invention needs to be applied to the electric machining occasions with more complicated machining conditions, such as wire cut electrical discharge machining, the invention can select IPP60R model number of Infineon (England flying Diamond) as a preferred embodiment074C6 MOSFET, drain-source voltage V of the MOSFETDSUp to 600V, drain current ID57.7A, can be suitable for various electric spark machining occasions with different powers.
The diode in the invention is a Schottky diode and has the model of MBR40250 TG.
As shown in fig. 4, for the driving circuit, the present invention uses a high-low end driving chip with isolation, here a gate driving IC chip with model number UCC21521, which is derived from Texas Instruments, and is a dual-channel, high-speed, isolated, gate driving chip with enable pin, and has a bandwidth as high as 5MHz, an isolation voltage as high as 5.7kV, and a surge anti-interference voltage of 12.8 kV. The driving chip can generate high-side and low-side driving at the same time, and the primary side and the secondary side are isolated, so that the interference between a main circuit and a control circuit is reduced.
As shown in fig. 3, the voltage detection circuit adopts an operational amplifier circuit for an instrument, and outputs a voltage through a differential sampling gap to be converted into an acceptable voltage range of the FPGA digital-to-analog conversion module.
As shown in fig. 4, the current detection circuit adopts a combination of a current detection chip ACS732 and a two-stage operational amplifier AD4084, the current detection chip ACS732 receives a gap current signal and converts the gap current signal into a voltage signal, and the voltage signal is converted into an acceptable voltage range of the FPGA digital-to-analog conversion module through the two-stage operational amplifier AD 4084.
And the model number corresponding to the FPGA development board is AX 515.
The control circuit of the invention is realized by FPGA. The current and voltage detection circuit monitors the gap state in real time, detection signals are converted into digital quantity through the AD9226 module and then transmitted to the FPGA, the FPGA judges the gap state according to the sampled gap voltage and gap current, the duty ratio of a corresponding switch tube is generated according to a certain rule according to the timing condition of a counter inside the FPGA, and then the drive circuit drives the main circuit switch tube to work.
According to the novel current-sharing control method based on the medium-speed wire-passing pulse power supply, gap voltage and gap current are used as the basis for judging the gap state, and according to the current-sharing control idea, the current-sharing control method is that the conduction sequence of each switching tube is different in each small staggered period by corresponding to each small four-way circuit staggered conduction period in one discharge machining period, and the occupied proportion of each switching tube in each conduction sequence is the same in one discharge period.
The method specifically comprises the following steps:
step 1: setting the switching frequency f of the pulse power supply according to the processing material and the thickness of the processed workpiecesInput voltage V1Voltage sampling frequency kvCurrent sampling frequency ki
Step 2: when the first knife cuts at high power, the current waveform is selected to be rectangular wave;
and step 3: according to the switching frequency fsAnd current waveform determining the time T for applying the pulseonAnd deionization time ToffSetting a rectangular wave peak current Iset
And 4, step 4: in the pulse applying stage, the first switch tube Q is controlled1A second switch tube Q2And a third switching tube Q3And a fourth switching tube Q4Conducting to enable the gap voltage to rise at the fastest rate;
and 5: sampling the voltage signal and the current signal of the gap in real time, respectively performing AD conversion to obtain digital signals of the gap voltage and the gap current, and detecting that the gap voltage has a steep drop and is less than a breakdown voltage threshold value VgapGreater than the short-circuit voltage threshold VshortAnd the gap current is larger than the breakdown current threshold IgapWhen the gap is broken down, a current sharing control strategy is introduced, the FPGA generates a PWM signal, and the first switch tube Q is controlled by the driving chip1A second switch tube Q2And a third switching tube Q3And a fourth switching tube Q4Continue to conduct simultaneously when the gap current rises to IsetThen, pressing 1, 2, 3 and 4; 2. 3, 4, 1; 3. 4, 1, 2 … … control the switch tube to conduct alternatively in regular cycle, so that the average value of the current in each circuit is equal.
Step 6: after the current discharge is finished, deionization is carried out;
and 7: and repeating the steps 3-6, and carrying out the next processing period.
The specific steps are described in detail as follows:
the method comprises the following steps: setting the switching frequency f of the pulse power supply according to the first cutting processing requirementsInput voltage V1Voltage sampling frequency kvCurrent sampling frequency kiThe single four-path staggered period is tj, the single-path on-time is ts, two paths are adjacently switched in the single staggered period, and the interval between the switching-off time of the previous path and the switching-on time of the next path is t1
Step two: taking a single processing cycle as an example, when the first knife processing starts, the FPGA digital control circuit outputs PWM to control a first switch tube (Q)1) And a third switching tube (Q)3) Second switch tube (Q)2) Fourth switch tube (Q)4) Simultaneously opening and cutting off the tube QoffTurning on and controlling the fifth switch tube (Q)5) And a sixth switching tube (Q)6) Seventh switching tube (Q)7) The eighth switching tube (Q)8) Off, input voltage V1Applied across the gap to charge the gap for gap breakdown.
Step three: after the gap breakdown, the discharge current starts to rise rapidly, when the current value rises to the current threshold value set by the FPGA, the FPGA counter 1 and the FPGA counter 2 start to count from zero, and the first switch tube (Q) is connected with the first switch tube1) Continuously turning on the fifth switch tube (Q)2) The first path of current continues to rise when the power is turned off, and the second switching tube (Q)2) And a third switching tube (Q)3) And a fourth switching tube (Q)4) Off, sixth switching tube (Q)6) And a seventh switching tube (Q)7) And an eighth switching tube (Q)8) And when the current is conducted, the second, third and fourth paths of current flow and fall.
Step four: when the FPGA counter 2 counts tsTime, the first switch tube (Q)1) Off, fifth switching tube (Q)5) When the circuit is switched on, the first path of current also continues current, and the four paths of current are simultaneously reduced.
Step five: when the FPGA counter 2 counts ts+t0Time, the second switch tube (Q)2) Starting to turn on, the sixth switching tube (Q)6) The first switch tube (Q) is turned off, the second path of current starts to rise1) And a third switching tube (Q)3) And a fourth switching tube (Q)4) Off, fifth switching tube (Q)5) And a seventh switching tube (Q)7) And an eighth switching tube (Q)8) And when the current is conducted, the first, third and fourth paths of current continue to flow and continuously drop.
Step six: when the FPGA counter 2 counts to 2ts+t0+ d' ts, the second switch tube (Q)2) Off, sixth switching tube (Q)6) And when the current is conducted, the second path of current starts to follow the current similarly, the four paths of current are reduced simultaneously, and the FPGA continues to count.
Step seven: when the FPGA counter 2 counts to 2ts+2t0+ d' ts, the third switch tube (Q)3) Starting to turn on, the seventh switching tube (Q)7) Turning off, the third current begins to rise, and the first switch tube (Q)1) A second switch tube (Q)2) And a fourth switching tube (Q)4) Off, fifth switching tube (Q)5) And a sixth switching tube (Q)6) And an eighth switching tube (Q)8) And when the current is conducted, the first, second and fourth paths of current continue to flow and continuously drop.
Step eight: when the FPGA counter 2 counts to 3ts+2t0+2d' ts, the third switch tube (Q)3) Off, seventh switching tube (Q)7) And when the current is conducted, the third current starts to flow afterward, the fourth current is reduced at the same time, and the FPGA continues to count.
Step nine: when the FPGA counter 2 counts to 3ts+3t0+2d' ts, the fourth switch tube (Q)4) Starting to turn on the eighth switching tube (Q)8) Turning off, the fourth current starts to rise, and the first switch tube (Q)1) A second switch tube (Q)2) And a third switching tube (Q)3) Off, fifth switching tube (Q)5) And a sixth switching tube (Q)6) And a seventh switching tube (Q)7) And when the current is conducted, the first, second and third currents follow current and continuously drop.
Step ten: when the FPGA counter 2 counts to 4ts+3t0+3d' ts, the fourth switch tube (Q)4) Off, eighth switching tube (Q)8) Conducting, the fourth current starts to flow again, andand the current of the circuit is reduced at the same time, and the FPGA continues counting.
Step eleven: when the FPGA counter 1 counts tjThen, the counter 1 continues counting, the counter 2 is cleared, and recounting is started. Repeating the third step to the tenth step, and under the condition that the time distribution of the counter 2 is the same, performing on-off control on the upper switch tube and the lower switch tube, wherein the sequence respectively comprises the following steps: the first four switch tubes correspond to the second switch tube (Q)2) And a third switching tube (Q)3) And a fourth switching tube (Q)4) A first switch tube (Q)1) (ii) a The last four switch tubes correspond to the sixth switch tube (Q)6) And a seventh switching tube (Q)7) And an eighth switching tube (Q)8) And a fifth switching tube (Q)5)。
Step twelve: when the FPGA counter 1 counts to 2tjThen, the counter 1 continues counting, the counter 2 is cleared, and recounting is started. Repeating the above steps, under the condition that the time distribution of the counter 2 is the same, performing on-off control on the upper switch tube and the lower switch tube, sequentially moving left by one bit, and respectively: the first four switch tubes correspond to the third switch tube (Q)3) And a fourth switching tube (Q)4) A first switch tube (Q)1) A second switch tube (Q)2) (ii) a The last four switch tubes correspond to the seventh switch tube (Q)7) And an eighth switching tube (Q)8) And a fifth switching tube (Q)5) And a sixth switching tube (Q)6)。
Step thirteen: when the FPGA counter 1 counts to ntj(n is 3, 4, 5, 6.) the counter 1 continues counting, the counter 2 is cleared, and recounting is started. And repeating the steps, and performing on-off control on the upper switching tube and the lower switching tube under the condition that the time distribution of the counter 2 is the same, wherein the upper switching tube and the lower switching tube are sequentially shifted by one bit to the left. The on and off sequence of the switch tube is controlled in a circulating reciprocating mode, so that the average value of the current corresponding to each circuit in a single discharge period is equal, and the purpose of current equalization is achieved.
Fourteen steps: when the FPGA counter 1 counts TonTime, the first switch tube (Q)1) A second switch tube (Q)2) And a third switching tube (Q)3) And a fourth switching tube (Q)4) Turning off; fifth aspect of the inventionSwitch tube (Q)5) And a sixth switching tube (Q)6) And a seventh switching tube (Q)7) And an eighth switching tube (Q)8) And conducting. The current drops, when the current drops to zero, the first switch tube (Q)1) A second switch tube (Q)2) And a third switching tube (Q)3) And a fourth switching tube (Q)4) Turning off; fifth switch tube (Q)5) And a sixth switching tube (Q)6) And a seventh switching tube (Q)7) And an eighth switching tube (Q)8) And (6) turning off. Cutting tube QoffLikewise, it is turned off until the counter 1 counts TsAnd then, resetting the counter 1 after the single processing cycle is finished, and repeating the steps from two to fourteen. Until the first cutting is finished.
It will be understood by those skilled in the art that, unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the prior art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
The above-mentioned embodiments, objects, technical solutions and advantages of the present invention are further described in detail, it should be understood that the above-mentioned embodiments are only illustrative of the present invention and are not intended to limit the present invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (7)

1. A novel pulse width compensation current equalizing method of a medium-speed wire pulse power supply is characterized by comprising a main power circuit, a voltage detection circuit, a current detection circuit and an FPGA digital control circuit; wherein the main power circuit is used for directly controlling the machining current; the current detection circuit and the voltage detection circuit are used for detecting current and voltage signals of a gap in a cutting process in real time; the FPGA digital control circuit is used for indirectly controlling the machining current, setting a current threshold, receiving a real-time gap voltage current signal, performing digital-to-analog conversion, comparing the real-time gap voltage current signal with the given threshold, and outputting a PWM signal to control the on-off of the switching tube.
2. The novel pulse width compensation current sharing method for medium-speed wire-moving pulse power supply according to claim 1, wherein the pulse power supply main circuit comprises an input direct current source (V)in) First switch tube (Q)1) A second switch tube (Q)2) And a third switching tube (Q)3) And a fourth switching tube (Q)4) And a fifth switching tube (Q)5) And a sixth switching tube (Q)6) And a seventh switching tube (Q)7) And an eighth switching tube (Q)8) Inductor (L)1、L2、L3、L4) Diode (D)1、D2、D3、D4) Cutting off the tube (Q)off) Parasitic inductance (L) of the cablep) Said switching tube (Q)1、Q2、Q3、Q4、Q5、Q6、Q7、Q8) Inductance (L)1、L2、L3、L4) Four-way parallel synchronous rectification Buck circuit is formed, the anodes of the diodes (D1, D2, D3 and D4) are connected with one end close to the inductors (L1, L2, L3 and L4), the cathodes of the diodes are connected with one end close to the output side, and the switching tube (Q) is connected with the output end of the switching tubeoff) The inductance (Lp) is a parasitic inductance corresponding to a cable connecting the output end of the four-way Buck parallel circuit and a machine tool machining gap.
3. The novel pulse width compensation current sharing method for medium-speed wire pulse power supply according to claim 1, wherein the switching tube (Q)1) The LED is a MOSFET with the model number of IPP6R074C6 manufactured by Infineon company, the diode D is F1515S, and the inductor L is a flat copper conductor inductor.
4. The novel pulse width compensation current sharing method for the medium-speed wire pulse power supply according to claim 1, wherein the current detection circuit is formed by combining a current detection chip ACS732 and a two-stage operational amplifier AD4084, the current detection chip ACS732 receives a gap current signal and converts the gap current signal into a voltage signal, and the voltage signal is converted into an acceptable voltage range of an analog-to-digital conversion module through the two-stage operational amplifier AD 4084.
5. The novel pulse width compensation current sharing method for the medium-speed wire pulse power supply according to claim 1, wherein the voltage detection circuit adopts a differential sampling circuit and converts the voltage into a voltage range acceptable for an analog-to-digital conversion module.
6. The novel pulse width compensation current sharing method for the medium-speed wire pulse power supply according to claim 1, wherein the FPGA digital control circuit adopts AX515, and the analog-to-digital conversion module adopts ALINX 9226; the analog-to-digital conversion module ALINX9226 receives the gap voltage and current analog signals, converts the gap voltage and current analog signals into digital signals and transmits the digital signals to the FPGA, and the FPGA calculates and generates corresponding PWM signals to the MOSFET switching tube through the driving chip.
7. The current sharing method and the control method thereof according to any one of claims 1 to 6, characterized by comprising the following steps:
the method comprises the following steps: setting the switching frequency f of the pulse power supply according to the first cutting processing requirementsInput voltage V1Voltage sampling frequency kvCurrent sampling frequency kiThe single four-way interleaving period is tjOne-way on time tsThe duty ratio of the single-path compensation is d', two paths are adjacently switched in a single staggered period, and the interval between the switching-off time of the previous path and the switching-on time of the next path is t0(ii) a Wherein the compensation duty cycle d' is:
Figure FDA0003284973270000021
step two: taking a single processing cycle as an example, when the first cutting process is started, the FPGA digital control circuit outputs PWM,controlling the first switching tube (Q)1) And a third switching tube (Q)3) Second switch tube (Q)2) Fourth switch tube (Q)4) Simultaneously opening and cutting off the tube QoffTurning on and controlling the fifth switch tube (Q)5) And a sixth switching tube (Q)6) Seventh switching tube (Q)7) The eighth switching tube (Q)8) Off, input voltage V1The energy is provided to the gap by being added at the two ends of the gap so as to facilitate the breakdown of the gap;
step three: after the gap breakdown, the discharge current starts to rise rapidly, when the current value rises to the current threshold value set by the FPGA, the FPGA counter 1 and the FPGA counter 2 start to count from zero, and the first switch tube (Q) is connected with the first switch tube1) Continuously turning on the fifth switch tube (Q)5) The first path of current continues to rise when the power is turned off, and the second switching tube (Q)2) And a third switching tube (Q)3) And a fourth switching tube (Q)4) Off, sixth switching tube (Q)6) And a seventh switching tube (Q)7) And an eighth switching tube (Q)8) Conducting, and enabling the second, third and fourth paths of current to flow afterward and fall;
step four: when the FPGA counter 2 counts tsTime, the first switch tube (Q)1) Off, fifth switching tube (Q)5) Conducting, enabling the first path of current to flow continuously as well, and simultaneously reducing the four paths of current;
step five: when the FPGA counter 2 counts ts+t0Time, the second switch tube (Q)2) Starting to turn on the sixth switching tube (Q)6) The first switch tube (Q) is turned off, the second path of current starts to rise1) And a third switching tube (Q)3) And a fourth switching tube (Q)4) Off, fifth switching tube (Q)5) And a seventh switching tube (Q)7) And an eighth switching tube (Q)8) Conducting, and enabling the first, third and fourth paths of current to flow afterward and continuously descend;
step six: when the FPGA counter 2 counts to 2ts+t0When the current + d' ts is positive, the second switching tube (Q2) is switched off, the sixth switching tube (Q6) is switched on, the second path of current starts to flow continuously, the four paths of current are reduced simultaneously, and the FPGA continues to count;
step seven: when the FPGA counter 2 counts to 2ts+2t0+ d' ts, the third switchPipe (Q)3) Starting to turn on, the seventh switching tube (Q)7) Turning off, the third current begins to rise, and the first switch tube (Q)1) A second switch tube (Q)2) And a fourth switching tube (Q)4) Off, fifth switching tube (Q)5) And a sixth switching tube (Q)6) And an eighth switching tube (Q)8) Conducting, and enabling the first, second and fourth paths of current to flow afterward and continuously descend;
step eight: when the FPGA counter 2 counts to 3ts+2t0+2d' ts, the third switch tube (Q)3) Off, seventh switching tube (Q)7) Conducting, enabling the third path of current to flow continuously, enabling the fourth path of current to drop simultaneously, and enabling the FPGA to continue counting;
step nine: when the FPGA counter 2 counts to 3ts+3t0+2d' ts, the fourth switch tube (Q)4) Starting to turn on the eighth switching tube (Q)8) Turning off, the fourth current starts to rise, and the first switch tube (Q)1) A second switch tube (Q)2) And a third switching tube (Q)3) Off, fifth switching tube (Q)5) And a sixth switching tube (Q)6) And a seventh switching tube (Q)7) Conducting, and enabling the first, second and third currents to flow aftercurrent and continuously fall;
step ten: when the FPGA counter 2 counts to 4ts+3t0+3d' ts, the fourth switch tube (Q)4) Off, eighth switching tube (Q)8) Conducting, enabling the fourth current to flow continuously, enabling the four currents to fall simultaneously, and enabling the FPGA to continue counting;
step eleven: when the FPGA counter 1 counts tjWhen the counter 1 continues counting, the counter 2 is cleared and starts to count again; repeating the third step to the tenth step, and under the condition that the time distribution of the counter 2 is the same, performing on-off control on the upper switch tube and the lower switch tube, wherein the sequence respectively comprises the following steps: the first four switch tubes correspond to the second switch tube (Q)2) And a third switching tube (Q)3) And a fourth switching tube (Q)4) A first switch tube (Q)1) (ii) a The last four switch tubes correspond to the sixth switch tube (Q)6) And a seventh switching tube (Q)7) And an eighth switching tube (Q)8) And a fifth switching tube (Q)5);
Step tenII, secondly: when the FPGA counter 1 counts to 2tjWhen the counter 1 continues counting, the counter 2 is cleared and starts to count again; repeating the above steps, under the condition that the time distribution of the counter 2 is the same, performing on-off control on the upper switch tube and the lower switch tube, sequentially moving left by one bit, and respectively: the first four switch tubes correspond to the third switch tube (Q)3) And a fourth switching tube (Q)4) A first switch tube (Q)1) A second switch tube (Q)2) (ii) a The last four switch tubes correspond to the seventh switch tube (Q)7) And an eighth switching tube (Q)8) And a fifth switching tube (Q)5) And a sixth switching tube (Q)6);
Step thirteen: when the FPGA counter 1 counts to ntj(n is 3, 4, 5, 6.. said.), the counter 1 continues counting, the counter 2 is cleared and starts to count again; repeating the steps, and under the condition that the time distribution of the counter 2 is the same, carrying out on-off control on the upper switching tube and the lower switching tube, and sequentially moving left by one bit; the on-off sequence of the switch tube is controlled in a circulating reciprocating manner, so that the average value of the current corresponding to each circuit in a single discharge period is equal, and the purpose of current equalization is achieved;
fourteen steps: when the FPGA counter 1 counts TonTime, the first switch tube (Q)1) A second switch tube (Q)2) And a third switching tube (Q)3) And a fourth switching tube (Q)4) Turning off; fifth switch tube (Q)5) And a sixth switching tube (Q)6) And a seventh switching tube (Q)7) And an eighth switching tube (Q)8) Conducting; the current drops, when the current drops to zero, the first switch tube (Q)1) A second switch tube (Q)2) And a third switching tube (Q)3) And a fourth switching tube (Q)4) Turning off; fifth switch tube (Q)5) And a sixth switching tube (Q)6) And a seventh switching tube (Q)7) And an eighth switching tube (Q)8) Turning off; cutting tube QoffLikewise, it is turned off until the counter 1 counts TsWhen the single processing cycle is finished, resetting the counter 1, and repeating the steps from two to fourteen; until the first cutting is finished.
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