CN114023807A - Method for preparing high-performance metal nano fiber field effect transistor by diameter regulation - Google Patents
Method for preparing high-performance metal nano fiber field effect transistor by diameter regulation Download PDFInfo
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
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Abstract
The invention belongs to the technical field of field effect transistor preparation, and relates to a method for preparing a high-performance metal nano fiber field effect transistor by diameter regulation, which comprises the steps of firstly preparing a pure In electrostatic spinning precursor solution, a pure Sn electrostatic spinning precursor solution and an ITO electrostatic spinning precursor solution respectively; preparing a high-kappa substrate attached with NFs on the high-kappa substrate by adopting an electrostatic spinning technology; finally, processing the high-kappa substrate attached with NFs, evaporating a layer of 60-100 nm Al film to be used as a source electrode and a drain electrode to obtain a corresponding transistor, and preparing In2O3、SnO2The NFsFET has the advantages that the performance of the NFsFET reaches or even exceeds the optimal performance of the same material under the condition of no doping, the mobility is high, the power consumption of the device is greatly reduced, the performance of the device is improved, and the NFsFET has great application potential.
Description
The technical field is as follows:
the invention belongs to the technical field of field effect transistor preparation, and relates to a method for preparing a high-performance metal nano fiber field effect transistor by diameter regulation2O3、SnO2ITO nanofiberA field effect transistor.
Background art:
in the past decades, one-dimensional nanomaterials are widely used in the research fields of photodetectors, gas detectors, energy storage devices, electronic devices, and the like. Metal oxides, In which2O3And SnO2The FET has a high carrier concentration and a suitable forbidden band width, and thus is widely used as a channel material of the FET. Although In2O3And SnO2Its on-state current (I) due to its high carrier concentrationon) Relatively high, but high carrier concentration also results in off-state current (I)off) Higher so that the switching current ratio (I)on/Ioff) Is relatively low and has a threshold voltage (V)TH) The negative value is a depletion mode device, and the device performance is poor. ITO is widely used as a transparent conductive material for photodetectors, solar cells, and high-performance FETs in general due to its excellent conductivity, stability, and transparency. Because ITO has high conductivity and hardly has the characteristics of a semiconductor, it is rarely used as a semiconductor material for a channel material of an electronic device.
To solve the above problems, the most widely used method at present is to reduce In by doping other substances2O3And SnO2Carrier concentration, thereby regulating FET performance; for example, the Antonio Facchetti group at northwest university of America, by In2O3PEI (polyethyleneimine) is doped In IZO, IGO and IGZO solutions to reduce carrier concentration so as to regulate and control FET performance, In2O3Best results when the doping weight fraction of PEI is 1.5%, Ion/IoffImproves three orders of magnitude, changes depletion type into enhancement type, and has the best effect when the doping mass fractions of IZO, IGO and IGZO of PEI are respectively 0.5%, 1% and 0.5%, wherein the IGO effect doped by 1% PEI is the most obvious, and V is converted into VTHReduced from 50V to 19V, while Ion/IoffIs composed of (10)5~106Is increased to 106~107(ii) a The subject group of professor Qun Zhang of the university of Compound Dan is provided by SnO2Ti is doped in the silicon nitride to reduce the carrier concentration and regulate the FET performance, when the Ti doping concentration is 20%, the performance of the device is optimal, the device is changed from depletion type to enhancement type, Ion/IoffThe improvement is 5 orders of magnitude; H.C.Zhang et al doped In with Mg2O3The nano-fiber has the best effect when the doping concentration is 2 mol%, the on-off ratio is improved by at least 4 orders of magnitude, the device obtains the best performance when the doping amount is 6%, the device is changed from depletion type to enhancement type, and I is also addedon/IoffThe improvement is 5 orders of magnitude; the subject group of professor Qun Zhang of the university of Compound Dan is provided by SnO2Ti is doped in the silicon nitride to reduce the carrier concentration and regulate the FET performance, when the Ti doping concentration is 20%, the performance of the device is optimal, the device is changed from depletion type to enhancement type, Ion/IoffThe improvement is 5 orders of magnitude; kim professor of Korea advanced science and technology institute for In production by electrospinning2O3-ZnO-ZnGa2O4FET with a device switching ratio of 105Threshold voltage of 1V only and mobility of 7.04cm2V-1s-1. In addition, ZnGeO, InZnO, AlZnSnO, ZrSnZnO, TiSnZnO and ZnSSe have been carried out in the prior art[39]The doping experiments of the devices all obtain better effects, although the method for regulating and controlling the performance of the FET is simpler by controlling the concentration of the carriers through doping, the doping elements required by different metal oxide materials are different, the optimal doping amounts of different doping elements are also different, the optimal doping effect cannot be achieved when the doping amount is small, and the performance of the device is rapidly reduced when the doping amount exceeds the optimal concentration, so that the mass production is not facilitated.
In addition to doping, the group of professor Johnny c.ho, university of hong Kong City, utilizes CVD to grow single crystal In2xGa2-2xThe O nanowire realizes the preparation of the FET with ultrahigh mobility because no crystal boundary blocks and scatters a current carrier in the single crystal; preparation of amorphous InGaZnO/In by radio frequency magnetron sputtering (RF) for subject group of Lei Liao professor of Wuhan university2O3The TFT prepared by the method has no blocking and scattering effect of crystal boundary on current carrier in amorphous stateHas high mobility. Although these two methods achieve the production of a high mobility FET by producing single crystal and amorphous semiconductor layers, the CVD method is low in yield and requires a special atmosphere and high temperature environment, and the production is complicated, as compared with the electrospinning method. The bombardment of the RF high-energy particle beams can damage the substrate, which is not beneficial to the integration of devices, and simultaneously, Ga doping is used in the manufacturing process, so that the problems of excessive doping or insufficient doping can be caused; also the low resistivity of ITO results from oxygen vacancies and the substitution of indium by high electron tin dopants, fixing the fermi level at the conduction band edge and leading to metallic conduction behavior. In other material systems, including 2D materials, reducing the thickness has proven effective in increasing the band gap and reducing the free carrier concentration, since for nanomaterials, after size reduction, the valence and conduction band tops move in opposite directions due to the quantum confinement effect, increasing the band gap. Therefore, ITO can be changed from a conductor to a semiconductor, but the preparation of a 2D material and the thickness control are difficult, and the yield of an Atomic Layer Deposition (ALD) technology is low, which is not favorable for large-scale production. For NFs a reduction in diameter is more effective, on the one hand a reduction in diameter corresponds to a reduction in material thickness, which increases the band gap and reduces the conductivity](ii) a On the other hand, the specific surface area is increased due to the fact that the fiber diameter is reduced, NFs has more surface states, and the surface states are increased, so that free electrons are easier to capture, and the threshold voltage is caused to move in the forward direction. Therefore, it is desirable to design and provide a method for manufacturing a novel high-performance metal nano fiber field effect transistor.
The invention content is as follows:
the invention aims to overcome the defects in the prior art, and designs and provides a method for preparing a high-performance metal nano fiber field effect transistor by diameter regulation.
In order to realize the purpose, the specific process for preparing the high-performance metal nano fiber field effect transistor comprises the following steps:
(1) respectively preparing a pure In electrostatic spinning precursor solution, a pure Sn electrostatic spinning precursor solution and an ITO electrostatic spinning precursor solution;
(2) respectively extracting 5ml of the three electrostatic spinning precursor solutions prepared In the step (1) by using an injector to respectively perform experiments, placing the ultrasonically cleaned high-kappa substrate at the receiving end of an electrostatic spinning device, and under the condition that the humidity of a spinning environment is lower than 40%, using an electrostatic spinning technology to spin the pure In electrostatic spinning precursor solution and the pure Sn electrostatic spinning precursor solution on the high-kappa substrate by using needles with the inner diameters of 0.16mm and 0.11mm respectively, spinning the electrostatic spinning precursor solution In the injector on the high-kappa substrate under the voltage of 15kV, wherein the spinning time is fixed to 55s to obtain the high-kappa substrate with NFs;
(3) placing the high-kappa substrate attached with NFs into a glue baking table, baking for 10min, irradiating for 30min by using a UV lamp to enable the fibers to be tightly contacted with the high-kappa substrate, placing the high-kappa substrate into a muffle furnace, annealing for 2h at 600 ℃, naturally cooling to room temperature, taking out, and finally evaporating a layer of 60-100 nm Al film on the high-kappa substrate by using a mask plate through a thermal evaporation method to serve as a source electrode and a drain electrode.
Further, the preparation process of the pure In electrostatic spinning precursor solution comprises the following steps: 0.2g of InCl3·4H2O, 0.9g of PVP and 5g of DMF are mixed In a glass bottle, and the mixture is stirred for 8 hours at room temperature by a magnetic stirrer until the solution is uniform and transparent, so that the electrostatic spinning precursor solution of the pure In source is formed.
Further, the preparation process of the pure Sn electrostatic spinning precursor solution comprises the following steps: 0.3g of SnCl20.9g of PVP and 5g of DMF are mixed in a glass bottle and stirred for 8 hours at room temperature by a magnetic stirrer until the solution is uniform and transparent, thus forming the electrostatic spinning precursor solution of the pure Sn source.
Further, the preparation process of the ITO electrostatic spinning precursor solution comprises the following steps: 0.2g of InCl3·4H2O、0.0144g SnCl20.9g of PVP and 5g of DMF were mixed In a glass bottle and stirred at room temperature for 8 hours by a magnetic stirrer until the solution was homogeneous and transparent, thus forming an ITO electrospinning precursor solution with In: Sn of 9: 1.
Further, the preparation process of the high-kappa substrate comprises the following steps:
(1) 0.375g of Al (NO)3)3·9H2Adding O and 10ml of DMF into a glass bottle, and stirring for 8 hours at room temperature by using a magnetic stirrer to fully dissolve the DMF;
(2) heavily doping P type without SiO2Ultrasonic cleaning of the silicon wafer of the layer with N2After blow-drying, placing the silicon wafer in a plasma cleaning machine for treatment for 3min, and then placing the treated silicon wafer on a spin coater;
(3) dripping the prepared high-kappa solution on a silicon wafer through a PTFE filter head with the diameter of 0.22 mu m by using an injector to enable the solution to cover the surface of the silicon wafer, operating at the rotating speed of 300rpm for 5s, then operating at the rotating speed of 6000rmp for 15s, and stopping;
(4) and taking down the silicon wafer, placing the silicon wafer on a 150-DEG baking table for 10 seconds, evaporating the solvent to dryness, and then placing the silicon wafer into a muffle furnace for 700-DEG annealing for 2 hours to obtain the high-kappa substrate.
Compared with the prior art, the invention adopts the electrostatic spinning technology to prepare the undoped high-performance In2O3、SnO2NFs FET, without doping, performs well beyond the optimum performance of the same material doping, In2O3 NFs FET,VTHThe voltage is changed from-16.55V to 2.48V, and the device is changed from depletion mode to enhancement mode, Ion/IoffFrom 10 to3Is increased to 108,SnO2 NFs FET,VTHThe voltage is changed from-13.32V to 1.70V, and the device is changed from depletion mode to enhancement mode, Ion/IoffFrom 10 to4Is increased to 107And the ITO is successfully applied to the semiconductor layer to prepare the ITO NFs FET, so that the ITO conductivity is converted from a conductor to a semiconductor, and the best performance V is achievedTHIs 2.81V, Ion/IoffTo-108(ii) a Second, use high-kappa layer Al2O3Replace the conventional SiO2After the layer is formed, the source-drain voltage of the device is reduced to 3V from 30V, the gate voltage is reduced to 5V and 8V from 30V and 60V respectively, and the mobility is improved, wherein In2O3NFs high-k FET mobility up to 126cm2/V-1s-1,SnO2NFs mobility of the high- κ FET is 29cm2V-1s-1Mobility of ITO NFs high- κ FET up to 160cm2V-1s-1The power consumption of the device is greatly reduced, the performance of the device is improved, and the device has great application potential.
Description of the drawings:
FIG. 1 shows SEM data of NFs 600 ℃ post annealing SEM and diameter statistics prepared for 0.34mm (a), 0.26mm (b), 0.21mm (c), 0.16mm (d), 0.11mm (e) and 0.08mm (f) of the inner diameter of the needle tip in example 1 of the present invention.
FIG. 2 shows In different diameters (a) In example 1 of the present invention2O3、(b)SnO2XRD spectrogram of (1).
FIG. 3 shows In of different diameters In example 1 of the present invention2O3NFs, wherein (a)0.34-ND In2O3、(b)0.21-ND In2O3、(c)0.08-ND In2O3。
FIG. 4 is a schematic diagram of different diameter NFs FET structures (a) and different diameter In of example 1 of the present invention2O3(b)、SnO2(c) ITO (d) NFs FET transfer characteristics.
FIG. 5 shows a quantum confinement effect (a) and different diameters In according to the present invention2O3(b)、SnO2(c) ITO (d) of NFs FET (Ahv)2-hv curve.
FIG. 6 is a graph showing the output characteristics of NFs FETs of different diameters In example 1 of the present invention, wherein (a) to (c) In2O3、(d)~(f)SnO2、(g)~(i)ITO。
FIG. 7 SiO, the optimum diameter, described in example 2 of the present invention2Schematic structure of/high κ NFs FET.
FIG. 8 shows the optimum diameter (a) In example 2 of the present invention2O3、(b)SnO2、(c)ITOSiO2High κ NFs FET transfer characteristic plot.
The specific implementation mode is as follows:
the invention is further illustrated by the following examples in conjunction with the accompanying drawings.
The experimental drugs and instruments used in this example were as follows:
experimental drugs: polyvinylpyrrolidone (PVP) (1300000g/mol, Aladdin), InCl3·4H2O(293.24g/mol,99.9%,Aladdin),SnCl2(189.62g/mol,99.99%,Aladdin),Al(NO3)3·9H2O (375.13g/mol, 99.99%, Aladdin), Dimethylformamide (DMF) (99.8%, Aladdin) with 300nm SiO2Film P-type heavily doped silicon wafer and silicon dioxide layer-free P-type heavily doped silicon wafer
An experimental instrument: electrospinning apparatus, hot plates, UV lamps, muffle furnace, thermal evaporation system, scanning electron microscope (SEM, Nova Nano SEM450, operated at 15keV), X-ray diffractometer (XRD, Rigaku D/max-rB), transmission electron microscope (TEM, HRTEM, JEOL JEM 2100F, operated at 200kV), X-ray energy spectrometer (EDS, Oxford Instrument and EDAX Inc), vacuum tube furnace, I-V tester (Keysight B2912A), and probe station.
Example 1:
the present embodiment uses conventional SiO2Layer preparation of In of different diameters2O3、SnO2And the ITO nanofiber field effect transistor is tested for performance, and the specific process is as follows:
(1) preparing a pure In electrostatic spinning precursor solution: 0.2g of InCl3·4H2Mixing O, 0.9g of PVP and 5g of DMF In a glass bottle, and stirring for 8 hours at room temperature by using a magnetic stirrer until the solution is uniform and transparent to form an electrostatic spinning precursor solution of a pure In source;
(2) preparing a pure Sn electrostatic spinning precursor solution: 0.3g of SnCl20.9g of PVP and 5g of DMF are mixed in a glass bottle, and stirred for 8 hours at room temperature by a magnetic stirrer until the solution is uniform and transparent, so as to form an electrostatic spinning precursor solution of a pure Sn source;
(3) preparing an ITO electrostatic spinning precursor solution: 0.2g of InCl3·4H2O、0.0144g SnCl2Mixing 0.9g of PVP and 5g of DMF In a glass bottle, and stirring for 8 hours at room temperature by using a magnetic stirrer until the solution is uniform and transparent to form an ITO electrostatic spinning precursor solution with In: Sn being 9: 1;
(4) different diameters In2O3、SnO2Preparation of ITO NFsAssembling devices: extracting 5ml of the solutions prepared in the steps (1), (2) and (3) respectively by using an injector, and covering the surface after ultrasonic cleaning with 300nm SiO2Placing the silicon wafer of the dielectric layer at the receiving end of an electrostatic spinning device, spinning the electrostatic spinning precursor solution in an injector at a voltage of 15kV by using needles with inner diameters of 0.34mm (0.34-ND), 0.26mm (0.26-ND), 0.21mm (0.21-ND), 0.16mm (0.16-ND) and 0.11mm (0.11-ND) respectively by using an electrostatic spinning technology under the condition that the humidity of a spinning environment is lower than 40 percent, and spinning the electrostatic spinning precursor solution in the injector at a voltage of 15kV by covering the surface with 300nm SiO2Spinning for 55s on a silicon chip of a dielectric layer to obtain a silicon chip with NFs, baking the silicon chip with NFs in a glue baking table for 10min, irradiating the silicon chip with a UV lamp for 30min to enable fibers to be tightly contacted with a base, then putting the silicon chip in a muffle furnace for annealing at 600 ℃ for 2h, naturally cooling to room temperature, taking out the silicon chip, and finally evaporating a layer of 60-100 nm Al film on the silicon chip by using a mask plate through a thermal evaporation method to serve as a source electrode and a drain electrode to obtain a corresponding NFs FET;
(5) the prepared NFs morphology and microstructure were characterized by scanning electron microscope (SEM, Nova Nano SEM450, operated at 15keV), X-ray diffractometer (XRD, Rigaku D/max-rB), and transmission electron microscope (TEM, HRTEM, JEOL JEM 2100F, operated at 200kV), the results are shown in FIGS. 1-3;
as can be seen from FIG. 1, with the decrease of the inner diameter of the needle, the prepared NFs has a gradually decreasing diameter, the fiber diameter is gradually decreased from-100 nm to-35 nm, the diameter change is obvious, and the change of the diameter of the spinning needle has almost no influence on the appearance of the fiber, although the NFs diameter is also influenced by the voltage and the viscosity of the precursor solution, the larger the voltage is, the smaller the NFs diameter when the viscosity of the precursor solution is smaller, but the too large voltage carries too much charge on the fiber, which causes the fiber to be twisted and folded, and when the viscosity of the precursor solution is too small, beads or even liquid drops appear on the fiber, which affects the fiber quality, and meanwhile, the electrostatic spinning state is influenced by the voltage, the viscosity of the precursor solution and the propelling speed of the propelling pump, under the mutual cooperation of three conditions, the electrostatic spinning can be carried out efficiently, with high quality and stably, and the change of any one condition needs the adjustment and cooperation of the other two conditions, the operation is complex, the effect is not good, and the electrostatic spinning can not be stably and efficiently carried out, so that the diameter of the spinning needle head of the same material is only changed, the other conditions are kept consistent, the diameter can be effectively changed, and the electrostatic spinning can be kept in a continuous, stable and efficient running state;
as can be seen from FIG. 2, the different diameters In2O3、SnO2The peaks at all positions are not obviously changed, and the influence of the diameter change on the crystal structure can be preliminarily judged, because the diameter of NFs is only controlled by changing the diameter of a spinning needle, and the annealing temperature is not changed without doping new elements, so the crystal structure is not changed;
as can be seen from FIG. 3, the grain size of the fibers with different fiber diameters is mostly 15-17 nm, and the change of the fiber diameters has almost no influence on the grain size;
(6) respectively testing In with different diameters by utilizing I-V tester2O3、SnO2The output and transfer curves of the ITO NFFETs, the results of which are shown in FIGS. 4-6,
in can be seen from FIGS. 4(b), (c) and (d)2O3、SnO2ITONFs FET has a high on-state current, but the off-state current is also very high, resulting in the I of the deviceon/IoffVery low, due to too many uncontrolled free carriers in NFs, as the inner diameter of the needle becomes smaller, the off-state current is greatly reduced, as the diameter of NFs is reduced to improve the band gap and reduce the conductivity, meanwhile, the diameter of the fiber is reduced to increase the specific surface area, NFs has more surface states, and the surface states are increased to cause free electrons to be more easily captured to cause the forward movement of the threshold voltage, so that the device performance is improved under the combined action of the two; as can be seen from fig. 4(d), the 0.34-ND ITO NFs exhibit the high conductivity of conventional ITO, with electrical properties similar to conductors, and without semiconducting properties, due to the substitution of indium by the high electron tin dopant in ITO, fixing the fermi level at the conduction band edge, resulting in metallic conduction behavior. While the diameter of the nanofibers becomes smaller, on the one hand, the reduction of the fiber diameter leads to a ratio tableThe area is increased, NFs has more surface states, the surface states are increased to cause free electrons to be more easily captured to cause the forward movement of threshold voltage, on the other hand, under the action of quantum confinement effect, the valence band top and the conduction band bottom move in opposite directions, the band gap is increased, the Fermi level of the ITO can be separated from the conduction band, and the ITO shows the characteristics of the semiconductor under the combined action of the two aspects. The ITO has higher conductivity than In2O3And SnO2Thus, the diameter of the ITO NFs is smaller when the best performance of the FET is achieved, thus NFs has more surface states and greater quantum confinement effects, therefore, the I of the 0.11-ND ITO NFs FETon/IoffTo a maximum of Ion/IoffUp to 108;
The quantum confinement effect diagram shown In fig. 5(a) shows that after the material size enters the nanometer level, the conduction band and the valence band will move In opposite directions under the quantum confinement effect as the material size decreases, resulting In an increase of the band gap, and fig. 5(b), (c), and (d) respectively show different In diameters2O3、SnO2Of the ITONFs (Ahv)2The hv curve, it can be seen that as the diameter of the fiber decreases, the forbidden bandwidth of the material becomes larger, the on-current of the 0.16-ND NFs FET decreases only slightly, and the off-current decreases significantly, and when the diameter of NFs decreases further, the off-current of the device does not decrease any further, and the on-current starts to decrease, so that at 0.16-NDIn2O3、SnO2I of NFs FETon/IoffTo a maximum of Ion/IoffRespectively reach 107、108The performance reaches or even exceeds the optimal performance after doping.
As can be seen from FIG. 6, when In2O3(FIG. 6a), SnO2When the diameters of the fibers of (FIG. 6d) and ITO (FIG. 6g) are thick, the fibers still have large current even when the grid voltage is low, and the change of the grid voltage has little influence on the current, which shows that the fiber conductivity is too good at the moment, the grid can not effectively control the source and drain current similarly to a conductor, and In is In when the diameter of the fibers is reduced2O3(FIG. 6b), SnO2(FIG. 6e), ITO (FIG. 6h) inputs of NFs FETsThe current output curve is obviously changed, when the grid voltage is smaller, almost no output current exists, along with the increase of the grid voltage, the output current is obviously increased, at the moment, the grid voltage can effectively control the output current, and when the fiber diameter is further reduced, In is used as the reference2O3(FIG. 6c), SnO2As can be seen from the output current curves of the NFs FETs (fig. 6f) and ITO (fig. 6i), although the output current can still be effectively controlled by the gate voltage, the output current is significantly reduced, which means that the fiber diameter is too small at this time, thereby affecting the performance of the FETs.
Example 2:
this example is to perform a calculation analysis on the device prepared by each needle inside diameter in example 1 to thoroughly understand the performance variation of the device caused by NFs diameter, since the diameter becomes smaller and the valence band top and conduction band bottom move in opposite directions under the quantum confinement effect, increasing the band gap reduces the conductivity, the diameter becomes smaller and the specific surface area increases, NFs has more surface states, and the surface states increase and the free electrons are more easily captured, therefore, mu isFEDecreases with decreasing nanofiber diameter, muFECan be calculated by the following formula:
wherein g ismIs transconductance, L is the channel length (100 μm), n is the number of fibers in the channel (-40), VDSIs an applied source drain voltage (30V), CgIs the gate capacitance, estimated by the cylinder-plane model:
ε0is the vacuum dielectric constant εrIs SiO2L is a channel length (100 μm), h is a thickness of the silicon dioxide layer (300nm), d is a diameter of the fiber, and 0.34mm, 0.26mm, 0.21mm, 0.16mm, 0.11mm In are calculated2O3 NFs FETμFE11.14, 6.26, 3.59, 2.23 and 0.94cm respectively2V-1s-1;
The above results show that the preparation of high performance In has been achieved by means of needles of different inner diameters2O3、SnO2ITO NFs FET, but the operating voltage is as high as 30, 60V, which is not suitable for current electronic devices, so further improvement is needed, and this embodiment uses Al2O3High-k dielectric layer to replace conventional SiO2Dielectric layer, high- κ device prepared and tested using the protocol of example 1, the results are shown in fig. 7 and 8, high dielectric constant (8-10), large conduction band offset and wide band gap (8.7eV) for Al2O3Greatly enhances the electrical performance of the device, adopts Al2O3After the high-k dielectric layer is formed, the source-drain voltage of the device is reduced to 3V from 30V, the gate voltage is reduced to 5V and 8V from 30V and 60V respectively, the power consumption is reduced, the mobility is improved, and In2O3NFs high-k FET mobility of 126cm2V-1s-1,SnO2NFs mobility of the high- κ FET is 29cm2V-1s-1Mobility of ITO NFs high- κ FET up to 160cm2V-1s-1The power consumption of the device is greatly reduced, the performance of the device is improved, and the device has great application potential.
Claims (5)
1. A method for preparing a high-performance metal nano fiber field effect transistor by diameter regulation is characterized by comprising the following specific steps:
(1) respectively preparing a pure In electrostatic spinning precursor solution, a pure Sn electrostatic spinning precursor solution and an ITO electrostatic spinning precursor solution;
(2) respectively extracting 5ml of the three electrostatic spinning precursor solutions prepared In the step (1) by using an injector to respectively perform experiments, placing the ultrasonically cleaned high-kappa substrate at the receiving end of an electrostatic spinning device, and under the condition that the humidity of a spinning environment is lower than 40%, using an electrostatic spinning technology to spin the pure In electrostatic spinning precursor solution and the pure Sn electrostatic spinning precursor solution on the high-kappa substrate by using needles with the inner diameters of 0.16mm and 0.11mm respectively, spinning the electrostatic spinning precursor solution In the injector on the high-kappa substrate under the voltage of 15kV, wherein the spinning time is fixed to 55s to obtain the high-kappa substrate with NFs;
(3) placing the high-kappa substrate attached with NFs into a glue baking table, baking for 10min, irradiating for 30min by using a UV lamp to enable the fibers to be tightly contacted with the high-kappa substrate, placing the high-kappa substrate into a muffle furnace, annealing for 2h at 600 ℃, naturally cooling to room temperature, taking out, and finally evaporating a layer of 60-100 nm Al film on the high-kappa substrate by using a mask plate through a thermal evaporation method to serve as a source electrode and a drain electrode.
2. The method for preparing the high-performance metal nano fiber field effect transistor by diameter regulation and control as claimed In claim 1, wherein the preparation process of the pure In electrospinning precursor solution is as follows: 0.2g of InCl3·4H2O, 0.9g of PVP and 5g of DMF are mixed In a glass bottle, and the mixture is stirred for 8 hours at room temperature by a magnetic stirrer until the solution is uniform and transparent, so that the electrostatic spinning precursor solution of the pure In source is formed.
3. The method for preparing the high-performance metal nano fiber field effect transistor by diameter regulation and control as claimed in claim 1, wherein the preparation process of the pure Sn electrospinning precursor solution is as follows: 0.3g of SnCl20.9g of PVP and 5g of DMF are mixed in a glass bottle and stirred for 8 hours at room temperature by a magnetic stirrer until the solution is uniform and transparent, thus forming the electrostatic spinning precursor solution of the pure Sn source.
4. The method for preparing the high-performance metal nano fiber field effect transistor by diameter regulation and control as claimed in claim 1, wherein the preparation process of the ITO electrostatic spinning precursor solution is as follows: 0.2g of InCl3·4H2O、0.0144g SnCl20.9g of PVP and 5g of DMF were mixed In a glass bottle and stirred at room temperature for 8 hours by a magnetic stirrer until the solution was homogeneous and transparent, thus forming an ITO electrospinning precursor solution with In: Sn of 9: 1.
5. The method for preparing the high-performance metal nano fiber field effect transistor through diameter regulation and control as claimed in claim 1, wherein the preparation process of the high-kappa substrate is as follows:
(1) 0.375g of Al (NO)3)3·9H2Adding O and 10ml of DMF into a glass bottle, and stirring for 8 hours at room temperature by using a magnetic stirrer to fully dissolve the DMF;
(2) heavily doping P type without SiO2Ultrasonic cleaning of the silicon wafer of the layer with N2After blow-drying, placing the silicon wafer in a plasma cleaning machine for treatment for 3min, and then placing the treated silicon wafer on a spin coater;
(3) dripping the prepared high-kappa solution on a silicon wafer through a PTFE filter head with the diameter of 0.22 mu m by using an injector to enable the solution to cover the surface of the silicon wafer, operating at the rotating speed of 300rpm for 5s, then operating at the rotating speed of 6000rmp for 15s, and stopping;
(4) and taking down the silicon wafer, placing the silicon wafer on a 150-DEG baking table for 10 seconds, evaporating the solvent to dryness, and then placing the silicon wafer into a muffle furnace for 700-DEG annealing for 2 hours to obtain the high-kappa substrate.
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