CN114023244A - GOA driving circuit, display panel and display device - Google Patents
GOA driving circuit, display panel and display device Download PDFInfo
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- CN114023244A CN114023244A CN202111428665.9A CN202111428665A CN114023244A CN 114023244 A CN114023244 A CN 114023244A CN 202111428665 A CN202111428665 A CN 202111428665A CN 114023244 A CN114023244 A CN 114023244A
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- 239000011159 matrix material Substances 0.000 claims abstract description 6
- 238000003491 array Methods 0.000 claims abstract description 3
- 239000010409 thin film Substances 0.000 claims description 79
- 230000000694 effects Effects 0.000 description 10
- 238000010586 diagram Methods 0.000 description 5
- 230000003247 decreasing effect Effects 0.000 description 3
- 238000006386 neutralization reaction Methods 0.000 description 3
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0275—Details of drivers for data electrodes, other than drivers for liquid crystal, plasma or OLED displays, not related to handling digital grey scale data or to communication of data to the pixels by means of a current
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/06—Details of flat display driving waveforms
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Abstract
The invention discloses a GOA driving circuit, a display panel and a display device, wherein the GOA driving circuit comprises a driving array and a voltage compensation module, the driving array comprises a plurality of driving transistors forming m-column and n-row matrix arrays, each column of driving transistors is correspondingly connected with a data line, and m and n are positive integers more than or equal to 1; the voltage compensation module is used for neutralizing the voltage of the data line between two adjacent data lines to a first target voltage; or the data line voltages corresponding to the data lines in the odd-numbered columns are compensated to a second target voltage, the data line voltages corresponding to the data lines in the even-numbered columns are compensated to a third target voltage, and the data line voltages of the two adjacent data lines are neutralized or the data line voltages are respectively compensated, so that the data line voltages can quickly reach the target voltage during switching, and the time for the data line voltages to rise or fall is saved.
Description
Technical Field
The invention relates to the technical field of display, in particular to a GOA driving circuit, a display panel and a display device.
Background
In the conventional GOA driving architecture, when the data line voltage connected to the driving transistor is frequently switched at 7/14V or 0/7V, the time required for each data line to be switched is long, and the display effect of the panel is affected.
Thus, the prior art has yet to be improved and enhanced.
Disclosure of Invention
The invention aims to provide a GOA driving circuit, a display panel and a display device, which can effectively solve the problem that the display effect of the panel is influenced by long time when the voltage of a data line is switched.
In order to achieve the purpose, the invention adopts the following technical scheme:
the embodiment of the application provides a GOA drive circuit, includes:
a drive array, comprising:
the driving transistors form m columns and n rows of matrix arrays, each column of driving transistors is correspondingly connected with one data line, wherein m and n are positive integers more than or equal to 1;
the voltage compensation module is connected to the first enable signal, the second enable signal, the first voltage and the second voltage, is electrically connected to each data line, and is used for neutralizing the voltage of the data line between two adjacent data lines to a first target voltage according to the first enable signal; or compensating the data line voltage corresponding to the data line of the odd column to a second target voltage according to the second enable signal and the first voltage, and compensating the data line voltage corresponding to the data line of the even column to a third target voltage according to the second enable signal and the second voltage.
In some embodiments, in the GOA driving circuit, the voltage compensation module includes:
the first compensation unit is connected to the first enable signal, electrically connected to each data line, and used for neutralizing the voltage of the data line between two adjacent data lines to a first target voltage according to the first enable signal;
the second compensation unit is connected to the second enable signal, the first voltage and the second voltage, is electrically connected to each data line, and is used for compensating the data line voltage corresponding to the data line in the odd-numbered row to a second target voltage according to the second enable signal and the first voltage, and compensating the data line voltage corresponding to the data line in the even-numbered row to a third target voltage according to the second enable signal and the second voltage.
In some embodiments, in the GOA driving circuit, the first compensation unit includes i first switching tubes, where i is a positive integer smaller than m; each first switch tube is correspondingly connected with two adjacent data lines, the first end of each first switch tube is connected with a first enabling signal, the second end of each first switch tube is correspondingly connected with one data line, and the third end of each first switch tube is correspondingly connected with the adjacent data line of the data line connected with the second end of the first switch tube.
In some embodiments, in the GOA driving circuit, the second compensation unit includes m second switching tubes, a first end of each second switching tube is connected to the second enable signal, a second end of each second switching tube is correspondingly connected to one data line, a third end of the second switching tube connected to the odd-numbered columns of data lines is connected to the first voltage, and a third end of the second switching tube connected to the even-numbered columns of data lines is connected to the second voltage.
In some embodiments, in the GOA driving circuit, the first compensation unit includes a first thin film transistor and a second thin film transistor, a first end of the first thin film transistor and a first end of the second thin film transistor are both connected to the first enable signal, a second end of the first thin film transistor is connected to the first data line, a third end of the first thin film transistor is connected to the second data line, a second end of the second thin film transistor is connected to the third data line, and a third end of the second thin film transistor is connected to the fourth data line.
In some embodiments, in the GOA driving circuit, the second compensation unit includes a third thin film transistor, a fourth thin film transistor, a fifth thin film transistor, and a sixth thin film transistor; the first end of the third thin film transistor, the first end of the fourth thin film transistor, the first end of the fifth thin film transistor and the first end of the sixth thin film transistor are connected with a second enabling signal, the second end of the third thin film transistor is connected with a first data line, the third end of the third thin film transistor is connected with a first voltage, the second end of the fourth thin film transistor is connected with a second data line, the third end of the fourth thin film transistor is connected with a second voltage, the second end of the fifth thin film transistor is connected with a third data line, the third end of the fifth thin film transistor is connected with the first voltage, the second end of the sixth thin film transistor is connected with a fourth data line, and the third end of the sixth thin film transistor is connected with the second voltage.
In some embodiments, in the GOA driving circuit, the first terminal of the first switching tube is a gate, the second terminal of the first switching tube is a source or a drain, and the third terminal of the first switching tube is a drain or a source.
In some embodiments, in the GOA driving circuit, the first terminal of the second switching tube is a gate, the second terminal of the second switching tube is a source or a drain, and the third terminal of the second switching tube is a drain or a source.
The embodiment of the application also provides a display panel, which comprises the GOA driving circuit.
The embodiment of the application also provides a display device which comprises the display panel.
Compared with the prior art, the GOA driving circuit, the display panel and the display device are provided, wherein the GOA driving circuit neutralizes the data line voltages of two adjacent data lines through the voltage compensation module or respectively compensates the data line voltages through the first voltage and the second voltage, the target voltage can be quickly reached when the data line voltages are switched, the time for the data line voltages to rise or fall is further saved, and the display effect of the display panel is ensured.
Drawings
Fig. 1 is a block diagram of a GOA driving circuit according to the present invention.
Fig. 2 is a block diagram of a voltage compensation module in the GOA driving circuit according to the present invention.
Fig. 3 is a schematic circuit diagram of a GOA driving circuit according to the present invention.
Fig. 4 is a schematic circuit diagram of a GOA driving circuit according to an embodiment of the present invention.
Fig. 5 is a timing diagram of the GOA driving circuit according to the present invention.
Detailed Description
The invention aims to provide a GOA driving circuit, a display panel and a display device, which can effectively solve the problem that the display effect of the panel is influenced by long time when the voltage of a data line is switched.
In order to make the objects, technical solutions and effects of the present invention clearer and clearer, the present invention is further described in detail below with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
Referring to fig. 1, the GOA driving circuit provided by the present invention includes a driving array 10 and a voltage compensation module 20, wherein the driving array 10 includes a plurality of driving transistors forming an M-column and N-row matrix array, where M and N are positive integers greater than or equal to 1; each row of driving transistors is correspondingly connected with one data line, namely m data lines are arranged in the GOA driving circuit, and each row of driving transistors is correspondingly connected with one control line, namely n control lines are arranged in the GOA driving circuit; the grid control line is used for controlling the on-off of each column of driving transistors, and when the driving transistors are on, data signals transmitted by the data lines are written in so as to be convenient for subsequent driving display; the voltage compensation module 20 is connected to a first enable signal (EN 1 in this embodiment), a second enable signal (EN 2 in this embodiment), a first voltage (DC 1 in this embodiment), and a second voltage (DC 2 in this embodiment), and is electrically connected to each of the data lines, and configured to neutralize the voltage of the data line between two adjacent data lines to a first target voltage according to the first enable signal; or the data line voltage corresponding to the data line of the odd-numbered column is compensated to the second target voltage according to the second enable signal and the first voltage, and the data line voltage corresponding to the data line of the even-numbered column is compensated to the third target voltage according to the second enable signal and the second voltage, so that each data line voltage can quickly reach the target voltage, the time for the data line voltage to rise or fall is effectively saved, and the display effect of the display panel is ensured.
Specifically, when the data line voltage of one of the data lines needs to be increased from a low voltage to a high voltage (e.g., from 0V to 7V), and the data line voltage of one of the data lines adjacent to the data line needs to be decreased from the high voltage to the low voltage (e.g., from 14V to 7V), the voltage compensation module 20 may neutralize the data line voltages of two adjacent data lines to achieve voltage compensation, so that the data line voltages of the two data lines can reach a target voltage, and the time for the data line voltage to rise or fall is saved. If one of the data lines needs to be boosted (for example, from 7V to 14V), the data line voltage of the adjacent data line needs to be reduced (for example, from 7V to 0V), and the voltage compensation module 20 may also perform separate voltage compensation on the data line, so that the data line voltage of the data line reaches the target voltage, thereby saving the time for reaching the target voltage and ensuring the display effect of the display panel.
Further, referring to fig. 2, the voltage compensation module 20 includes a first compensation unit 21 and a second compensation unit 22, wherein the first compensation unit 21 is connected to a first enable signal, and is electrically connected to each data line, and configured to neutralize a voltage of the data line between two adjacent data lines to a first target voltage according to the first enable signal; the second compensation unit 22 is connected to the second enable signal, the first voltage, and the second voltage, and is electrically connected to each data line, and configured to compensate the data line voltage corresponding to the data line in the odd-numbered row to a second target voltage according to the second enable signal and the first voltage, and compensate the data line voltage corresponding to the data line in the even-numbered row to a third target voltage according to the second enable signal and the second voltage.
Wherein, the first enable signal is used for controlling the operation or closing operation of the first compensation unit 21, and the second enable signal is used for controlling the operation or closing operation of the second compensation unit 22; specifically, when the data line voltage of one of the data lines needs to be increased from a low voltage to a high voltage (for example, from 0V to 7V), and the data line voltage of one of the data lines adjacent to the data line needs to be decreased from the high voltage to the low voltage (for example, from 14V to 7V), the first compensation unit 21 can be controlled to enter an operating state by the first enable signal, and the first compensation unit 21 neutralizes the data line voltages of two adjacent data lines to implement voltage compensation, so that the data line voltages of two data lines can reach a target voltage, and further, the time for the data line voltage to be increased or decreased is saved. If one of the data lines needs to be boosted (for example, from 7V to 14V), the data line voltage of the adjacent data line needs to be reduced (for example, from 7V to 0V), and the second compensation unit 22 can also be controlled by the second enable signal to enter a working state, so that the second compensation unit 22 respectively performs voltage compensation on the data line voltages of the two data lines, so that the data line voltage of the data line reaches a target voltage, the time for reaching the target voltage is further saved, and the display effect of the display panel is ensured.
Further, referring to fig. 3, the first compensation unit 21 includes i first switching tubes, where i is a positive integer smaller than m, and in this embodiment, each two data lines are connected to one switching tube, it can be understood that the number of the switching tubes may be half of the number of the data lines. Each first switch tube is correspondingly connected with two adjacent data lines, the first end of each first switch tube is connected with a first enabling signal, the second end of each first switch tube is correspondingly connected with one data line, and the third end of each first switch tube is correspondingly connected with the adjacent data line of the data line connected with the second end of the first switch tube.
The first enabling signal is used for controlling the connection or disconnection of the first switch tube, when the first switch tube is controlled to be connected by the first enabling signal, the two adjacent data lines connected with the first switch tube are connected, otherwise, when the first switch tube is controlled to be disconnected by the first enabling signal, the two adjacent data lines connected with the first switch tube are kept independent, the first switch tube is additionally arranged between the data lines in the embodiment, the connection or disconnection of the two adjacent data lines can be controlled, and the neutralization of the data line voltage in the two data lines is further realized.
Further, the second compensation unit 22 includes m second switching tubes, a first end of each second switching tube is connected to a second enable signal, and the second enable signal controls the second switching tube to be turned on or off; a second end of each second switch tube is correspondingly connected with one data line, a third end of the second switch tube connected with the odd-numbered rows of data lines is connected with a first voltage, and a third end of the second switch tube connected with the even-numbered rows of data lines is connected with a second voltage; that is to say, in this embodiment, each data line is correspondingly provided with one second switching tube, and m data lines are provided, so that m second switching tubes are correspondingly provided, when the data line voltage cannot be neutralized between each data line, compensation for the data line voltage can be realized by controlling the second switching tube of each data line, and then it is ensured that the data line voltage of each data line can quickly reach the target voltage, and further, the time for the data line voltage to rise or fall is saved.
In specific implementation, please refer to fig. 4, in this embodiment, a driving transistor with 4 rows and 2 columns of matrix array is taken as an example for description; the corresponding 4 data lines are the first data line D1, the second data line D2, the third data line D3 and the fourth data line D4; the corresponding first switch tube can be provided with 2, and the second switch tube can be provided with 4. In this embodiment, the first switch tube and the second switch tube are both thin film transistors. It should be noted that the first end of the first switch tube is a gate, the second end of the first switch tube is a source or a drain, and the third end of the first switch tube is a drain or a source; the first end of the second switch tube is a grid electrode, the second end of the second switch tube is a source electrode or a drain electrode, and the third end of the second switch tube is a drain electrode or a source electrode.
Specifically, the first compensation unit 21 includes a first thin film transistor M11 and a second thin film transistor M12, a first end of the first thin film transistor M11 and a first end of the second thin film transistor M12 are both connected to a first enable signal, a second end of the first thin film transistor M11 is connected to the first data line D1, a third end of the first thin film transistor M11 is connected to the second data line D2, a second end of the second thin film transistor M12 is connected to the third data line D3, and a third end of the second thin film transistor M12 is connected to the fourth data line D4.
Referring to fig. 5, according to the specific waveform requirement, for example, the data line voltages of the first data line D1 and the third data line D3 need to be switched between 7V and 14V, the data line voltages of the second data line D2 and the fourth data line D4 need to be switched between 0V and 7V, when the data line voltages of the first data line D1 and the third data line D3 are switched from 14V to 7V, the data line voltages of the second data line D2 and the fourth data line D4 need to be switched from 0V to 7V, the first enable signal is controlled to be high, the first thin film transistor M11 and the second thin film transistor M12 are controlled to be turned on, so that the first data line D1 and the second data line D2 are connected to achieve the neutralization of the data line voltages, the third data line D3 and the fourth data line D4 are connected to achieve the neutralization of the voltages of the data lines, so that the charges on the first data line D1 and the third data line D3 are converted into 397V, the charges of the second and fourth data lines D2 and D4 are converted to 7V after being neutralized, and then the first enable signal is rapidly pulled down, thereby effectively saving the charging time of 14 to 7V and 0V to 7V.
Further, the second compensation unit 22 includes a third thin film transistor M21, a fourth thin film transistor M22, a fifth thin film transistor M23, and a sixth thin film transistor M26; the first end of the third thin film transistor M21, the first end of the fourth thin film transistor M22, the first end of the fifth thin film transistor M23 and the first end of the sixth thin film transistor M26 are all connected with a second enable signal, the second end of the third thin film transistor M21 is connected with the first data line D1, the third end of the third thin film transistor M21 is connected with a first voltage, the second end of the fourth thin film transistor M22 is connected with the second data line D2, the third end of the fourth thin film transistor M22 is connected with a second voltage, the second end of the fifth thin film transistor M23 is connected with the third data line D3, the third end of the fifth thin film transistor M23 is connected with the first voltage, the second end of the sixth thin film transistor M26 is connected with the fourth data line D4, and the third end of the sixth thin film transistor M26 is connected with the second voltage.
Also according to the special waveform requirement, for example, the data line voltages of the first data line D1 and the third data line D3 need to be switched between 7V and 14V, the data line voltages of the second data line D2 and the fourth data line D4 need to be switched between 0V and 7V, when the data line voltages of the first data line D1 and the third data line D3 are switched from 7V to 14V, the data line voltages of the second data line D2 and the fourth data line D4 need to be switched from 7V to 0V, the second enable signal is controlled to be at high level, and the third thin film transistor M21, the fourth thin film transistor M22, the fifth thin film transistor M23 and the sixth thin film transistor M26 are controlled to be turned on, in this embodiment, the first voltage is 21V, the second voltage is-7V, then the data line voltages of the first data line D1 and the third data line D3 are compensated to 14V according to the first voltage and the second voltage, the data line voltages of the second and fourth data lines D2 and D4 are compensated to 0V, thereby effectively saving the time for the voltage to rise and fall.
Further, the present invention also provides a display panel, wherein the display panel includes the above-mentioned GOA driving circuit, and the detailed description of the GOA driving circuit is omitted here for brevity.
Further, the present invention also provides a display device, wherein the display device includes the display panel, and the display panel has the same structure as the display panel described above, and details are not repeated herein.
According to the GOA driving circuit, the voltage compensation module is arranged to neutralize the data line voltages of two adjacent data lines or respectively compensate the data line voltages through the first voltage and the second voltage, so that the data lines can quickly reach a target voltage when the data line voltages are switched, the time for the data line voltages to rise or fall is further saved, and the display effect of the display panel is ensured.
In summary, the GOA driving circuit, the display panel and the display device provided by the present invention include a driving array and a voltage compensation module, where the driving array includes a plurality of driving transistors forming an m-column and an n-row matrix array, each column of the driving transistors is correspondingly connected to a data line, where m and n are positive integers greater than or equal to 1; the voltage compensation module is connected to the first enable signal, the second enable signal, the first voltage and the second voltage, is electrically connected to each data line, and is used for neutralizing the voltage of the data line between two adjacent data lines to a first target voltage according to the first enable signal; or compensating the data line voltage corresponding to the data line of the odd-numbered column to a second target voltage according to a second enable signal and the first voltage, compensating the data line voltage corresponding to the data line of the even-numbered column to a third target voltage according to the second enable signal and the second voltage, and neutralizing the data line voltages of the two adjacent data lines or respectively compensating the data line voltages to ensure that the data lines can quickly reach the target voltage when the data line voltages are switched, so that the rising or falling time of the data line voltages is saved, and the display effect of the display panel is ensured.
It should be understood that equivalents and modifications of the technical solution and inventive concept thereof may occur to those skilled in the art, and all such modifications and alterations should fall within the scope of the appended claims.
Claims (10)
1. A GOA driving circuit, comprising:
a drive array, comprising:
the driving transistors form m columns and n rows of matrix arrays, each column of driving transistors is correspondingly connected with one data line, wherein m and n are positive integers more than or equal to 1;
the voltage compensation module is connected to a first enable signal, a second enable signal, a first voltage and a second voltage, is electrically connected to each data line, and is used for neutralizing the voltage of the data line between two adjacent data lines to a first target voltage according to the first enable signal; or compensating the data line voltage corresponding to the data line of the odd column to a second target voltage according to the second enable signal and the first voltage, and compensating the data line voltage corresponding to the data line of the even column to a third target voltage according to the second enable signal and the second voltage.
2. The GOA driver circuit of claim 1, wherein the voltage compensation module comprises:
the first compensation unit is connected to a first enable signal, is electrically connected to each path of the data lines, and is used for neutralizing the voltage of the data lines between two adjacent data lines to a first target voltage according to the first enable signal;
the second compensation unit is connected to a second enable signal, a first voltage and a second voltage, is electrically connected to each data line, and is configured to compensate the data line voltage corresponding to the data line in the odd-numbered columns to a second target voltage according to the second enable signal and the first voltage, and compensate the data line voltage corresponding to the data line in the even-numbered columns to a third target voltage according to the second enable signal and the second voltage.
3. The GOA driving circuit according to claim 2, wherein the first compensation unit comprises i first switching tubes, wherein i is a positive integer smaller than m; each first switch tube is correspondingly connected with two adjacent data lines, the first end of each first switch tube is connected with the first enabling signal, the second end of each first switch tube is correspondingly connected with one data line, and the third end of each first switch tube is correspondingly connected with the adjacent data line of the data line connected with the second end of the first switch tube.
4. The GOA driving circuit according to claim 2, wherein the second compensation unit comprises m second switching transistors, a first terminal of each second switching transistor is connected to the second enable signal, a second terminal of each second switching transistor is correspondingly connected to one of the data lines, a third terminal of each second switching transistor connected to the data lines in odd columns is connected to the first voltage, and a third terminal of each second switching transistor connected to the data lines in even columns is connected to the second voltage.
5. The GOA driving circuit according to claim 3, wherein the first compensation unit comprises a first thin film transistor and a second thin film transistor, a first terminal of the first thin film transistor and a first terminal of the second thin film transistor are both connected to the first enable signal, a second terminal of the first thin film transistor is connected to the first data line, a third terminal of the first thin film transistor is connected to the second data line, a second terminal of the second thin film transistor is connected to a third data line, and a third terminal of the second thin film transistor is connected to a fourth data line.
6. The GOA driving circuit according to claim 4, wherein the second compensation unit comprises a third thin film transistor, a fourth thin film transistor, a fifth thin film transistor and a sixth thin film transistor; the first end of the third thin film transistor, the first end of the fourth thin film transistor, the first end of the fifth thin film transistor and the first end of the sixth thin film transistor are all connected with the second enable signal, the second end of the third thin film transistor is connected with a first data line, the third end of the third thin film transistor is connected with the first voltage, the second end of the fourth thin film transistor is connected with a second data line, the third end of the fourth thin film transistor is connected with the second voltage, the second end of the fifth thin film transistor is connected with a third data line, the third end of the fifth thin film transistor is connected with the first voltage, the second end of the sixth thin film transistor is connected with a fourth data line, and the third end of the sixth thin film transistor is connected with the second voltage.
7. The GOA driving circuit as claimed in claim 3, wherein the first terminal of the first switch tube is a gate, the second terminal of the first switch tube is a source or a drain, and the third terminal of the first switch tube is a drain or a source.
8. The GOA driving circuit as claimed in claim 4, wherein the first terminal of the second switch tube is a gate, the second terminal of the second switch tube is a source or a drain, and the third terminal of the second switch tube is a drain or a source.
9. A display panel comprising the GOA driver circuit of any one of claims 1-8.
10. A display device characterized by comprising the display panel according to claim 9.
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