CN114006620A

CN114006620A - IRIG alternating-current B code decoding method and system with automatic adjustment function

Info

Publication number: CN114006620A
Application number: CN202111256926.3A
Authority: CN
Inventors: 刘忠华; 许强; 张宗艺
Original assignee: BEIDOU TIANHUI (BEIJING) TECHNOLOGY CO LTD
Current assignee: BEIDOU TIANHUI (BEIJING) TECHNOLOGY CO LTD
Priority date: 2021-10-27
Filing date: 2021-10-27
Publication date: 2022-02-01
Anticipated expiration: 2041-10-27
Also published as: CN114006620B

Abstract

The invention provides an IRIG alternating current B code decoding method and system with an automatic adjusting function, which have the advantages that a technology of receiving various signal modes and self-adapting decoding is taken into consideration, the method can be self-adapted to the national military standard IRIG-B (GJB 2991A-2008) format and the time synchronization system IRIG-B code (DLT 1100.1-2009) of a power system, when an IRIG-B code signal is input from the outside, the type of the current IRIG-B code is automatically identified, targeted decoding processing is carried out, when the code changes in the input process, the system can also automatically identify whether the code changes, and after logical identification, the system is automatically switched to a corresponding decoding strategy.

Description

IRIG alternating-current B code decoding method and system with automatic adjustment function

Technical Field

The invention belongs to the technical field of signal processing, and relates to a signal decoding technology. In particular to a technology for adaptively decoding 2 kinds of alternating current IRIG-B codes for military use and civil use.

Background

The B code is mainly characterized in that the time frame rate is one frame per second, the carried information quantity is large, and pulse signals, BCD coded time information and control function information can be obtained after decoding; the resolution is high, the B code direct current code (DC code) can realize the time synchronization with higher precision (microsecond magnitude) because each code element is a pulse signal, but because the frequency spectrum of the pulse signal is rich, the narrow-band channel can not be transmitted, and the B code direct current code is only suitable for being transmitted to a short-distance user by a cable, for the users which are far away and are only associated with the narrow-band channel, a DC code modulation method can be adopted, namely the DC code is modulated into an alternating current code (AC code) to be transmitted, and a plurality of time system devices are provided with standardized interfaces of the two time codes.

The conventional decoding technology is realized by adopting a high-speed AD chip and an FPGA mode. The cost is high and the operation is complex. The technology adopts low-cost domestic MUC as a decoding unit, and an auxiliary circuit is an operational amplifier and gate circuit. The device is simple and is already in the localization.

When receiving IRIG-B code information, the traditional alternating-current B code time-frequency receiving product is customized into a certain specific format, and the problems of single receiving mode and poor receiving compatibility exist. In view of the above-mentioned deficiencies in the prior art, the present invention provides a technique for adaptive decoding with multiple signal receiving modes. The method can be adaptive to the national military standard IRIG-B (GJB 2991A-2008) format and the time synchronization system IRIG-B code (DLT 1100.1-2009) of the power system. When an IRIG-B code signal is input from the outside, the invention autonomously identifies the type of the current IRIG-B code and carries out targeted decoding processing. When the code changes in the input process, the system can also automatically identify whether the code changes, and automatically switch to a corresponding decoding strategy after logical identification.

The invention is technically characterized in that: the method comprises the steps of automatically decoding an input alternating current B code by using a domestic MCU (microprogrammed control Unit) to perform gain control, regulation sampling gate valve, height comparator and other technologies on a signal.

The invention is technically characterized in that: the method can be self-adaptive to IRIG-B code signals with 2 encoding formats, and intelligently identifies and decodes the national military standard IRIG-B (GJB 2991A-2008) format and the IRIG-B code (DLT 1100.1-2009) of the time synchronization system of the power system. When the input coding format is changed, the invention can automatically switch the corresponding decoding strategy.

Disclosure of Invention

The invention provides an IRIG alternating current B code decoding method with an automatic adjusting function, which comprises the following steps:

s1: amplifying the input signal;

s2: determining a sampling threshold level;

s3: carrying out A/D conversion on the signals;

s4: determining a decoding type;

s5: decodes and outputs the time signal.

Further, in step S2, the automatically determining the sampling threshold level by using the timer specifically includes:

s21: initializing a timer and defining an interruption time length, a low level quantity threshold value and a high level quantity threshold value;

s22: detecting the level value of the input signal, confirming that the input signal is in normal high/low level, judging the high/low level and respectively carrying out continuous accumulated counting on the level number:

if the input signal is abnormal, the output is not carried out;

if the input signal is normal, identifying and judging high/low levels and respectively carrying out continuous accumulated counting on the level numbers;

s23: the high/low level count value is determined as follows:

if the continuous accumulated count value of the low level exceeds the threshold value of the low level number, reducing the sampling threshold level, and resetting the high-level counter and the low-level counter;

if the continuous accumulated count value of the high level exceeds the threshold value of the high level quantity, the sampling threshold level is increased, and the high level counter and the low level counter are reset;

s24: reading the increased level number in the last interruption time length, wherein the increased level number is a high level or a low level;

s25: the treatment was carried out as follows:

if the level input by the last interrupt duration is low, saving the value of the high-level counter, and resetting the low-level counter;

if the level input by the previous interrupt duration is high, saving the value of the first level counter, and resetting the high level counter;

s26: the input signal level is read for the next interrupt duration.

Further, in step S22, the criterion for determining whether the input signal is normal is:

and reading the duration of the input signal, comparing the duration with a set normal time length threshold, judging as an abnormal signal if the duration exceeds the normal time length threshold, and judging as a normal signal if the duration does not exceed the normal time length threshold.

Further, in step S4, the method for determining the decoding type includes:

and reading the flag bit or the combination of the flag bits representing the coding type in the code table, and comparing the flag bit or the combination of the flag bits with the stored coding type to determine the decoding type.

The invention also provides an IRIG alternating current B code decoding system with an automatic regulation function, which comprises a PPS generation module and an adaptive decoding module, wherein the PPS generation module is used for processing an input signal and generating standard PPS pulses per second according to the input signal, the adaptive decoding module is used for processing the input signal and reading the input signal and automatically judging the type of the input IRIG alternating current B code signal, decoding the input IRIG alternating current B code and outputting a decoding result, and the IRIG alternating current B code decoding system is characterized in that:

the PPS signal processing device further comprises a signal preprocessing module, wherein the signal preprocessing module divides an input signal into two identical paths of output signals which are respectively input into the PPS generating module and the adaptive decoding module, and the two paths of signals are processed simultaneously.

Furthermore, in the PPS generation module, an operational amplifier is used for superposing the direct current level with the input signal, and a comparator is used for comparing the signal superposed with the direct current level with the threshold voltage to generate a 1KHz reference square wave signal.

Furthermore, in the PPS generation module, a gate circuit in the MCU is used for extracting PPS pulses from the 1KHz reference square wave signal.

Further, in the adaptive decoding module, the low-amplitude signal is removed by an adjustable sampling voltage.

Further, in the adaptive decoding module, a pulse width after a rising edge of the identification signal is used as a control signal, and the threshold voltage in the sampling circuit is adjusted according to the control signal.

Further, the control signal is proportional to the threshold voltage.

The invention uses the domestic MCU to automatically decode the input alternating current B code by the techniques of 'gain control', 'adjusting a sampling gate valve' and 'height comparator' and the like.

The method can be self-adaptive to IRIG-B code signals with 2 coding formats, and intelligently identifies and decodes the national military standard IRIG-B (GJB 2991A-2008) format and the time synchronization system IRIG-B code (DLT 1100.1-2009) of the power system. When the input coding format is changed, the corresponding decoding strategy can be automatically switched.

Drawings

FIG. 1 is an input signal processing schematic of the present invention;

FIG. 2 is a schematic diagram of input signal preprocessing according to one embodiment of the present invention;

FIG. 3 is a schematic diagram of an input signal extraction code process according to an embodiment of the present invention;

FIG. 4 is a schematic diagram of input signal leading edge processing according to one embodiment of the present invention;

FIG. 5 is a schematic diagram of MCU hardware connection according to an embodiment of the present invention;

FIG. 6 is a schematic diagram of the AC code extraction of the present invention;

FIG. 7 is a flow chart of a timer according to one embodiment of the present invention;

FIG. 8 is a flowchart of decoding servo and adjusting threshold voltage according to one embodiment of the present invention;

FIG. 9 is a flow diagram of output PPS accuracy processing according to one embodiment of the invention.

Detailed Description

The invention provides an IRIG alternating current B code decoding method and system with an automatic adjusting function, which can intelligently identify and decode the international military standard IRIG-B (GJB 2991A-2008) format and the time synchronization system IRIG-B code (DLT 1100.1-2009) of an electric power system in a mode of replacing a high-speed AD chip and an FPGA by using a domestic MCU. When the input coding format is changed, the invention can automatically switch the corresponding decoding strategy. The technical solution of the present invention will now be further described with reference to examples.

In this embodiment, after the device is turned on, the mcu (microcontroller unit) micro control unit performs initialization processing to wait for a stable and effective external input signal;

after the external signal is input, the signal is stabilized into 2 paths of output by a follower through an isolation amplification link, and one path of output passes through an automatic gain adjustment circuit to convert the signal into a digital signal for decoding. And one path of signal is superposed on the direct current level to carry out high-speed comparison and signal smoothing processing, and the leading edge of the signal is extracted.

After the code value of the input code is extracted, judging the type of the input signal code by identifying the key code value; a decoding strategy is determined. Then, a decoding process is performed. Meanwhile, whether the code of the input IRIG-B code is abnormal or not is constantly detected, and when the code is abnormal, the type of the input signal code is judged; and judging whether to perform policy switching or not. Thereby enabling adaptation of the encoding.

The invention supports AC B code input. Self-adaptive 3: 1. 4: 1. 5:1, etc. in various ratios.

As shown in fig. 1, for an externally input alternating current B code, a feedback algorithm type automatic adjustment is adopted, multiple voltage amplitudes and amplitude ratios are adapted, and a code is extracted. And the high-speed comparator is adjusted by a feedback digital potentiometer way, so that the accurate leading edge extraction of the code value is realized. And (3) decoding the input IRIG-B code signal by using an MCU (microcontroller Unit) micro control unit. And acquiring the coding information of the input IRIG-B code signal by adopting a time difference rising edge number mode. After the codes are extracted, the self-adaptive processing of the coding polarity is carried out, and the problem of coding phase reversal is solved. And extracting all 100-bit codes and storing coding information. And judging whether the type of the input code is obtained currently. When the type of the code is not explicitly input, the output invalid flag is turned on. The encoding of the input signal is identified. And judging that the coding switching occurs, and executing switching action. And then starting the coding effective operation. And performing corresponding decoding operation for the coding type. And obtaining the final time information.

As shown in fig. 2, in the signal preprocessing module, the main functions of the hardware circuit are: the BNC1 is a connector and is used for receiving external signals, and the resistor R5 and the capacitor C4 are used for filtering incoming signals to avoid the interference of high-frequency signals. The inductor TR1 serves as an isolation. Capacitor C5 acts to filter the noise signal and capacitor C3 blocks the dc component. Resistors R6 and R11 function to attenuate the input signal as necessary. The diodes D1 and D2 are used for preventing the input signal from being too large and damaging the subsequent circuit. The input alternating current signal is connected to the forward input port of the operational amplifier U1 after passing through the resistor R9, the operational amplifier is configured as a voltage follower circuit, and the enhanced input signal is an input signal 'after being rectified at the test point T1'. The circuit section is used for protecting, isolating and enhancing input signals.

Fig. 3 is a schematic diagram illustrating the principle of extracting codes from an input signal in an adaptive decoding module. The main functions of the hardware circuit are as follows: the 'input signal after finishing' is accessed to an operational amplifier chip U2, the U2 carries out conditional 1000-time amplification on the input signal, and the input sine wave is compared with the threshold voltage output by the chip U4. When the input sine wave signal is greater than the threshold voltage, the output signal is amplified by 1000 times, and when the input signal is lower than the threshold voltage, the output signal is 0. The chip U4 is a digital potentiometer and is controlled by the MCU chip. The resistance value can be automatically adjusted according to the decoding effect of the MCU, and the adjustment of the threshold voltage is realized. The signal level output by the U2 passes through a diode D3 and a resistor R12, and the negative half shaft of the input signal is filtered. Amplitude adjustment is then performed by the chip U3. And connecting to an acquisition pin of the MCU.

As shown in fig. 4, in the PPS generation module, the main functions of the hardware circuits shown in the figure are: after a direct current component of the 'finished input signal' is isolated by a capacitor C23, the direct current component is loaded to a 1.67V point of voltage division of resistors R13 and R17, the signal is connected with the positive input of a U6 comparator, 1 MCU controls a digital potentiometer of the U10, the output of the potentiometer is connected with the reverse input of the U6 comparator, and the MCU controls a stronger threshold voltage to realize the adjustment of the front edge precision. The circuit extracts the input 1K carrier wave, and the waveform at the test point T7 is a 1K Hz square wave. However, the waveform at this time may jitter at the leading edge stage because the sine wave zero crossing potential is very gentle, and the comparator may have a plurality of trigger edges due to electrical noise. In order to solve the problem, the U7 non-retriggered monostable trigger is added in the later stage, the pulse width of the trigger is controlled, and the jitter is eliminated. The shaped 1Khz square wave is subjected to voltage reduction to 3.3V through a buffer chip of U8, and an output signal is connected to an AND gate chip of U11. The other input signal of the chip is from the control IO of the MCU. The MCU opens the door at a precise moment according to the information of the decoded signal, a 1Hz precise pulse per second leading edge is extracted from a 1KHz input signal, the signal passes through an OR gate of the U12, and the other input signal of the device comes from the control IO of the MCU. And the MCU opens the door at an accurate moment according to the information of the decoded signal, so that the pulse width control of the pulse per second signal is realized. The extracted signal is externally output by connecting to a connector J1.

Fig. 5 shows a pin connection mode of the decoding MCU, and the hardware circuit mainly functions as follows: and connecting the MCU part. The invention has low requirements on MCU resources. Most of the chips made in China can meet the requirements. 1 pair of serial ports, 1 input type IO and 8 output type IOs are required. In the figure, the 16-pin and the 17-pin are a pair of serial ports and are responsible for information interaction and output of the extracted time information. The 45 pin is an input type IO and is responsible for judging input decoding information.

Pins

42, 43 and 44 are output type IO and control the decoding threshold digital potentiometer.

Pins

41, 39 and 40 are output type IO and control to extract the leading edge digital potentiometer.

Pins

33 and 34 are output type IO and control the timing sequence of an AND gate.

In the MCU, a computer program written according to the alternating current B code decoding mode recorded in the invention is burnt, and the MCU determines the threshold height of the sampling voltage according to the pulse width of the signal, so that the dynamic range of the input signal is dynamically identified, and the automatic decoding of the alternating current B code is realized.

As shown in fig. 6, the waveform of the ac B code is a signal frequency of 1Khz, 8 consecutive high levels are codes P, 5 consecutive high levels are

codes

1, and 2 consecutive high levels are codes 0, and the decoding digital potentiometer is used in the circuit to form the comparison threshold level. And initializing the MUC main program, and extracting the setting parameters stored in the internal FLASH. And calling FLASH parameters to configure and decode the amplitude of the digital potentiometer. The program internally starts to make a decision on the 'decoded IO' of the output signal. If the pulse width is a rising edge, the pulse width is judged, and the acquisition threshold level is automatically adjusted according to the pulse span. If the threshold is too high, the pulse cannot be compared or the pulse width is lower than 0.1 ms; too low a threshold will result in a large number of consecutive pulses or high levels. The program automatically adjusts the sampling threshold by decoding the code value. Therefore, the problem that the conventional alternating current B code technology is single in sampling level and cannot be adaptive to various proportions of the amplitude of the alternating current B code sine wave is solved. Because the sampling threshold of the invention is adaptively adjusted, no matter 3: 1. 4: 1. various proportions such as 5:1 can be processed in a self-adaptive way.

As shown in FIG. 7, the MCU internally activates a 20us interrupt timer. The timer clock cycles off at high speed. The input B-code decoded signal is judged. After the defibrillation processing, if the input B code level is found to be low, the low level counter is added to judge whether the signal is low continuously, if the signal is low for a long time, 1 is no signal input, and the threshold value of 2 is too low and is lower than the waveform of the whole input signal. And activating a mark, adjusting the 'acquisition threshold level' by the main program, and activating a processing program for judging whether the input signal is interrupted. If not, judging whether the signal is a normal signal, if not, normally counting the time length for processing, if so, storing the duration time length of the high level, clearing various flag bits, and returning to the circulation. If the detected B code level is confirmed to be high after the defibrillation, the high level counter is added by itself, whether the signal is continuously high or not is judged, and if the signal is low for a long time, the threshold value is over-high and is higher than the waveform of the whole input signal. And activating a mark, adjusting the 'acquisition threshold level' by the main program, and activating a processing program for judging whether the input signal is interrupted. If not, judging whether the signal is a normal signal, if not, normally counting the time length for processing, if so, storing the duration time length of the low level, clearing various flag bits, and returning to the circulation.

The function of the program in this section is: and B code level is acquired at high speed, and logic and positive and negative pulse widths of input signals are captured.

FIG. 8 illustrates the processing of the main program to decode servo and adjust thresholds. After the MCU is initialized, the main program circularly judges the processing flag bit of the timer for the interface signal. When a 'rising edge mark' is obtained, the time between the falling edge and the rising edge is judged for judging the distance of a wavelet. This spacing determines the type of code received. If the time is less than 1ms, the input signal is proved to be a conventional input signal, then the continuity of the signal is judged, if more than 12 small square waves are received, the level of the 'acquisition threshold level' is low, a large number of sine wave signals are extracted, a mark bit is opened, a threshold adjusting circuit is activated, and the decoded threshold voltage is increased. Otherwise, returning to decoding judgment and continuously extracting the code value. If the distance between the decoded falling edges is more than 9ms, the code value is in error, a long-time falling edge appears, the decoding is invalid, and a clear valid flag bit indicates that the error occurs. If the decoded falling edge interval is between 1 and 9ms, a reasonable pulse interval is obtained, and the number of the pulses extracted before can be judged. If the number of the effective pulses obtained before is 2 or 5, the decoding values of '0' or '1' are filled in respectively, and then the effective pulses are transmitted to a decoding program to carry out code value extraction. If the number of the effective pulses obtained before is 8, the decoding value P is filled, the judgment is relatively complex, the continuous number of P needs to be interpreted, if the first P is received, the mark is recorded, the decoding is directly carried out, if 2 continuous P are received, the mark indicates that the head mark of the signal is received, and if more than 2P are received, the input signal is wrong. An error handling function is invoked. The decoding program extracts the encoded content bit by bit in the order of encoding. And calling a corresponding decoding program aiming at the data value of the special zone bit. And after decoding one frame of data, returning to the main loop.

The main program simultaneously monitors the falling edge marks and detects the width from each rising edge to the falling edge. If this value is less than 0.1ms, it indicates that the sampled threshold voltage is too high, resulting in too narrow a pulse width being acquired. In this case, the risk of frame loss is likely to occur, the flag bit is activated, and the sampling threshold level is appropriately adjusted. If the width between the rising edge and the falling edge is greater than 0.3ms, it indicates that the threshold voltage of the sampling is too low, resulting in too wide a width of the acquired pulse. In this case, the risk of code scrambling is easily generated, the flag bit is activated, and the sampled threshold level is appropriately fine-tuned upward.

The function of the program in this section is: and judging the coding content contained in the previous section of small square wave according to the distance between each section of small square wave, and extracting the code. Meanwhile, the threshold level is adjusted according to the coding content. And finely adjusting the threshold level according to the width of each small square wave.

Fig. 9 is a flowchart to be executed to improve the decoding output accuracy. And after the program is initialized, calling the precision threshold stored in the MCU for output. And the program starts to wait for the serial port message with the output precision adjusted. And inputting an adjusting value every time, and adjusting the precision threshold voltage by one grade. The accuracy threshold voltage is 100 levels in total. And after the adjustment is finished, storing the modified adjustment value into the FLASH.

The function of the program in this section is: and (3) matching with hardware, and adjusting the signal precision before delivery.

According to the coding mode of the IRIG-B code, after the system receives 2 continuous P states, the position pointer of the code value extraction function returns to zero, and the code value is formally extracted. And (4) circulating the code value extracting function for 100 times, and completely extracting the IRIG-B code information with the period of one second. And storing the extracted information into a corresponding array. The decoding function then sorts the contents of the array. Code values and their definitions are tabulated.

The program combines general second, minute, hour, day information. And special treatment is carried out aiming at the national military standard IRIG-B (GJB 2991A-2008) format and the time synchronization system IRIG-B code (DLT 1100.1-2009) of the power system which are not universal.

The special treatment is characterized by comprising the following steps:

step 1: extracting the ten-digit mark of 43 digits. When the national military standard is coded, the bit will alternately appear as "0" and "1", and when the power standard is satisfied, the bit will be constant as 0. This results in that determining that 43 bits are constant at 0 is a sufficient condition to determine whether the current input signal is a power standard.

Step 2: extracting 45-48 bits of year information. When the "ten-digit-of-year flag" is 1, it indicates ten digits of the year, and conversely, it indicates the units of the year. When the national military standard is coded, the position alternately shows the year information. Theoretically, the analysis of this data may be all 0's or not zero. But when the power criteria is normal, this bit will be constant at 0. Therefore, the condition that whether the current input signal is the power standard or not is sufficient when the constant value of 45-48 bits is 0.

And step 3: extracting data from 50-53 and 55-58 and combining adult information. When coded in the military standard, this bit will be constantly 0. But this bit will not be acknowledged when the power standard is present. Therefore, the data bits of the judgment 50-53 and the judgment 55-58 are constant to be 0, which is a sufficient condition for judging whether the current input signal is the national military standard code.

And 4, step 4: and judging the known condition according to the coding type judgment code.

And 5: when the normal code enters, the program enters a judging and counting stage. And immediately clearing the statistics of the effective quantity of the other decoding mode after entering, accumulating the effective quantity of the input codes, and changing the decoding mode of the current code when 5 codes are accumulated.

Step 6: and processing the code switching by the program. When the input signal is switched, the counting result of the 43bit read by the program will be changed. When 5 pieces are accumulated, the decoding mode of the current code is changed. The procedure is restored to the normal decoding state of step 5.

And 7: and processing the coding error by the program. When the input signal is switched, various conditions of the program cannot be met, and the last else paragraph is entered. The flag indicating that the decoding type is valid is cleared to avoid erroneous codes.

And 8: and (5) verification after the decoding judgment is finished. The above 7 steps enable the identification of the type of encoding. A series of verifications of the encoded content follows. The method has the advantages that the validity of the signal is further judged, the switching condition of the input signal is processed, and the error information in the switching process is prevented from being printed with an effective mark and output to the outside to generate errors. And secondly, identifying the legality of the input signal and eliminating error codes.

And step 9: if the program considers that it is currently in the state of decoding the power standard B code, 45-48 bits, non-0 data is present, and 50-60 bits are 0. It indicates that there is a high probability that the currently input encoding format has changed. And marking a corresponding error mark to indicate that the receiving state is abnormal. And when the time information is output externally, the mark that the signal is invalid is added. On the contrary, when the program considers that the program is currently in the state of decoding the national military standard B code, 0 data appears when the 45-48 bits, and non-0 data appears when the 50-60 bits. Indicating that the input signal has switched to the power standard. And marking a corresponding error mark to indicate that the receiving state is abnormal. And when the time information is output externally, the mark that the signal is invalid is added.

Step 10: and after the judgment of the type of the coding identification and the verification of the coding effectiveness are carried out, aiming at the type of the coding. The encoding is normally decoded.

In addition, before actually outputting the time information, the present embodiment also arranges the signals to be output:

step 1: and judging whether the mode is a national military standard mode, if so, restoring the source time transmitted according to the UTC0 format into the time information of the structural body.

Step 2: the B-code signal is a set of data per second, and when the quasi-second time of the frame is detected, the quasi-second time of the second has elapsed, so to speak, the current detection is always the last second that has elapsed. Therefore, to output the 1PPS signal, the output can be performed only at the next second on-time edge time +1 second; since the one second output is added, a time carry function is involved. The program firstly constructs a Void CalcSecond () function to convert the received time information into 64-bit second information (Gregorian second) starting from the Gregorian meta year, then performs +1 operation (B _ BCodeTimeModule. NTPsacond + +) on the Gregorian second, and then constructs a Void dealIntegERTime () function to convert the Gregorian second into the information of year, month, day, hour, minute and second.

And step 3: because the national military standard IRIG-B (GJB 2991A-2008) format and the time source selection of the power system's time synchronization system IRIG-B code (DLT 1100.1-2009) are different. The time code adopted by the GJB 2991A-2008 is UTC time. And the time synchronization system IRIG-B code (DLT 1100.1-2009) of the power system adopts Beijing time. With a fixed time difference of 8 hours. Therefore, after the encoding extraction is completed, the input time information is also required to be sorted. If the current format is judged to be the national military standard IRIG-B (GJB 2991A-2008) format, the time information of the structural body is converted into unsigned 64-bit data, and then 8 hours are added to the data to convert the data into Beijing time. No processing is required if the time synchronization system IRIG-B code (DLT 1100.1-2009) of the power system is present, since it is the beijing time itself.

The IRIG ac B code decoding method and system with automatic adjustment function provided by the present invention are introduced in detail above, and a specific example is applied in this document to explain the principle and implementation of the present invention, and the description of the above embodiment is only used to help understanding the method and core idea of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and the content of the present specification should not be construed as a limitation to the technical solution of the present invention.

Claims

1. An IRIG alternating current B code decoding method with an automatic adjusting function comprises the following steps:

s1: amplifying the input signal;

s2: determining a sampling threshold level;

s3: carrying out A/D conversion on the signals;

s4: determining a decoding type;

s5: decodes and outputs the time signal.

2. The method for decoding an IRIG ac B code according to claim 1, wherein the step S2 of automatically determining the sampling threshold level by using a timer specifically comprises:

if the input signal is abnormal, the output is not carried out;

s23: the high/low level count value is determined as follows:

s25: the treatment was carried out as follows:

s26: the input signal level is read for the next interrupt duration.

3. The method for decoding IRIG ac B code with auto-tuning function according to claim 2, wherein the criterion for determining whether the input signal is normal in step S22 is:

4. The method for decoding IRIG ac B code with auto-tuning function according to claim 1, wherein in step S4, the method for determining the decoding type is:

5. The utility model provides an IRIG exchanges B sign indicating number decoding system that possesses automatic regulating function, includes PPS and produces module and self-adaptation decoding module, PPS produces the module and processes input signal, is used for producing standard per second PPS pulse according to input signal, self-adaptation decoding module handles input signal, is used for reading input signal and automatic judgement IRIG exchanges B sign indicating number signal type of input, exchanges B sign indicating number and decodes and output decoding result to input IRIG, its characterized in that:

6. The IRIG AC B code decoding system with automatic regulation function of claim 5, wherein in the PPS generation module, an operational amplifier is used to superpose the DC level with the input signal, and a comparator is used to compare the signal superposed with the DC level with the threshold voltage to generate a 1KHz reference square wave signal.

7. The IRIG AC B code decoding system with automatic regulation function of claim 6, wherein in the PPS generation module, gate circuit in MCU is used to extract PPS pulse from 1KHz reference square wave signal.

8. The IRIG AC B-code decoding system with automatic adjusting function according to claim 5, wherein the adaptive decoding module removes low amplitude signals by adjustable sampling voltage.

9. The IRIG ac B-code decoding system with auto-tuning function according to claim 8, wherein the adaptive decoding module recognizes a pulse width after a rising edge of a signal as a control signal, and adjusts a threshold voltage in the sampling circuit according to the control signal.

10. The IRIG ac B-code decoding system with auto-tuning function of claim 8, wherein the control signal is proportional to the threshold voltage.