CN113985958B - Clock spread spectrum detection circuit and method - Google Patents
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Abstract
The application discloses a clock spread spectrum detection circuit and method, comprising: n detection circuits for detecting the harmonic waves of the corresponding frequencies, a signal summarizing circuit for summarizing detection signals output by the detection circuits and a spread spectrum control circuit; according to the method, whether the harmonic waves of different wave orders exceed the preset threshold value or not is detected through the multipath detection circuit, electromagnetic radiation exceeding the preset range is generated, once the electromagnetic range exceeding the preset electromagnetic range is detected, the signal summarizing circuit outputs an opening signal to the spread spectrum control circuit according to a trigger signal output by any detection circuit, the spread spectrum control circuit opens the spread spectrum function according to the opening signal, when the electromagnetic radiation exceeding the preset range is not detected, the spread spectrum control circuit does not receive the opening signal, the spread spectrum function is automatically closed, the automatic opening and closing function of the exhibited function is realized through the detection circuit capable of detecting the electromagnetic radiation exceeding the standard and the spread spectrum control circuit with the automatic switch, and the negative influence caused by the long-time opening of the spread spectrum function is avoided.
Description
Technical Field
The present invention relates to the field of distributed storage, and in particular, to a clock spread spectrum detection circuit and method.
Background
Information technology equipment (including server products and computer products) is developed to high speed, high sensitivity, high integration and high stability, and the requirements on electromagnetic compatibility are also more and more severe. For the interconnection devices of high-speed digital systems, the problem of electromagnetic radiation is increasingly prominent, not only affecting the operation of the connection-side digital system, but also interfering with other surrounding devices. Therefore, electromagnetic compatibility issues must be considered in the early stages of information technology-like device design.
Among the electromagnetic radiation problems of information technology-like devices, the electromagnetic radiation problem, which is in particular also marked by clock signals, is serious. As the communication rate of information technology-like devices increases, the frequency of the clock signal increases. The rise of the clock frequency means that the rising edge and the falling edge of the clock signal are steeper and steeper, and the rising edge time and the falling edge time are shorter and shorter.
From knowledge of the fourier transform, it can be appreciated that the steeper the clock signal, the higher the frequency of the corresponding frequency domain component. The higher the frequency, the shorter the corresponding wavelength. The shorter the size of the antenna or equivalent antenna that can be utilized. Thus, the easier the electromagnetic radiation is, the more serious the electromagnetic radiation problem is with. The most fundamental problems are: the authentication of the EMC related country cannot be obtained, resulting in that the product cannot be marketed.
Clock spread spectrum technology (SSC: spread Spectrum clocking) is a solution to the problem of electromagnetic radiation of high-speed clocks that is currently relatively effective and has the lowest cost. The SSC can solve the problem of EMI (Electromagnetic interferce) electromagnetic interference because the frequency of the high-speed clock changes periodically with time after the SSC is opened, and the energy of electromagnetic radiation is uniformly distributed in a certain bandwidth frequency range on the corresponding frequency domain, so that the energy of the electromagnetic radiation is reduced.
Under the condition that the SSC function is not opened, namely under the condition of fixed clock frequency, according to Fourier transformation, the capability of electromagnetic radiation is concentrated in one frequency correspondingly in the frequency domain, the energy of the electromagnetic radiation exceeds the limit value of the related EMC certification regulation, the test result cannot meet the regulation requirement, and the certification certificate cannot be obtained, so that the product cannot be marketed.
In the design of a circuit board of a server, a central processing unit (central processing unit, abbreviated as CPU) is used as an operation and control core of a computer system, and is a final execution unit for information processing and program running. The data interaction between the CPU and the memory is a major issue for the server operation. The clock signal between the CPU and the memory is also an instruction official in data interaction, and the speed of the clock signal determines an important index of the server performance.
Therefore, the high-speed clock is often a main problem causing electromagnetic radiation to exceed standard, and the importance of the implementation of the spread spectrum function is obvious.
The spread spectrum function of the clock signal is mainly: a measure of suppression against the problem of excessive electromagnetic radiation. Therefore, during the switching on or off of the spread spectrum function of the prior art, verification of electromagnetic radiation has to be performed. I.e. after the spread spectrum function is turned on, the electromagnetic radiation test must also be performed in a semi anechoic chamber.
At the same time, in the prior art spread spectrum arrangement, once this function is set, the spread spectrum function must be turned on in the subsequent product. However, the spread spectrum function of the signal clock, particularly for high-speed data processing devices such as servers, continuous clock signal spreading can cause several rate device performance problems, such as server device disk drop problems, etc.
Therefore, a more flexible clock spread spectrum starting method is needed to avoid the problems of disc dropping and signal integrity caused by continuous opening of spread spectrum functions.
Disclosure of Invention
Accordingly, the present invention is directed to a clock spread spectrum detection circuit and method, which can automatically identify whether electromagnetic radiation exceeds standard, and automatically start the clock spread spectrum function. The specific scheme is as follows:
a clock spread spectrum detection circuit, comprising: n detection circuits for detecting the harmonic waves of the corresponding frequencies, a signal summarizing circuit for summarizing detection signals output by the detection circuits and a spread spectrum control circuit;
each detection circuit comprises a frequency selection circuit and an identification circuit;
the frequency selecting circuit is used for respectively transmitting noise voltages input by the first input end of the frequency selecting circuit and the second input end of the frequency selecting circuit to the identifying circuit;
the identification circuit is used for outputting a trigger signal to the signal summarizing circuit after the difference between the noise voltage input by the first input end of the frequency selecting circuit and the noise voltage input by the second input end of the frequency selecting circuit exceeds a preset trigger difference value;
the signal summarizing circuit is used for outputting an opening signal to the spread spectrum control circuit after receiving the trigger signal output by any one of the detection circuits;
the spread spectrum control circuit is used for starting the spread spectrum function according to the starting signal, and closing the spread spectrum function when the starting signal is not received.
Optionally, the first input end of the frequency selection circuit is connected with one end of the differential pair of the clock signal, the second input end of the frequency selection circuit is connected with the other end of the differential pair of the clock signal, the first output end of the frequency selection circuit is connected with the first input end of the identification circuit, the second output end of the frequency selection circuit is respectively connected with the second input end of the identification circuit, the output end of the identification circuit is connected with the input end of the signal summarizing circuit, and the output end of the signal summarizing circuit is connected with the spread spectrum control circuit.
Optionally, the frequency selecting circuit includes: a first LC series resonant circuit and a second LC series resonant circuit;
the first LC series resonant circuit comprises a first inductor and a first capacitor which are connected in series;
the second LC series resonant circuit comprises a second inductor and a second capacitor which are connected in series;
one end of the first inductor is used as a first input end of the frequency selection circuit, the other end of the first inductor is connected with one end of the first capacitor, and the other end of the first capacitor is used as a first output end of the frequency selection circuit;
one end of the second inductor is used as a second input end of the frequency selection circuit, the other end of the second inductor is connected with one end of the second capacitor, and the other end of the second capacitor is used as a second output end of the frequency selection circuit.
Optionally, the identification circuit includes: the circuit comprises an operational amplifier, a first resistor, a second resistor, a third resistor, a first controllable switch and a second controllable switch;
the positive electrode input end of the operational amplifier is used as a first input end of the identification circuit, the negative electrode input end of the operational amplifier is used as a second input end of the identification circuit, the first end of the operational amplifier, one end of the first resistor and one end of the second resistor are mutually connected, the second end of the operational amplifier, the output end of the first controllable switch and the output end of the second controllable switch are grounded, the output end of the operational amplifier is connected with the control end of the first controllable switch, the input end of the first controllable switch, the other end of the second resistor and the control end of the second controllable switch are connected, the other end of the first resistor, one end of the third resistor and the input end of the second controllable switch are connected to form the output end of the identification circuit.
Optionally, the signal summarizing circuit includes an or circuit, where the or circuit includes a plurality of input terminals corresponding to the output terminals of the identification circuit of each detection circuit, and the output terminal of the or circuit is used as the output terminal of the signal summarizing circuit.
Optionally, the spread spectrum control circuit is a BMC chip;
and after the BMC chip receives the starting signal, adjusting the value of the register, starting the spread spectrum function, and after the BMC chip does not receive the starting signal, adjusting the value of the register, and closing the spread spectrum function.
Optionally, the circuit comprises a first detection circuit for detecting a first harmonic, a second detection circuit for detecting a second harmonic, a third detection circuit for detecting a third harmonic, a fourth detection circuit for detecting a fourth harmonic and a fifth detection circuit for detecting a fifth harmonic.
The invention also discloses a clock spread spectrum detection method, which comprises the following steps:
obtaining noise voltages corresponding to the harmonics of different wave orders from the clock differential pair;
judging whether the difference of noise voltages corresponding to the harmonic waves of each wave band exceeds a preset trigger difference value;
if the difference of the noise voltages corresponding to any harmonic exceeds the trigger difference value, starting a spread spectrum function;
and if the difference of the noise voltages corresponding to all the harmonics does not exceed the trigger difference value, closing the spread spectrum function.
Optionally, if the difference between the noise voltages corresponding to any harmonic exceeds the trigger difference, a process of starting the spread spectrum function includes:
and if the difference of the noise voltages corresponding to any harmonic exceeds the trigger difference value, the BMC chip is utilized to adjust the value of the register, and the spread spectrum function is started.
Optionally, if the difference between the noise voltages corresponding to all the harmonics does not exceed the trigger difference, the process of closing the spread spectrum function includes:
and if the difference of the noise voltages corresponding to all the harmonics does not exceed the trigger difference, the BMC chip is utilized to adjust the value of the register, and the spread spectrum function is closed.
In the present invention, a clock spread spectrum detection circuit includes: n detection circuits for detecting the harmonic waves of the corresponding frequencies, a signal summarizing circuit for summarizing detection signals output by the detection circuits and a spread spectrum control circuit; each detection circuit comprises a frequency selection circuit and an identification circuit; the frequency selecting circuit is used for respectively transmitting the noise voltages input by the first input end of the frequency selecting circuit and the second input end of the frequency selecting circuit to the identification circuit; the identification circuit is used for outputting a trigger signal to the signal summarizing circuit after the difference between the noise voltage input by the first input end of the frequency selecting circuit and the noise voltage input by the second input end of the frequency selecting circuit exceeds a preset trigger difference value; the signal summarizing circuit is used for outputting an opening signal to the spread spectrum control circuit after receiving the trigger signal output by any one of the detection circuits; and the spread spectrum control circuit is used for starting the spread spectrum function according to the starting signal, and closing the spread spectrum function when the starting signal is not received.
According to the invention, the detection circuit and the signal summarizing circuit are added, whether the harmonic waves of different wave orders exceed a preset threshold value or not is detected through the multipath detection circuit, electromagnetic radiation exceeding the preset range is generated, once the electromagnetic radiation exceeding the preset electromagnetic range is detected, the signal summarizing circuit outputs an opening signal to the spread spectrum control circuit according to a trigger signal output by any detection circuit, the spread spectrum control circuit opens the spread spectrum function according to the opening signal, when the electromagnetic radiation exceeding the preset range is not detected, the spread spectrum control circuit does not receive the opening signal, the spread spectrum function is automatically closed, and the automatic opening and closing function of the spread spectrum function is realized through the detection circuit capable of detecting the electromagnetic radiation exceeding the preset range and the spread spectrum control circuit with an automatic switch, so that the negative influence caused by the long-time opening of the spread spectrum function is avoided.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings that are required to be used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only embodiments of the present invention, and that other drawings can be obtained according to the provided drawings without inventive effort for a person skilled in the art.
Fig. 1 is a schematic diagram of a clock spread spectrum detection circuit according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of a first detection circuit according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a second detection circuit according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a third detecting circuit according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of a fourth detecting circuit according to an embodiment of the present invention;
FIG. 6 is a schematic diagram of a fifth detecting circuit according to an embodiment of the present invention;
fig. 7 is a schematic diagram of a signal summarizing circuit according to an embodiment of the present invention;
fig. 8 is a flowchart of a clock spread spectrum detection method according to an embodiment of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The embodiment of the invention discloses a clock spread spectrum detection circuit 1, which is shown in fig. 1, and comprises the following steps: n detection circuits 1 for detecting harmonics of corresponding frequencies, a signal summarizing circuit 2 for summarizing detection signals output from the detection circuits 1, and a spread spectrum control circuit;
each detection circuit 1 includes a frequency selection circuit 11 and an identification circuit 12;
the frequency selection circuit 11 is configured to send noise voltages input by the first input terminal of the frequency selection circuit 11 and the second input terminal of the frequency selection circuit 11 to the identification circuit 12;
the identifying circuit 12 is configured to output a trigger signal to the signal summarizing circuit 2 after a difference between the noise voltage input from the first input terminal of the frequency selecting circuit 11 and the noise voltage input from the second input terminal of the frequency selecting circuit 11 exceeds a preset trigger difference;
the signal summarizing circuit 2 is used for outputting an opening signal to the spread spectrum control circuit after receiving the trigger signal output by any one of the detection circuits 1;
and the spread spectrum control circuit is used for starting the spread spectrum function according to the starting signal, and closing the spread spectrum function when the starting signal is not received.
Specifically, each path of detection circuit 1 is configured to detect harmonics of different wavelengths, for example, the first detection circuit 1 is configured to detect a first harmonic, the second detection circuit 1 is configured to detect a second harmonic … …, the fifth detection circuit 1 is configured to detect a fifth harmonic, and the like, and by multiplexing a plurality of detection circuits 1, the detection of multiple harmonics can be covered by each path of detection circuit 1, by detecting a voltage difference of electromagnetic radiation noise between differential pairs of clock signals (CPU 1_clk_dp and CPU 1_clk_dn), whether a harmonic exceeding a preset range occurs can be detected, once a harmonic exceeding the preset range is detected, the detection circuit 1 outputs a trigger signal to the signal summarizing circuit 2, and the signal summarizing circuit 2 only needs to receive the trigger signal transmitted by any path of detection circuit 1, and then sends an on signal to the subsequent spread spectrum control circuit, so that the spread spectrum control circuit timely starts the spread spectrum function to reduce electromagnetic radiation when the electromagnetic radiation exceeds standard.
Specifically, when the detection circuit 1 does not detect excessive harmonic waves, a trigger signal is not output, the signal summarizing circuit 2 does not send an opening signal to the spread spectrum control circuit, the spread spectrum control circuit keeps the spread spectrum function closed in a period of not receiving the opening signal, and the spread spectrum function is started only after the opening signal is continuously received, so that the spread spectrum function is started when electromagnetic radiation exceeds standard, and when the electromagnetic radiation is in a normal range, the problem that the disc dropping and signal integrity are influenced due to continuous opening are reduced due to the fact that the spread spectrum function is closed is solved.
Specifically, the detection circuit 1 detects harmonics of different wavelengths through the frequency selection circuit 11, and by setting the frequency selection circuit 11, the detection circuit 1 can detect the harmonics of different wavelengths, so that the frequency selection circuits 11 in each detection circuit 1 are not identical, the identification circuits 12 of the detection circuits 1 in each detection circuit 1 can be identical, the noise voltage of electromagnetic radiation noise between differential pairs of the clock signals input by the frequency selection circuits 11 is received, the identification circuits 12 determine the noise voltage difference of the electromagnetic radiation noise between the differential pairs of the clock signals, determine whether the noise voltage difference exceeds a preset threshold, and output a trigger signal to the signal summarizing circuit 2 once the noise voltage difference exceeds the preset threshold.
It can be seen that, in the embodiment of the present invention, the detection circuit 1 and the signal summarizing circuit 2 are added, the multipath detection circuit 1 detects whether the harmonics of different wave orders exceed the preset threshold value, and generates electromagnetic radiation exceeding the preset range, once the exceeding of the preset electromagnetic range is detected, the signal summarizing circuit 2 outputs an opening signal to the spread spectrum control circuit according to the triggering signal output by any one of the detection circuits 1, and the spread spectrum control circuit opens the spread spectrum function according to the opening signal, when the electromagnetic radiation exceeding the preset range is not detected, the spread spectrum control circuit does not receive the opening signal, and then the spread spectrum function is automatically closed, and by setting the detection circuit 1 capable of detecting the exceeding of the electromagnetic radiation and the spread spectrum control circuit with an automatic switch, the automatic opening and closing function of the spread spectrum function is realized, and the negative effect caused by the long-time opening of the spread spectrum function is avoided.
Further, the embodiment of the present invention also discloses a specific clock spread spectrum detection circuit 1, and compared with the previous embodiment, the present embodiment further describes and optimizes the technical scheme. Referring to fig. 2 to 7, in particular:
specifically, the first input end of the frequency selection circuit 11 is connected with one end of the differential pair of the clock signal, the second input end of the frequency selection circuit 11 is connected with the other end of the differential pair of the clock signal, the first output end of the frequency selection circuit 11 is connected with the first input end of the identification circuit, the second output end of the frequency selection circuit 11 is respectively connected with the second input end of the identification circuit 12, the output end of the identification circuit 12 is connected with the input end of the signal summarizing circuit 2, and the output end of the signal summarizing circuit 2 is connected with the spread spectrum control circuit.
Specifically, the frequency selecting circuit 11 may specifically include: a first LC series resonant circuit and a second LC series resonant circuit;
the first LC series resonant circuit includes a first inductance (L1, L3, L5, L7, and L9) and a first capacitance (C1, C3, C5, C7, and C9) connected in series;
the second LC series resonant circuit includes a second inductance (L2, L4, L6, L8, and L10) and a second capacitance (C2, C4, C6, C8, and C10) connected in series;
one end of the first inductor is used as a first input end of the frequency selection circuit 11, the other end of the first inductor is connected with one end of the first capacitor, and the other end of the first capacitor is used as a first output end of the frequency selection circuit 11;
one end of the second inductor is used as a second input end of the frequency selection circuit 11, the other end of the second inductor is connected with one end of the second capacitor, and the other end of the second capacitor is used as a second output end of the frequency selection circuit 11.
Specifically, signal sampling is performed by a series circuit of an inductance L and a capacitance C. LC series resonant circuits in a series resonant circuit, the current in the circuit is maximized when the signal approaches a particular frequency, which is referred to as the resonant frequency. When an input signal passes through the LC series circuit, according to the characteristics of an inductor and a capacitor, the impedance of the inductor is larger as the frequency of the signal is higher, the impedance of the capacitor is smaller, the attenuation of the signal is larger as the impedance is larger, the attenuation of the signal with higher frequency is larger through the inductor, and the direct current signal cannot pass through the capacitor. The impedance of the LC series circuit is minimal when the frequency of the input signal is equal to the frequency of the LC resonance. Signals of this frequency are easily output through capacitors and inductors. The LC series resonant circuit now plays a role in frequency selection.
According to the formula:
in the formula, fo is the resonant frequency of the corresponding series inductance and capacitance circuit, and the corresponding impedance is minimum at the series resonant frequency, and the corresponding harmonic frequency can pass through the resonant circuit without attenuation at the moment, so that the purpose of selecting the corresponding harmonic is achieved. The resonant frequency can be adjusted by adjusting the inductance value and the capacitance value, and the corresponding first harmonic, second harmonic, third harmonic, fourth harmonic and fifth harmonic are selected by the LC series circuit, i.e. the frequency selection circuit 11.
Next, the voltage of electromagnetic radiation noise between the differential pairs of the clock signals, i.e., between the CPU1_clk_dp and the CPU1_clk_dn, is input to the input terminal of the operational amplifier through the LC series circuit, and when the voltage difference of the input terminal exceeds a preset 74dBuV, the operational amplifier outputs a driving voltage. The same working principle is that the circuit can detect and identify the voltage difference of the frequency domain fifth harmonic. When the voltage of the input end of the operational amplifier drops from the voltage exceeding 74dBuV to below 74dBuV, the output end of the operational amplifier has no output signal.
Specifically, as shown in fig. 2, an inductance-capacitance series filter circuit is added between the CPU1_clk_dp and the CPU1_clk_dn, and the inductance L1 and the capacitance C1 are used for detecting the first harmonic of the CPU1_clk_dp, that is, the target frequency, which is the main communication frequency between the CPU and the memory. For example: 1366MHz, 1600MHz, etc. Different frequency points correspond to different inductance and capacitance values. The inductor L2 and the capacitor C2 detect the first harmonic with respect to the CPU1_clk_dn, when the voltage difference between the CPU1_clk_dp and the CPU1_clk_dn at a specific frequency exceeds 74dBuV, the operational amplifier U1A outputs a driving voltage to drive the N-type MOS transistor M1 to be turned on, the gate voltage of the N-type MOS transistor M2 is pulled down, the N-type MOS transistor M2 is turned off, and the CPU1_clk_n1 outputs a high level signal.
Specifically, the detection circuit 1 in fig. 3, fig. 4, fig. 5 and fig. 6 basically operates in the same manner as the detection circuit in fig. 2, except that the detected frequency is different from the detection circuit in fig. 3 in that the detected frequency is 2 times the target frequency, the detected frequency in fig. 4 is 3 times the target frequency, the detected frequency in fig. 5 is 4 times the target frequency, and the detected frequency in fig. 6 is 5 times the target frequency.
Specifically, the identification circuit 12 may specifically include: operational amplifiers (U1A, U1B, U2A, U B and U3A), first resistors (R3, R7, R12, R17 and R22), second resistors (R4, R8, R13, R18 and R23), third resistors (R5, R10, R15, R20 and R25), first controllable switches (M1, M3, M5, M7 and M9) and second controllable switches (M2, M4, M6, M8 and M10);
the positive input end of the operational amplifier is used as the first input end of the identification circuit 11, the negative input end of the operational amplifier is used as the second input end of the identification circuit 11, the first end of the operational amplifier, one end of the first resistor and one end of the second resistor are mutually connected, the second end of the operational amplifier, the output end of the first controllable switch and the output end of the second controllable switch are grounded, the output end of the operational amplifier is connected with the control end of the first controllable switch, the input end of the first controllable switch, the other end of the second resistor and the control end of the second controllable switch are connected, the other end of the first resistor and one end of the third resistor are connected with a power supply, and the other end of the third resistor is connected with the input end of the second controllable switch to serve as the output end of the identification circuit 12.
Specifically, the signal summarizing circuit 2 may specifically include an or circuit, and the or circuit may include a plurality of input terminals respectively corresponding to the output terminals of the identification circuit 12 of each detection circuit 1, and the output terminal of the or circuit is used as the output terminal of the signal summarizing circuit 2.
Specifically, the spread spectrum control circuit may be a BMC chip;
after the BMC chip receives the starting signal, the value of the register is adjusted, the spread spectrum function is started, and after the BMC chip does not receive the starting signal, the value of the register is adjusted, and the spread spectrum function is closed.
Specifically, referring to fig. 2 to 6, the five-path detection circuit 1 according to the embodiment of the present invention may include a first detection circuit 1 for detecting a first harmonic, a second detection circuit 1 for detecting a second harmonic, a third detection circuit 1 for detecting a third harmonic, a fourth detection circuit 1 for detecting a fourth harmonic, and a fifth detection circuit 1 for detecting a fifth harmonic.
Specifically, referring to fig. 7, the signal summarizing circuit 2 may include a first or gate U6A, a second or gate U6B, a third or gate U6C, a fourth nor gate U8A, and an nor gate U7A; the first or gate U6A, the second or gate U6B, and the third or gate U6C are respectively connected to the output ends of the first to fifth detection circuits 1, and the fourth nor gate U8A sums the output signals of the first to third or gates (U6A, U B and U6C), outputs the signals to the nor gate U7A, and finally outputs the high-level on signal.
Specifically, the CPU1_clk_n1 if it is at a high level means that the main frequency of the target frequency exceeds the requirement of the regulation limit. If the CPU1_CLK_N2 is high, the 2 times of the target frequency exceeds the requirement of the regulation limit. If the CPU1_CLK_N3 is high, it means that the 3 times of the target frequency exceeds the requirement of the legal limit. If the CPU1_CLK_N4 is high, the 4 times of the target frequency exceeds the requirement of the regulation limit. If the CPU1_CLK_N5 is high, it means that the 5 times of the target frequency exceeds the requirement of the legal limit. Any one of the signals of the CPU1_CLK_N1, the CPU1_CLK_N2, the CPU1_CLK_N3, the CPU1_CLK_N4 or the CPU1_CLK_N5 is high, and the BMC_ZhanPin signal is changed to be high.
Specifically, after the bmc_zhanpin signal changes to a high level, the BMC chip adjusts the value of the register to open the spreading of the corresponding clock signal.
Specifically, after the bmc_zhanpin signal changes to a low level, the BMC chip adjusts the value of the register, and closes the spreading of the corresponding clock signal.
Correspondingly, the embodiment of the invention also discloses a clock spread spectrum detection method, which is shown in fig. 8 and comprises the following steps:
s11: obtaining noise voltages corresponding to the harmonics of different wave orders from the clock differential pair;
s12: judging whether the difference of noise voltages corresponding to the harmonic waves of each wave band exceeds a preset trigger difference value;
s13: if the difference of the noise voltages corresponding to any harmonic exceeds the trigger difference value, starting a spread spectrum function;
s14: if the difference of the noise voltages corresponding to all the harmonics does not exceed the trigger difference, the spread spectrum function is turned off.
It can be seen that, in the embodiment of the invention, by acquiring the noise voltages corresponding to the harmonics of different wave orders from the clock differential pair, judging whether the harmonics of different wave orders exceed the preset threshold value, generating electromagnetic radiation exceeding the preset range, starting the spread spectrum function once exceeding the preset electromagnetic range is detected, and automatically closing the spread spectrum function when the electromagnetic radiation exceeding the preset range is not detected, and realizing the function of automatically starting and closing the spread spectrum function by monitoring whether the difference of the noise voltages corresponding to the harmonics of each wave order exceeds the preset trigger difference value, thereby avoiding the negative influence caused by starting the spread spectrum function for a long time
Specifically, the process of starting the spread spectrum function may include:
if the difference of the noise voltages corresponding to any harmonic exceeds the trigger difference value, the BMC chip is utilized to adjust the value of the register, and the spread spectrum function is started.
Specifically, if the difference between the noise voltages corresponding to all the harmonics does not exceed the trigger difference, the process of closing the spread spectrum function may include:
if the difference of the noise voltages corresponding to all the harmonics does not exceed the trigger difference, the BMC chip is utilized to adjust the value of the register, and the spread spectrum function is closed.
Finally, it is further noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
Those of skill would further appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative elements and steps are described above generally in terms of functionality in order to clearly illustrate the interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
The foregoing has outlined rather broadly the more detailed description of the invention in order that the detailed description of the invention that follows may be better understood, and in order that the present principles and embodiments may be better understood; meanwhile, as those skilled in the art will have variations in the specific embodiments and application scope in accordance with the ideas of the present invention, the present description should not be construed as limiting the present invention in view of the above.
Claims (10)
1. A clock spread spectrum detection circuit, comprising: n detection circuits for detecting the harmonic waves of the corresponding frequencies, a signal summarizing circuit for summarizing detection signals output by the detection circuits and a spread spectrum control circuit; wherein N is a positive integer;
each detection circuit comprises a frequency selection circuit and an identification circuit;
the frequency selecting circuit is used for respectively transmitting noise voltages input by the first input end of the frequency selecting circuit and the second input end of the frequency selecting circuit to the identifying circuit;
the identification circuit is used for outputting a trigger signal to the signal summarizing circuit after the difference between the noise voltage input by the first input end of the frequency selecting circuit and the noise voltage input by the second input end of the frequency selecting circuit exceeds a preset trigger difference value;
the signal summarizing circuit is used for outputting an opening signal to the spread spectrum control circuit after receiving the trigger signal output by any one of the detection circuits;
the spread spectrum control circuit is used for starting the spread spectrum function according to the starting signal, and closing the spread spectrum function when the starting signal is not received.
2. The clock spread spectrum detection circuit according to claim 1, wherein a first input terminal of the frequency selection circuit is connected to one end of the differential pair of clock signals, a second input terminal of the frequency selection circuit is connected to the other end of the differential pair of clock signals, a first output terminal of the frequency selection circuit is connected to a first input terminal of the identification circuit, a second output terminal of the frequency selection circuit is connected to a second input terminal of the identification circuit, an output terminal of the identification circuit is connected to an input terminal of the signal summarizing circuit, and an output terminal of the signal summarizing circuit is connected to the spread spectrum control circuit.
3. The clock spread spectrum detection circuit of claim 2, wherein the frequency selective circuit comprises: a first LC series resonant circuit and a second LC series resonant circuit;
the first LC series resonant circuit comprises a first inductor and a first capacitor which are connected in series;
the second LC series resonant circuit comprises a second inductor and a second capacitor which are connected in series;
one end of the first inductor is used as a first input end of the frequency selection circuit, the other end of the first inductor is connected with one end of the first capacitor, and the other end of the first capacitor is used as a first output end of the frequency selection circuit;
one end of the second inductor is used as a second input end of the frequency selection circuit, the other end of the second inductor is connected with one end of the second capacitor, and the other end of the second capacitor is used as a second output end of the frequency selection circuit.
4. The clock spread spectrum detection circuit of claim 3, wherein the identification circuit comprises: the circuit comprises an operational amplifier, a first resistor, a second resistor, a third resistor, a first controllable switch and a second controllable switch;
the positive electrode input end of the operational amplifier is used as a first input end of the identification circuit, the negative electrode input end of the operational amplifier is used as a second input end of the identification circuit, the first end of the operational amplifier, one end of the first resistor and one end of the second resistor are mutually connected, the second end of the operational amplifier, the output end of the first controllable switch and the output end of the second controllable switch are grounded, the output end of the operational amplifier is connected with the control end of the first controllable switch, the input end of the first controllable switch, the other end of the second resistor and the control end of the second controllable switch are connected, the other end of the first resistor, one end of the third resistor and the input end of the second controllable switch are connected to form the output end of the identification circuit.
5. The clock spread spectrum detection circuit of claim 1, wherein the signal summarizing circuit comprises an or circuit comprising a plurality of inputs respectively corresponding to the outputs of the identification circuits of each detection circuit, the outputs of the or circuit being the outputs of the signal summarizing circuit.
6. The clock spread spectrum detection circuit of any one of claims 1 to 5, wherein the spread spectrum control circuit is a BMC chip;
and after the BMC chip receives the starting signal, adjusting the value of the register, starting the spread spectrum function, and after the BMC chip does not receive the starting signal, adjusting the value of the register, and closing the spread spectrum function.
7. The clock spread spectrum detection circuit of claim 6, comprising a first detection circuit for detecting a first harmonic, a second detection circuit for detecting a second harmonic, a third detection circuit for detecting a third harmonic, a fourth detection circuit for detecting a fourth harmonic, and a fifth detection circuit for detecting a fifth harmonic.
8. A method for clock spread spectrum detection, comprising:
obtaining noise voltages corresponding to the harmonics of different wave orders from the clock differential pair;
judging whether the difference of noise voltages corresponding to the harmonic waves of each wave band exceeds a preset trigger difference value;
if the difference of the noise voltages corresponding to any harmonic exceeds the trigger difference value, starting a spread spectrum function;
and if the difference of the noise voltages corresponding to all the harmonics does not exceed the trigger difference value, closing the spread spectrum function.
9. The method of claim 8, wherein the step of starting a spread function if a difference between noise voltages corresponding to any one of the harmonics exceeds the trigger difference value comprises:
and if the difference of the noise voltages corresponding to any harmonic exceeds the trigger difference value, the BMC chip is utilized to adjust the value of the register, and the spread spectrum function is started.
10. The method of claim 9, wherein the step of turning off the spread spectrum function if the difference between the noise voltages corresponding to all the harmonics does not exceed the trigger difference value comprises:
and if the difference of the noise voltages corresponding to all the harmonics does not exceed the trigger difference, the BMC chip is utilized to adjust the value of the register, and the spread spectrum function is closed.
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| JP2002209109A (en) * | 2001-01-11 | 2002-07-26 | Ricoh Co Ltd | Method and device for generating timing signal, and image processing apparatus |
| CN101739974A (en) * | 2008-11-14 | 2010-06-16 | 群康科技(深圳)有限公司 | Pulse regulating circuit and driving circuit using same |
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| JP4881627B2 (en) * | 2006-02-13 | 2012-02-22 | ルネサスエレクトロニクス株式会社 | Semiconductor integrated circuit and semiconductor integrated circuit for wireless communication |
| JP5022445B2 (en) * | 2007-11-02 | 2012-09-12 | パナソニック株式会社 | Spread spectrum clock generator |
| JP2016166775A (en) * | 2015-03-09 | 2016-09-15 | 富士通株式会社 | Semiconductor integrated circuit and noise measuring method |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002209109A (en) * | 2001-01-11 | 2002-07-26 | Ricoh Co Ltd | Method and device for generating timing signal, and image processing apparatus |
| CN101739974A (en) * | 2008-11-14 | 2010-06-16 | 群康科技(深圳)有限公司 | Pulse regulating circuit and driving circuit using same |
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