CN113961453A - Full-digital simulation test system for airborne software - Google Patents
Full-digital simulation test system for airborne software Download PDFInfo
- Publication number
- CN113961453A CN113961453A CN202111159173.4A CN202111159173A CN113961453A CN 113961453 A CN113961453 A CN 113961453A CN 202111159173 A CN202111159173 A CN 202111159173A CN 113961453 A CN113961453 A CN 113961453A
- Authority
- CN
- China
- Prior art keywords
- simulation
- module
- target
- translation
- software
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
- G06F11/3664—Environments for testing or debugging software
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
- G06F11/3668—Software testing
- G06F11/3672—Test management
- G06F11/3688—Test management for test execution, e.g. scheduling of test suites
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Debugging And Monitoring (AREA)
Abstract
The invention discloses a full-digital simulation test system of airborne software, which has strong flexibility and expansibility and can reduce the development time and cost of a test environment, and the invention is realized by the following technical scheme: the man-machine interaction component provides a computer graphic hardware environment modeling instruction to the simulation core platform through the API interface layer; the simulation core platform runs an embedded operating system or a target binary program, and completes the peripheral simulation configuration by accelerating binary translation, processor simulation and memory bus simulation; the collaborative simulation component adopts DDS simulation management of a distributed direct digital frequency synthesizer to realize time synchronization, data synchronization, node management and synchronous engineering management; the simulation tool assembly assists in running analysis, loading and debugging analysis of the executable file, fault is injected into the simulation core platform, the reusable library is utilized, the virtual environment is rapidly built according to the connection mode of the target system, target code coverage rate statistics is completed, and the executable file is generated.
Description
Technical Field
The invention belongs to the technical field of all-digital simulation testing, and relates to an aviation airborne software simulation testing system based on a dynamic binary translation technology and a collaborative simulation time synchronization mechanism.
Background
The avionics system test is an important link in the aircraft development process, and flight parameters provide objective and scientific basis for aircraft fault diagnosis and prediction, auxiliary flight training analysis, flight accident investigation and the like. The avionics system generally comprises communication, navigation, identification, radar and other equipment, realizes the functions of information measurement, acquisition, transmission, processing, monitoring and display, and completes the tasks of flight control, navigation and the like. The error can significantly affect the testing of subsequent data. The safety problem of the onboard software is also becoming a restrictive factor of the safety and health development of the onboard software in the aviation industry. The safety of the aviation onboard software refers to the capability of the aviation onboard software for guaranteeing the safety of the system in the operation process, and the safety of the aviation onboard software is closely connected with the reliability of the aviation onboard software. The analysis of the safety of the aviation onboard software requires that aviation detection personnel perform multiple and detailed technical analysis and detection on the aviation onboard software, and in addition, the problems of the aviation onboard system software can be detected and solved by the existing advanced scientific and technical method capable of testing the safety of the aviation onboard software. With the continuous progress of the aviation industry, China has new knowledge on the aviation onboard software, the safety test is taken as an important working link for researching the quality and the value of the aviation onboard software, and the research on the safety test technology of the aviation onboard software can effectively improve the reliability and the safety of the aviation onboard software and promote the continuous progress and the development of the aviation field business. The digital simulation is an important technology for calculating the performance of airborne software and designing a control system, and is widely applied to the aspects of simulation of a controller and semi-physical test research of the control system. Digital simulation is an important means for reducing the research and development cost of the flight system and shortening the research and development period of the flight system.
Because of the abundance and complexity of signals from onboard electronics, these signals encompass low and high frequencies, both continuous and discrete, and also include electrical and non-electrical signals. The traditional test system is built by adopting a discrete instrument, and the method has high cost, low measurement automation degree and poor expansibility. Most of airborne electronic equipment has a lot of signals, an automatic test system of the airborne electronic equipment needs to test functions of hundreds of components, the related signals have a lot of types and numbers, the signals are divided into low-frequency signals and high-frequency signals according to frequency, the signals are divided into continuous signals and discrete signals according to time domain characteristics, and the signals are divided into electric signals and non-electric signals (such as temperature, speed, height, air pressure, course and the like) according to forms. The airborne software verification platform architecture is different in software architecture, operating system and communication mode adopted by all professional full-digital simulation target systems, multidisciplinary simulation models, distributed software applications and test management systems, and the systems cannot be directly interacted with one another. The typical environment of the aviation onboard software test comprises a full physical real-installation environment and a semi-physical simulation environment. In a full physical real-installation environment, software runs on a real target machine, and other systems connected with the software are real physical equipment. Common test tools include bus monitors, emulation memory, and logic analyzers. The full physical real-installation environment has the advantages that the software operation environment is real, and the reliability of the test result is high; the defects are that the number of the complete physical packaging environment is very small and the cost is expensive. In a semi-physical simulation environment, software runs on a real target machine, while other external systems and environments are implemented through software simulation. The semi-physical simulation environment is generally composed of a target machine and an upper mechanism. The target machine is responsible for running the tested software, realizing breakpoint debugging and providing the function of software execution information; the upper computer realizes the functions of test management, environment model simulation, excitation providing, test result analysis and display. This is currently the most common testing environment for embedded software. With the continuous improvement of computer hardware performance and the continuous progress of software technology, the full digital simulation technology has been developed rapidly. The full digital simulation test system is an application software simulation technology, vividly simulates the physical environment of the operation of the tested software, and dynamically executes the software debugging and verification activities of the tested software on the full digital simulation test system. The full-digital simulation test system is applied to the development process of embedded software in various industries, effectively relieves the problem that the development of the embedded software excessively depends on the hardware environment, and brings about new change of the development mode of the embedded software.
Both of the above two environments are based on the environment of a real target machine, and there are mainly the following problems: the development process of the aviation onboard software excessively depends on product hardware, the construction cost of the test environment is high, the test automation degree is low,
(1) most of the existing embedded systems adopt a mode of parallel development of software and hardware, and when the development process of the software is started, the hardware environment is often not available, so that the software development can not be carried out in parallel with the hardware development, and the problem of the software can not be found as early as possible and in time.
(2) And the non-intervention test of the embedded software is difficult to realize. By non-intervention testing, it is meant that the testing methods and techniques employed during testing cannot affect the execution behavior of the software under test. For example, in a target machine-based testing environment, instrumentation techniques are often employed to obtain time and coverage information for software execution. However, this method modifies the software under test, causing code inflation. Because the code space of the embedded software is very limited, the code after the pile insertion can not be loaded; or the real-time performance of the software is deteriorated due to the insertion of the probe code, and the execution result of the tested software is even influenced.
(3) The controllability of the environment is poor. The state storage and recovery in the test process and the setting of a specific test scene are difficult; the test process adopts physical time, and accelerated test is difficult to carry out; the internal behavior of the system is difficult to know in the test process, which is not beneficial to timely finding and positioning the problems in the tested software.
(4) The environment is not universal. Many hardware test environments belong to the customization environment, are difficult to be fit for other projects, and the test environment reusability of investment is poor.
Disclosure of Invention
The invention aims to solve the problems of excessive dependence on product hardware, high construction cost of a test environment, low test automation degree and the like in the development process of aviation onboard software, break through key technologies such as model packaging, virtualization system modeling and analysis and the like of the aviation onboard software, realize all-digital high-speed closed-loop simulation operation of the aviation onboard software, improve the test and verification capability of the aviation onboard software, and provide an all-digital simulation test system of the aviation onboard software, which has strong flexibility and expansibility, can reduce the development time and cost of the test environment and is based on a dynamic binary translation technology and a collaborative simulation time synchronization mechanism, so as to solve the software test dilemma of an aviation system in the development process of models.
The scheme adopted by the invention for solving the problems in the prior art is as follows: an all-digital simulation test system of airborne software, comprising: the simulation system comprises a simulation core platform based on a dynamic binary translation technology, a simulation tool component communicated with the simulation core platform, a collaborative simulation component based on a collaborative simulation time synchronization mechanism and a human-computer interaction component, and is characterized in that: the man-machine interaction assembly completes engineering management and virtual target system construction through visual operation, and provides a computer operation user interface GUI, a command line interface, an automatic test and a graphical hardware environment modeling instruction which are displayed in a graphical mode to the simulation core platform through an API (application programming interface) interface layer; the simulation core platform simulates a real target system and a peripheral environment, runs an embedded operating system or a target binary program, completes peripheral simulation configuration through accelerated binary translation, processor simulation and memory bus simulation, and manages interruption and exception, and ensures the time sequence consistency of an accelerated binary translation module, a processor simulation module, a memory bus module, a peripheral simulation module and an interruption and exception management module based on global clock management and periodic time queue management; the collaborative simulation component adopts DDS (direct digital synthesizer) simulation management of a distributed direct digital synthesizer, a communication protocol middleware is distributed in real time, time synchronization, data synchronization, node management and synchronous engineering management are realized, a model adaptation layer of a distributed embedded system is built, and interconnection with a plurality of nodes of simulation model layer software/models of a simulation core platform is realized; the simulation tool assembly assists a user to analyze and load an executable file and debug and analyze the operation of a simulation test system, fault is injected into a simulation core platform, a reusable library is utilized, a virtual environment is quickly built according to the connection mode of a target system, target code coverage rate statistics is completed, debugging information is added into the target file to generate an executable file, the length of a memory and the operation data of a CPU register and a current program are checked, a plurality of programming languages are debugged by a remote GDB, the value of a variable is output according to the type of the variable, the value of a dynamic array is displayed, and functions of instruction single step execution, breakpoint debugging, source code level debugging and the like are realized.
Compared with the prior art, the invention has the following remarkable advantages:
the invention adopts a simulation tool component which is communicated with a simulation core platform based on a dynamic binary translation technology, a collaborative simulation component and a man-machine interaction component based on a collaborative simulation time synchronization mechanism, and the formed full-digital simulation test system of the airborne software can provide various reusable libraries of hardware (a processor, a memory and a peripheral) and allow a user to develop the reusable libraries by himself. The reusable library can be used for quickly building a virtual environment according to the connection mode of a target system, the design idea of object-oriented design is adopted, all components on the target system to be virtualized are designed into independent modules, the hardware configuration file is quickly generated by manually modifying the hardware configuration file or by an interface graph dragging mode, each module required is instantiated, the virtual target system is quickly built, and the development time and the cost of a test environment are greatly reduced.
The invention adopts a human-computer interaction assembly to complete engineering management and virtual target system construction through visual operation, and provides a computer operation user interface GUI, a command line interface, an automatic test and a graphical hardware environment modeling instruction which are displayed in a graphical mode to a simulation core platform through an API (application programming interface) interface layer; the method is easy to realize various test settings, such as simulating various hardware faults, realizing specific test input, supporting complex test scripts and the like, and the test settings, data collection, result recording and the like do not influence the normal operation of the software, so that the test sufficiency of the airborne software is greatly improved. And the powerful, quick and flexible operation processing capacity of the software can be utilized, the functions of the hardware module are simplified, the volume of the hardware module is reduced, the stability and the reliability of the system are improved, in addition, the test of most signals can be met only by changing the software, and the flexibility and the expansibility are very strong.
The simulation core platform simulates a real target system and a peripheral environment, runs an embedded operating system or a target binary program, completes peripheral simulation configuration by accelerating binary translation, processor simulation and memory bus simulation, manages interruption and exception, and ensures the time sequence consistency of a module based on global clock management and periodic time queue management; the collaborative simulation component is used for simulation management of distributed multi-systems, time synchronization, data synchronization, node management and synchronous engineering management are realized by adopting a direct digital frequency synthesizer DDS distributed real-time data distribution communication protocol middleware, a distributed embedded system model adaptation layer is built, and interconnection with a plurality of nodes of simulation model layer software/models of a simulation core platform is realized; the method breaks through key technologies such as model packaging of the airborne software virtualization processor, modeling and analysis of a virtualization system and the like, realizes full-digital high-speed closed-loop simulation operation of the airborne software, and improves the testing and verifying capability of the airborne software.
The method adopts a simulation tool assembly to assist a user in carrying out executable file analysis and loading, debugging analysis on system operation, injects faults into a simulation core platform, quickly builds a virtual environment for a reusable library according to the connection mode of a target system, completes target code coverage rate statistics, adds debugging information into the target file, generates an executable file, checks the length of a memory and CPU register checking, checks the operation data of a current program, remotely debugs various programming languages by GDB, outputs the value of a variable according to the type of the variable, displays the value of a dynamic array, and has the functions of instruction single step execution and breakpoint debugging, source code level debugging and the like. The operator can apply the signal according to the requirement and monitor the signal in real time. The actual instrument interface may be simulated by providing a user interface resource file and various control and display controls that develop the virtual instrument interface. The avionics system software can be tested under the condition that finished products and objects are not adopted, and the test process can cover the whole life cycle of software development. Compared with the mode of building a test bench by using a traditional instrument, the automatic test system greatly improves the efficiency and the quality and provides powerful guarantee for airborne electronic equipment.
The method is based on the dynamic binary translation technology and the collaborative simulation time synchronization mechanism, when the aviation onboard software running environment is simulated, hardware resources such as other single machines and the like are not needed except a working PC, so that the dependence on hardware equipment is low, the problems of insufficient test contents caused by the limitation of the expansibility and flexibility of the hardware resources and the waste of time, labor and financial resources caused by the high cost and the easy conflict of the hardware resources can be solved, and the complexity of the construction of the aviation onboard software test environment is simplified.
Drawings
The patent is further described below with reference to the drawings and examples.
FIG. 1 is a schematic diagram of a component framework of the full-digital simulation test system of airborne software of the invention;
FIG. 2 is a schematic diagram of the working principle of the emulation core platform for performing dynamic binary translation by using a target machine platform;
FIG. 3 is a workflow diagram of the co-simulation component co-simulation time synchronization mechanism of FIG. 1.
Detailed Description
See fig. 1. In a preferred embodiment described below, an all-digital simulation test system for airborne software comprises: the simulation system comprises a simulation core platform based on a dynamic binary translation technology, a simulation tool component communicated with the simulation core platform, a collaborative simulation component based on a collaborative simulation time synchronization mechanism and a human-computer interaction component, and is characterized in that: the man-machine interaction assembly completes engineering management and virtual target system construction through visual operation, and provides a computer operation user interface GUI, a command line interface, an automatic test and a graphical hardware environment modeling instruction which are displayed in a graphical mode to the simulation core platform through an API (application programming interface) interface layer; the simulation core platform simulates a real target system and a peripheral environment, runs an embedded operating system or a target binary program, completes peripheral simulation configuration through accelerated binary translation, processor simulation and memory bus simulation, and manages interruption and exception, and ensures the time sequence consistency of an accelerated binary translation module, a processor simulation module, a memory bus module, a peripheral simulation module and an interruption and exception management module based on global clock management and periodic time queue management; the collaborative simulation component adopts DDS (direct digital synthesizer) simulation management of a distributed direct digital synthesizer, a communication protocol middleware is distributed in real time, time synchronization, data synchronization, node management and synchronous engineering management are realized, a model adaptation layer of a distributed embedded system is built, and interconnection with a plurality of nodes of simulation model layer software/models of a simulation core platform is realized; the simulation tool assembly assists a user to analyze and load an executable file and debug and analyze the operation of a simulation test system, fault is injected into a simulation core platform, a reusable library is used for rapidly building a virtual environment according to the connection mode of a target system, target code coverage rate statistics is completed, debugging information is added into the target file to generate an executable file, the length of a memory and the operation data of a CPU register and a current program are checked, a plurality of programming languages are debugged by a remote GDB, the value of a variable is output according to the type of the variable, the value of a dynamic array is displayed, and functions of instruction single step execution, breakpoint debugging, source code level debugging and the like are realized.
In an optional embodiment, the simulation core platform is managed by a unified global clock module among the modules, the processor core simulation module is adopted to simulate different aviation onboard software, run an instruction set of a processor architecture, and interrupt functions of an ARM (advanced RISC machine) processor, a DSP C6k series, a DSP C28x series, a DSP C54x series, a DSP C55X series, a PowerPC processor and the like. ARM's Jazelle technology enables Java acceleration to achieve much higher performance than software-based Java Virtual Machines (JVMs), with 80% reduction in power consumption over comparable non-Java accelerated cores. The addition of a DSP instruction set to the CPU functionality provides enhanced 16-bit and 32-bit arithmetic operation capabilities, improving performance and flexibility. ARM also provides two leading edge features to assist in debugging of highly integrated SoC devices with deeply embedded processors, which are the embedded ICE-RT logic and embedded trace macro core (ETMS) family. The PowerPC processor has 32 (32-bit or 64-bit) GPRs (general purpose registers) and various other registers such as a PC (program counter, also known as IAR/instruction address register or NIP/Next instruction pointer), LR (link register), CR (condition register), etc. Some PowerPC CPUs also have 32 64-bit FPRs (floating point registers). The PowerPC CPU used by MPC555 is with FPR. The PowerPC instruction includes two parts, an opcode and an operand, and the PowerPC supports a three operand instruction format. Such as arithmetic instructions: add rD, rA, rB.
And the processor core simulation module carries out closed-loop interruption and exception management through the memory bus simulation module and the peripheral simulation module.
The processor core emulation module further comprises: the device comprises a storage device, a network card, a serial port, a timer, an interrupt controller, a DMA (direct memory access), a Flash, an LCD (liquid crystal display), a 1553B bus, an ARINC429 bus, an FC bus, an RIO bus and the like.
The simulation tool component is used for assisting a user to develop and debug various functional modules, and by analyzing the program execution process and expanding peripheral functions of a simulation test system, the functions of operation control, fault injection, target code coverage rate statistics, memory check, CPU register check, remote GDB debugging, instruction single-step execution and breakpoint debugging, source code level debugging and the like are realized.
The man-machine interaction assembly comprises: the method comprises the steps of starting a GUI (graphical user interface) or a command line interface module to simulate an engineering file and a target system based on a Graphical User Interface (GUI) of a computer programming language Python or a Java-based extensible development platform Eclipse IDE (integrated development environment), wherein the engineering file mainly comprises a hardware target system configuration script under an engineering directory, an engineering starting script, a target binary program loaded in a file bin format supporting extremely-low frequency elf, an object file format coff and binary format data storage, and three files.
The graphical hardware environment modeling uses gp files to perform virtual target system modeling in a drawing connection-like mode, and configuration script files are automatically generated. The man-machine interaction component provides a friendly and attractive graphical interface, and completes operations such as project management, virtual target system construction and the like through visual operation, so that the use threshold of the all-digital simulation system is greatly reduced.
See fig. 2. The simulation core platform adopts a target machine platform to complete dynamic binary translation, and the target machine platform comprises: the method comprises the following steps: the system comprises a starting module, a translation system control module, a running environment simulation module, an interpreter, a dynamic translator and a local code execution module, wherein the starting module is connected to a loading program on a target machine platform, the running environment simulation module is communicated with the translation system control module, and after the starting module loads a program, a source machine code is executed under a platform, the whole translation system is started, and the source machine code is loaded to a memory.
The starting module starts the interpreter to interpret and execute the source machine code, the code execution path information is counted according to the needs, the execution of a certain source machine code reaches a certain degree, and the translation system control module controls the translation execution process of the whole translation system.
The translation system control module starts the dynamic translator to decode, translate, encode and optimize the source machine code input by the translator to generate a target machine code segment, and then the target machine code segment is executed without interpretation and execution but directly executed by the local code execution module.
The running environment simulation module runs an embedded operating system or a target binary program, target assembly codes output by a target machine platform are input into the translation system control module, the translation system control module directly executes translation into X86 assembly codes based on a dynamic binary translation technology and sends the X86 assembly codes into the dynamic translator, machine code segments output by optimized codes are sent into the local execution module by utilizing the dynamic binary translation technology according to decoding, translation and optimized codes of source machine code segments, the local execution module switches between execution of the translation system control module and generation of target machine code execution and sends the machine code segments into the running environment simulation module through the translation system control module, and the running environment simulation module calls the source machine code and processes signals to simulate a real target system and a peripheral environment.
See fig. 3. The collaborative simulation component distributes real-time data of a plurality of nodes of the communication protocol middleware in a DDS distributed mode, and connects Matlab or other simulation models through the model adaptation layer to realize data communication between the external model and the simulation platform. The collaborative simulation component includes: the system comprises a model adaptation module, a time synchronization module, a data synchronization module, a node management module and a synchronous engineering management module. The key to co-simulation is how to make simulation system modules distributed in different physical machines able to follow the same time beat for time synchronization and data interaction.
The time synchronization mechanism workflow of the collaborative simulation component is as follows: the server finishes initializing network resources and starts network services, and enters a state of a circular main task; after a client (one or more sub-nodes) initializes network resources, a command of 'connecting a new client' is sent to a server, the client registers a node model after receiving 'acquiring an IP address of the client', a communication link is established between the client and the server, the current time is set to be 0, the step length is set to be 0.001f, and the synchronization precision depends on the time step length; the client enters a task of waiting for a synchronous clock, and sends a synchronous signal of time synchronous data to the server at a certain moment, wherein the synchronous signal comprises the current simulation time of the client, and meanwhile, the client is in a blocking state before receiving the synchronous signal returned by the server, the server starts a circulating main task to wait for the synchronous signals of all the sub-nodes so as to ensure the synchronization of the whole simulation system, and if the signals that all the sub-nodes are in the same simulation time are received, the server immediately sends the synchronous signal of the time synchronous data to all the sub-nodes; the client-side immediately jumps out of the blocking state after receiving the synchronous signal of the server, advances the clock timing to the next synchronous period and processes the task to be completed in the next period; thereafter, the previous steps are cycled through, thereby ensuring that the timing of each child node always remains consistent.
The foregoing shows and describes the general principles and broad features of the present invention and advantages thereof. It will be understood by those skilled in the art that the present invention is not limited to the embodiments described above, which are described in the specification and illustrated only to illustrate the principle of the present invention, but that various changes and modifications may be made therein without departing from the spirit and scope of the present invention, which fall within the scope of the invention as claimed. The scope of the invention is defined by the appended claims and equivalents thereof.
Claims (10)
1. An all-digital simulation test system of airborne software, comprising: the simulation system comprises a simulation core platform based on a dynamic binary translation technology, a simulation tool component communicated with the simulation core platform, a collaborative simulation component based on a collaborative simulation time synchronization mechanism and a human-computer interaction component, and is characterized in that: the man-machine interaction assembly completes engineering management and virtual target system construction through visual operation, and provides a computer operation user interface GUI, a command line interface, an automatic test and a graphical hardware environment modeling instruction which are displayed in a graphical mode to the simulation core platform through an API (application programming interface) interface layer; the simulation core platform simulates a real target system and a peripheral environment, runs an embedded operating system or a target binary program, completes peripheral simulation configuration through accelerated binary translation, processor simulation and memory bus simulation, and manages interruption and exception, and ensures the time sequence consistency of an accelerated binary translation module, a processor simulation module, a memory bus module, a peripheral simulation module and an interruption and exception management module based on global clock management and periodic time queue management; the collaborative simulation component adopts DDS (direct digital synthesizer) simulation management of a distributed direct digital synthesizer, a communication protocol middleware is distributed in real time, time synchronization, data synchronization, node management and synchronous engineering management are realized, a model adaptation layer of a distributed embedded system is built, and interconnection with a plurality of nodes of simulation model layer software/models of a simulation core platform is realized; the simulation tool assembly assists a user to analyze and load an executable file and debug and analyze the operation of a simulation test system, fault is injected into a simulation core platform, a reusable library is utilized, a virtual environment is rapidly built according to the connection mode of a target system, target code coverage rate statistics is completed, debugging information is added into the target file to generate an executable file, the length of a memory and the operation data of a CPU register and a current program are checked, a plurality of programming languages are debugged by a remote GDB, the value of a variable is output according to the type of the variable, the value of a dynamic array is displayed, and the functions of instruction single step execution, breakpoint debugging and source code level debugging are realized.
2. The all-digital simulation test system of airborne software of claim 1, wherein: the simulation core platform is managed through a unified global clock module among the modules, the processor core simulation module is adopted to simulate different aviation airborne software, an instruction set of a processor architecture is operated, and functions of an ARM processor, a DSP C6k series, a DSP C28x series, a DSP C54x series, a DSP C55X series and a PowerPC processor are interrupted.
3. The all-digital simulation test system of airborne software of claim 2, wherein: the processor core simulation module carries out closed-loop interruption and exception management through the memory bus simulation module and the peripheral simulation module.
4. The all-digital simulation test system of airborne software of claim 1, wherein: the simulation tool component is used for assisting a user to develop and debug various functional modules, and by analyzing the program execution process and expanding peripheral functions of a simulation test system, the functions of operation control, fault injection, target code coverage rate statistics, memory check, CPU register check, remote GDB debugging, instruction single-step execution and breakpoint debugging and source code level debugging are realized.
5. The all-digital simulation test system of airborne software of claim 1, wherein: the man-machine interaction assembly comprises: the method comprises the steps of starting a GUI (graphical user interface) or a command line interface module to simulate an engineering file and a target system based on a Graphical User Interface (GUI) of a computer programming language Python or a Java-based extensible development platform Eclipse IDE (integrated development environment), wherein the engineering file mainly comprises a hardware target system configuration script under an engineering directory, an engineering starting script, a target binary program loaded in a file bin format supporting extremely-low frequency elf, an object file format coff and binary format data storage, and three files.
6. The all-digital simulation test system of airborne software of claim 1, wherein: the simulation core platform adopts a target machine platform to complete dynamic binary translation, and the target machine platform comprises: the system comprises a starting module, a translation system control module, a running environment simulation module, an interpreter, a dynamic translator and a local code execution module, wherein the starting module is connected to a loading program on a target machine platform, the running environment simulation module is communicated with the translation system control module, and after the starting module loads a program, a source machine code is executed under a platform, the whole translation system is started, and the source machine code is loaded to a memory.
7. The all-digital simulation test system of airborne software of claim 1, wherein: the starting module starts the interpreter to interpret and execute the source machine code, the code execution path information is counted according to the needs, the execution of a certain source machine code reaches a certain degree, and the translation system control module controls the translation execution process of the whole translation system.
8. The all-digital simulation test system of airborne software of claim 1, wherein: the translation system control module starts the dynamic translator to decode, translate, encode and optimize the source machine code input by the translator to generate a target machine code segment, and then the target machine code segment is executed without interpretation and execution but directly executed by the local code execution module.
9. The all-digital simulation test system of airborne software of claim 1, wherein: the running environment simulation module runs an embedded operating system or a target binary program, target assembly codes output by a target machine platform are input into the translation system control module, the translation system control module directly executes translation into X86 assembly codes based on a dynamic binary translation technology and sends the X86 assembly codes into the dynamic translator, machine code segments output by optimized codes are sent into the local execution module by utilizing the dynamic binary translation technology according to decoding, translation and optimized codes of source machine code segments, the local execution module switches between execution of the translation system control module and generation of target machine code execution and sends the machine code segments into the running environment simulation module through the translation system control module, and the running environment simulation module calls the source machine code and processes signals to simulate a real target system and a peripheral environment.
10. The all-digital simulation test system of airborne software of claim 1, wherein: the collaborative simulation component includes: the system comprises a model adaptation module, a time synchronization module, a data synchronization module, a node management module and a synchronous engineering management module, wherein the model adaptation module carries out time synchronization and data interaction according to the same time beat, and the time synchronization module completes initialization of network resources and starts network services according to a server side time synchronization mechanism and enters a state of a circulating main task; after one or more child nodes of a client initialize network resources, a 'new client connection' instruction is sent to a server, the client registers a node model after receiving 'client IP address acquisition', a communication link is established between the client and the server, and meanwhile, the current time is set to be 0 and the step length is set to be 0.001 f; the client enters a task of waiting for a synchronous clock, and sends a synchronous signal of time synchronous data to the server at a certain moment, wherein the synchronous signal comprises the current simulation time of the client, and meanwhile, the client is in a blocking state before receiving the synchronous signal returned by the server, the server starts a circulating main task to wait for the synchronous signals of all the sub-nodes so as to ensure the synchronization of the whole simulation system, and if the signals that all the sub-nodes are in the same simulation time are received, the server immediately sends the synchronous signal of the time synchronous data to all the sub-nodes; and after receiving the synchronous signal of the server, the client immediately jumps out of the blocking state, advances the clock timing to the next synchronous period and processes the task to be completed in the next period.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111159173.4A CN113961453B (en) | 2021-09-30 | 2021-09-30 | Full-digital simulation test system for airborne software |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111159173.4A CN113961453B (en) | 2021-09-30 | 2021-09-30 | Full-digital simulation test system for airborne software |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN113961453A true CN113961453A (en) | 2022-01-21 |
| CN113961453B CN113961453B (en) | 2023-02-28 |
Family
ID=79462799
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202111159173.4A Active CN113961453B (en) | 2021-09-30 | 2021-09-30 | Full-digital simulation test system for airborne software |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113961453B (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114500687A (en) * | 2022-01-26 | 2022-05-13 | 北京环境特性研究所 | Design method and device of anti-unmanned aerial vehicle system, computing equipment and storage medium |
| CN114625108A (en) * | 2022-03-21 | 2022-06-14 | 北京经纬恒润科技股份有限公司 | Simulation test method and device |
| CN114925516A (en) * | 2022-05-16 | 2022-08-19 | 北京世冠金洋科技发展有限公司 | Method and device for automatic modeling and simulation |
| CN115599001A (en) * | 2022-12-15 | 2023-01-13 | 中国航空工业集团公司西安飞机设计研究所（Cn） | Simulation verification environment for airborne PHM system |
| CN116627053A (en) * | 2023-05-29 | 2023-08-22 | 武汉船舶通信研究所(中国船舶集团有限公司第七二二研究所) | Semi-physical simulation system of unmanned platform cluster communication network |
| CN117290058A (en) * | 2023-11-24 | 2023-12-26 | 成都赢瑞科技有限公司 | Method for executing breakpoint debugging data injection and data monitoring during model simulation |
| CN117692344A (en) * | 2024-02-02 | 2024-03-12 | 成都大征创智科技有限公司 | Network equipment simulation method based on FPGA code compiling |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112597006A (en) * | 2020-12-14 | 2021-04-02 | 中国航发控制系统研究所 | Embedded software integration test automatic execution system and method |
| CN113221318A (en) * | 2021-03-30 | 2021-08-06 | 北京计算机技术及应用研究所 | DDS-based system-level simulation test environment construction method |
-
2021
- 2021-09-30 CN CN202111159173.4A patent/CN113961453B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112597006A (en) * | 2020-12-14 | 2021-04-02 | 中国航发控制系统研究所 | Embedded software integration test automatic execution system and method |
| CN113221318A (en) * | 2021-03-30 | 2021-08-06 | 北京计算机技术及应用研究所 | DDS-based system-level simulation test environment construction method |
Non-Patent Citations (1)
| Title |
|---|
| 张涛等: "基于SPARC V8的星载嵌入式软件全数字仿真平台设计与实现", 《计算机测量与控制》 * |
Cited By (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114500687B (en) * | 2022-01-26 | 2023-12-12 | 北京环境特性研究所 | Design method and device of anti-unmanned aerial vehicle system, computing equipment and storage medium |
| CN114500687A (en) * | 2022-01-26 | 2022-05-13 | 北京环境特性研究所 | Design method and device of anti-unmanned aerial vehicle system, computing equipment and storage medium |
| CN114625108B (en) * | 2022-03-21 | 2024-01-30 | 北京经纬恒润科技股份有限公司 | Simulation test method and device |
| CN114625108A (en) * | 2022-03-21 | 2022-06-14 | 北京经纬恒润科技股份有限公司 | Simulation test method and device |
| CN114925516A (en) * | 2022-05-16 | 2022-08-19 | 北京世冠金洋科技发展有限公司 | Method and device for automatic modeling and simulation |
| CN114925516B (en) * | 2022-05-16 | 2024-01-26 | 北京世冠金洋科技发展有限公司 | Automatic modeling and simulating method and device |
| CN115599001A (en) * | 2022-12-15 | 2023-01-13 | 中国航空工业集团公司西安飞机设计研究所（Cn） | Simulation verification environment for airborne PHM system |
| CN115599001B (en) * | 2022-12-15 | 2023-04-07 | 中国航空工业集团公司西安飞机设计研究所 | Simulation verification environment for airborne PHM system |
| CN116627053A (en) * | 2023-05-29 | 2023-08-22 | 武汉船舶通信研究所(中国船舶集团有限公司第七二二研究所) | Semi-physical simulation system of unmanned platform cluster communication network |
| CN116627053B (en) * | 2023-05-29 | 2024-05-03 | 武汉船舶通信研究所(中国船舶集团有限公司第七二二研究所) | Semi-physical simulation system of unmanned platform cluster communication network |
| CN117290058A (en) * | 2023-11-24 | 2023-12-26 | 成都赢瑞科技有限公司 | Method for executing breakpoint debugging data injection and data monitoring during model simulation |
| CN117290058B (en) * | 2023-11-24 | 2024-01-30 | 成都赢瑞科技有限公司 | Method for executing breakpoint debugging data injection and data monitoring during model simulation |
| CN117692344A (en) * | 2024-02-02 | 2024-03-12 | 成都大征创智科技有限公司 | Network equipment simulation method based on FPGA code compiling |
| CN117692344B (en) * | 2024-02-02 | 2024-04-16 | 成都大征创智科技有限公司 | Network equipment simulation method based on FPGA code compiling |
Also Published As
| Publication number | Publication date |
|---|---|
| CN113961453B (en) | 2023-02-28 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN113961453B (en) | Full-digital simulation test system for airborne software | |
| CN110865971B (en) | System and method for verifying SOC chip | |
| EP0567722B1 (en) | System for analyzing and debugging embedded software through dynamic and interactive use of code markers | |
| US8930912B2 (en) | Method and system for performing software verification | |
| CN104750603B (en) | A kind of multi-core DSP software simulator and its physical layer software test method | |
| JP4472615B2 (en) | Programmable device modeling method and apparatus | |
| US9483374B2 (en) | PSMI using at-speed scan capture | |
| US20090248390A1 (en) | Trace debugging in a hardware emulation environment | |
| CN110907882B (en) | Electric energy meter-oriented virtualization test method and system | |
| Cong et al. | Symbolic execution of virtual devices | |
| Kersey et al. | A universal parallel front-end for execution driven microarchitecture simulation | |
| CN114757135B (en) | Programmable logic device verification method and system based on demand drive verification | |
| Engblom et al. | Full-system simulation from embedded to high-performance systems | |
| EP1191443A2 (en) | Method and system for testing a processor | |
| CN116431103B (en) | Digital DevOps platform design method for embedded software | |
| CN116090376B (en) | Chip integrated verification component development method and device and computer equipment | |
| CN209765501U (en) | JTAG-based multiprocessor simulation debugging device | |
| Seo et al. | Automating embedded software testing on an emulated target board | |
| Zheng et al. | Protocol-guided analysis of post-silicon traces under limited observability | |
| CN117422026B (en) | RISC-V architecture-based processor verification system | |
| WO2024086965A1 (en) | Testing device driver by combining the device driver, firmware emulation layer, embedded simulator, and model of hardware subsystem within single native host application | |
| Mohamed | HW/SW Co-Verification and Co-Debugging | |
| Charlton et al. | The generation of simulator-based systems for microcode development | |
| Lotoczky et al. | New methods of debugging and testing improve the software quality of AUTOSAR ECUs | |
| JPH07121405A (en) | Simulation system |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |