CN113948586A - PERC battery and manufacturing method thereof - Google Patents

PERC battery and manufacturing method thereof Download PDF

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Publication number
CN113948586A
CN113948586A CN202111186893.XA CN202111186893A CN113948586A CN 113948586 A CN113948586 A CN 113948586A CN 202111186893 A CN202111186893 A CN 202111186893A CN 113948586 A CN113948586 A CN 113948586A
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silicon nitride
nitride layer
depositing
layer
silicon
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姜泽光
张欣
林纲正
陈刚
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Zhejiang Aiko Solar Energy Technology Co Ltd
Guangdong Aiko Technology Co Ltd
Tianjin Aiko Solar Energy Technology Co Ltd
Zhuhai Fushan Aixu Solar Energy Technology Co Ltd
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Zhejiang Aiko Solar Energy Technology Co Ltd
Guangdong Aiko Technology Co Ltd
Tianjin Aiko Solar Energy Technology Co Ltd
Zhuhai Fushan Aixu Solar Energy Technology Co Ltd
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Priority to CN202111186893.XA priority Critical patent/CN113948586A/en
Publication of CN113948586A publication Critical patent/CN113948586A/en
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    • H01L21/02107—Forming insulating materials on a substrate
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    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
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Abstract

The application is suitable for the technical field of solar cells, and provides a PERC cell and a manufacturing method of the PERC cell. The PERC cell includes a cell substrate, a silicon oxide layer, a first silicon nitride layer, a second silicon nitride layer, and a third silicon nitride layer, which are sequentially stacked. Therefore, the silicon oxide layer and the three silicon nitride layers are arranged on the cell substrate, so that an aluminum oxide layer is not required to be manufactured by TMA (mechanical Transmission model), the cost can be reduced, and the safety and the stability of the process can be improved while the PERC cell is passivated.

Description

PERC battery and manufacturing method thereof
Technical Field
The application belongs to the technical field of solar cells, and particularly relates to a PERC cell and a manufacturing method of the PERC cell.
Background
In the PERC battery in the related art, a dielectric film is introduced to the back of a silicon wafer, so that the density of surface defect states is reduced, the minority carrier lifetime of the battery piece is prolonged, and the purpose of improving the photoelectric conversion efficiency of the battery piece is achieved. Currently, such dielectric films are typically aluminum oxide layers, requiring the use of Trimethylaluminum (TMA) as the reactive source. TMA is flammable and explosive, has certain potential safety hazard and is high in cost. Based on this, how to passivate the PERC cell to reduce the cost and improve the safety of the process becomes an urgent problem to be solved.
Disclosure of Invention
The application provides a PERC battery and a manufacturing method of the PERC battery, and aims to solve the problems of passivating the PERC battery to reduce the cost and improve the safety of the process.
In a first aspect, the present application provides a PERC cell, comprising, stacked in sequence: a battery substrate, a silicon oxide layer, a first silicon nitride layer, a second silicon nitride layer, and a third silicon nitride layer.
Optionally, the silicon oxide layer has a thickness in a range of 20nm to 60 nm.
Optionally, the refractive index of the silicon oxide layer ranges from 1.4 to 1.7.
Optionally, the thickness of the first silicon nitride layer ranges from 15nm to 25 nm; and/or the thickness of the second silicon nitride layer ranges from 10nm to 20 nm; and/or the thickness of the third silicon nitride layer ranges from 23nm to 45 nm.
Optionally, the first silicon nitride layer has a refractive index in the range of 2.16-2.22; and/or the refractive index of the second silicon nitride layer ranges from 2.03 to 2.08; and/or the refractive index of the third silicon nitride layer ranges from 2.01 to 2.05.
In a second aspect, the present application provides a method for manufacturing a PERC battery, including:
depositing a silicon oxide layer on the cell substrate;
depositing a first silicon nitride layer on the silicon oxide layer;
depositing a second silicon nitride layer on the first silicon nitride layer;
depositing a third silicon nitride layer on the second silicon nitride layer.
Optionally, depositing a silicon oxide layer on the cell substrate, comprising:
depositing the silicon oxide layer on the cell substrate by using silane and laughing gas by adopting a PECVD method;
depositing a first silicon nitride layer on the silicon oxide layer, comprising:
depositing the first silicon nitride layer on the silicon oxide layer by using ammonia gas and silane by adopting a PECVD method;
depositing a second silicon nitride layer on the first silicon nitride layer, comprising:
depositing the second silicon nitride layer on the first silicon nitride layer by using ammonia gas and silane by adopting a PECVD method;
depositing a third silicon nitride layer on the second silicon nitride layer, comprising:
and depositing the third silicon nitride layer on the second silicon nitride layer by using ammonia gas and silane by adopting a PECVD method.
Optionally, in the step of depositing the silicon oxide layer on the cell substrate by using the PECVD method using silane and laughing gas, the initial coating temperature ranges from 355 ℃ to 365 ℃.
Optionally, in the step of depositing the first silicon nitride layer on the silicon oxide layer using the PECVD method using ammonia and silane, in the step of depositing the second silicon nitride layer on the first silicon nitride layer using the PECVD method using ammonia and silane, and in the step of depositing the third silicon nitride layer on the second silicon nitride layer using the PECVD method using ammonia and silane, an initial plating temperature ranges from 400 ℃ to 440 ℃.
In a third aspect, the PERC cell provided herein is made by any one of the above methods.
In the PERC cell and the method for manufacturing the PERC cell of the embodiments of the present application, since the silicon oxide layer and the three silicon nitride layers are provided on the cell substrate, it is not necessary to use TMA to manufacture the aluminum oxide layer, and thus the PERC cell can be passivated, and at the same time, the cost can be reduced and the safety and stability of the process can be improved.
Drawings
Fig. 1 is a schematic structural diagram of a PERC cell according to an embodiment of the present application;
fig. 2 is a schematic flow chart illustrating a method for manufacturing a PERC battery according to an embodiment of the present application;
fig. 3 is a schematic flow chart illustrating a method for manufacturing a PERC battery according to an embodiment of the present application.
Description of the main element symbols:
PERC cell 10, cell substrate 11, silicon oxide layer 12, first silicon nitride layer 13, second silicon nitride layer 14, third silicon nitride layer 15.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
Referring to fig. 1, a PERC cell 10 according to an embodiment of the present disclosure includes: a battery substrate 11, a silicon oxide layer 12(SiOx), a first silicon nitride layer 13(SiNx), a second silicon nitride layer 14(SiNx), and a third silicon nitride layer 15 (SiNx).
In the PERC cell 10 of the embodiment of the present application, since the silicon oxide layer 12 and the three silicon nitride layers are disposed on the cell substrate 11, it is not necessary to use TMA to fabricate an aluminum oxide layer, and the PERC cell 10 can be passivated while reducing the cost and improving the safety and stability of the process.
Alternatively, the cell substrate 11 may include a silicon substrate, and the silicon oxide layer 12, the first silicon nitride layer 13, the second silicon nitride layer 14, and the third silicon nitride layer 15 are sequentially stacked on one side of the silicon substrate. The cell substrate 11 may further include a front film layer and a front electrode disposed on the other side of the silicon substrate. The front film layer can comprise a diffusion layer and an antireflection layer.
Alternatively, the thickness of the silicon oxide layer 12 is in the range of 20nm to 60 nm. Examples thereof include 20nm, 22nm, 25nm, 28nm, 30nm, 35nm, 40nm, 48nm, 50nm, 57nm and 60 nm. Therefore, the thickness of the silicon oxide layer 12 is in a proper range, so that the passivation effect of the silicon oxide layer 12 is good, the recombination of current carriers on the surface can be effectively prevented, the conversion efficiency of the PERC battery 10 is improved, the PID resistance of the PERC battery 10 is improved, and the service life is prolonged.
Preferably, the thickness of the silicon oxide layer 12 ranges from 30nm to 50 nm. For example, 30nm, 32nm, 35nm, 38nm, 40nm, 48nm, 50 nm. In this way, the passivation effect of the silicon oxide layer 12 can be further improved.
Alternatively, the refractive index of the silicon oxide layer 12 ranges from 1.4 to 1.7. For example 1.4, 1.41, 1.45, 1.48, 1.5, 1.55, 1.6, 1.69, 1.7. In this manner, the silicon oxide layer 12 is made to normally perform the functions of passivation and PID resistance.
Optionally, the thickness of the first silicon nitride layer 13 is greater than the thickness of said second silicon nitride layer 14, and the thickness of the third silicon nitride layer 15 is greater than the thickness of the second silicon nitride layer 14. Thus, a thickness gradient can be formed, resulting in a matting effect.
Alternatively, the refractive indices of the first silicon nitride layer 13, the second silicon nitride layer 14, and the third silicon nitride layer 15 are decreased progressively. In this way, a refractive index gradient can be formed, producing a matting effect.
Optionally, the thickness of the first silicon nitride layer 13 is in the range of 15nm-25 nm. For example, 15nm, 16nm, 18nm, 20nm, 22nm, and 25 nm. In this manner, the thickness of the first silicon nitride layer 13 is made to be in a suitable range, so that the silicon oxide layer 12 can be protected, and recombination centers can be reduced.
Preferably, the thickness of the first silicon nitride layer 13 is in the range of 19nm to 21 nm. For example, 19nm, 20nm and 21 nm. In this way, recombination centers can be further reduced.
Optionally, the refractive index of the first silicon nitride layer 13 ranges from 2.16 to 2.22. For example 2.16, 2.17, 2.18, 2.19, 2.20, 2.21, 2.22. Thus, the refractive index of the first silicon nitride layer 13 is in a higher range, so that a denser protective layer can be provided for the silicon oxide layer 12, the silicon oxide layer 12 is protected from erosion, and a certain H passivation effect is provided.
Preferably, the refractive index of the first silicon nitride layer 13 ranges from 2.18 to 2.20. For example 2.18, 2.185, 2.188, 2.19, 2.193, 2.197, 2.20. In this way, the protective and passivating effect of the first silicon nitride layer 13 is better.
Alternatively, the second silicon nitride layer 14 has a thickness in the range of 10nm to 20 nm. For example, 10nm, 11nm, 13nm, 15nm, 18nm, and 20 nm. Thus, the second silicon nitride layer 14 is thin, which provides a light extinction effect.
Preferably, the thickness of the second silicon nitride layer 14 ranges from 13nm to 17 nm. For example, 13nm, 14nm, 15nm, 16nm, 17 nm. In this way, the matting effect of the second silicon nitride layer 14 is made better.
Alternatively, the refractive index of the second silicon nitride layer 14 ranges from 2.03 to 2.08. For example, 2.03, 2.04, 2.05, 2.06, 2.07, 2.08. In this way, the refractive index of the second silicon nitride layer 14 is lower than that of the first silicon nitride layer 13, and gradient refractive index change is formed, so that gradient extinction is possible, and photoelectric conversion efficiency is improved.
Preferably, the refractive index of the second silicon nitride layer 14 ranges from 2.04 to 2.06. For example, 2.04, 2.043, 2.048, 2.05, 2.055, 2.06. Thus, the matting effect can be further improved.
Optionally, the thickness of the third silicon nitride layer 15 ranges from 23nm to 45 nm. Examples thereof include 23nm, 24nm, 28nm, 30nm, 32nm, 35nm, 38nm, 40nm, 42nm and 45 nm. Thus, the thickness of the third silicon nitride layer 15 is thick, the overall silicon content of the back film layer can be reduced, the reaction between the back aluminum paste and the back film layer is reduced when the PERC battery 10 is subjected to the sintering process, the damage of the aluminum paste to the back passivation film is weakened, and the passivation effect is improved.
Preferably, the thickness of the third silicon nitride layer 15 ranges from 30nm to 38 nm. For example, 30nm, 31nm, 32nm, 33nm, 34nm, 35nm, 36nm, 37nm, 38 nm. Thus, the passivation effect can be further improved.
Optionally, the refractive index of the third silicon nitride layer 15 ranges from 2.01 to 2.05. For example, 2.01, 2.02, 2.03, 2.04, 2.05. Thus, the refractive index of the third silicon nitride layer 15 is low, and a gradient refractive index is formed with the second silicon nitride layer 14, thereby forming a gradient extinction effect, and improving the photoelectric conversion efficiency of the PERC cell 10.
Preferably, the refractive index of the third silicon nitride layer 15 ranges from 2.02 to 2.03. For example, 2.02, 2.021, 2.025, 2.028, 2.03. Thus, the matting effect is further improved.
Referring to fig. 2, a method for manufacturing a PERC battery 10 according to an embodiment of the present application includes:
step S11: depositing a silicon oxide layer 12 on the cell substrate 11;
step S12: depositing a first silicon nitride layer 13 on the silicon oxide layer 12;
step S13: depositing a second silicon nitride layer 14 on the first silicon nitride layer 13;
step S14: a third silicon nitride layer 15 is deposited on the second silicon nitride layer 14.
In the method for manufacturing the PERC cell 10 according to the embodiment of the present application, since the silicon oxide layer 12 and the three silicon nitride layers are provided on the cell substrate 11, it is not necessary to use TMA to manufacture an aluminum oxide layer, and the cost can be reduced and the safety and stability of the process can be improved while passivating the PERC cell 10.
Alternatively, in step S11, the silicon substrate may be subjected to texturing, diffusion, SE laser, etching, thereby producing the cell substrate 11 on which the passivation film is to be deposited.
Alternatively, the battery substrate 11 may be subjected to a polishing process. Therefore, the surface of the battery substrate 11 is relatively flat, and a passivation film layer is convenient to prepare on a silicon substrate subsequently. Further, the battery substrate 11 may be acid-polished or alkali-polished.
Referring to fig. 3, optionally, step S11 includes:
step S111: utilization of Silane (SiH) by PECVD method4) And laughing gas (N)2O) depositing a silicon oxide layer 12 on the cell substrate 11;
step S12 includes:
step S121: ammonia (NH) gas is utilized by PECVD method3) And Silane (SiH)4) Depositing a first silicon nitride layer 13 on the silicon oxide layer 12;
step S13 includes:
step S131: ammonia (NH) gas is utilized by PECVD method3) And Silane (SiH)4) Depositing a second silicon nitride layer 14 on the first silicon nitride layer 13;
step S14 includes:
step S141: ammonia (NH) gas is utilized by PECVD method3) And Silane (SiH)4) A third silicon nitride layer 15 is deposited on the second silicon nitride layer 14.
Thus, the silicon oxide layer 12, the first silicon nitride layer 13, the second silicon nitride layer 14 and the third silicon nitride layer 15 are sequentially deposited by a Plasma Enhanced Chemical Vapor Deposition (PECVD) method, so that the Deposition speed is high, the uniformity of film formation is good, and the production efficiency and quality of the PERC cell 10 are improved.
It is understood that if the PECVD method is used and laughing gas and ammonia gas are used as reaction sources to deposit the silicon oxide layer without using silane, the silicon source (Si) in the silicon oxide layer comes from the silicon substrate. The silicon oxide layer thus deposited is greatly affected by the surface state of the silicon substrate, and neither uniformity nor thickness can be effectively controlled. If a thermal oxidation method is used to grow a silicon oxide layer on the surface of a silicon substrate, the silicon substrate needs to be placed in an oxygen or ozone environment to grow silicon oxide at 650 ℃, and the thickness of the silicon oxide layer is difficult to reach the target thickness due to the limitation of a silicon source.
In this embodiment, the target film thickness can be easily obtained by depositing the silicon oxide layer 12 by PECVD using laughing gas and silane as the reaction source. Meanwhile, the generation rate of the silicon oxide layer 12 is not limited by a silicon source, the process control difficulty is low, and the effect is good.
It can be understood that due to the characteristic of layer-by-layer growth of the aluminum oxide layer, the reaction rate of the atomic layer vapor deposition (ALD) method for manufacturing the aluminum oxide layer is relatively slow, and the aluminum oxide layer can obtain excellent passivation performance after annealing, which has a certain influence on productivity. The PECVD method has a fast deposition rate, but the uniformity of the deposited aluminum oxide layer is poor, which is likely to result in poor yield. Therefore, if the aluminum oxide layer is used as the passivation layer, the production efficiency and yield are poor.
In the embodiment, the silicon oxide layer 12 is used for passivation, so that the passivation effect consistent with that of the aluminum oxide layer is realized, the production cost of the PERC battery 10 can be reduced, the process safety and stability are improved, the productivity of the back surface coating process can be improved, and the yield of mass production is ensured.
Alternatively, in step S111, the initial plating temperature is in the range of 355 ℃ to 365 ℃. For example, 355 deg.C, 356 deg.C, 357 deg.C, 358 deg.C, 359 deg.C, 360 deg.C, 361 deg.C, 362 deg.C, 363 deg.C, 364 deg.C, 365 deg.C. Thus, the initial coating temperature of the silicon oxide layer 12 is strictly controlled, which is obviously different from the temperature required by the silicon oxide growing in the thermal oxygen or ozone environment in the related art, so that the silicon oxide is deposited at low temperature during the initial coating, a compact silicon oxide layer 12 can be formed, the H passivation capability of the silicon oxide layer 12 is increased, and a better chemical passivation effect is obtained.
Preferably, in step S111, the initial plating temperature is 360 ℃. Thus, the silicon oxide layer 12 has the strongest H passivation capability and the best chemical passivation effect.
Alternatively, in step S121, in step S131, in step S141, the initial plating temperature is in the range of 400 ℃ to 440 ℃. For example, 400 ℃, 402 ℃, 410 ℃, 415 ℃, 420 ℃, 423 ℃, 430 ℃, 437 ℃, 440 ℃. Thus, a dense silicon nitride layer can be formed, and the matting effect and the passivation effect of the silicon nitride layer are increased.
Preferably, in step S121, in step S131, in step S141, the initial plating temperature is 420 ℃. Thus, the extinction effect and passivation effect of the silicon nitride layer are best.
Optionally, in step S111, the deposition power is in a range of 8000W-15500W, the deposition pressure is in a range of 800mTorr-1300mTorr, the deposition duty cycle is in a range of 5:100-5:200, the deposition time is in a range of 220S-500S, the silane flow is in a range of 100sccm-600sccm, and the laughing gas flow is in a range of 4000sccm-8000 sccm.
Therefore, the ranges of all parameters during the preparation of the silicon oxide layer 12 are strictly controlled, and the target film thickness and refractive index are ensured, so that the uniformity of the silicon oxide layer 12 is better, and the passivation effect is favorably ensured.
Specifically, the deposition power is, for example, 8000W, 8500W, 9000W, 9800W, 10000W, 11500W, 12000W, 12700W, 13000W, 13800W, 14600W, 15000W, 15500W.
Specifically, the deposition pressure is, for example, 800mTorr, 810mTorr, 850mTorr, 900mTorr, 950mTorr, 1000mTorr, 1150mTorr, 1200mTorr, 1270mTorr, 1300 mTorr.
Specifically, the deposition duty ratios are, for example, 5:100, 5:110, 5:150, 5:180, 5: 200.
Specifically, the deposition time is, for example, 220s, 221s, 300s, 310s, 380s, 400s, 490s, 500 s.
Specifically, the silane flow rate is, for example, 100sccm, 110sccm, 180sccm, 200sccm, 250sccm, 300sccm, 480sccm, 500sccm, 570sccm, 600 sccm.
Specifically, the flow rate of laughing gas is 4000sccm, 4200sccm, 4800sccm, 5000sccm, 5500sccm, 6000sccm, 6700sccm, 7000sccm, 7500sccm, 8000sccm, for example.
Optionally, in step S121, the deposition power is in a range of 10000W-17500W, the deposition pressure is in a range of 1500mTorr-1850mTorr, the deposition duty ratio is in a range of 5:60-5:95, the deposition time is in a range of 180S-350S, the silane flow is in a range of 800sccm-1300sccm, and the ammonia gas flow is in a range of 3600sccm-5600 sccm.
Therefore, the range of each parameter when the first silicon nitride layer 13 is prepared is strictly controlled, and the film thickness and the refractive index reaching the target are ensured, so that the uniformity of the first silicon nitride layer 13 is better, and the extinction effect and the passivation effect are favorably ensured.
Specifically, the deposition power is, for example, 10000W, 10100W, 12000W, 12800W, 13000W, 13500W, 14000W, 15700W, 16000W, 17000W, 17200W, 17500W.
Specifically, the deposition pressure is, for example, 1500mTorr, 1520mTorr, 1580mTorr, 1600mTorr, 1630mTorr, 1650mTorr, 1700mTorr, 1730mTorr, 1800mTorr, 1850 mTorr.
Specifically, the deposition duty ratio is, for example, 5:60, 5:62, 5:65, 5:68, 5:70, 5:75, 5:80, 5:82, 5:90, 5: 95.
Specifically, the deposition time is, for example, 180s, 182s, 190s, 195s, 200s, 215s, 250s, 280s, 300s, 320s, 350 s.
Specifically, the silane flow rate is, for example, 800sccm, 820sccm, 880sccm, 900sccm, 950sccm, 1000sccm, 1100sccm, 1250sccm, 1300 sccm.
Specifically, the flow rate of the ammonia gas is, for example, 3600sccm, 3650sccm, 3700sccm, 3800sccm, 4000sccm, 4200sccm, 4600sccm, 5000sccm, 5300sccm, 5600 sccm.
Optionally, in step S131, the deposition power is in a range of 12000W-18500W, the deposition pressure is in a range of 1550mTorr-1850mTorr, the deposition duty cycle is in a range of 5:60-5:95, the deposition time is in a range of 80S-190S, the silane flow is in a range of 800sccm-1300sccm, and the ammonia gas flow is in a range of 6500sccm-8500 sccm.
Therefore, the range of each parameter during the preparation of the second silicon nitride layer 14 is strictly controlled, the film thickness and the refractive index reaching the target are ensured, the uniformity of the second silicon nitride layer 14 is better, and the extinction effect and the passivation effect are favorably ensured.
Specifically, the deposition power is, for example, 12000W, 12500W, 13000W, 13800W, 14000W, 14500W, 15000W, 16700W, 17000W, 17500W, 18000W, 18500W.
Specifically, the deposition pressure is, for example, 1550mTorr, 1600mTorr, 1620mTorr, 1650mTorr, 1700mTorr, 1750mTorr, 1780mTorr, 1800mTorr, 1850 mTorr.
Specifically, the deposition duty ratios are, for example, 5:60, 5:62, 5:65, 5:68, 5:70, 5:75, 5:80, 5:82, 5:90, 5: 95.
Specifically, the deposition time is, for example, 80s, 82s, 85s, 90s, 97s, 100s, 112s, 137s, 140s, 155s, 175s, 180s, 190 s.
Specifically, the silane flow rate is, for example, 800sccm, 820sccm, 880sccm, 900sccm, 950sccm, 1000sccm, 1150sccm, 1200sccm, 1280sccm, 1300 sccm.
Specifically, the flow rate of the ammonia gas is, for example, 6500sccm, 6800sccm, 7000sccm, 7200sccm, 7500sccm, 7700sccm, 8000sccm, 8300sccm, 8500 sccm.
Optionally, in step S141, the deposition power is in a range of 12000W-18500W, the deposition pressure is in a range of 1550mTorr-1850mTor, the deposition duty cycle is in a range of 5:60-5:95, the deposition time is in a range of 150S-300S, the silane flow is in a range of 500sccm-800sccm, and the ammonia gas flow is in a range of 7500sccm-9900 sccm.
Therefore, the range of each parameter when the third silicon nitride layer 15 is prepared is strictly controlled, and the film thickness and the refractive index reaching the target are ensured, so that the third silicon nitride layer 15 has good uniformity, and the extinction effect and the passivation effect are favorably ensured.
Specifically, the deposition power is, for example, 12000W, 12500W, 13000W, 13800W, 14000W, 14500W, 15000W, 16700W, 17000W, 17500W, 18000W, 18500W.
Specifically, the deposition pressure is, for example, 1550mTorr, 1600mTorr, 1620mTorr, 1650mTorr, 1700mTorr, 1750mTorr, 1780mTorr, 1800mTorr, 1850 mTorr.
Specifically, the deposition duty ratios are, for example, 5:60, 5:62, 5:65, 5:68, 5:70, 5:75, 5:80, 5:82, 5:90, 5: 95.
Specifically, the deposition time ranges from 150s, 155s, 160s, 175s, 185s, 200s, 230s, 280s, 295s, 300 s.
Specifically, the silane flow rate ranges from 500sccm, 520sccm, 550sccm, 600sccm, 630sccm, 650sccm, 700sccm, 750sccm, 790sccm, 800 sccm.
Specifically, the flow rate of the ammonia gas is in the range of 7500sccm, 7600sccm, 8000sccm, 8500sccm, 9000sccm, 9200sccm, 9500sccm, 9800sccm, 9900 sccm.
The PERC cell 10 of the embodiment of the present application is manufactured by any one of the above-described methods.
In the PERC cell 10 of the embodiment of the present application, since the silicon oxide layer 12 and the three silicon nitride layers are disposed on the cell substrate 11, it is not necessary to use TMA to fabricate an aluminum oxide layer, and the PERC cell 10 can be passivated while reducing the cost and improving the safety and stability of the process.
For the explanation and explanation of this part, reference is made to the foregoing description, and redundant description is omitted here.
The present invention is not intended to be limited to the particular embodiments shown and described, but is to be accorded the widest scope consistent with the principles and novel features herein disclosed.

Claims (10)

1. A PERC cell, comprising, stacked in sequence: a battery substrate, a silicon oxide layer, a first silicon nitride layer, a second silicon nitride layer, and a third silicon nitride layer.
2. The PERC cell of claim 1, wherein said silicon oxide layer has a thickness in the range of 20nm to 60 nm.
3. The PERC cell of claim 1, wherein said silicon oxide layer has a refractive index in the range of 1.4-1.7.
4. The PERC cell of claim 1, wherein said first silicon nitride layer has a thickness in the range of 15nm to 25 nm; and/or the thickness of the second silicon nitride layer ranges from 10nm to 20 nm; and/or the thickness of the third silicon nitride layer ranges from 23nm to 45 nm.
5. The PERC cell of claim 1, wherein said first silicon nitride layer has a refractive index in the range of 2.16-2.22; and/or the refractive index of the second silicon nitride layer ranges from 2.03 to 2.08; and/or the refractive index of the third silicon nitride layer ranges from 2.01 to 2.05.
6. A method of making a PERC cell, comprising:
depositing a silicon oxide layer on the cell substrate;
depositing a first silicon nitride layer on the silicon oxide layer;
depositing a second silicon nitride layer on the first silicon nitride layer;
depositing a third silicon nitride layer on the second silicon nitride layer.
7. The method of claim 6, wherein depositing a silicon oxide layer on a cell substrate comprises:
depositing the silicon oxide layer on the cell substrate by using silane and laughing gas by adopting a PECVD method;
depositing a first silicon nitride layer on the silicon oxide layer, comprising:
depositing the first silicon nitride layer on the silicon oxide layer by using ammonia gas and silane by adopting a PECVD method;
depositing a second silicon nitride layer on the first silicon nitride layer, comprising:
depositing the second silicon nitride layer on the first silicon nitride layer by using ammonia gas and silane by adopting a PECVD method;
depositing a third silicon nitride layer on the second silicon nitride layer, comprising:
and depositing the third silicon nitride layer on the second silicon nitride layer by using ammonia gas and silane by adopting a PECVD method.
8. The method of claim 7, wherein the step of depositing the silicon oxide layer on the cell substrate using PECVD using silane and laughing gas has an initial coating temperature in a range of 355 ℃ to 365 ℃.
9. The method of claim 7, wherein in the step of depositing the first silicon nitride layer on the silicon oxide layer using the ammonia gas and the silane according to the PECVD method, in the step of depositing the second silicon nitride layer on the first silicon nitride layer using the ammonia gas and the silane according to the PECVD method, and in the step of depositing the third silicon nitride layer on the second silicon nitride layer using the ammonia gas and the silane according to the PECVD method, an initial plating temperature is in a range of 400 ℃ to 440 ℃.
10. A PERC cell, produced by the method of any one of claims 6 to 9.
CN202111186893.XA 2021-10-12 2021-10-12 PERC battery and manufacturing method thereof Pending CN113948586A (en)

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