CN113934674A

CN113934674A - PCIE (peripheral component interface express) bus-based command transmission method and system on chip

Info

Publication number: CN113934674A
Application number: CN202111546480.8A
Authority: CN
Inventors: 朱青山; 李帆; 左博敏; 谭绪祥; 朱佳平
Original assignee: Phytium Technology Co Ltd
Current assignee: Phytium Technology Co Ltd
Priority date: 2021-12-17
Filing date: 2021-12-17
Publication date: 2022-01-14
Anticipated expiration: 2041-12-17
Also published as: CN113934674B

Abstract

The invention provides a command transmission method based on a PCIE bus and a system on a chip, and relates to the technical field of communication. The method comprises the following steps: the system comprises a processor and a root composite-endpoint RC-EP module which are connected based on a PCIE bus, wherein the processor is in communication connection with the RC-EP module and receives a command sent by the processor through the RC-EP module; and if the address carried in the command is in the range of the preset address space corresponding to the RC-EP module, sending the command to a corresponding target module or external equipment in the RC-EP module according to a preset rule, wherein the command received by the target module is a command which can be transmitted without a physical link. And the RC-EP module is arranged, and when the address carried in the command is in the preset address space range corresponding to the RC-EP module, the command is sent to the target module or the external equipment according to the preset rule.

Description

PCIE (peripheral component interface express) bus-based command transmission method and system on chip

Technical Field

The invention relates to the technical field of communication, in particular to a command transmission method based on a PCIE bus and a system on a chip.

Background

Pcie (peripheral component interconnect express) is widely used in computer systems as a high-speed serial bus standard. The PCIE bus has the main function of accessing external equipment into a system and is mainly characterized in that high-speed serial point-to-point double-channel high-bandwidth transmission is realized, and the connected equipment allocates independent channel bandwidth and does not share bus bandwidth.

In the related art, when data transmission is performed based on PCIE, a data packet first passes through a transaction layer, a data link layer, and a physical layer during data transmission, and is finally transmitted to an opposite end through a link. The receiving end is the opposite step, and the data passes through the physical layer, then is sent upwards to the data link layer, and finally reaches the transaction layer.

However, in the related art, data needs to be transmitted to the opposite end through a plurality of layers, and data is converted during the transmission, which causes a problem of excessive communication delay.

Disclosure of Invention

The present invention is directed to provide a command transmission method and a system on chip based on a PCIE bus, so as to solve the problem that in the related art, data needs to be transmitted to an opposite end through multiple layers, and during the period, data needs to be converted, communication delay is too large.

In order to achieve the above purpose, the embodiment of the present invention adopts the following technical solutions:

in a first aspect, an embodiment of the present invention provides a command transmission method based on a PCIE bus, which is applied to a system on chip, where the system on chip includes: the processor and the root complex-endpoint RC-EP module are connected based on a PCIE bus, the processor is in communication connection with the RC-EP module, and the method comprises the following steps:

receiving, by the RC-EP module, a command sent by the processor;

and if the address carried in the command is in the preset address space range corresponding to the RC-EP module, sending the command to a corresponding target module or external equipment in the RC-EP module according to a preset rule, wherein the command received by the target module is a command which can be transmitted without a physical link.

In the embodiment of the application, the command is sent to the target module or the external device according to the preset rule, and in this implementation, since the command does not need to be transmitted through a physical link and data does not need to be transmitted, the communication delay during data transmission can be reduced.

Optionally, the command includes: programmable input output PIO commands; before the sending the command to the corresponding target module or external device in the RC-EP module according to the preset rule, the method further includes:

mapping an address carried in the command into a space address according to the mapping relation between a main memory address and a PCIE space address, and determining the attribute of the command according to the appointed bit information in the address;

the sending the command to a corresponding target module or external equipment in the RC-EP module according to a preset rule comprises:

and sending the command to a corresponding target module or external equipment in the RC-EP module according to the attribute of the command and a corresponding preset rule.

In the embodiment of the application, the attribute of the command is determined according to the address in the command, and the command can be directly sent to the corresponding target module or the external device in the RC-EP module according to the attribute of the command and the corresponding preset rule, so that physical link transmission is not needed, and the communication delay is reduced.

Optionally, the target module includes a register, and a preset register, an RC configuration space, and an EP configuration space are disposed in the register; wherein the register is used for storing pre-configuration information; the RC configuration space is configured with RC equipment identifiers so as to be identified as RC equipment when a response system enumerates; the EP configuration space is configured with EP device identifications such that the responding system is identified as an EP device when enumerating.

In the embodiment of the application, the RC configuration space is configured with the RC device identifier, and the EP configuration space is configured with the EP device identifier, so that the RC configuration space can be identified as the RC device and the EP configuration space can be identified as the EP device during system enumeration, and the RC configuration space can be identified as entity devices during system enumeration without changing the whole device architecture, thereby reducing the implementation difficulty.

Optionally, the sending the command to a corresponding target module or external device in the RC-EP module according to the attribute of the command and a preset rule includes:

if the PIO command is a first-type PIO command, sending the command to any one of a preset register, an RC configuration space and an EP configuration space in the RC-EP module according to the attribute of the command and a preset rule; the first-class PIO command is a command which can be transmitted without a physical link.

In the embodiment of the application, the first-class PIO command can be transmitted according to the attribute of the command and the preset rule, the first-class PIO command does not need to be transmitted by a physical link, and the communication delay when the first-class PIO command is transmitted is reduced.

and if the PIO command is a second-class PIO command, sending the command to the EP configuration space or external equipment according to the attribute of the command and a preset rule.

In the embodiment of the application, the transmission of the second-class PIO command can be realized according to the attribute of the command and the preset rule, the physical link is not needed to transmit the second-class PIO command, and the communication delay when the second-class PIO command is transmitted is reduced.

Optionally, if the command corresponds to an external device, before sending the command to the external device, the method further includes:

and mapping the address carried by the command, and determining whether the address falls into the address space range of the target external equipment.

In the embodiment of the application, if the command corresponds to the external device, the address carried in the command is determined to fall into the address space range of the target external device, and the command is sent to the external device, that is, the command needing to be sent out can also be ensured, and the transmission of the command needing to be transmitted to the external device is not influenced.

Optionally, the command includes: direct Memory Access (DMA) addresses; the RC-EP module comprises: a DMA processing module;

the sending the command to a corresponding target module or external equipment in the RC-EP module according to the attribute of the command and a preset rule comprises the following steps:

and sending the command to external equipment through the DMA processing module according to the attribute and the preset rule of the command and the address carried by the command.

In the embodiment of the application, the DMA processing module in the RC _ EP module sends the command to the external device, and the command can be transmitted without passing through a PCIE physical link, so that the communication time of DMA communication is saved, and the DMA communication efficiency is improved.

Optionally, the method further includes:

receiving an interrupt report sent by an external device through the RC-EP module;

if the current support message signal MSI is interrupted, converting the interruption report into an MSI interruption report and transmitting the MSI interruption report to the processor; alternatively, the first and second electrodes may be,

and if the MSI interruption is not supported currently, transmitting the interruption report to the processor.

In the embodiment of the application, the RC-EP module is adopted to transmit the interrupt report, so that the efficiency of transmitting the interrupt report is improved.

In a second aspect, an embodiment of the present invention further provides a system on a chip, including: the system comprises a processor and a root composite-endpoint RC-EP module which are connected based on a PCIE bus system, wherein the processor is in communication connection with the RC-EP module;

the RC-EP module is used for receiving the command sent by the processor; and if the address carried in the command is in the preset address space range corresponding to the RC-EP module, sending the command to a corresponding target module or external equipment in the RC-EP module according to a preset rule, wherein the command received by the target module is a command which can be transmitted without a physical link.

Optionally, the RC-EP module includes: an address translation module;

the address conversion module is used for mapping an address carried in the command into a space address according to the mapping relation between a main memory address and a PCIE space address, and determining the attribute of the command according to the designated bit information in the address; and sending the command to a corresponding target module or external equipment in the RC-EP module according to the attribute of the command and a corresponding preset rule.

Optionally, the target module includes a register, and a preset register, an RC configuration space, and an EP configuration space are disposed in the register; the preset register is used for storing pre-configuration information; the RC configuration space is configured with RC equipment identifiers so as to be identified as RC equipment when a response system enumerates; the EP configuration space is configured with EP device identifications such that the responding system is identified as an EP device when enumerating.

Optionally, the RC-EP module is further configured to, if the PIO command is a first type of PIO command, send the command to any one of a preset register, an RC configuration space, and an EP configuration space in the RC-EP module according to the attribute of the command and a preset rule; the first-class PIO command is a command which can be transmitted without a physical link.

Optionally, the RC-EP module is further configured to, if the PIO command is a second type of PIO command, send the command to the EP configuration space or the external device according to the attribute of the command and a preset rule.

Optionally, the RC-EP module is further configured to map an address carried by the command, and determine whether the address falls within an address space range of a target external device.

and the DMA processing module is used for sending the command to external equipment according to the attribute and the preset rule of the command and the address carried by the command.

Optionally, the RC-EP module includes: an interrupt generation module;

the interrupt generating module is used for receiving an interrupt report sent by external equipment; if the current support message signal MSI is interrupted, converting the interruption report into an MSI interruption report and transmitting the MSI interruption report to a processor; or if the message signal MSI interruption is not supported currently, transmitting the interruption report to the processor.

The invention has the beneficial effects that: the embodiment of the application provides a command transmission method based on a PCIE bus, which is applied to a system on chip, and the system on chip comprises: the processor based on PCIE bus connection, root complex-terminal RC-EP module, the processor and RC-EP module communication connection, including: receiving a command sent by a processor through an RC-EP module; and if the address carried in the command is in the range of the preset address space corresponding to the RC-EP module, sending the command to a corresponding target module or external equipment in the RC-EP module according to a preset rule, wherein the command received by the target module is a command which can be transmitted without a physical link. By arranging the RC-EP module, when the address carried in the command sent by the processor is in the range of the preset address space corresponding to the RC-EP module, the command is a command which does not need to be transmitted by a physical link, the command is sent to a target module or external equipment according to a preset rule, and the command does not need to be transmitted by the physical link, so that the communication delay during data transmission is reduced.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained according to the drawings without inventive efforts.

Fig. 1 is a schematic diagram of a topology structure of PCIE according to an embodiment of the present invention;

fig. 2 is a schematic diagram of PCIE data transmission in the related art;

FIG. 3 is a schematic diagram of a PCIE implementation in the related art;

fig. 4 is a schematic flowchart of a command transmission method based on a PCIE bus according to an embodiment of the present application;

fig. 5 is a schematic flowchart of a command transmission method based on a PCIE bus according to an embodiment of the present application;

fig. 6 is a schematic structural diagram of an RC-EP module provided in an embodiment of the present application;

fig. 7 is a schematic structural diagram of an RC-EP module provided in an embodiment of the present application;

fig. 8 is a schematic flowchart of a command transmission method based on a PCIE bus according to an embodiment of the present application;

FIG. 9 is a schematic diagram of a system on a chip according to an embodiment of the present disclosure;

fig. 10 is a schematic structural diagram of a system on chip according to an embodiment of the present application.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some embodiments, but not all embodiments, of the present invention.

Thus, the following detailed description of the embodiments of the present application, presented in the accompanying drawings, is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

In the description of the present application, it should be noted that if the terms "upper", "lower", etc. are used for indicating the orientation or positional relationship based on the orientation or positional relationship shown in the drawings or the orientation or positional relationship which is usually arranged when the product of the application is used, the description is only for convenience of describing the application and simplifying the description, but the indication or suggestion that the referred device or element must have a specific orientation, be constructed in a specific orientation and operation, and thus, cannot be understood as the limitation of the application.

Furthermore, the terms "first," "second," and the like in the description and in the claims, as well as in the drawings, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

It should be noted that the features of the embodiments of the present application may be combined with each other without conflict.

A PCIE generally adopts a tree topology structure, and fig. 1 is a schematic view of a topology structure of a PCIE according to an embodiment of the present invention, as shown in fig. 1, a PCIE architecture generally includes PCIE devices of types such as an RC (Root Complex device), a Switch device (Switch), and an EP (Endpoint) device. The RC device is a root of the bus, and the RC device may connect the bus, a Memory (Memory), a processor (CPU), and the like to the bus; EP devices are a generic term for PCIE devices, and may be used to implement some specific functions, such as PCIE network cards; switch is a PCIE Switch and may be used to extend PCIE interfaces.

Fig. 2 is a schematic diagram of PCIE data transmission in the related art, and as shown in fig. 2, a PCIE bus is implemented hierarchically, and mainly includes three layers, which respectively include, from top to bottom: a Transaction Layer (Transaction Layer), a Data Link Layer (Data Link Layer) and a Physical Layer (Physical Layer), wherein the two devices are connected through a Physical Link (Link).

When data is sent, a data message firstly passes through a transaction layer, a data link layer and a physical layer of a sending end, and finally is sent to an opposite end through a link. The receiving end is the opposite step, and the data passes through the physical layer, then is sent upwards to the data link layer, and finally reaches the transaction layer.

Each PCIE device has its own configuration space, and is used for identifying and acquiring basic device information during an enumeration process of the PCIE device. For RC devices, a configuration space of TYPE1 is mainly implemented, whereas for EP devices, a configuration space of TYPE0 is mainly implemented.

Fig. 3 is a schematic diagram of a practical application of PCIE in the related art, and as shown in fig. 3, the RC devices are directly connected to the EP device in a point-to-point manner, where one RC device may be communicatively connected to the corresponding EP device, and the RC devices may be numbered in advance according to a sequence, which is not limited herein.

Optionally, the system software uses BFS (break First search, depth First algorithm) to traverse the tree structure of the PCIE bus. During enumeration, firstly scanning a device on a Bus (Bus) 0; as shown in fig. 3, first, RC0 is scanned, for example, by reading ID (Identity document, ID number) such as Vendor ID, etc., to determine whether there is a device currently existing, if so, then, by reading a designated register in the configuration space, the type of the device is determined, i.e., whether the device is an EP device or an RC device, and when the device is determined to be an RC device, the downstream BUS number of the RC0 device is set as BUS (BUS) 1; continuing to scan downwards, and then scanning to find out an EP0 device, because the EP device is a terminal device, the enumeration scanning of the branch is finished, and the branch returns to the upper-level bus (here, the bus 0) to continue scanning; this is repeated until all PCIE devices are found.

There are two data transmission modes in PCIE: DMA (Direct Memory Access) and PIO (programmable Input-Output). Wherein, in the DMA mode, the data transfer is not handled by the processor; in the PIO mode, data transfers are handled in units of bytes or more by the processor executing I/O port instructions.

In the related art, a processor may initiate PIO communication to an EP0 device. The PIO command that the processor can issue first reaches the RC0 device, and in the RC0 device, the destination of the command is determined, and if the destination is the EP0 device at the opposite end of the link, the command will pass through the transaction layer, the data link layer and the physical layer of the RC0 device, and finally connect to the EP0 device through the physical link. On an EP0 device, commands will go through the opposite data path as on an RC0 device, first going through the physical layer, then the data link layer and the transaction layer.

In addition, the EP0 device communicates DMA with the main memory. The data transmission is directly carried out between the main memory and the external device. In this data transfer, the data passes through the transaction layer, the data link layer and the physical layer of the RC0 and EP0 devices.

However, in the related art, for a device that does not need a physical link connection, data still needs to be transmitted to an opposite end through multiple layers, and during the process, data is converted, which may cause a problem of excessive communication delay.

Aiming at the technical problems in the related art, the embodiment of the application provides a command transmission method based on a PCIE bus, which is applied to a system on chip, wherein a root composite-endpoint RC-EP module is arranged in the system on chip, and a processor is in communication connection with the RC-EP module; when the address carried in the command sent by the processor is within the preset address space range corresponding to the RC-EP module, the command is a command which does not need physical link transmission, the command is sent to a target module or external equipment according to a preset rule, the command does not need to be transmitted through a physical link, and data does not need to be transmitted, so that the communication delay during data transmission is reduced.

The following explains a command transmission method based on a PCIE bus provided in an embodiment of the present application. In the system-on-chip architecture of the embodiment of the present application, although the RC _ EP module is added, the transmission mode in the above embodiment is not affected, and the architecture of the existing RC device and EP device can still be reserved, so as to reduce the technical implementation difficulty. Accordingly, when the address carried by the command sent by the processor is within the address range of other RC devices, the address is still sent to the corresponding RC device, and the processing and processing in the manner shown in fig. 2 are carried out, so as to reduce the technical implementation difficulty. Meanwhile, normal transmission of commands needing physical link transmission can be guaranteed.

Fig. 4 is a schematic flowchart of a command transmission method based on a PCIE bus according to an embodiment of the present application, and as shown in fig. 4, a system on chip is taken as an execution subject, and the method may include:

s401, receiving a command sent by a processor through an RC-EP module.

Wherein the RC-EP module is communicatively coupled to the processor, and the processor may send commands to the RC-EP module.

It should be noted that the RC-EP module may be a virtual module, and the RC-EP module may extend downward in a PCIE manner to complete downlink communication.

S402, if the address carried in the command is in the range of the preset address space corresponding to the RC-EP module, the command is sent to a corresponding target module or external equipment in the RC-EP module according to a preset rule, wherein the command received by the target module is a command which can be transmitted without a physical link.

The RC-EP module can be preset with a corresponding preset address space range.

In addition, the command may carry an address, and the address in the command may characterize a destination device of the command, which may be a target module or an external device.

In some embodiments, it may be determined whether an address carried in the command is within a preset address space range corresponding to the RC-EP module; if the command is a command which can be transmitted without a physical link, the command can be sent to a corresponding target module or external equipment in the RC-EP module according to a preset rule, and the command can be transmitted without the physical link.

To sum up, an embodiment of the present application provides a command transmission method based on a PCIE bus, where the method applied to a system on a chip includes: the processor based on PCIE bus connection, root complex-terminal RC-EP module, the processor and RC-EP module communication connection, including: receiving a command sent by a processor through an RC-EP module; and if the address carried in the command is in the range of the preset address space corresponding to the RC-EP module, sending the command to a corresponding target module or external equipment in the RC-EP module according to a preset rule, wherein the command received by the target module is a command which can be transmitted without a physical link. The method comprises the steps that an RC-EP module is arranged, when an address carried in a command sent by a processor is within a preset address space range corresponding to the RC-EP module, the command is a command which does not need to be transmitted through a physical link, and the command is sent to a target module or external equipment according to a preset rule.

It should be noted that, commands do not need to be transmitted through a physical link, and then the commands do not need to be processed by protocol conversion, so that the communication efficiency is greatly improved.

Optionally, the command may include: programmable input output PIO commands.

Fig. 5 is a flowchart illustrating a command transmission method based on a PCIE bus according to an embodiment of the present application, and as shown in fig. 5, before a process of sending a command to a corresponding target module or an external device in an RC-EP module according to a preset rule in the above S402, the method may further include:

s501, mapping an address carried in a command into a space address according to the mapping relation between the main memory address and the PCIE space address, and determining the attribute of the command according to the appointed bit information in the address.

The mapping relationship between the main memory address and the PCIE space address may be stored in advance.

In addition, the designated bit information may be character information of a preset number of bits in the address, for example, the preset number of bits may be 4-8 bits. For example, when the characters of the designated bits are different, different command attributes are indicated, for example, bits 4-8 of the address information are 00001 and 00010 indicate different command attributes. Optionally, the attribute of the command may be used to characterize the type of the command, and the command may be a first type of PIO command and/or a second type of PIO command, and may also be used to characterize a destination corresponding to an address in the command, that is, a target module or an external device to which the command is sent.

Fig. 6 is a schematic structural diagram of an RC-EP module provided in an embodiment of the present application, and as shown in fig. 6, in some embodiments, the RC-EP module may include: the address conversion module can store the mapping relation between the main memory address and the PCIE space address. Correspondingly, an address conversion module may be adopted to map the address carried in the command into a space address of the PCIE space according to the mapping relationship between the main memory address and the PCIE space address, and then determine the attribute of the command according to the character information of the preset number of bits in the address.

The process of sending the command to the corresponding target module or the external device in the RC-EP module according to the preset rule in S402 may include:

s502, sending the command to a corresponding target module or external equipment in the RC-EP module according to the attribute of the command and a corresponding preset rule.

In some embodiments, an address translation module may be used, and according to the attribute of the command and the corresponding preset rule, the command may be directly sent to the corresponding target module or external device in the RC-EP module without using a physical link for transmission.

It should be noted that the address translation module may be used to implement the address mapping and decoding functions.

In summary, the attribute of the command is determined according to the address in the command, and the command can be directly sent to the corresponding target module or the external device in the RC-EP module according to the attribute of the command and the corresponding preset rule, so that physical link transmission is not required, and communication delay is reduced.

Optionally, as shown in fig. 6, the target module may include a register, and a preset register, an RC configuration space, and an EP configuration space are disposed in the register.

The preset register is used for storing preconfigured information, such as customized configuration information according to specific requirements.

For example, the provisioning information may include: pre-configuration information for configuring the RC equipment identifier and the EP equipment identifier to be in a read-only state; the mapping rule configuration module is used for configuring mapping rules between the main memory and the PCIE space, and pre-configuration information of the mapping rules between the PCIE space and the external equipment space.

In addition, the RC configuration space is configured with RC equipment identifiers so as to be identified as RC equipment when the response system enumerates; the EP configuration space is configured with EP device identifications such that the responding system is identified as an EP device when enumerated.

In some embodiments, the RC configuration space is used to implement a configuration space of TYPE1, and when the processor performs device enumeration scanning, the RC configuration space may be accessed first along a bus number, the RC device may be scanned out based on an RC device identifier in the RC configuration space, and a bus and an address resource may be allocated to the RC configuration space.

In other embodiments, the EP configuration space is used to implement a TYPE-0 configuration space, and when the processor performs device enumeration scanning, and after the RC device scanning is completed, the processor will continue to scan down along the bus, scan out an EP device according to the EP device identifier configured in the EP configuration space, and allocate an address resource to the EP configuration space as an EP device.

It should be noted that, although the complete structure of PCIE is not implemented inside the RC-EP module, due to the existence of the RC configuration space and the EP configuration space, the system software may also consider that the RC-EP module includes an RC device and an EP device.

In summary, the RC configuration space is configured with the RC device identifier, and the EP configuration space is configured with the EP device identifier, when the system enumerates, the RC configuration space can be identified as the RC device, so that the EP configuration space can be identified as the EP device, thereby realizing that the RC configuration space and the RC configuration space can be identified as the entity device when the system enumerates, without changing the whole device architecture, and reducing the implementation difficulty.

Optionally, the process of sending the command to the corresponding target module or the external device in the RC-EP module according to the attribute of the command and the preset rule in S402 may include:

and if the PIO command is the first type of PIO command, sending the command to any one of a preset register, an RC configuration space and an EP configuration space in the RC-EP module according to the attribute of the command and a preset rule.

The first type of PIO command is a command which can be transmitted without a physical link. Illustratively, the first type of PIO command may be referred to as PIO command 1, which may be used to configure signals for registers.

In the embodiment of the application, the command may be sent to at least one of a preset register, an RC configuration space, and an EP configuration space in the RC-EP module.

In some embodiments, the commands may be divided according to addresses in the first type of PIO commands, for example, in this embodiment, the commands may be divided into three signals: configuration signals to a preset register, configuration signals of an RC configuration space and configuration signals of an EP configuration space are respectively sent.

In summary, according to the attribute of the command and the preset rule, the first-class PIO command can be transmitted without the need of a physical link to transmit the first-class PIO command, thereby reducing the communication delay when the first-class PIO command is transmitted.

and if the PIO command is a second type of PIO command, sending the command to the EP configuration space or the external equipment according to the attribute of the command and a preset rule.

The second type of PIO command may be referred to as PIO command 2, and the second type of PIO command may be a configuration signal of an EP configuration space in the register module and/or a signal stacked to an external device.

It should be noted that the second-type PIO commands may be divided into commands only destined for the EP configuration space, or commands only destined for the external device, or commands respectively destined for the EP configuration space and the external device according to the address in the second-type PIO commands.

In some embodiments, according to the address in the second type of PIO command, the second type of PIO command is divided into two paths, one path is a configuration signal to the EP configuration space, and the configuration signal to the EP configuration space can be sent to the EP configuration space; the other path is a signal to the external device, and the EP configuration space can be sent to the external device.

In the embodiment of the application, data selection can be performed on the configuration signals to the EP configuration space in the first-type PIO command and the configuration signals to the EP configuration space in the second-type PIO command, so as to determine the configuration signals to the EP configuration space finally.

In summary, according to the attribute of the command and the preset rule, the transmission of the second-class PIO command can be realized without the need of a physical link to transmit the second-class PIO command, thereby reducing the communication delay when the second-class PIO command is transmitted.

Optionally, if the command corresponds to the external device, before sending the command to the external device, the method may further include: and mapping the address carried by the command, and determining whether the address falls into the address space range of the target external equipment.

Wherein the address space range of the target external device may be stored in advance.

In some embodiments, if the second type of PIO command is divided into commands to external devices, the addresses in the commands to external devices may be mapped and it may be determined whether the addresses in the commands to external devices fall within the address control range of the target external device; if so, sending a command to the external device.

In summary, if the command corresponds to the external device, it is determined that the address carried in the command falls within the address space range of the target external device, and the command is sent to the external device, so that the command can be accurately sent.

Optionally, the command may include: direct Memory Access (DMA) addresses; fig. 7 is a schematic structural diagram of an RC-EP module provided in an embodiment of the present application, and as shown in fig. 7, the RC-EP module includes: and a DMA processing module. I.e. the above-mentioned target module may be a DMA processing module.

The process of sending the command to the corresponding target module or the external device in the RC-EP module according to the attribute of the command and the preset rule in S402 includes:

and sending the command to the external equipment through the DMA processing module according to the attribute of the command, a preset rule and the address carried by the command.

The DMA communication refers to the interaction between the data in the address space of the external device and the data in the address space of the main memory, and the DMA processing module can be adopted for DMA communication, so that the participation of a processor is not needed in the whole process.

As shown in FIG. 7, commands destined for a DMA processing module may be referred to as DMA messages.

In some embodiments, as shown in fig. 7, according to the attribute and the preset rule of the command and the address carried by the command, the address translation module is adopted to send the command to the DMA processing module, and the DMA processing module may receive the command and send the command to the external device.

In summary, based on the DMA processing module in the RC _ EP module sending the command to the external device, the command can be transmitted without passing through the physical link of the PCIE, so that the communication time of the DMA communication is saved, and the DMA communication efficiency is improved.

As shown in fig. 6 and 7, the RC-EP module may further include: an interrupt generation module; in the embodiment of the application, the RC-EP module may further receive the interrupt report through the interrupt generation module.

Optionally, fig. 8 is a schematic flowchart of a command transmission method based on a PCIE bus according to an embodiment of the present application, and as shown in fig. 8, the method may further include:

s801, receiving an interrupt report sent by an external device through an RC-EP module.

In some embodiments, an interrupt generation module in the RC-EP module may be used to receive an interrupt report sent by an external device.

S802, if the current support message signal MSI (message Signaled interrupt) is interrupted, converting the interrupt report into an MSI interrupt report and transmitting the MSI interrupt report to the processor.

Alternatively, S803, if the message signal MSI interrupt is not currently supported, transmits an interrupt report to the processor.

Wherein, the message signal MSI interruption refers to MSI interruption mechanism.

IN the embodiment of the application, whether the RC-EP module supports the message signal MSI interrupt may be determined, and if so, an interrupt report (INT, IN Terrupt) sent by the external device is converted into an MSI interrupt report, and the MSI interrupt report is sent to the upper-level module processor for transmission; if not, an interrupt report (INT) is transmitted directly to the processor. Different interrupt reports can be compatible, and the efficiency of transmitting the interrupt reports is improved.

To sum up, an embodiment of the present application provides a command transmission method based on a PCIE bus, where the method applied to a system on a chip includes: the processor based on PCIE bus connection, root complex-terminal RC-EP module, the processor and RC-EP module communication connection, including: receiving a command sent by a processor through an RC-EP module; and if the address carried in the command is in the range of the preset address space corresponding to the RC-EP module, sending the command to a corresponding target module or external equipment in the RC-EP module according to a preset rule, wherein the command received by the target module is a command which can be transmitted without a physical link. The RC-EP module is arranged, when the address carried in the command sent by the processor is within the preset address space range corresponding to the RC-EP module, the command is a command which does not need physical link transmission, the command is sent to a target module or external equipment according to a preset rule, the command does not need to be transmitted through a physical link, and therefore communication delay during data transmission is reduced.

Moreover, three-layer structures of a transaction layer, a link layer and a physical layer of the PCIE are simplified, the consumption of hardware resources is greatly reduced, and the communication delay of the PIO and the DMA is reduced; setting RC and EP configuration space to form a complete PCIE architecture, which can be managed in PCIE form; the external device is connected in the form of an internal bus, and a traditional slot of PCIE is not needed.

It is noted that while for simplicity of explanation, the foregoing method embodiments have been described as a series of acts or combination of acts, it will be appreciated by those skilled in the art that the present disclosure is not limited by the order of acts, as some steps may, in accordance with the present disclosure, occur in other orders and concurrently. Further, those skilled in the art will also appreciate that the embodiments described in the specification are exemplary embodiments and that acts and modules referred to are not necessarily required by the disclosure.

It should be further noted that, by taking fig. 4 as an example, although the steps in the flowchart of fig. 4 are shown in sequence as indicated by the arrows, the steps are not necessarily executed in sequence as indicated by the arrows. The steps are not performed in the exact order shown and described, and may be performed in other orders, unless explicitly stated otherwise. Moreover, at least a portion of the steps in fig. 4 may include multiple sub-steps or multiple stages that are not necessarily performed at the same time, but may be performed at different times, and the order of performance of the sub-steps or stages is not necessarily sequential, but may be performed in turn or alternately with other steps or at least a portion of the sub-steps or stages of other steps.

The following explains a system on chip on which a command transmission method based on a PCIE bus provided in the present application is based.

Fig. 9 is a schematic structural diagram of a system on chip according to an embodiment of the present application, and as shown in fig. 9, the system on chip may include: the system comprises a processor and a root composite-endpoint RC-EP module which are connected based on a PCIE bus system, wherein the processor is in communication connection with the RC-EP module;

Wherein the RC-EP module may be a virtual module disposed on the BUS 0.

Optionally, fig. 10 is a schematic structural diagram of a system on chip provided in an embodiment of the present application, and as shown in fig. 10, the system on chip may further include: physical RC devices such as RC0, RC1, RC2, and RC RCn provided on BUS 0; and EP0 physical EP equipment disposed on BUS 1. Namely, on the basis of adding the RC-EP module, the architectures of the RC equipment and the EP equipment are reserved. When the address carried by the command sent by the processor is within the address range of other RC devices, the address is still sent to the corresponding RC device, and the processing and processing in the manner shown in fig. 2 are carried out, so as to reduce the technical implementation difficulty. Meanwhile, normal transmission of commands needing physical link transmission can be guaranteed.

Optionally, as shown in fig. 6, the RC-EP module includes: an address translation module;

Optionally, as shown in fig. 6, the target module includes a register, and a preset register, an RC configuration space, and an EP configuration space are disposed in the register; the preset register is used for storing pre-configuration information; the RC configuration space is configured with RC equipment identifiers so as to be identified as RC equipment when a response system enumerates; the EP configuration space is configured with EP device identifications such that the responding system is identified as an EP device when enumerating.

Optionally, as shown in fig. 7, the command includes: direct Memory Access (DMA) addresses; the RC-EP module comprises: a DMA processing module;

Optionally, as shown in fig. 6, the RC-EP module includes: an interrupt generation module;

It should be noted that, for the beneficial effects of the system on chip provided by the present application, reference may be made to the relevant description of the above method, and details are not repeated here.

Optionally, an embodiment of the present application further provides a computer device, where the computer device may include the system on chip in the foregoing embodiment, so as to implement the command transmission method based on the PCIE bus disclosed in the present application.

Embodiments of the present application also provide a computer storage medium having stored therein instructions, which when executed on a computer or processor, cause the computer or processor to perform one or more steps of any of the above-described method embodiments.

Based on the understanding that the constituent modules of the above-described apparatus, if implemented in the form of software functional units and sold or used as independent products, may be stored in a computer-readable storage medium, and that, in essence, a part of the technical solution of the present application or all or part of the technical solution may be embodied in the form of a software product, and the computer product is stored in the computer-readable storage medium.

The computer readable storage medium may be an internal storage unit of the device of the foregoing embodiment, such as a hard disk or a memory. The computer readable storage medium may be an external storage device of the above-described apparatus, such as a plug-in hard disk, a Smart Media Card (SMC), a Secure Digital (SD) Card, a Flash memory Card (Flash Card), and the like. Further, the computer-readable storage medium may include both an internal storage unit and an external storage device of the device. The computer-readable storage medium is used for storing the computer program and other programs and data required by the apparatus. The above-described computer-readable storage medium may also be used to temporarily store data that has been output or is to be output.

It will be understood by those skilled in the art that all or part of the processes of the methods of the above embodiments may be implemented by a computer program, which can be stored in a computer-readable storage medium, and can include the processes of the above embodiments of the methods when the computer program is executed. And the aforementioned storage medium includes: various media that can store program codes, such as ROM, RAM, magnetic or optical disks.

In the several embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, a division of a unit is merely a logical division, and an actual implementation may have another division, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.

Units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, or in a form of hardware plus a software functional unit.

The integrated unit implemented in the form of a software functional unit may be stored in a computer readable storage medium. The software functional unit is stored in a storage medium and includes several instructions to enable a computer device (which may be a personal computer, a server, or a network device) or a processor (processor) to execute some steps of the methods according to the embodiments of the present application. And the aforementioned storage medium includes: a U disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.

The above is only a preferred embodiment of the present invention, and is not intended to limit the present invention, and various modifications and changes will occur to those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A command transmission method based on a PCIE bus is characterized in that the method is applied to a system on chip, and the system on chip comprises the following steps: the processor and the root complex-endpoint RC-EP module are connected based on a PCIE bus, the processor is in communication connection with the RC-EP module, and the method comprises the following steps:

receiving, by the RC-EP module, a command sent by the processor;

2. The method of claim 1, wherein the command comprises: programmable input output PIO commands; before the sending the command to the corresponding target module or external device in the RC-EP module according to the preset rule, the method further includes:

3. The method according to claim 2, wherein the target module comprises a register, and a preset register, an RC configuration space, and an EP configuration space are arranged in the register; wherein the register is used for storing pre-configuration information; the RC configuration space is configured with RC equipment identifiers so as to be identified as RC equipment when a response system enumerates; the EP configuration space is configured with EP device identifications such that the responding system is identified as an EP device when enumerating.

4. The method according to claim 3, wherein the sending the command to a corresponding target module or external device in the RC-EP module according to the attribute of the command and a preset rule comprises:

5. The method according to claim 3, wherein the sending the command to a corresponding target module or external device in the RC-EP module according to the attribute of the command and a preset rule comprises:

6. The method of claim 5, wherein if the command corresponds to an external device, before sending the command to the external device, the method further comprises:

7. The method of claim 2, wherein the command comprises: direct Memory Access (DMA) addresses; the RC-EP module comprises: a DMA processing module;

8. The method according to any one of claims 1-7, further comprising:

9. A system on a chip, comprising: the system comprises a processor and a root composite-endpoint RC-EP module which are connected based on a PCIE bus system, wherein the processor is in communication connection with the RC-EP module;

10. The system on a chip of claim 9, wherein the RC-EP module comprises: an address translation module;

11. The system on a chip of claim 10, wherein the target module comprises a register, and a preset register, an RC configuration space, and an EP configuration space are disposed in the register; the preset register is used for storing pre-configuration information; the RC configuration space is configured with RC equipment identifiers so as to be identified as RC equipment when a response system enumerates; the EP configuration space is configured with EP device identifications such that the responding system is identified as an EP device when enumerating.

12. The system on a chip of claim 11, wherein the RC-EP module is further configured to, if the PIO command is a first type of PIO command, send the command to any one of a preset register, an RC configuration space, and an EP configuration space in the RC-EP module according to the attribute of the command and a preset rule; the first-class PIO command is a command which can be transmitted without a physical link.

13. The system on chip of claim 11, wherein the RC-EP module is further configured to send the command to the EP configuration space or an external device according to an attribute of the command and a preset rule if the PIO command is a second type of PIO command.

14. The system on a chip of claim 13, wherein the RC-EP module is further configured to map an address carried by the command to determine whether the address falls within an address space of a target external device.

15. The system on a chip of claim 10, wherein the command comprises: direct Memory Access (DMA) addresses; the RC-EP module comprises: a DMA processing module;

16. The system-on-chip of any one of claims 9-15, wherein the RC-EP module comprises: an interrupt generation module;

the interrupt generating module is used for receiving an interrupt report sent by external equipment; if the current support message signal MSI is interrupted, converting the interruption report into an MSI interruption report and transmitting the MSI interruption report to the processor; or if the message signal MSI interruption is not supported currently, transmitting the interruption report to the processor.