CN113933860A - Anti-collision monitoring system and method for height limiting frame of highway, railway and bridge - Google Patents
Anti-collision monitoring system and method for height limiting frame of highway, railway and bridge Download PDFInfo
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- CN113933860A CN113933860A CN202111328899.6A CN202111328899A CN113933860A CN 113933860 A CN113933860 A CN 113933860A CN 202111328899 A CN202111328899 A CN 202111328899A CN 113933860 A CN113933860 A CN 113933860A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S17/00—Systems using the reflection or reradiation of electromagnetic waves other than radio waves, e.g. lidar systems
- G01S17/88—Lidar systems specially adapted for specific applications
- G01S17/93—Lidar systems specially adapted for specific applications for anti-collision purposes
- G01S17/931—Lidar systems specially adapted for specific applications for anti-collision purposes of land vehicles
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- G—PHYSICS
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- G01D—MEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
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Abstract
The invention discloses an anti-collision monitoring system and method for a height limiting frame of a highway, a railway and a bridge, wherein the anti-collision monitoring system comprises: the system comprises a vehicle ultrahigh detection device, a collision monitoring device, a video acquisition device, an information processing device and an alarm device; the information processing device is respectively connected with the vehicle superelevation detection device, the collision monitoring device, the video acquisition device and the alarm device. The anti-collision monitoring system and method for the height-limiting frame of the highway/railway bridge, provided by the invention, can monitor the height-limiting frame of the highway/railway bridge in real time, send out warning information before danger occurs, and give an alarm in time after the danger occurs.
Description
Technical Field
The invention belongs to the technical field of electronic information, relates to a collision monitoring system, and particularly relates to an anti-collision monitoring system and method for a height limiting frame of a highway, a railway and a bridge.
Background
With the high-speed development of highways and railways, a plurality of highways and railways exist nationwide at present, wherein beam-type structural bridges are arranged at a plurality of positions. In order to strengthen the management of the height-limiting protection frame for the highway, railway bridges and culverts, a road passing through the railway bridges and culverts and a height-limiting protection frame for vehicles to pass through are arranged according to national standards. The height-limiting protection frame protects bridge safety to a certain extent, but the height-limiting protection frame is collided to lose efficacy and then collides with bridges and culverts, so that a large amount of maintenance cost of the protection frame is generated, and line foundation deformation secondary disasters caused by the height-limiting protection frame are rapid rising potential hazards, so that the height-limiting protection frame becomes an important potential safety hazard for railway traveling.
The main reasons for collision of the height-limiting protection frame are road traffic pressure, road design, overrun loading, safety awareness of a driver, design of the height-limiting protection frame, actual construction and the like. At present, damage information of the height-limiting protective frame is mostly acquired through ways such as daily patrol of workers, report of people and the like, accident information is seriously lost and lagged, and effective video data is lacked as a basis for post-inspection; meanwhile, more height-limiting protection frames are arranged in remote rural areas, and are difficult to find in time after being damaged, so that the protection on railways or overpasses is lost, and the potential safety hazard of railway driving is increased.
Therefore, it is necessary to strengthen the safety protection research of bridges and culverts of roads and railways, effectively monitor early warning and accident alarm in time and ensure the safety of railway transportation.
In view of the above, there is an urgent need to design a new anti-collision method for height-limiting frame, so as to overcome at least some of the above-mentioned disadvantages of the existing anti-collision method for height-limiting frame.
Disclosure of Invention
The invention provides an anti-collision monitoring system and method for a height limiting frame of a highway/railway bridge, which can monitor the height limiting frame of the highway/railway bridge in real time, send out warning information before danger occurs and give an alarm in time after the danger occurs.
In order to solve the technical problem, according to one aspect of the present invention, the following technical solutions are adopted:
an anti-collision monitoring system for a highway, railway and bridge height limiting frame, the anti-collision monitoring system comprising: the system comprises a vehicle ultrahigh detection device, a collision monitoring device, a video acquisition device, an information processing device and an alarm device; the information processing device is respectively connected with the vehicle ultrahigh detection device, the collision monitoring device, the video acquisition device and the alarm device;
the vehicle ultrahigh detection device comprises at least two laser sensors, and each laser sensor is ejected out in parallel to the road according to a set intersection angle; the output end of the vehicle ultrahigh detection device is connected with the input end of the information processing device and used for sending the detected data to the information processing device;
the collision monitoring device comprises a vibration sensor for sensing a vibration signal; the output end of the vibration sensor is connected with the input end of the information processing device and used for sending the detected vibration signal to the information processing device;
the video acquisition device comprises two camera devices which respectively monitor the height limiting frame and the bridge body; the two camera devices are connected with the information processing device and respectively collect the image or/and video data of the height limiting frame and the bridge under the control of the information processing device; the output ends of the two camera devices are connected with the input end of the information processing device and used for sending the acquired data to the information processing device;
the alarm device is used for sending alarm information; the output end of the information processing device is connected with the input end of the alarm device and used for sending a control signal to the alarm device.
As an embodiment of the present invention, the video capture device further includes a power supply unit, and the power supply unit is respectively connected to the two image capturing devices to supply power to the two image capturing devices.
As an embodiment of the present invention, the anti-collision monitoring system further includes a solar charging device, and the solar charging device is connected to the power supply unit and can charge the power supply unit by using solar energy.
As an embodiment of the present invention, the video capture device further includes a night light supplement unit, and the power supply unit is connected to the night light supplement unit and is capable of supplying power to the night light supplement unit.
As an embodiment of the present invention, the anti-collision monitoring system further includes a server and at least one mobile terminal, and the server is connected to each mobile terminal; the information processing device is connected with the server through a communication module and can perform data interaction with the server.
As an embodiment of the present invention, the information processing apparatus includes an information processing circuit to process a signal detected by the vehicle height detection apparatus, the information processing circuit including a third chip IC33, a first processor U1, a plurality of first processing units, a plurality of second processing units; the third chip IC33 is connected to the first processor U1, the first processing units, and the second processing units, respectively, and the first processor U1 is connected to the first processing units and the second processing units, respectively.
The first processing unit comprises a first chip IC1, a first three-chip IC13, a second four-chip IC24, a first triode BG1, a first diode D1, a second eight-diode D28, a plurality of capacitors and a plurality of resistors.
A first pin of the first chip IC1 is connected to an emitter of a first triode BG1, a first end of a first sixth capacitor C16, a first end of a fourth sixth resistor R46, a second end of an eighth fourth resistor R84, and a second pin of a second fourth chip IC 24;
the second pin of the first chip IC1 is connected to the second end of the first capacitor C1, the sixth pin of the first chip IC1, the second end of the fourth sixth resistor R46, the second end of the second resistor R2, and the third pin of the second fourth chip IC 24;
the third pin of the first chip IC1 is respectively connected with the first end of a fourth eight resistor R48 and the second end of a first resistor R1;
the fourth pin of the first chip IC1 is respectively connected with the first end of the first capacitor C1, the first end of the second resistor R2, the eighth pin of the first chip IC1 and the second end of the third resistor R3;
a second end of the first sixth capacitor C16 is connected to a fourth pin of the second fourth chip IC24 and a second end of the fourth eighth resistor R48, respectively;
a first pin of the first three-chip IC13 is connected with a live wire, and a third pin of the first three-chip IC13 is respectively connected with the negative electrode of a first diode D1 and the first end of a third resistor R3; a fourth pin of the first three-chip IC13 is a ground pin and is respectively connected to the anode of the first diode D1 and the collector of the first triode BG 1;
the base electrode of the first triode BG1 is respectively connected with the first end of a first resistor R1 and the first end of an eighth fourth resistor R84;
a first pin of the second fourth chip IC24 is connected to a first end of a fourth seventh resistor R47, a second end of the fourth seventh resistor R47 is connected to a cathode of a second eight diode D28, and an anode of the second eight diode D28 is connected to the third chip IC 33;
the second processing unit comprises an eighth chip IC8, a second zero chip IC20, a first controlled silicon Q1, a plurality of diodes, a plurality of capacitors and a plurality of resistors;
the first pin of the eighth chip IC8 is connected to the second pin of the eighth chip IC8, the second end of the eighth capacitor C8, the second end of the ninth capacitor C9, the cathode of the first diode D12, the second end of the second seven resistor R27, the cathode of the first diode D11, the cathode of the fourth nine diode D49, the first end of the second five capacitor C25, and the first end of the first S switch S1, respectively;
a third pin of the eighth chip IC8 is connected to a first end of an eighth capacitor C8; a fourth pin of the eighth chip IC8 is respectively connected to the first end of the ninth capacitor C9, the second end of the second fifth resistor R25, and the anode of the first diode D12;
a fifth pin of the eighth chip IC8 is respectively connected to a cathode of the first zero diode D10, an anode of the first one-to-one diode D11, a first end of the second seventh resistor R27, and a fourth pin of the second zero chip IC 20;
the sixth pin of the eighth chip IC8 is connected to the seventh pin of the eighth chip IC8, the anode of the first zero diode D10, the second end of the third fifth capacitor C35, the anode of the fourth nine diode D49, the second end of the second fifth capacitor C25, the anode of the eighth diode D8, and the third pin of the second zero chip IC 20;
an eighth pin of the eighth chip IC8 is connected to a second end of a second fourth resistor R24; a first end of the second fourth resistor R24 is respectively connected with a first end of the third fifth capacitor C35 and a control electrode of the first controlled silicon Q1; the anode of the first controlled silicon Q1 is respectively connected with the live wire and the second end of the first S switch S1; the cathodes of the first silicon controlled rectifiers Q1 are respectively connected with a zero line;
a first pin of the second zero-chip IC20 is connected to a second end of a second sixth resistor R26, a first end of the second sixth resistor R26 is connected to a cathode of a ninth diode D9, and an anode of the ninth diode D9 is connected to a third chip IC 33;
a first end of the second fifth resistor R25 is respectively connected with a second end of the second third resistor R23 and a zero line; the first end of the second third resistor R23 is connected to the second end of the second resistor R22, and the first end of the second resistor R22 is connected to the cathode of the eighth diode D8.
As an embodiment of the present invention, the alarm device includes an alarm circuit, and the anti-collision monitoring system includes a power supply circuit;
the alarm circuit comprises a first second chip IC12, a third chip IC31, a third second chip IC32, a ninth triode BG9, a plurality of diodes, a plurality of capacitors and a plurality of resistors;
the first pin of the first two-chip IC12 is respectively connected to the second end of the fourth second capacitor C42, the second end of the third second capacitor C32, the emitter of the ninth triode BG9, the first end of the fourth capacitor C41, the second pin of the third chip IC31, the anode of the third diode D37, the third pin of the third two-chip IC32, the second pin of the third two-chip IC32, and the anode of the third nine diode D39;
the second pin of the first two-chip IC12 is respectively connected with the second end of a fourth capacitor C41, the second end of a seventh third resistor R73 and the fourth pin of a third two-chip IC 32;
the third pin of the first diode IC12 is connected with the positive electrode of a fourth diode D41; the cathode of the fourth diode D41 is connected with the cathode of the third eight diode D38;
a fourth pin of the first diode chip IC12 is respectively connected with a collector of a ninth triode BG9 and a second end of a seventh fourth resistor R74;
the fifth pin of the first two-chip IC12 is connected with the first end of a fourth capacitor C42; the sixth pin of the first two-chip IC12 is respectively connected with the seventh pin of the first two-chip IC12, the second end of a seventh sixth resistor R76 and the first end of a third capacitor C32;
the eighth pin of the first two-chip IC12 is respectively connected to the second end of the seventh fifth resistor R75, the first end of the seventh third resistor R73, the first end of the seventh fourth resistor R74, and the fourth pin of the third two-chip IC 32; a first end of the seventh fifth resistor R75 is connected with a first end of the seventh sixth resistor R76;
a first pin of the third chip IC31 is respectively connected to a cathode of the third diode D37 and a first end of the eighth resistor R82;
a third pin of the third chip IC31 is respectively connected to the anode of the third eight diode D38 and the first end of the seventh resistor R77; the second end of the seventh resistor R77 is connected with the base of the ninth triode BG 9;
a first pin of the third chip IC32 is connected to a cathode of a third ninth diode D39, a first end of a seventh second resistor R72, and a first end of an eighth third resistor R83, respectively; a second end of the seventh second resistor R72 is connected to a cathode of the fourth eighth diode D48, and a second end of the eighth third resistor R83 is connected to a cathode of the fourth seventh diode D47;
the power supply circuit comprises a third four-chip IC34, a fourth diode D42, a third first capacitor C31, a third capacitor C33, a fourth third capacitor C43 and a fourth capacitor C44;
a first pin (Vin pin) of the third fourth chip IC34 is respectively connected to a cathode of the fourth second diode D42, a first end of the third capacitor C31, and a first end of the fourth capacitor C43;
a third pin (Vout pin) of the third fourth chip IC34 is respectively connected with a first end of a third capacitor C33 and a first end of a fourth capacitor C44;
the second pin (GND pin) of the third fourth chip IC34 is connected to the second terminal of the third capacitor C31, the second terminal of the third capacitor C33, the second terminal of the fourth capacitor C43, and the second terminal of the fourth capacitor C44, respectively.
As an embodiment of the present invention, the anti-collision monitoring system includes a data input control circuit;
the data input control circuit comprises a third five-chip IC35, a first triode BG11, a first triode BG12, a first crystal oscillator Y1, a first battery BT1, a plurality of capacitors, a plurality of resistors and a plurality of switches;
a first pin of the third fifth chip IC35 is respectively connected to the second end of the eighth resistor R8, the negative electrode of the first battery BT1, the second end of the third fourth capacitor C34, the first end of the fourth fifth capacitor C45 and the first end of the fourth sixth capacitor C46;
a second pin of the third fifth chip IC35 is connected to a second end of the fourth fifth capacitor C45 and a first end of the first crystal oscillator Y1, respectively;
a third pin of the fifth chip IC35 is connected to the second terminal of the first crystal oscillator Y1 and the second terminal of the fourth sixth capacitor C46, respectively;
a fourth pin of the third five-chip IC35 is respectively connected to the first end of the first switch, the first end of the second switch, and the first end of the first switch;
a fifth pin of the third fifth chip IC35 is connected to a first end of the third switch and a first end of the fourth switch respectively;
a sixth pin of the third fifth chip IC35 is connected to the first end of the fifth switch and the first end of the sixth switch respectively;
a seventh pin of the third fifth chip IC35 is connected to the first end of the seventh switch and the first end of the eighth switch, respectively;
an eighth pin of the fifth chip IC35 is connected to a first end of a ninth switch;
a ninth pin of the third fifth chip IC35 is connected to the first end of the first zero switch and the first end of the first second switch respectively;
a first zero pin of the third fifth chip IC35 is connected to the anode of the fourth fifth diode D45, the second terminal of the first switch, the second terminal of the third switch, the second terminal of the fifth switch, the second terminal of the seventh switch,
A first pin of the third fifth chip IC35 is connected to the anode of the fourth third diode D43, the second end of the second switch, the second end of the fourth switch, the second end of the sixth switch, the second end of the eighth switch, the second end of the ninth switch, and the second end of the first zero switch, respectively;
a first two-pin of the third five-chip IC35 is respectively connected to the anode of the fourth four-diode D44, the second end of the first one-to-one switch, and the second end of the first two-to-one switch;
a first three pins of the third fifth chip IC35 are respectively connected to a cathode of a fourth fifth diode D45, a cathode of a fourth third diode D43, and a cathode of a fourth diode D44;
a first five pin of the third five-chip IC35 is connected with a base electrode of a first diode BG12 through an eighth zero resistor R80;
a sixth pin of the third five-chip IC35 is respectively connected to an emitter of a first triode BG12, a collector of a first triode BG11, an anode of a first battery BT1, and a first end of a third four-capacitor C34;
a collector of the first triode BG12 is connected to a base of the first triode BG11, an emitter of the first triode BG11 is connected to an anode of the fifth diode D5, and a cathode of the fifth diode D5 is connected to a first end of the eighth resistor R8.
According to another aspect of the invention, the following technical scheme is adopted: an anti-collision monitoring method of the highway, railway and bridge height-limiting frame anti-collision monitoring system comprises the following steps:
the vehicle superelevation detection device detects whether vehicles are exceeded or not, and sends detected data to the information processing device;
the collision monitoring device senses whether a vibration signal meeting a set threshold value exists or not; the collision monitoring device sends the detected vibration signal to the information processing device;
the information processing device controls the video acquisition device to work according to the data detected by the vehicle ultrahigh detection device and the collision monitoring device; and when an abnormal condition occurs, controlling the corresponding camera device to work and controlling the alarm device to give an alarm.
The anti-collision monitoring method further comprises the following steps:
the information processing device sends an alarm signal to a server and sends setting information to the server;
and the server sends an alarm signal to the set mobile terminal and sends the set information to the corresponding mobile terminal.
The invention has the beneficial effects that: the anti-collision monitoring system and method for the height-limiting frame of the highway/railway bridge, provided by the invention, can monitor the height-limiting frame of the highway/railway bridge in real time, send out warning information before danger occurs, and give an alarm in time after the danger occurs.
Drawings
Fig. 1 is a schematic composition diagram of an anti-collision monitoring system for height-limiting frames of highway/railway bridges in an embodiment of the invention.
Fig. 2 is a circuit diagram of an information processing circuit according to an embodiment of the invention.
FIG. 3 is a circuit diagram of an alarm circuit and a power circuit according to an embodiment of the invention.
Fig. 4 is a circuit diagram of a data input control circuit according to an embodiment of the invention.
Detailed Description
Preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
For a further understanding of the invention, reference will now be made to the preferred embodiments of the invention by way of example, and it is to be understood that the description is intended to further illustrate features and advantages of the invention, and not to limit the scope of the claims.
The description in this section is for several exemplary embodiments only, and the present invention is not limited only to the scope of the embodiments described. It is within the scope of the present disclosure and protection that the same or similar prior art means and some features of the embodiments may be interchanged.
The steps in the embodiments in the specification are only expressed for convenience of description, and the implementation manner of the present application is not limited by the order of implementation of the steps. The term "connected" in the specification includes both direct connection and indirect connection.
The invention discloses an anti-collision monitoring system for a height-limiting frame of a highway railway bridge, and fig. 1 is a schematic composition diagram of the anti-collision monitoring system for the height-limiting frame of the highway railway bridge in one embodiment of the invention; referring to fig. 1, the anti-collision monitoring system includes: the system comprises a vehicle ultrahigh detection device 1, a collision monitoring device 2, a video acquisition device 3, an information processing device 4 and an alarm device 5; the information processing device 4 is respectively connected with the vehicle ultrahigh detection device 1, the collision monitoring device 2, the video acquisition device 3 and the alarm device 5.
The vehicle ultrahigh detection device 1 comprises at least two laser sensors, and each laser sensor is ejected out in parallel to a road according to a set intersection angle; the output end of the vehicle ultrahigh detection device is connected with the input end of the information processing device and used for sending the detected data to the information processing device.
The collision monitoring device 2 comprises a vibration sensor for sensing a vibration signal; the output end of the vibration sensor is connected with the input end of the information processing device and used for sending the detected vibration signal to the information processing device.
The video acquisition device 3 comprises two camera devices which respectively monitor the height limiting frame and the bridge body; the two camera devices are connected with the information processing device and respectively collect the image or/and video data of the height limiting frame and the bridge under the control of the information processing device; the output ends of the two camera devices are connected with the input end of the information processing device and used for sending the acquired data to the information processing device.
The alarm device 5 is used for sending alarm information; the output end of the information processing device is connected with the input end of the alarm device and used for sending a control signal to the alarm device.
In an embodiment of the present invention, the video capture device further includes a power supply unit and a night light supplement unit, and the power supply unit is respectively connected to the two cameras to supply power to the two cameras. The power supply unit is connected with the night light supplementing unit and can supply power for the night light supplementing unit.
In addition, the anti-collision monitoring system further comprises a solar charging device, wherein the solar charging device is connected with the power supply unit and can charge the power supply unit by utilizing solar energy.
In an embodiment, the anti-collision monitoring system further includes a server and at least one mobile terminal, and the server is connected to each mobile terminal; the information processing device is connected with the server through a communication module and can perform data interaction with the server.
The information processing device 4 may include an information processing circuit for processing a signal (e.g., a laser signal, an infrared signal) detected by the vehicle height detection device 1. FIG. 2 is a circuit diagram of an information processing circuit according to an embodiment of the present invention; referring to fig. 2, in an embodiment of the invention, the information processing circuit includes a third IC33, a first processor U1, a plurality of first processing units, a plurality of second processing units; the third chip IC33 is connected to the first processor U1, the first processing units, and the second processing units, respectively, and the first processor U1 is connected to the first processing units and the second processing units, respectively.
The first processing unit is used for controlling the switching value. The first processing unit comprises a first chip IC1, a first three-chip IC13, a second four-chip IC24, a first triode BG1, a first diode D1, a second eight-diode D28, a plurality of capacitors and a plurality of resistors.
A first pin of the first chip IC1 is connected to an emitter of a first triode BG1, a first end of a first sixth capacitor C16, a first end of a fourth sixth resistor R46, a second end of an eighth fourth resistor R84, and a second pin of a second fourth chip IC 24;
the second pin of the first chip IC1 is connected to the second end of the first capacitor C1, the sixth pin of the first chip IC1, the second end of the fourth sixth resistor R46, the second end of the second resistor R2, and the third pin of the second fourth chip IC 24;
the third pin of the first chip IC1 is respectively connected with the first end of a fourth eight resistor R48 and the second end of a first resistor R1;
the fourth pin of the first chip IC1 is respectively connected with the first end of the first capacitor C1, the first end of the second resistor R2, the eighth pin of the first chip IC1 and the second end of the third resistor R3;
a second end of the first sixth capacitor C16 is connected to a fourth pin of the second fourth chip IC24 and a second end of the fourth eighth resistor R48, respectively;
a first pin of the first three-chip IC13 is connected with a live wire, and a third pin of the first three-chip IC13 is respectively connected with the negative electrode of a first diode D1 and the first end of a third resistor R3; a fourth pin of the first three-chip IC13 is a ground pin and is respectively connected to the anode of the first diode D1 and the collector of the first triode BG 1;
the base electrode of the first triode BG1 is respectively connected with the first end of a first resistor R1 and the first end of an eighth fourth resistor R84;
a first pin of the second fourth chip IC24 is connected to a first end of a fourth seventh resistor R47, a second end of the fourth seventh resistor R47 is connected to a cathode of a second eight diode D28, and an anode of the second eight diode D28 is connected to the third chip IC 33.
The second processing unit is used for carrying out analog quantity control. The second processing unit comprises an eighth chip IC8, a second zero chip IC20, a first controlled silicon Q1, a plurality of diodes, a plurality of capacitors and a plurality of resistors.
The first pin of the eighth chip IC8 is connected to the second pin of the eighth chip IC8, the second end of the eighth capacitor C8, the second end of the ninth capacitor C9, the cathode of the first diode D12, the second end of the second seven resistor R27, the cathode of the first diode D11, the cathode of the fourth nine diode D49, the first end of the second five capacitor C25, and the first end of the first S switch S1, respectively;
a third pin of the eighth chip IC8 is connected to a first end of an eighth capacitor C8; a fourth pin of the eighth chip IC8 is respectively connected to the first end of the ninth capacitor C9, the second end of the second fifth resistor R25, and the anode of the first diode D12;
a fifth pin of the eighth chip IC8 is respectively connected to a cathode of the first zero diode D10, an anode of the first one-to-one diode D11, a first end of the second seventh resistor R27, and a fourth pin of the second zero chip IC 20;
the sixth pin of the eighth chip IC8 is connected to the seventh pin of the eighth chip IC8, the anode of the first zero diode D10, the second end of the third fifth capacitor C35, the anode of the fourth nine diode D49, the second end of the second fifth capacitor C25, the anode of the eighth diode D8, and the third pin of the second zero chip IC 20;
an eighth pin of the eighth chip IC8 is connected to a second end of a second fourth resistor R24; a first end of the second fourth resistor R24 is respectively connected with a first end of the third fifth capacitor C35 and a control electrode of the first controlled silicon Q1; the anode of the first controlled silicon Q1 is respectively connected with the live wire and the second end of the first S switch S1; the cathode of the first controllable silicon Q1 is connected with the zero line;
a first pin of the second zero-chip IC20 is connected to a second end of a second sixth resistor R26, a first end of the second sixth resistor R26 is connected to a cathode of a ninth diode D9, and an anode of the ninth diode D9 is connected to a third chip IC 33;
a first end of the second fifth resistor R25 is respectively connected with a second end of the second third resistor R23 and a zero line; the first end of the second third resistor R23 is connected to the second end of the second resistor R22, and the first end of the second resistor R22 is connected to the cathode of the eighth diode D8.
The alarm device comprises an alarm circuit, and the anti-collision monitoring system further comprises a power circuit. FIG. 3 is a schematic circuit diagram of an alarm circuit and a power circuit according to an embodiment of the present invention; referring to fig. 3, in an embodiment of the invention, the alarm circuit includes a first two-chip IC12, a third one-chip IC31, a third two-chip IC32, a ninth triode BG9, a plurality of diodes, a plurality of capacitors, and a plurality of resistors;
the first pin of the first two-chip IC12 is respectively connected to the second end of the fourth second capacitor C42, the second end of the third second capacitor C32, the emitter of the ninth triode BG9, the first end of the fourth capacitor C41, the second pin of the third chip IC31, the anode of the third diode D37, the third pin of the third two-chip IC32, the second pin of the third two-chip IC32, and the anode of the third nine diode D39;
the second pin of the first two-chip IC12 is respectively connected with the second end of a fourth capacitor C41, the second end of a seventh third resistor R73 and the fourth pin of a third two-chip IC 32;
the third pin of the first diode IC12 is connected with the positive electrode of a fourth diode D41; the cathode of the fourth diode D41 is connected with the cathode of the third eight diode D38;
a fourth pin of the first diode chip IC12 is respectively connected with a collector of a ninth triode BG9 and a second end of a seventh fourth resistor R74;
the fifth pin of the first two-chip IC12 is connected with the first end of a fourth capacitor C42; the sixth pin of the first two-chip IC12 is respectively connected with the seventh pin of the first two-chip IC12, the second end of a seventh sixth resistor R76 and the first end of a third capacitor C32;
the eighth pin of the first two-chip IC12 is respectively connected to the second end of the seventh fifth resistor R75, the first end of the seventh third resistor R73, the first end of the seventh fourth resistor R74, and the fourth pin of the third two-chip IC 32; a first end of the seventh fifth resistor R75 is connected with a first end of the seventh sixth resistor R76;
a first pin of the third chip IC31 is respectively connected to a cathode of the third diode D37 and a first end of the eighth resistor R82;
a third pin of the third chip IC31 is respectively connected to the anode of the third eight diode D38 and the first end of the seventh resistor R77; the second end of the seventh resistor R77 is connected with the base of the ninth triode BG 9;
a first pin of the third chip IC32 is connected to a cathode of a third ninth diode D39, a first end of a seventh second resistor R72, and a first end of an eighth third resistor R83, respectively; a second end of the seventh second resistor R72 is connected to a cathode of the fourth eighth diode D48, and a second end of the eighth third resistor R83 is connected to a cathode of the fourth seventh diode D47.
The power supply circuit comprises a third four-chip IC34, a fourth diode D42, a third first capacitor C31, a third capacitor C33, a fourth third capacitor C43 and a fourth capacitor C44;
a first pin (Vin pin) of the third fourth chip IC34 is respectively connected to a cathode of the fourth second diode D42, a first end of the third capacitor C31, and a first end of the fourth capacitor C43;
a third pin (Vout pin) of the third fourth chip IC34 is respectively connected with a first end of a third capacitor C33 and a first end of a fourth capacitor C44;
a second pin (GND pin) of the third fourth chip IC34 is connected to the second terminal of the third capacitor C31, the second terminal of the third capacitor C33, the second terminal of the fourth capacitor C43, and the second terminal of the fourth capacitor C44, respectively;
the anti-collision monitoring system further comprises a data input control circuit. FIG. 4 is a circuit diagram of a data input control circuit according to an embodiment of the present invention; referring to fig. 4, in an embodiment of the invention, the data input control circuit includes a fifth chip IC35, a first transistor BG11, a first transistor BG12, a first crystal oscillator Y1, a first battery BT1, a plurality of capacitors, a plurality of resistors, and a plurality of switches;
a first pin of the third fifth chip IC35 is respectively connected to the second end of the eighth resistor R8, the negative electrode of the first battery BT1, the second end of the third fourth capacitor C34, the first end of the fourth fifth capacitor C45 and the first end of the fourth sixth capacitor C46;
a second pin of the third fifth chip IC35 is connected to a second end of the fourth fifth capacitor C45 and a first end of the first crystal oscillator Y1, respectively;
a third pin of the fifth chip IC35 is connected to the second terminal of the first crystal oscillator Y1 and the second terminal of the fourth sixth capacitor C46, respectively;
a fourth pin of the third five-chip IC35 is respectively connected to the first end of the first switch, the first end of the second switch, and the first end of the first switch;
a fifth pin of the third fifth chip IC35 is connected to a first end of the third switch and a first end of the fourth switch respectively;
a sixth pin of the third fifth chip IC35 is connected to the first end of the fifth switch and the first end of the sixth switch respectively;
a seventh pin of the third fifth chip IC35 is connected to the first end of the seventh switch and the first end of the eighth switch, respectively;
an eighth pin of the fifth chip IC35 is connected to a first end of a ninth switch;
a ninth pin of the third fifth chip IC35 is connected to the first end of the first zero switch and the first end of the first second switch respectively;
a first zero pin of the third fifth chip IC35 is connected to the anode of the fourth fifth diode D45, the second terminal of the first switch, the second terminal of the third switch, the second terminal of the fifth switch, the second terminal of the seventh switch,
A first pin of the third fifth chip IC35 is connected to the anode of the fourth third diode D43, the second end of the second switch, the second end of the fourth switch, the second end of the sixth switch, the second end of the eighth switch, the second end of the ninth switch, and the second end of the first zero switch, respectively;
a first two-pin of the third five-chip IC35 is respectively connected to the anode of the fourth four-diode D44, the second end of the first one-to-one switch, and the second end of the first two-to-one switch;
a first three pins of the third fifth chip IC35 are respectively connected to a cathode of a fourth fifth diode D45, a cathode of a fourth third diode D43, and a cathode of a fourth diode D44;
a first five pin of the third five-chip IC35 is connected with a base electrode of a first diode BG12 through an eighth zero resistor R80;
a sixth pin of the third five-chip IC35 is respectively connected to an emitter of a first triode BG12, a collector of a first triode BG11, an anode of a first battery BT1, and a first end of a third four-capacitor C34;
a collector of the first triode BG12 is connected to a base of the first triode BG11, an emitter of the first triode BG11 is connected to an anode of the fifth diode D5, and a cathode of the fifth diode D5 is connected to a first end of the eighth resistor R8.
The invention further discloses an anti-collision monitoring method of the anti-collision monitoring system for the height limiting frame of the highway, railway and bridge, wherein the anti-collision monitoring method comprises the following steps:
the vehicle superelevation detection device detects whether vehicles are exceeded or not, and sends detected data to the information processing device;
the collision monitoring device senses whether a vibration signal meeting a set threshold value exists or not; the collision monitoring device sends the detected vibration signal to the information processing device;
the information processing device controls the video acquisition device to work according to the data detected by the vehicle ultrahigh detection device and the collision monitoring device; and when an abnormal condition occurs, controlling the corresponding camera device to work and controlling the alarm device to give an alarm.
In an embodiment of the present invention, the collision avoidance monitoring method further includes:
the information processing device sends an alarm signal to a server and sends setting information to the server;
and the server sends an alarm signal to the set mobile terminal and sends the set information to the corresponding mobile terminal.
In a use scene of the invention, the vehicle superelevation detection device consists of 2 laser sensors, and the laser sensors are emitted in parallel to a road according to a certain crossing angle, so that the superelevation vehicle can be ensured to be detected and warned in advance. The collision monitoring device identifies collision accidents by adopting an angle or vibration monitoring technology. And a low-power consumption dormancy technology is adopted, and the system is automatically awakened when the collision strength exceeds a set threshold value.
The video acquisition device consists of 2 cameras and is used for respectively monitoring the height limiting frame and the bridge body. The video acquisition device adopts a low-power-consumption dormancy technology, and is awakened by the collision monitoring device when collision occurs. And after the video acquisition device receives the alarm signal of the collision monitoring device, images and videos of the height limiting frame and the bridge are acquired in time.
The information processing device receives the measuring point information, the alarm time, the acceleration data, the pictures, the videos and the like of the collision detection device and the video acquisition device, forms alarm data according to a convention protocol format, and uploads the alarm data according to a convention interface requirement.
The power supply unit supplies power independently to the night light supplementing module and the video acquisition device. The solar panel is used for charging the battery, and under the condition of sufficient sunlight, 70% of electric quantity of the battery is supplemented within 8 hours; under the condition of not supplementing the electric quantity, the full capacity of the configured battery can support the video acquisition device for not less than 96 hours of working time.
The event management platform is built by adopting a C/S framework based on business requirements, can meet the comprehensive management of various information such as system equipment, related personnel, sites, events and the like, and can provide 2 versions for platform task handling and mobile terminal linkage event handling according to user requirements. The mobile terminal module can remotely check detailed information and a field real-time video of the alarm event, and can complete filling and reporting of field basic information. And the simultaneous access of multiple terminals is supported, and the linkage management of multiple persons on events is supported.
In a use scene of the invention, the anti-collision monitoring system for the height limiting frame of the highway, railway and bridge has the following characteristics:
firstly, environmental requirements are met: the ambient temperature is-30 ℃ to +50 ℃. Ambient relative humidity < 95%.
A collision monitoring device is provided: the device should meet the following requirements:
measurement range: angle: 0-45 °, acceleration: 0 to 20g.
Detection precision: angle: 0.5 °, acceleration: 0.3 g.
And (3) alarm mode: trigger mode, threshold configurable.
Response time: less than or equal to 1 second.
Protection grade: IP 67.
The anti-vibration is to bear the sine steady-state vibration with the acceleration of 1g when the frequency is 10 Hz-500 Hz.
Impact resistance: should be able to withstand 10g/6ms impact.
The video acquisition device: the device should meet the following requirements:
device pairing: the device can be bound with a collision monitoring device, and the non-binding relation can not be communicated with each other and carry out data interaction.
Image acquisition: not less than 5 live pictures and not less than 1 minute of video information are collected each time, and a storage copy is kept locally.
The image quality should satisfy TJ/DW 022.
The parameters can be configured: the configuration can be completed by using a handheld configuration terminal, and the configuration comprises functions of measuring point number setting, video capturing duration setting, uploading interface address configuration, collision detection device binding setting and the like; the handheld configuration device can download relevant service data, heartbeat data and relevant log information in the video acquisition device.
Fourth, power supply of the equipment: the night light supplementing module and the video acquisition device are independently powered. The solar panel is used for charging the battery, and under the condition of sufficient sunlight, 70% of electric quantity of the battery is supplemented within 8 hours; under the condition of not supplementing the electric quantity, the full capacity of the configured battery can support the video acquisition device for not less than 96 hours of working time.
The mechanical requirement is as follows: the system installation complies with the TB10415-2003 requirements.
Sixthly, alarming time: less than 10 s.
Precision of carriage-and-carriage: the false alarm rate of the system is as follows: the statistical period is 12 months, and the false alarm frequency of each device is not more than 1 per month. The system should not be alarmed by mistake.
And maintainability: the hardware equipment of the system is convenient to replace and maintain, and the mean time to failure recovery of the system is as follows: MTTR is less than or equal to 2 h.
Life of the self-supporting device: the equipment is operated for no less than 36 months. The battery is built in, and the battery operation time is not less than 24 months.
In one embodiment, the anti-collision monitoring system for the height limiting frame of the highway, railway and bridge simultaneously has the following characteristics:
the method includes the steps of carrying out ultrahigh detection on passing vehicles in real time and carrying out early warning.
The state of the height limiting frame is monitored on line, and alarm data are automatically uploaded when the height limiting frame collides and an alarm threshold is reached.
And thirdly, automatically acquiring the on-site picture and video information after the height limiting frame is collided.
And fourthly, uploading the alarm data to a related management platform in a wireless or wired mode through an appointed interface.
The collision monitoring device, the video acquisition device and the information processing device upload the equipment state information according to the heartbeat information definition in the interface specification and the appointed time.
Sixthly, setting or adjusting system parameters on site in a wireless mode. Including work point information, monitoring threshold values, sampling periods, uploading interface addresses and the like.
In conclusion, the anti-collision monitoring system and method for the height-limiting frame of the highway/railway bridge, provided by the invention, can monitor the height-limiting frame of the highway/railway bridge in real time, send out warning information before danger occurs, and give an alarm in time after the danger occurs.
It should be noted that the present application may be implemented in software and/or a combination of software and hardware; for example, it may be implemented using Application Specific Integrated Circuits (ASICs), general purpose computers, or any other similar hardware devices. In some embodiments, the software programs of the present application may be executed by a processor to implement the above steps or functions. As such, the software programs (including associated data structures) of the present application can be stored in a computer-readable recording medium; such as RAM memory, magnetic or optical drives or diskettes, and the like. In addition, some steps or functions of the present application may be implemented using hardware; for example, as circuitry that cooperates with the processor to perform various steps or functions.
The technical features of the embodiments described above may be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the embodiments described above are not described, but should be considered as being within the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The description and applications of the invention herein are illustrative and are not intended to limit the scope of the invention to the embodiments described above. Effects or advantages referred to in the embodiments may not be reflected in the embodiments due to interference of various factors, and the description of the effects or advantages is not intended to limit the embodiments. Variations and modifications of the embodiments disclosed herein are possible, and alternative and equivalent various components of the embodiments will be apparent to those skilled in the art. It will be clear to those skilled in the art that the present invention may be embodied in other forms, structures, arrangements, proportions, and with other components, materials, and parts, without departing from the spirit or essential characteristics thereof. Other variations and modifications of the embodiments disclosed herein may be made without departing from the scope and spirit of the invention.
Claims (10)
1. The utility model provides a highway railway bridge limit for height frame anticollision monitoring system which characterized in that, anticollision monitoring system includes: the system comprises a vehicle ultrahigh detection device, a collision monitoring device, a video acquisition device, an information processing device and an alarm device;
the information processing device is respectively connected with the vehicle ultrahigh detection device, the collision monitoring device, the video acquisition device and the alarm device;
the vehicle ultrahigh detection device comprises at least two laser sensors, and each laser sensor is ejected out in parallel to the road according to a set intersection angle; the output end of the vehicle ultrahigh detection device is connected with the input end of the information processing device and used for sending the detected data to the information processing device;
the collision monitoring device comprises a vibration sensor for sensing a vibration signal; the output end of the vibration sensor is connected with the input end of the information processing device and used for sending the detected vibration signal to the information processing device;
the video acquisition device comprises two camera devices which respectively monitor the height limiting frame and the bridge body; the two camera devices are connected with the information processing device and respectively collect the image or/and video data of the height limiting frame and the bridge under the control of the information processing device; the output ends of the two camera devices are connected with the input end of the information processing device and used for sending the acquired data to the information processing device;
the alarm device is used for sending alarm information; the output end of the information processing device is connected with the input end of the alarm device and used for sending a control signal to the alarm device.
2. The highway-railway bridge height-limiting anti-collision monitoring system according to claim 1, wherein:
the video acquisition device further comprises a power supply unit, wherein the power supply unit is respectively connected with the two camera devices and supplies power to the two camera devices.
3. The highway-railway bridge height-limiting anti-collision monitoring system according to claim 2, wherein:
the anti-collision monitoring system further comprises a solar charging device, wherein the solar charging device is connected with the power supply unit and can charge the power supply unit by utilizing solar energy.
4. The highway-railway bridge height-limiting anti-collision monitoring system according to claim 2, wherein:
the video acquisition device further comprises a night light supplementing unit, the power supply unit is connected with the night light supplementing unit and can supply power to the night light supplementing unit.
5. The highway-railway bridge height-limiting anti-collision monitoring system according to claim 1, wherein:
the anti-collision monitoring system further comprises a server and at least one mobile terminal, wherein the server is respectively connected with each mobile terminal; the information processing device is connected with the server through a communication module and can perform data interaction with the server.
6. The highway-railway bridge height-limiting anti-collision monitoring system according to claim 1, wherein:
the information processing device comprises an information processing circuit used for processing signals detected by the vehicle superelevation detection device, and the information processing circuit comprises a third chip IC33, a first processor U1, a plurality of first processing units and a plurality of second processing units; the third chip IC33 is connected to the first processor U1, the first processing units, and the second processing units, respectively, and the first processor U1 is connected to the first processing units and the second processing units, respectively.
The first processing unit comprises a first chip IC1, a first three-chip IC13, a second four-chip IC24, a first triode BG1, a first diode D1, a second eight-diode D28, a plurality of capacitors and a plurality of resistors.
A first pin of the first chip IC1 is connected to an emitter of a first triode BG1, a first end of a first sixth capacitor C16, a first end of a fourth sixth resistor R46, a second end of an eighth fourth resistor R84, and a second pin of a second fourth chip IC 24;
the second pin of the first chip IC1 is connected to the second end of the first capacitor C1, the sixth pin of the first chip IC1, the second end of the fourth sixth resistor R46, the second end of the second resistor R2, and the third pin of the second fourth chip IC 24; the third pin of the first chip IC1 is respectively connected with the first end of a fourth eight resistor R48 and the second end of a first resistor R1;
the fourth pin of the first chip IC1 is respectively connected with the first end of the first capacitor C1, the first end of the second resistor R2, the eighth pin of the first chip IC1 and the second end of the third resistor R3;
a second end of the first sixth capacitor C16 is connected to a fourth pin of the second fourth chip IC24 and a second end of the fourth eighth resistor R48, respectively;
a first pin of the first three-chip IC13 is connected with a live wire, and a third pin of the first three-chip IC13 is respectively connected with the negative electrode of a first diode D1 and the first end of a third resistor R3; a fourth pin of the first three-chip IC13 is a ground pin and is respectively connected to the anode of the first diode D1 and the collector of the first triode BG 1;
the base electrode of the first triode BG1 is respectively connected with the first end of a first resistor R1 and the first end of an eighth fourth resistor R84;
a first pin of the second fourth chip IC24 is connected to a first end of a fourth seventh resistor R47, a second end of the fourth seventh resistor R47 is connected to a cathode of a second eight diode D28, and an anode of the second eight diode D28 is connected to the third chip IC 33;
the second processing unit comprises an eighth chip IC8, a second zero chip IC20, a first controlled silicon Q1, a plurality of diodes, a plurality of capacitors and a plurality of resistors;
the first pin of the eighth chip IC8 is connected to the second pin of the eighth chip IC8, the second end of the eighth capacitor C8, the second end of the ninth capacitor C9, the cathode of the first diode D12, the second end of the second seven resistor R27, the cathode of the first diode D11, the cathode of the fourth nine diode D49, the first end of the second five capacitor C25, and the first end of the first S switch S1, respectively;
a third pin of the eighth chip IC8 is connected to a first end of an eighth capacitor C8; a fourth pin of the eighth chip IC8 is respectively connected to the first end of the ninth capacitor C9, the second end of the second fifth resistor R25, and the anode of the first diode D12;
a fifth pin of the eighth chip IC8 is respectively connected to a cathode of the first zero diode D10, an anode of the first one-to-one diode D11, a first end of the second seventh resistor R27, and a fourth pin of the second zero chip IC 20;
the sixth pin of the eighth chip IC8 is connected to the seventh pin of the eighth chip IC8, the anode of the first zero diode D10, the second end of the third fifth capacitor C35, the anode of the fourth nine diode D49, the second end of the second fifth capacitor C25, the anode of the eighth diode D8, and the third pin of the second zero chip IC 20;
an eighth pin of the eighth chip IC8 is connected to a second end of a second fourth resistor R24; a first end of the second fourth resistor R24 is respectively connected with a first end of the third fifth capacitor C35 and a control electrode of the first controlled silicon Q1; the anode of the first controlled silicon Q1 is respectively connected with the live wire and the second end of the first S switch S1; the cathodes of the first silicon controlled rectifiers Q1 are respectively connected with a zero line;
a first pin of the second zero-chip IC20 is connected to a second end of a second sixth resistor R26, a first end of the second sixth resistor R26 is connected to a cathode of a ninth diode D9, and an anode of the ninth diode D9 is connected to a third chip IC 33;
a first end of the second fifth resistor R25 is respectively connected with a second end of the second third resistor R23 and a zero line; the first end of the second third resistor R23 is connected to the second end of the second resistor R22, and the first end of the second resistor R22 is connected to the cathode of the eighth diode D8.
7. The highway-railway bridge height-limiting anti-collision monitoring system according to claim 1, wherein:
the alarm device comprises an alarm circuit, and the anti-collision monitoring system comprises a power circuit;
the alarm circuit comprises a first second chip IC12, a third chip IC31, a third second chip IC32, a ninth triode BG9, a plurality of diodes, a plurality of capacitors and a plurality of resistors;
the first pin of the first two-chip IC12 is respectively connected to the second end of the fourth second capacitor C42, the second end of the third second capacitor C32, the emitter of the ninth triode BG9, the first end of the fourth capacitor C41, the second pin of the third chip IC31, the anode of the third diode D37, the third pin of the third two-chip IC32, the second pin of the third two-chip IC32, and the anode of the third nine diode D39;
the second pin of the first two-chip IC12 is respectively connected with the second end of a fourth capacitor C41, the second end of a seventh third resistor R73 and the fourth pin of a third two-chip IC 32;
the third pin of the first diode IC12 is connected with the positive electrode of a fourth diode D41; the cathode of the fourth diode D41 is connected with the cathode of the third eight diode D38;
a fourth pin of the first diode chip IC12 is respectively connected with a collector of a ninth triode BG9 and a second end of a seventh fourth resistor R74;
the fifth pin of the first two-chip IC12 is connected with the first end of a fourth capacitor C42; the sixth pin of the first two-chip IC12 is respectively connected with the seventh pin of the first two-chip IC12, the second end of a seventh sixth resistor R76 and the first end of a third capacitor C32;
the eighth pin of the first two-chip IC12 is respectively connected to the second end of the seventh fifth resistor R75, the first end of the seventh third resistor R73, the first end of the seventh fourth resistor R74, and the fourth pin of the third two-chip IC 32; a first end of the seventh fifth resistor R75 is connected with a first end of the seventh sixth resistor R76;
a first pin of the third chip IC31 is respectively connected to a cathode of the third diode D37 and a first end of the eighth resistor R82;
a third pin of the third chip IC31 is respectively connected to the anode of the third eight diode D38 and the first end of the seventh resistor R77; the second end of the seventh resistor R77 is connected with the base of the ninth triode BG 9;
a first pin of the third chip IC32 is connected to a cathode of a third ninth diode D39, a first end of a seventh second resistor R72, and a first end of an eighth third resistor R83, respectively; a second end of the seventh second resistor R72 is connected to a cathode of the fourth eighth diode D48, and a second end of the eighth third resistor R83 is connected to a cathode of the fourth seventh diode D47;
the power supply circuit comprises a third four-chip IC34, a fourth diode D42, a third first capacitor C31, a third capacitor C33, a fourth third capacitor C43 and a fourth capacitor C44;
a first pin Vin of the third fourth chip IC34 is respectively connected to a cathode of a fourth diode D42, a first end of a third capacitor C31, and a first end of a fourth capacitor C43;
a third pin Vout of the third fourth chip IC34 is respectively connected with a first end of a third capacitor C33 and a first end of a fourth capacitor C44;
and a second pin GND pin of the third fourth chip IC34 is respectively connected to a second end of the third capacitor C31, a second end of the third capacitor C33, a second end of the fourth capacitor C43, and a second end of the fourth capacitor C44.
8. The highway-railway bridge height-limiting anti-collision monitoring system according to claim 1, wherein:
the anti-collision monitoring system comprises a data input control circuit;
the data input control circuit comprises a third five-chip IC35, a first triode BG11, a first triode BG12, a first crystal oscillator Y1, a first battery BT1, a plurality of capacitors, a plurality of resistors and a plurality of switches;
a first pin of the third fifth chip IC35 is respectively connected to the second end of the eighth resistor R8, the negative electrode of the first battery BT1, the second end of the third fourth capacitor C34, the first end of the fourth fifth capacitor C45 and the first end of the fourth sixth capacitor C46;
a second pin of the third fifth chip IC35 is connected to a second end of the fourth fifth capacitor C45 and a first end of the first crystal oscillator Y1, respectively;
a third pin of the fifth chip IC35 is connected to the second terminal of the first crystal oscillator Y1 and the second terminal of the fourth sixth capacitor C46, respectively;
a fourth pin of the third five-chip IC35 is respectively connected to the first end of the first switch, the first end of the second switch, and the first end of the first switch;
a fifth pin of the third fifth chip IC35 is connected to a first end of the third switch and a first end of the fourth switch respectively;
a sixth pin of the third fifth chip IC35 is connected to the first end of the fifth switch and the first end of the sixth switch respectively;
a seventh pin of the third fifth chip IC35 is connected to the first end of the seventh switch and the first end of the eighth switch, respectively;
an eighth pin of the fifth chip IC35 is connected to a first end of a ninth switch;
a ninth pin of the third fifth chip IC35 is connected to the first end of the first zero switch and the first end of the first second switch respectively;
a first zero pin of the third fifth chip IC35 is connected to the anode of the fourth fifth diode D45, the second terminal of the first switch, the second terminal of the third switch, the second terminal of the fifth switch, the second terminal of the seventh switch,
A first pin of the third fifth chip IC35 is connected to the anode of the fourth third diode D43, the second end of the second switch, the second end of the fourth switch, the second end of the sixth switch, the second end of the eighth switch, the second end of the ninth switch, and the second end of the first zero switch, respectively;
a first two-pin of the third five-chip IC35 is respectively connected to the anode of the fourth four-diode D44, the second end of the first one-to-one switch, and the second end of the first two-to-one switch;
a first three pins of the third fifth chip IC35 are respectively connected to a cathode of a fourth fifth diode D45, a cathode of a fourth third diode D43, and a cathode of a fourth diode D44;
a first five pin of the third five-chip IC35 is connected with a base electrode of a first diode BG12 through an eighth zero resistor R80;
a sixth pin of the third five-chip IC35 is respectively connected to an emitter of a first triode BG12, a collector of a first triode BG11, an anode of a first battery BT1, and a first end of a third four-capacitor C34;
a collector of the first triode BG12 is connected to a base of the first triode BG11, an emitter of the first triode BG11 is connected to an anode of the fifth diode D5, and a cathode of the fifth diode D5 is connected to a first end of the eighth resistor R8.
9. An anti-collision monitoring method of the highway/railway bridge height-limiting anti-collision monitoring system according to any one of claims 1 to 8, wherein the anti-collision monitoring method comprises the following steps:
the vehicle superelevation detection device detects whether vehicles are exceeded or not, and sends detected data to the information processing device;
the collision monitoring device senses whether a vibration signal meeting a set threshold value exists or not; the collision monitoring device sends the detected vibration signal to the information processing device;
the information processing device controls the video acquisition device to work according to the data detected by the vehicle ultrahigh detection device and the collision monitoring device; and when an abnormal condition occurs, controlling the corresponding camera device to work and controlling the alarm device to give an alarm.
10. The collision avoidance monitoring method of claim 9, wherein:
the anti-collision monitoring method further comprises the following steps:
the information processing device sends an alarm signal to a server and sends setting information to the server;
and the server sends an alarm signal to the set mobile terminal and sends the set information to the corresponding mobile terminal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN202111328899.6A CN113933860A (en) | 2021-11-10 | 2021-11-10 | Anti-collision monitoring system and method for height limiting frame of highway, railway and bridge |
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| CN202111328899.6A CN113933860A (en) | 2021-11-10 | 2021-11-10 | Anti-collision monitoring system and method for height limiting frame of highway, railway and bridge |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117470116A (en) * | 2023-12-28 | 2024-01-30 | 欧梯恩智能科技(苏州)有限公司 | Bridge collision monitoring system and method |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117470116A (en) * | 2023-12-28 | 2024-01-30 | 欧梯恩智能科技(苏州)有限公司 | Bridge collision monitoring system and method |
| CN117470116B (en) * | 2023-12-28 | 2024-03-08 | 欧梯恩智能科技(苏州)有限公司 | Bridge collision monitoring system and method |
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