CN113922381A - Dynamic Voltage Restorer (DVR) device and control method thereof - Google Patents

Dynamic Voltage Restorer (DVR) device and control method thereof Download PDF

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Publication number
CN113922381A
CN113922381A CN202111518539.2A CN202111518539A CN113922381A CN 113922381 A CN113922381 A CN 113922381A CN 202111518539 A CN202111518539 A CN 202111518539A CN 113922381 A CN113922381 A CN 113922381A
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phase
voltage
adder
dvr
output
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CN113922381B (en
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陈伟
渠学景
丁小刚
张建绮
李建
黄新宇
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Pushon Beijing Electric Co ltd
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Pushon Beijing Electric Co ltd
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00Circuit arrangements for ac mains or ac distribution networks
    • H02J3/12Circuit arrangements for ac mains or ac distribution networks for adjusting voltage in ac networks by changing a characteristic of the network load
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00Circuit arrangements for ac mains or ac distribution networks
    • H02J3/01Arrangements for reducing harmonics or ripples
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00Circuit arrangements for ac mains or ac distribution networks
    • H02J3/12Circuit arrangements for ac mains or ac distribution networks for adjusting voltage in ac networks by changing a characteristic of the network load
    • H02J3/16Circuit arrangements for ac mains or ac distribution networks for adjusting voltage in ac networks by changing a characteristic of the network load by adjustment of reactive power
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00Circuit arrangements for ac mains or ac distribution networks
    • H02J3/28Arrangements for balancing of the load in a network by storage of energy
    • H02J3/32Arrangements for balancing of the load in a network by storage of energy using batteries with converting means
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00Circuit arrangements for ac mains or ac distribution networks
    • H02J3/38Arrangements for parallely feeding a single network by two or more generators, converters or transformers
    • H02J3/40Synchronising a generator for connection to a network or to another generator
    • H02J3/42Synchronising a generator for connection to a network or to another generator with automatic parallel connection when synchronisation is achieved
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • H02M7/53871Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J2203/00Indexing scheme relating to details of circuit arrangements for AC mains or AC distribution networks
    • H02J2203/20Simulating, e g planning, reliability check, modelling or computer assisted design [CAD]
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E40/00Technologies for an efficient electrical power generation, transmission or distribution
    • Y02E40/30Reactive power compensation
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E40/00Technologies for an efficient electrical power generation, transmission or distribution
    • Y02E40/40Arrangements for reducing harmonics

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

The invention provides a Dynamic Voltage Restorer (DVR) device and a control method thereof. When the voltage of the power grid is normal, the DVR device can adjust the phase and frequency of the current of the bypass unit in real time according to a default strategy, compensate the reactive power and control the harmonic wave, thereby playing the roles of improving the power environment of a sensitive load and improving the quality of electric energy; when the voltage of the power grid has a transient problem, the DVR device can quickly switch a new strategy, directly output three-phase alternating voltage with stable amplitude and frequency required by a load and complete quick active turn-off of a thyristor; when the transient problem of the voltage of the power grid is eliminated, the DVR device can quickly recover the power supply of the power grid and enter the default working state again.

Description

Dynamic Voltage Restorer (DVR) device and control method thereof
Technical Field
The invention belongs to the field of power quality management, and particularly relates to a Dynamic Voltage Restorer (DVR) device and a control method thereof.
Background
In recent years, the progress of high and new technologies, especially the rapid advance of information technologies, the proportion of some complex and high-precision power electronic devices in the load of a power system is higher and higher, on one hand, higher requirements are provided for power supply reliability and continuity, on the other hand, power supply interruption or voltage temporary rise and voltage temporary drop in a plurality of periods can bring important impact to the normal operation state of the components, and production shutdown or product line product scrapping can be caused in serious cases, so that a large amount of economic loss is caused; on the other hand, the sensitive load itself has the problem of electric energy quality such as idle work, harmonic wave, negative sequence, etc., and corresponding electric energy quality control measures need to be taken.
A Dynamic Voltage Restorer (DVR) is commonly used in a smart grid to solve the problem of voltage instability in power supply. The main problem solved by the current DVR is the transient state (transient state expression when the power grid is normal, the power supply of the load is provided by a bypass unit, and other parts of the DVR are in standby at this time) problem of the power grid voltage; when the voltage transient problem occurs to the power grid, the DVR bypass unit exits, and the inverter unit is put into use, so that the load voltage is kept stable; when the voltage of the power grid is recovered, the DVR inversion unit exits, the bypass unit is put into use, and the DVR enters the standby state again.
The prior art CN104201685A provides a method and a system for rapidly turning off a bypass thyristor of a medium-voltage dynamic voltage restorer, which detects the direction of current at the moment of voltage drop, converts the current signal into a proportional voltage signal, compares the proportional voltage signal with the 0 level to obtain a square wave signal, the high level part and the low level part of the square wave signal respectively indicate the direction of current flowing through a bypass circuit, controls an IGBT of an inverter circuit, and applies a voltage opposite to the direction of current at two ends of the bypass circuit, thereby rapidly turning off the thyristor and rapidly putting DVR into compensation. The method has the advantages that the switching of two states of the thyristor is turned off and the inverted voltage is output, the process is complex, the square wave output by the inverted circuit at the moment of turning off the thyristor generates larger impact and harmonic influence on the load, and unpredictable damage or influence on a sensitive load can be generated. In addition, the topology of the prior art CN104201685A is also substantially different from the present application.
In the prior art, CN 113394791 a proposes a technology for implementing thyristor turn-off by current transfer, in this way, when the voltage sag of the power grid is large (e.g., over 50%) or short-term interruption (e.g., switching), the strategy for inversion of the inversion unit causes an increase in the instantaneous transfer current of the inversion unit, which leads to overcurrent of the inversion unit and failure of transient compensation; in addition, under the condition of high load harmonic content, the inverter unit needs to follow the load current to actively output harmonic waves, resonance between the inverter unit and the load can be brought, control is out of control, and transient compensation fails.
The existing control strategy and algorithm of the DVR mainly have three problems: firstly, only a transient voltage compensation strategy is configured, the DVR is in a standby state for most of time, and the utilization rate of the device is low; secondly, the compensation algorithm is single, when the DVR compensates the voltage, the influence of the phase and the harmonic of the load current on the switching of the bypass unit is ignored, the risk of large switching impact or switching failure exists, and the influence is eliminated, and a load current correction device is generally required to be configured independently, so that the resource waste of the DVR is caused; and thirdly, the DVR adopts a thyristor switch to isolate the power grid fault, but the thyristor switch is a semi-control device, can control the conduction time, cannot control the turn-off time, can only wait for the natural zero-crossing of the current, has the longest waiting time reaching half cycle of the power grid (10 ms in China), and is not suitable for the working condition of fast voltage transient problem treatment.
Therefore, there is a need to develop a power electronic device DVR that can implement different compensation strategies according to the voltage status of the power grid and can ensure the reliability and stability of the load power utilization.
Disclosure of Invention
The invention provides a DVR device and a control method thereof, which can implement different compensation strategies according to the voltage state of a power grid and can ensure the functions of load power utilization reliability, stability and the like.
The technical problem to be solved by the invention is realized by adopting the following technical scheme:
a DVR device, characterized by: the device comprises a power side A-phase wiring terminal, a power side B-phase wiring terminal, a power side C-phase wiring terminal, a load side A-phase wiring terminal, a load side B-phase wiring terminal, a load side C-phase wiring terminal, a bypass unit, a direct current energy storage unit, an output connection unit, an inversion unit, a DVR arc angle calculation module and a DVR steady state compensation control module;
the bypass unit comprises an A-phase first thyristor, an A-phase second thyristor, a B-phase first thyristor, a B-phase second thyristor, a C-phase first thyristor and a C-phase second thyristor;
the direct current energy storage unit comprises a direct current energy storage capacitor, and the terminal voltage of the direct current energy storage capacitor is Udc;
the output connection unit comprises an A-phase connection reactor, a B-phase connection reactor and a C-phase connection reactor;
the inverter unit comprises an A-phase upper bridge arm diode, an A-phase upper bridge arm IGBT, a B-phase upper bridge arm diode, a B-phase upper bridge arm IGBT, a C-phase upper bridge arm diode, a C-phase upper bridge arm IGBT, an A-phase lower bridge arm diode, an A-phase lower bridge arm IGBT, a B-phase lower bridge arm diode, a C-phase lower bridge arm diode and a C-phase lower bridge arm IGBT;
the DVR arc angle calculation module is used for setting a value omega based on preset angular frequency0Calculating the working voltage arc angle thetas of the DVR;
and the DVR steady-state compensation control module is used for adjusting the phase and frequency of the current of the bypass unit in real time based on the DVR working voltage arc angle theta s obtained by the DVR arc angle calculation module.
DVR arc angle calculation module includes: first conversion circuit, first adder, first proportional integral controller, first adderA selection switch and a second adder; the first conversion circuit is used for converting voltage signals Ua1, Ub1 and Uc1 at three wiring terminal positions of a power supply side phase A wiring terminal, a power supply side phase B wiring terminal and a power supply side phase C wiring terminal from an abc static coordinate system to a dq rotation coordinate system to obtain a first direct-axis voltage component Ud1 and a first quadrature-axis voltage component Uq 1; inputting the first quadrature axis voltage components Uq1 and 0 into a "-" terminal and a "+" terminal of the first adder, respectively, inputting an output value of the first adder into the first proportional integral controller, connecting an output end of the first proportional integral controller to a second terminal of the first selector switch, connecting a third terminal of the first selector switch to 0, connecting a first terminal of the first selector switch to the "+" terminal of the second adder, and connecting another "+" terminal of the second adder to an angular frequency constant value ω0The output end of the second adder is used for calculating angular frequency omega; and integrating the calculated angular frequency omega, and outputting the DVR working voltage arc angle theta s as a transformation reference angle from each abc static coordinate system to a dq rotating coordinate system.
The DVR steady-state compensation control module comprises a second conversion circuit, a third adder, a fourth adder, a fifth adder, a sixth adder, a seventh adder, a second proportional-integral controller, a first pulse width modulator and a second selection switch; acquiring a voltage Udc signal of the direct current energy storage unit, inputting the voltage Udc signal to a negative terminal of the third adder, and obtaining a direct current voltage target value
Figure 534115DEST_PATH_IMAGE001
The output end of the third adder is input to the input end of the second proportional-integral controller, and the output end of the second proportional-integral controller is connected to the minus end of the fourth adder; acquiring load side three-phase current Ia, Ib and Ic signals, and performing conversion from an abc static coordinate system to a dq rotating coordinate system on the three current signals based on the DVR working voltage arc angle theta s to obtain a direct-axis current component id and a quadrature-axis current component iq; low-pass filtering the direct-axis current component id to eliminate harmonic componentThen, entering the + end of the fourth adder; performing inverse transformation from a dq rotation coordinate system to an abc static coordinate system based on the output result of the fourth adder and 0 and the DVR working voltage arc angle theta s to obtain three-phase current fundamental wave active components Iaf, Ibf and Icf; subtracting the three-phase current fundamental wave active components Iaf, Ibf and Icf from the three-phase current Ia, Ib and Ic at the load side through the fifth adder, the sixth adder and the seventh adder respectively to obtain the DVR three-phase output target current
Figure 86188DEST_PATH_IMAGE002
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And, and
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and outputting the three-phase output target current of the DVR
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And
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the first pulse width modulator is input, PWM 11-PWM 16 signals are output after being controlled by the second selection switch, and when the second selection switch is closed, the PWM 11-PWM 16 signals respectively control the inversion unit, so that the DVR injects the DVR three-phase output target current into a load side phase A connection terminal, a load side phase B connection terminal and a load side phase C connection terminal through three connection reactors of the output connection unit
Figure 387430DEST_PATH_IMAGE008
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And
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the DVR device further comprises a DVR transient compensation control module, wherein the DVR transient compensation control module comprises a fourth conversion circuit, a fifth conversion circuit, an eighth adder, a ninth adder, a tenth adder, an eleventh adder, a twelfth adder, a thirteenth adder, a third proportional-integral controller, a fourth proportional-integral controller, a fifth proportional-integral controller, a sixth proportional-integral controller, a second pulse width modulator, a third selection switch and a fourth selection switch; acquiring voltages Ua2, Ub2 and Uc2 at three positions of a load side phase A connection terminal, a load side phase B connection terminal and a load side phase C connection terminal, respectively carrying out conversion from an abc static coordinate system to a dq rotation coordinate system on the three voltage signals based on a DVR working voltage arc angle theta s to obtain a second direct axis voltage component Ud2 and a second quadrature axis voltage component Uq2, and respectively inputting the voltages into a minus end of the eighth adder and a minus end of the ninth adder; the "+" ends of the eighth adder and the ninth adder are respectively connected with a maintaining voltage Uset and 0, wherein the maintaining voltage Uset is a phase voltage peak value which needs to be maintained by a DVR device during the voltage rising, dropping or short-time interruption; the maintaining voltage Uset is connected to a first end of the fourth selector switch, and a second end and a third end of the fourth selector switch are respectively connected to a first control voltage U1 and a second control voltage U2, wherein the first control voltage U1 is slightly lower than a voltage peak value of a steady-state operation voltage, and the second control voltage U2 is slightly higher than a highest voltage peak value of a temporary rise of a grid voltage; the output ends of the eighth adder and the ninth adder enter the third proportional-integral controller and the fourth proportional-integral controller respectively, the output ends of the third proportional-integral controller and the fourth proportional-integral controller enter the "+" ends of the tenth adder and the eleventh adder respectively, the direct-axis current component id and the quadrature-axis current component iq enter the "-" ends of the tenth adder and the eleventh adder respectively, and the output ends of the tenth adder and the eleventh adder enter the fifth proportional-integral controller and the sixth proportional-integral controller respectivelyThe output ends of the fifth proportional-integral controller and the sixth proportional-integral controller respectively enter one + end of the twelfth adder and one + end of the thirteenth adder, the direct-axis current component id is multiplied by ω L and then enters the other + end of the thirteenth adder, and the quadrature-axis current component iq is multiplied by ω L and then enters the "-" end of the twelfth adder, wherein ω is the calculated angular frequency, and L is the inductance value of three connecting reactors in the output connecting unit; the second direct-axis voltage component Ud2 and the second quadrature-axis voltage component Uq2 enter the other "+" end of the twelfth adder and the thirteenth adder respectively, the output ends of the twelfth adder and the thirteenth adder serve as an output direct-axis voltage component and an output quadrature-axis voltage component respectively, and inverse transformation from a dq rotating coordinate system to an abc static coordinate system is performed based on the DVR working voltage arc angle theta s to obtain a three-phase target voltage
Figure 39625DEST_PATH_IMAGE010
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And
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(ii) a The three-phase target voltage
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Figure 209258DEST_PATH_IMAGE014
And
Figure 33995DEST_PATH_IMAGE015
the output side of the second pulse width modulator is controlled by the third selector switch to output PWM 21-PWM 26 signals; when the third selection switch is closed, the PWM 21-PWM 26 signals respectively control the inverter unit to make the DVR device connected with a phase connection terminal A at a load side and a phase connection terminal B at a load side through three connection reactors of the output connection unitThe line terminal and the load side C-phase wiring terminal respectively generate the three-phase target voltage
Figure 12315DEST_PATH_IMAGE016
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And
Figure 47661DEST_PATH_IMAGE012
further, the second selection switch also controls a thyristor trigger signal Tri simultaneously, when the second selection switch is closed, the thyristor trigger signal Tri =1, and simultaneously sends a gate trigger signal to six thyristors of the bypass unit; when the second selection switch is turned on, the thyristor trigger signal Tri =0 stops sending the gate trigger signal to the six thyristors of the bypass unit.
A control method based on the DVR device specifically comprises the following steps:
step 1, setting all fixed values including the angular frequency fixed value omega0The first control voltage U1, the second control voltage U2, the DC voltage target value
Figure 494954DEST_PATH_IMAGE018
Step 2, when the DVR device enters a steady-state compensation mode, the first end of the first selector switch is communicated with the second end, the second selector switch is closed, the third selector switch is opened, and the first end of the fourth selector switch is communicated with the second end; the first end and the second end of the first selection switch are communicated, so that the DVR device keeps synchronous with the power grid voltage.
The control method further includes: step 3-1, when the voltage of the power grid is temporarily reduced or interrupted in a short time, the first end of the first selector switch is communicated with the third end, the second selector switch is disconnected, the third selector switch is closed, and the first end of the fourth selector switch is communicated with the second end; the sustain voltage Uset is equal to the first control voltage U1.
The control method further includes: step 3-2, when the voltage of the power grid rises temporarily, the first end of the first selector switch is communicated with the third end, the second selector switch is disconnected, the third selector switch is closed, and the first end of the fourth selector switch is firstly communicated with the third end in a short time and then is communicated with the second end again; when a voltage sag occurs in the grid, the holding voltage Uset is briefly the second control voltage U2 and then equals the first control voltage U1.
The control method further includes: and 4, when the DVR device detects that the transient state problem of the power grid voltage disappears, communicating the first end and the second end of the first selection switch to enable the output voltage of the DVR device to be synchronous with the power grid voltage.
The control method further includes: and 5, after the output of the first proportional integral controller is stable, synchronously closing the second selection switch, disconnecting the third selection switch, and stably transitioning the DVR device to a steady-state compensation mode.
Compared with the prior art, the invention has the advantages that:
the invention improves the utilization rate of the DVR device and avoids the device from being standby for a long time. The capacity of the DVR device is generally designed according to the maximum required capacity of a sensitive load, a certain margin is reserved, and in a steady-state compensation mode, the output current of the DVR device is far lower than the rated current, so that the device cannot be overloaded.
The traditional DVR supplies power for the sensitive load only during the transient problem of the voltage of the power grid, and the DVR device can adjust the phase and frequency of the current of the bypass unit in real time when the power grid is in a steady state, compensate the reactive power and control the harmonic wave, thereby achieving the purposes of improving the power environment of the sensitive load and improving the quality of electric energy; when the transient problem of the voltage of the power grid occurs, the DVR can rapidly and continuously output three-phase voltage with stable amplitude and frequency, so that the reliability and the continuity of the power consumption of a sensitive load are ensured, and the harm of the transient problem of the voltage of the power grid is eliminated.
When the traditional DVR starts transient compensation, the inverter unit can supply power for a sensitive load after the current of the thyristor of the bypass unit is shut off at zero crossing, or one thyristor is adopted after the current direction of the bypass thyristor is detectedA complex strategy is set to turn off the thyristor. The invention does not need to detect the current direction, and only needs to fix the parameters of the power grid voltage transient state compensation mode, such as the angular frequency constant value omega0The first control voltage U1, the second control voltage U2 and the like are reasonably set, and the first selection switch, the second selection switch, the third selection switch and the fourth selection switch are switched, so that the DVR device can enter a transient compensation mode from a steady compensation mode, and can automatically finish the rapid turn-off of the thyristor.
When the traditional DVR exits transient compensation, a direct grid connection mode is adopted, so that a sensitive load and the DVR device bear secondary impact, but before the DVR device is connected to the grid, synchronization is recovered firstly, and the operation mode of the device is switched after the output voltage of the inverter is consistent with the voltage phase of a power grid, so that the voltage and the current on the load side are in smooth transition, and the impact on the load device caused by the voltage amplitude and the phase mutation is reduced.
Drawings
FIG. 1 is a diagram of the DVR electrical main wiring;
FIG. 2 is a DVR arc angle calculation module;
FIG. 3 is a DVR steady state compensation control module;
FIG. 4 is a DVR transient (voltage ramp-up, ramp-down, short interruption time) compensation control module;
FIG. 5 is a diagram of a DVR control method;
FIG. 6 is a prior art voltage and current waveform diagram (with inductive load) of the bypass unit thyristor when DVR enters transient compensation;
FIG. 7 is a graph of the load voltage and current waveforms (with inductive load) when DVR enters transient compensation in the prior art;
FIG. 8 is a prior art voltage and current waveform diagram (with capacitive load) of the bypass unit thyristor when DVR enters transient compensation;
FIG. 9 is a prior art voltage and current waveform diagram for a load when DVR is entering transient compensation (with capacitive load);
FIG. 10 is a graph of the voltage and current waveforms of the bypass unit thyristor when the DVR enters transient compensation according to the invention;
FIG. 11 is a graph of the load voltage and current waveforms when the DVR enters transient compensation according to the invention;
FIG. 12 is a prior art voltage and current waveform diagram for the bypass unit thyristor when DVR exits transient compensation;
FIG. 13 is a prior art waveform of the load voltage and current when DVR exits transient compensation;
FIG. 14 is a graph of the voltage and current waveforms of the bypass unit thyristor when DVR is exiting transient compensation, according to the invention;
FIG. 15 is a graph of the load voltage and current waveforms when DVR exits transient compensation, according to the invention.
Detailed Description
The invention is described in further detail below with reference to the accompanying drawings:
a DVR device comprises a power side A phase wiring terminal 1, a power side B phase wiring terminal 2, a power side C phase wiring terminal 3, a load side A phase wiring terminal 10, a load side B phase wiring terminal 11, a load side C phase wiring terminal 12, a bypass unit, a direct current energy storage unit, an output connection unit, an inversion unit, a DVR arc angle calculation module and a DVR steady state compensation control module.
According to the figure 1, the bypass unit comprises a phase A first thyristor 4 and a phase A second thyristor 5, a phase B first thyristor 6 and a phase B second thyristor 7, a phase C first thyristor 8 and a phase C second thyristor 9; the dc energy storage unit comprises a dc energy storage capacitor 28, the terminal voltage of which is Udc; the output connection unit comprises an A-phase connection reactor 13, a B-phase connection reactor 14 and a C-phase connection reactor 15, and the inductance value of the output connection unit is L; the inverter unit comprises an A-phase upper arm diode 16, an A-phase upper arm IGBT17, a B-phase upper arm diode 18, a B-phase upper arm IGBT19, a C-phase upper arm diode 20, a C-phase upper arm IGBT21, an A-phase lower arm diode 22, an A-phase lower arm IGBT23, a B-phase lower arm diode 24, a B-phase lower arm IGBT25, a C-phase lower arm diode 26 and a C-phase lower arm IGBT 27.
The power-side a-phase, power-side B-phase, and power-side C-phase voltage sources are connected to power-side a-phase connection terminal 1, power-side B-phase connection terminal 2, and power-side C-phase connection terminal 3, respectively. The A-phase first thyristor 4 and the A-phase second thyristor 5 are connected in an anti-parallel mode, the anode of the A-phase first thyristor 4 and the cathode of the A-phase second thyristor 5 are connected with the power supply side A-phase wiring terminal 1, and the cathode of the A-phase first thyristor 4 and the anode of the A-phase second thyristor 5 are connected with the load side A-phase wiring terminal 10; the B-phase first thyristor 6 and the B-phase second thyristor 7 are connected in an anti-parallel mode, the anode of the B-phase first thyristor 6 and the cathode of the B-phase second thyristor 7 are connected with the power supply side B-phase wiring terminal 2, and the cathode of the B-phase first thyristor 6 and the anode of the B-phase second thyristor 7 are connected with the load side B-phase wiring terminal 11; the C-phase first thyristor 8 and the C-phase second thyristor 9 are connected in an anti-parallel mode, the anode of the C-phase first thyristor 8 and the cathode of the C-phase second thyristor 9 are connected with the power supply side C-phase wiring terminal 3, and the cathode of the C-phase first thyristor 8 and the anode of the C-phase second thyristor 9 are connected with the load side C-phase wiring terminal 12. Phase-a connection reactor 13 is connected to load-side phase-a connection terminal 10, phase-B connection reactor 14 is connected to load-side phase-B connection terminal 11, and phase-C connection reactor 15 is connected to load-side phase-C connection terminal 12. The A-phase upper arm diode 16 and the A-phase upper arm IGBT17 are connected in an anti-parallel mode, the anode of the A-phase upper arm diode 16 and the emitter of the A-phase upper arm IGBT17 are connected with the A-phase reactor 13, and the cathode of the A-phase upper arm diode 16 and the collector of the A-phase upper arm IGBT17 are connected with the anode of the direct-current energy storage capacitor 28; the B-phase upper arm diode 18 and the B-phase upper arm IGBT19 are connected in an anti-parallel mode, the anode of the B-phase upper arm diode 18 and the emitter of the B-phase upper arm IGBT19 are connected with the B-phase reactor 14, and the cathode of the B-phase upper arm diode 18 and the collector of the B-phase upper arm IGBT19 are connected with the anode of the direct-current energy storage capacitor 28; the C-phase upper arm diode 20 and the C-phase upper arm IGBT21 are connected in an anti-parallel mode, the anode of the C-phase upper arm diode 20 and the emitter of the C-phase upper arm IGBT21 are connected with the C-phase connection reactor 15, and the cathode of the C-phase upper arm diode 20 and the collector of the C-phase upper arm IGBT21 are connected with the anode of the direct-current energy storage capacitor 28; the A-phase lower arm diode 22 and the A-phase lower arm IGBT23 are connected in an anti-parallel mode, the cathode of the A-phase lower arm diode 22 and the collector of the A-phase lower arm IGBT23 are connected with the A-phase connection reactor 13, and the anode of the A-phase lower arm diode 22 and the emitter of the A-phase lower arm IGBT23 are connected with the cathode of the direct current energy storage capacitor 28; the B-phase lower arm diode 24 and the B-phase lower arm IGBT25 are connected in an anti-parallel mode, the cathode of the B-phase lower arm diode 24 and the collector of the B-phase lower arm IGBT25 are connected with the B-phase connection reactor 14, and the anode of the B-phase lower arm diode 24 and the emitter of the B-phase lower arm IGBT25 are connected with the cathode of the direct current energy storage capacitor 28; the C-phase lower arm diode 26 and the C-phase lower arm IGBT27 are connected in an anti-parallel manner, a cathode of the C-phase lower arm diode 26 and a collector of the C-phase lower arm IGBT27 are connected to the C-phase connection reactor 15, and an anode of the C-phase lower arm diode 26 and an emitter of the C-phase lower arm IGBT27 are connected to a cathode of the dc energy storage capacitor 28.
The DVR arc angle calculation module is used for setting a value omega based on preset angular frequency0And calculating the working voltage arc angle thetas of the DVR. Wherein the angular frequency is constant0The method has two important functions, namely accelerating the speed of tracking the radian of the power grid by the radian angle theta s during the normal voltage of the power grid or the recovery of the voltage of the power grid, and providing a fixed angular frequency during the transient problem of the voltage of the power grid to ensure the stability of the voltage frequency at the load side.
In one embodiment, the DVR arc angle calculation module may comprise, as shown in FIG. 2: the circuit comprises a first conversion circuit, a first adder J1, a first proportional integral controller PI1, a first selection switch K1 and a second adder J2; the conversion circuit is used for converting voltage signals Ua1, Ub1 and Uc1 at three wiring terminal positions of a power supply side phase A wiring terminal, a power supply side phase B wiring terminal and a power supply side phase C wiring terminal from an abc static coordinate system to a dq rotation coordinate system to obtain a first straight-axis voltage component Ud1 and a first quadrature-axis voltage component Uq 1; inputting the first quadrature axis voltage components Uq1 and 0 into a "-" terminal and a "+" terminal of the first adder J1, respectively, inputting the output value of the first adder J1 into the first proportional integral controller PI1, connecting the output end of the first proportional integral controller PI1 to the second terminal of the first selector switch K1, connecting the third terminal of the first selector switch K1 to 0, connecting the first terminal of the first selector switch K1 to the "+" terminal of the second adder J2, and connecting the other "+" terminal of the second adder J2 to the angular frequency constant value ω0The second additionThe output end of the law instrument J2 is used for calculating angular frequency omega; and integrating the calculated angular frequency omega, and outputting the DVR working voltage arc angle theta s as a transformation reference angle from each abc static coordinate system to a dq rotating coordinate system.
The DVR steady-state compensation control module is used for adjusting the phase and frequency of the current of the bypass unit in real time based on the DVR working voltage arc angle theta s obtained by the DVR arc angle calculation module. The DVR steady state compensation control module enables the DVR to output target current to a load terminal to enable the current power factor of a bypass unit to be 1, and the harmonic content is approximately 0, so that the utilization rate and economic index of a DVR device are improved, the electric energy quality is improved, and more importantly, conditions are created for fast turn-off of a thyristor.
In one embodiment, according to fig. 3, the DVR steady-state compensation control module may include a second switching circuit, a third adder J3, a fourth adder J4, a fifth adder J5, a sixth adder J6, a seventh adder J7, a second proportional-integral controller PI2, a first pulse width modulator PWM1, and a second selector switch K2; wherein, a voltage Udc signal of the direct current energy storage unit is obtained and input to the "-" end of the second adder J3, and a direct current voltage target value
Figure 857802DEST_PATH_IMAGE019
The output end of the third adder J3 is input to a "+" end of the third adder J3, the output end of the third adder J3 is input to the input end of the second proportional-integral controller PI2, and the output end of the second proportional-integral controller PI2 is connected to a "-" end of the fourth adder J4; acquiring load side three-phase current Ia, Ib and Ic signals, and performing conversion from an abc static coordinate system to a dq rotating coordinate system on the three current signals based on the DVR working voltage arc angle theta s to obtain a direct-axis current component id and a quadrature-axis current component iq; performing low-pass filtering on the direct-axis current component id to eliminate a harmonic component, and then entering a + end of the fourth adder J4; the output result and 0 of the fourth adder J4 are respectively used as a direct-axis current component and an alternating-axis current component, and inverse transformation from a dq rotating coordinate system to an abc static coordinate system is performed based on the DVR working voltage arc angle theta s to obtain the three-phase current fundamental wave active componentAmounts Iaf, Ibf and Icf; subtracting the three-phase current fundamental wave active components Iaf, Ibf and Icf from the load side three-phase currents Ia, Ib and Ic through the fifth adder J5, the sixth adder J6 and the seventh adder J7 to obtain a DVR three-phase output target current
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Figure 362787DEST_PATH_IMAGE021
And
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and outputting the three-phase output target current of the DVR
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And
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the first pulse width modulator PWM1 is input, PWM 11-PWM 16 signals are output after being controlled by the second selection switch K2, and when the second selection switch K2 is closed, the PWM 11-PWM 16 signals respectively control the inversion unit, so that the DVR injects the DVR three-phase output target current into the load side A phase connection terminal 10, the load side B phase connection terminal 11 and the load side C phase connection terminal 12 through the connecting reactor
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And
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referring to fig. 4, the dynamic voltage restorer device further comprises a transient compensation control module of the dynamic voltage restorer, and the dynamic voltage restorerThe transient compensation control module may include a fourth conversion circuit, a fifth conversion circuit, an eighth adder J8, a ninth adder J9, a tenth adder J10, an eleventh adder J11, a twelfth adder J12, a thirteenth adder J13, a third proportional-integral controller PI3, a fourth proportional-integral controller PI4, a fifth proportional-integral controller PI5, a sixth proportional-integral controller PI6, a second pulse width modulator PWM2, a third selection switch K3, and a fourth selection switch K4; acquiring voltages Ua2, Ub2 and Uc2 at three positions of a load side phase A connection terminal 10, a load side phase B connection terminal 11 and a load side phase C connection terminal 12, respectively performing conversion from an abc static coordinate system to a dq rotation coordinate system on the three voltage signals based on the DVR working voltage arc angle theta s to obtain a second direct axis voltage component Ud2 and a second quadrature axis voltage component Uq2, and respectively inputting the voltages into the minus ends of an eighth adder J8 and a ninth adder J9; the "+" ends of the eighth adder J8 and the ninth adder J9 are respectively connected to a sustain voltage Uset and 0, wherein the sustain voltage Uset is a phase voltage peak value which needs to be maintained by the DVR during the voltage rising, voltage falling or short-time interruption; the maintaining voltage Uset is connected to a first end of the fourth selector switch K4, and a second end and a third end of the fourth selector switch K4 are respectively connected to a first control voltage U1 and a second control voltage U2, wherein the first control voltage U1 is slightly lower than a voltage peak value of a steady-state operation voltage, and the second control voltage U2 is slightly higher than a highest phase voltage peak value when the grid voltage temporarily rises; the output terminals of the eighth adder J8 and the ninth adder J9 respectively enter the third proportional-integral controller PI3 and the fourth proportional-integral controller PI4, the output terminals of the third proportional-integral controller PI3 and the fourth proportional-integral controller PI4 respectively enter the "+" terminals of the tenth adder J10 and the eleventh adder J11, the output terminals of the direct current component id and the quadrature current component iq respectively enter the "-" terminals of the tenth adder J10 and the eleventh adder J11, the output terminals of the tenth adder J10 and the eleventh adder J11 respectively enter the fifth proportional-integral controller PI5 and the sixth proportional-integral controller PI6, and the output terminals of the fifth proportional-integral controller PI5 and the sixth proportional-integral controller PI5 are respectively connected to the tenth adder J8526 and the eleventh adder J11The output end of the partial controller PI6 respectively enters a "+" end of the twelfth adder J12 and the thirteenth adder J13, the direct-axis current component id is multiplied by ω L and then enters a "+" end of the thirteenth adder J13, the quadrature-axis current component iq is multiplied by ω L and then enters a "-" end of the twelfth adder J12, wherein ω is the calculated angular frequency, and L is the inductance value of three connected reactors in the output connection unit; the second direct-axis voltage component Ud2 and the second quadrature-axis voltage component Uq2 enter the other "+" end of the twelfth adder J12 and the thirteenth adder J13, respectively, the output ends of the twelfth adder J12 and the thirteenth adder J13 are used as an output direct-axis voltage component and an output quadrature-axis voltage component, respectively, and the inverse transformation from the dq rotation coordinate system to the abc static coordinate system is performed based on the DVR working voltage arc angle θ s to obtain a three-phase target voltage
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And
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(ii) a The three-phase target voltage
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And
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the second pulse width modulator PWM2 is input, and the output side outputs PWM 21-PWM 26 signals after being controlled by the third selector switch K3; when the third selector switch K3 is closed, the PWM21 to PWM26 signals respectively control the inverter unit to cause the dynamic voltage restorer device to generate the three-phase meshes at the load side phase a connection terminal 10, the load side phase B connection terminal 11, and the load side phase C connection terminal 12 through connecting reactors, respectivelyStandard voltage
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And
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when the grid voltage has a transient problem, the reasonable setting of the first control voltage U1 and the second control voltage U2 and the correct switching of the fourth selector switch K4 are one of the key technical points of the invention. The configuration ensures that the thyristor is reliably turned off after the voltage of the power grid rises temporarily, falls temporarily or is interrupted for a short time, and the DVR is switched to the inverter power supply for supplying power; and meanwhile, after the voltage of the power grid is recovered, the thyristor can be reliably conducted, so that the DVR is switched to a bypass mode, the power grid supplies power for the load, and the DVR reenters the steady-state compensation.
The four selection switches of the invention do not adopt mechanical switches, but adopt internal logic branches of the program, so as to ensure rapidity and synchronism.
Referring to fig. 5, a method for controlling a DVR apparatus is as follows:
step 1, setting various fixed values including an angular frequency fixed value omega0A first control voltage U1, a second control voltage U2, a DC voltage target value
Figure 383265DEST_PATH_IMAGE018
Step 2, when the DVR enters a steady-state compensation mode, the first end of the first selector switch K1 is communicated with the second end, the second selector switch K2 is closed, the third selector switch K3 is open, and the first end of the fourth selector switch K4 is communicated with the second end; the first end and the second end of the first selection switch K1 are communicated, so that the DVR keeps synchronous with the power grid voltage.
The first end and the second end of the first selection switch K1 are connectedKeeping the DVR and the power grid voltage synchronous; the second selection switch K2 is closed, on one hand, a trigger signal is output to the thyristor of the bypass unit, the thyristor of the bypass unit of the DVR is switched on, the power grid supplies power for the load through the bypass unit, on the other hand, the PWM 11-16 signals in the steady state compensation mode are enabled, the output current of the inversion unit is controlled, the voltage of the direct current side reaches a target value, the direct current energy storage unit is charged, and meanwhile, three-phase target current is output to the load
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And
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and performing power compensation on the voltage transformer, so that the compensated current power factor is 1, the harmonic content is approximately 0, and preparation is made for transient state compensation and rapid switching of the DVR to the grid voltage. At this time, the third selection switch K3 is turned off, and the PWM 21-26 signals in the transient compensation mode are locked.
Further, the control method further comprises a step 3-1, when the grid voltage has a temporary drop or short-time interruption, the first end of the first selector switch K1 is communicated with the third end, the second selector switch K2 is opened, the third selector switch K3 is closed, and the first end of the fourth selector switch K4 is communicated with the second end; the sustain voltage Uset is equal to the first control voltage U1.
Further, the control method also comprises a step 3-2, when the grid voltage rises temporarily, the first end of the first selector switch K1 is communicated with the third end, the second selector switch K2 is opened, the third selector switch K3 is closed, and the first end of the fourth selector switch K4 is firstly communicated with the third end for a short time and then communicated with the second end again; when a voltage sag occurs in the grid, the holding voltage Uset is briefly the second control voltage U2 and then equals the first control voltage U1.
After the first end and the third end of the first selector switch K1 are communicated, the DVR exits from synchronous operation with the voltage of the power gridA line state; after the second selection switch K2 is switched off, stopping triggering signals of gate poles of thyristors 4 to 9 in the bypass unit by the DVR, and switching off PWM 11-16 signals output by a steady-state compensation strategy; after the third selection switch K3 is closed, PWM 21-26 signals in a transient compensation mode are effective, and the output angular frequency of the inverter unit is controlled to be omega0And the phase voltage amplitude is the three-phase alternating voltage of the maintaining voltage Uset and supplies power to the load.
Further, the control method further includes: and 4, when the DVR detects that the transient state problem of the power grid voltage disappears, communicating the first end and the second end of the first selector switch K1 to synchronize the output voltage of the DVR with the power grid voltage.
Further, the control method further includes: and 5, after the output of the first proportional integral controller PI1 is stabilized, synchronously closing the second selector switch K2, opening the third selector switch K3, and enabling the DVR to smoothly transit to a steady-state compensation mode.
Through the further step 5, synchronization is restored before the DVR is connected to the power grid, and the operation mode of the device is switched after the output voltage of the inverter is consistent with the voltage phase of the power grid, so that the voltage and the current on the load side are in smooth transition, and the impact of the voltage amplitude and the phase mutation on the load device is reduced.
Compared with the prior art, the method does not need to detect the current direction, and only needs to fix parameters such as the angular frequency constant value omega in the power grid voltage transient state compensation mode0The first control voltage U1, the second control voltage U2 and the like are reasonably set, and four selection switches are switched, so that the DVR device can enter a transient compensation mode from a steady compensation mode, and the rapid turn-off of the thyristor is automatically completed.
When the load is an inductive load, in the prior art, when the DVR enters a transient compensation process, the voltage and current waveforms of the thyristor of the bypass unit are shown in figure 6, and the voltage and current waveforms of the load are shown in figure 7; when the load is a capacitive load, in the prior art, when the DVR enters a transient compensation process, the voltage and current waveforms of the bypass unit thyristor are as shown in fig. 8, and the voltage and current waveforms of the load are as shown in fig. 9; in the invention, the voltage and current waveforms of the thyristor of the bypass unit are shown in figure 10 and the voltage and current waveforms of the load are shown in figure 11 when the load is an inductive load or a capacitive load DVR enters a transient compensation process.
As can be seen from comparison of fig. 6 to 11, in the prior art, when the DVR enters the transient compensation process, the situation that the bypass unit thyristor cannot be turned off immediately occurs, the duration time is about half of a sine cycle (10 ms), and the thyristor which cannot be turned off flows a very large half-wave current, and the load side also has the abnormality of unbalanced voltage and short-time increase of current, which easily damages the sensitive load device. The bypass thyristors are turned off simultaneously when the DVR enters a transient compensation process, the switching time is very short (about 0.1-0.3 ms), and the voltage and current waveforms at the load side are in smooth transition, so that the impact problem of the load in the process of switching the power supply from a power grid to the DVR is avoided, and the sensitive load is protected.
When the traditional DVR exits transient compensation, a direct grid connection mode is adopted, so that a sensitive load and a DVR device bear secondary impact, but before the DVR is connected to the grid, synchronization is recovered firstly, and the operation mode of the device is switched after the output voltage of an inverter is consistent with the voltage phase of a power grid, so that the voltage and the current on the load side are in smooth transition, and the impact on the load device caused by voltage amplitude and phase mutation is reduced.
In the prior art, when the DVR exits the transient compensation process, the voltage and current waveforms of the bypass unit thyristor are shown in figure 12, and the load voltage and current waveforms are shown in figure 13; when the DVR exits the transient compensation process, the voltage and current waveforms of the bypass unit thyristor are shown in figure 14, and the load voltage and current waveforms are shown in figure 15.
As can be seen from comparison of fig. 12 to fig. 15, in the process of exiting transient compensation of the DVR in the prior art, a large impulse current flows when the thyristor of the bypass unit is turned on, and the load side is also subject to the abnormality of unbalanced voltage and short-term increase of current, which is very likely to damage the sensitive load device. In the transient compensation process of exiting of the DVR, the current in the thyristor of the three-phase bypass unit has no impact, and the voltage and current waveform of the load side are in smooth transition, so that the impact problem in the process of switching the power supply of the DVR to the power supply of a power grid is avoided, and the sensitive load is protected.
It should be emphasized that the embodiments described herein are exemplary rather than limiting, and thus the present invention is not limited to the embodiments described in the detailed description, as other embodiments derived from the technical solutions of the present invention by those skilled in the art also belong to the protection scope of the present invention.

Claims (10)

1. A DVR device, characterized by: the device comprises a power side A-phase wiring terminal (1), a power side B-phase wiring terminal (2), a power side C-phase wiring terminal (3), a load side A-phase wiring terminal (10), a load side B-phase wiring terminal (11), a load side C-phase wiring terminal (12), a bypass unit, a direct current energy storage unit, an output connection unit, an inversion unit, a DVR arc angle calculation module and a DVR steady-state compensation control module;
the bypass unit comprises an A-phase first thyristor (4), an A-phase second thyristor (5), a B-phase first thyristor (6), a B-phase second thyristor (7), a C-phase first thyristor (8) and a C-phase second thyristor (9);
the direct current energy storage unit comprises a direct current energy storage capacitor (28), and the terminal voltage of the direct current energy storage capacitor is Udc;
the output connection unit comprises an A-phase connection reactor (13), a B-phase connection reactor (14) and a C-phase connection reactor (15), and the inductance value of the output connection unit is L;
the inverter unit comprises an A-phase upper bridge arm diode (16), an A-phase upper bridge arm IGBT (17), a B-phase upper bridge arm diode (18), a B-phase upper bridge arm IGBT (19), a C-phase upper bridge arm diode (20), a C-phase upper bridge arm IGBT (21), an A-phase lower bridge arm diode (22), an A-phase lower bridge arm IGBT (23), a B-phase lower bridge arm diode (24), a B-phase lower bridge arm IGBT (25), a C-phase lower bridge arm diode (26) and a C-phase lower bridge arm IGBT (27);
the DVR arc angle calculation module is used for setting a value omega based on preset angular frequency0Calculating the working voltage arc angle thetas of the DVR;
and the DVR steady-state compensation control module is used for adjusting the phase and frequency of the current of the bypass unit in real time based on the DVR working voltage arc angle theta s obtained by the DVR arc angle calculation module.
2. The DVR device of claim 1, wherein: the DVR arc angle calculation module comprises: the circuit comprises a first conversion circuit, a first adder (J1), a first proportional integral controller (PI 1), a first selection switch (K1) and a second adder (J2); the first conversion circuit is used for converting voltage signals Ua1, Ub1 and Uc1 at three wiring terminal positions of a power supply side phase A wiring terminal, a power supply side phase B wiring terminal and a power supply side phase C wiring terminal from an abc static coordinate system to a dq rotation coordinate system to obtain a first direct-axis voltage component Ud1 and a first quadrature-axis voltage component Uq 1; inputting the first quadrature axis voltage components Uq1 and 0 into a "-" terminal and a "+" terminal of the first adder (J1), respectively, inputting the output value of the first adder (J1) into the first proportional integral controller (PI 1), connecting the output end of the first proportional integral controller (PI 1) into the second terminal of the first selector switch (K1), connecting the third terminal of the first selector switch (K1) into 0, connecting the first terminal of the first selector switch (K1) into the "+" terminal of the second adder (J2), and connecting the other "+" terminal of the second adder (J2) into an angular frequency constant value ω0The output end of the second adder (J2) is used for calculating angular frequency omega; and integrating the calculated angular frequency omega, and outputting the DVR working voltage arc angle theta s as a transformation reference angle from each abc static coordinate system to a dq rotating coordinate system.
3. The DVR device of claim 2, wherein: the DVR steady-state compensation control module comprises a second conversion circuit, a third adder (J3), a fourth adder (J4), a fifth adder (J5), a sixth adder (J6), a seventh adder (J7), a second proportional-integral controller (PI 2), a first pulse width modulator (PWM 1) and a second selection switch (K2); wherein a voltage Udc signal of the DC energy storage unit is obtained and input into the secondThe "-" terminal of the three adders (J3), the DC voltage target value
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The output end of the third adder (J3) is input to the input end of the second proportional-integral controller (PI 2), and the output end of the second proportional-integral controller (PI 2) is connected to the "-" end of the fourth adder (J4); acquiring load side three-phase current Ia, Ib and Ic signals, and performing conversion from an abc static coordinate system to a dq rotating coordinate system on the three current signals based on the DVR working voltage arc angle theta s to obtain a direct-axis current component id and a quadrature-axis current component iq; performing low-pass filtering (LPF) on the direct-axis current component id to eliminate harmonic components, and then entering a + end of the fourth adder (J4); the output result of the fourth adder (J4) and 0 are subjected to inverse transformation from a dq rotating coordinate system to an abc static coordinate system based on the DVR working voltage arc angle theta s to obtain three-phase current fundamental wave active components Iaf, Ibf and Icf; subtracting the three-phase current fundamental wave active components Iaf, Ibf and Icf from the load side three-phase currents Ia, Ib and Ic through the fifth adder (J5), the sixth adder (J6) and the seventh adder (J7) to obtain DVR three-phase output target current
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And
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outputting the three-phase output target current of the DVR
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And
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the first pulse width modulator (PWM 1) is input, and outputs PWM 11-PWM 16 signals after being controlled by the second selection switch (K2), and when the second selection switch (K2) is closed, the PWM 11-PWM 16 signals respectively control the inversion unit, so that the DVR injects the DVR three-phase output target current into a load side A phase connection terminal (10), a load side B phase connection terminal (11) and a load side C phase connection terminal (12) through three connection reactors of the output connection unit
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And
Figure 769951DEST_PATH_IMAGE004
4. the DVR device of claim 3, wherein: the DVR device further comprises a DVR transient compensation control module, wherein the DVR transient compensation control module comprises a fourth conversion circuit, a fifth conversion circuit, an eighth adder (J8), a ninth adder (J9), a tenth adder (J10), an eleventh adder (J11), a twelfth adder (J12), a thirteenth adder (J13), a third proportional-integral controller (PI 3), a fourth proportional-integral controller (PI 4), a fifth proportional-integral controller (PI 5), a sixth proportional-integral controller (PI 6), a second pulse width modulator (PWM 2), a third selection switch (K3) and a fourth selection switch (K4); the method comprises the steps of collecting voltages Ua2, Ub2 and Uc2 at three positions of a load side phase A connection terminal (10), a load side phase B connection terminal (11) and a load side phase C connection terminal (12), and respectively carrying out conversion from an abc static coordinate system to a dq rotation coordinate system on the three voltage signals based on the DVR working voltage arc angle theta s to obtain a second straight-axis voltage componentQuantity Ud2 and a second quadrature voltage component Uq2 and are input to the "-" terminals of the eighth adder (J8) and the ninth adder (J9), respectively; the positive ends of the eighth adder (J8) and the ninth adder (J9) are respectively connected with a maintaining voltage Uset and 0, wherein the maintaining voltage Uset is a phase voltage peak value which needs to be maintained by a DVR device during the voltage rising, falling or short-time interruption; the maintaining voltage Uset is connected to a first end of the fourth selector switch (K4), a second end and a third end of the fourth selector switch (K4) are respectively connected to a first control voltage U1 and a second control voltage U2, wherein the first control voltage U1 is slightly lower than a voltage peak value of a steady-state operation voltage, and the second control voltage U2 is slightly higher than a highest voltage peak value of a power grid voltage when the power grid voltage temporarily rises; the output terminals of the eighth adder (J8) and the ninth adder (J9) respectively enter the third proportional-integral controller (PI 3) and the fourth proportional-integral controller (PI 4), the output terminals of the third proportional-integral controller (PI 3) and the fourth proportional-integral controller (PI 4) respectively enter the "+" terminals of the tenth adder (J10) and the eleventh adder (J11), the output terminals of the straight-axis current component id and the cross-axis current component iq respectively enter the "-" terminals of the tenth adder (J10) and the eleventh adder (J11), the output terminals of the tenth adder (J10) and the eleventh adder (J11) respectively enter the fifth proportional-integral controller (PI 5) and the sixth proportional-integral controller (PI 6), the output terminals of the fifth proportional-integral controller (PI 5) and the sixth proportional-integral controller (PI 6) respectively enter the twelfth adder (J42) and the twelfth proportional-integral controller (PI 12) A + end of a thirteenth adder (J13), wherein the direct-axis current component id is multiplied by ω x L and then enters another + end of the thirteenth adder (J13), and the quadrature-axis current component iq is multiplied by ω L and then enters a-end of the twelfth adder (J12), wherein ω is the calculated angular frequency, and L is the inductance value of three connecting reactors in the output connection unit; the second direct axis voltage component Ud2 and the second quadrature axis voltage component Uq2 enter the twelfth adder (J12) and the thirteenth adder, respectivelyThe other end of the device (J13) is connected with a positive end, the output ends of the twelfth adder (J12) and the thirteenth adder (J13) are respectively used as an output direct-axis voltage component and an output quadrature-axis voltage component, and the inverse transformation from a dq rotating coordinate system to an abc static coordinate system is carried out on the basis of the DVR working voltage arc angle theta s to obtain a three-phase target voltage
Figure 321018DEST_PATH_IMAGE005
Figure 605500DEST_PATH_IMAGE006
And
Figure 660044DEST_PATH_IMAGE007
(ii) a The three-phase target voltage
Figure 886626DEST_PATH_IMAGE005
Figure 659410DEST_PATH_IMAGE006
And
Figure 983468DEST_PATH_IMAGE007
the output side of the second pulse width modulator (PWM 2) is controlled by the third selection switch (K3) and then outputs PWM 21-PWM 26 signals; when the third selector switch (K3) is closed, the PWM21 to PWM26 signals control the inverter unit, respectively, so that the DVR device generates the three-phase target voltage at the load-side a-phase connection terminal (10), the load-side B-phase connection terminal (11), and the load-side C-phase connection terminal (12), respectively, through three connection reactors of the output connection unit
Figure 423677DEST_PATH_IMAGE005
Figure 290002DEST_PATH_IMAGE006
And
Figure 566393DEST_PATH_IMAGE007
5. the DVR device of claim 4, wherein: the second selection switch (K2) also simultaneously controls a thyristor trigger signal Tri, when the second selection switch (K2) is closed, the thyristor trigger signal Tri =1, and simultaneously sends a gate trigger signal to six thyristors of the bypass unit; when the second selection switch (K2) is turned on, the thyristor trigger signal Tri =0 stops sending the gate trigger signal to the six thyristors of the bypass unit.
6. A control method of a DVR device according to any one of claims 4 to 5, characterized in that:
step 1, setting all fixed values including the angular frequency fixed value omega0The first control voltage U1, the second control voltage U2, the DC voltage target value
Figure 441945DEST_PATH_IMAGE001
Step 2, when the DVR device enters a steady state compensation mode, a first end of the first selection switch (K1) is communicated with a second end, the second selection switch (K2) is closed, the third selection switch (K3) is opened, and a first end of the fourth selection switch (K4) is communicated with the second end; the first end and the second end of the first selection switch (K1) are communicated, so that the DVR device keeps synchronous with the voltage of the power grid.
7. The method of controlling a DVR device according to claim 6, further comprising: step 3-1, when the grid voltage is temporarily dropped or interrupted for a short time, the first end of the first selector switch (K1) is communicated with the third end, the second selector switch (K2) is opened, the third selector switch (K3) is closed, and the first end of the fourth selector switch (K4) is communicated with the second end; the sustain voltage Uset is equal to the first control voltage U1.
8. The method of controlling a DVR device according to claim 6, further comprising: 3-2, when the grid voltage rises temporarily, the first end of the first selector switch (K1) is communicated with the third end, the second selector switch (K2) is opened, the third selector switch (K3) is closed, and the first end of the fourth selector switch (K4) is firstly communicated with the third end for a short time and then communicated with the second end again; when a voltage sag occurs in the grid, the sustain voltage Uset is for a short time the second control voltage U2 and then equals the first control voltage U1.
9. The control method of the DVR device according to any one of claims 7 to 8, further comprising: and 4, when the DVR device detects that the transient problem of the power grid voltage disappears, communicating the first end and the second end of the first selection switch (K1) to synchronize the output voltage of the DVR device with the power grid voltage.
10. The method of controlling a DVR device according to claim 9, further comprising: and 5, after the output of the first proportional integral controller (PI 1) is stabilized, synchronously closing the second selection switch (K2), opening the third selection switch (K3), and smoothly transitioning the DVR device to a steady-state compensation mode.
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