CN113890793A - Data transmission method and device - Google Patents
Data transmission method and device Download PDFInfo
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- CN113890793A CN113890793A CN202010632131.7A CN202010632131A CN113890793A CN 113890793 A CN113890793 A CN 113890793A CN 202010632131 A CN202010632131 A CN 202010632131A CN 113890793 A CN113890793 A CN 113890793A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/0272—Arrangements for coupling to multiple lines, e.g. for differential transmission
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/40—Transceivers
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
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Abstract
The application provides a data transmission method and a device, wherein the method comprises the following steps: the sending end obtains two different binary bit streams, and the two different binary bit streams are processed through the modulator and the digital-to-analog converter to obtain two different analog signals. And then sending the two different analog signals through a differential transmission line, wherein one transmission line in the differential transmission line corresponds to one analog signal, and the differential transmission line shares one ground wire. The receiving end receives the two different analog signals through the differential transmission line, and processes the two different analog signals through the analog-to-digital converter to obtain two different digital signals. And then, the two paths of different analog signals are processed through a butterfly equalizer and a demodulator to obtain two paths of different binary bit streams. Through the scheme provided by the application, different information can be transmitted on the differential transmission line, and the data transmission efficiency of the system is improved.
Description
Technical Field
The present application relates to the field of communications technologies, and in particular, to a data transmission method and apparatus.
Background
In high-speed electrical interconnect systems, data streams are typically transmitted by differential signaling. The differential signal is a signal having the same amplitude and opposite phase, and may be referred to as a positive signal and a negative signal, respectively.
As shown in fig. 1, the transmission system a may transmit a signal to the system B through a differential transmission line, where the signal transmitted in the differential transmission line is a differential signal. Therefore, after the receiving system B receives the differential signal, the positive signal and the negative signal are subtracted to obtain the signal sent by the sending system.
However, the transmission lines 1 and 2 shown in fig. 1 carry the same information, resulting in low utilization of the transmission lines.
Disclosure of Invention
The application provides a data transmission method and device, which can effectively improve the efficiency of system information transmission.
In a first aspect, an embodiment of the present application provides a data transmission method, which may be executed by a communication apparatus, where the communication apparatus may be a wired device, such as a router, a switch, or an Optical Transport Network (OTN) transmission device. Alternatively, the communication device may be a device including any type of interface, such as a general computer interface, an OTN interface, a Peripheral Component Interconnect Express (PCIE) interface, an ethernet interface, or a serializer/deserializer (SerDes) interface. Alternatively, the communication device may be any type of chip (or may also be referred to as a circuit system, a chip system, etc.), such as a mobile phone chip, a Central Processing Unit (CPU) chip, or any chip requiring a high-speed communication interface. The following will be described by taking a communication device as an example of a sending end, where the method includes:
acquiring two paths of different binary bit streams, and modulating the two paths of different binary bit streams through a modulator; then, processing the result output by the modulator through a digital-to-analog converter to obtain two paths of different analog signals; and finally, sending the two different analog signals through a differential transmission line, wherein one transmission line of the differential transmission line corresponds to one analog signal, and the differential transmission line shares one ground wire.
According to the technical scheme, different information is transmitted on the two transmission lines of the differential transmission line, and compared with the two transmission lines of the differential transmission line for transmitting the same information, the data transmission efficiency of the system is effectively improved.
In one possible implementation, one of the two different analog signals is translated and/or linearly transformed, and then the other analog signal cannot be obtained.
In a possible implementation manner, the obtaining two different binary bit streams includes: two different binary bit streams are obtained by a two-way distributor.
In this embodiment, a sending end may split an original binary data stream (or may also be referred to as an original binary bit stream, etc.) through a dual-path distributor to obtain two different binary bit streams. I.e. the two different binary bit streams may be part of the original binary data stream. It can be understood that the embodiment of the present application is not limited to whether the two different binary bit streams are both half of the original binary data stream. However, in order to improve the data transmission efficiency, the two different binary bit streams may be half of the original binary data stream. The embodiments of the present application are not limited as to how the two-way distributor splits the original binary data stream.
In a possible implementation manner, after the two different binary bit streams are modulated by the modulator and before the result output by the modulator is processed by the digital-to-analog converter to obtain two different analog signals, the method further includes: the result output by the modulator is equalized through a butterfly equalizer; the processing the result output by the modulator through the digital-to-analog converter to obtain two different analog signals includes: and processing the result output by the butterfly equalizer through a digital-to-analog converter to obtain two paths of different analog signals.
In the embodiment of the application, the sending end performs equalization processing on the result output by the modulator through the butterfly equalizer, and can perform mutual coupling pre-emphasis on the result output by the modulator. The unfavorable conditions such as signal broadening, mutual interference of two paths of signals and the like introduced into the differential transmission line are compensated to a certain extent, so that the quality of the signals after the receiving end is equalized by the butterfly equalizer is better.
In one possible implementation, the two different binary bit streams come from the same data packet or control packet. It can also be understood that: the original binary data stream is a binary data stream of the data message; or a binary data stream of control messages, etc.
In a second aspect, an embodiment of the present application provides a data transmission method, which may be executed by a communication apparatus, and will be described below with the communication apparatus as a receiving end as an example, where the method includes:
receiving two different analog signals through a differential transmission line, wherein one transmission line of the differential transmission line corresponds to one analog signal, and the differential transmission line shares one ground wire; then, processing two paths of different analog signals through an analog-to-digital converter to obtain two paths of different digital signals; carrying out equalization processing on the two paths of different digital signals through a butterfly equalizer; and demodulating the result output by the butterfly equalizer through a demodulator to obtain two paths of different binary bit streams.
According to the technical scheme, different information is transmitted on the two transmission lines of the differential transmission line, and compared with the two transmission lines of the differential transmission line for transmitting the same information, the data transmission efficiency of the system is effectively improved. And the two paths of different acquired digital signals are equalized through the butterfly equalizer, so that the interference between the two paths of different digital signals can be effectively reduced.
In one possible implementation, one of the two different analog signals is translated and/or linearly transformed, and then the other analog signal cannot be obtained.
In one possible implementation, the method further includes: and combining two different binary bit streams through a two-way combiner to obtain a binary data stream.
In the embodiment of the present application, the original binary data stream can be obtained by merging two different binary bit streams.
In one possible implementation, a butterfly equalizer is used to reduce interference between two different digital signals.
In the embodiment of the present application, interference exists between two different analog signals transmitted by the differential transmission line, which causes interference also to exist between two different digital signals input into the butterfly equalizer, and therefore the butterfly equalizer can be used to reduce the interference.
In a possible implementation manner, the receiving two different analog signals through the differential transmission line includes: when the working mode of the butterfly equalizer is a first mode, two paths of different mode signals are received through the differential transmission line.
It will be appreciated that if the butterfly equalizer is operating in the second mode, the same information may be transmitted over the differential transmission lines. Illustratively, differential signals with the same amplitude and opposite phases can be transmitted on the differential transmission lines.
The embodiment of the application can realize the switching of the differential transmission line for transmitting the same information or different information by changing the working mode of the butterfly equalizer under the condition that the differential transmission line is kept unchanged, thereby ensuring the compatibility of the system.
In a possible implementation manner, after the equalizing two different digital signals by the butterfly equalizer and before the demodulating the result output by the butterfly equalizer by the demodulator to obtain two different binary bit streams, the method further includes: inputting the result output by the butterfly equalizer to a decision device; feeding back the result output by the decision device to the butterfly equalizer; the demodulating, by the demodulator, the result output by the butterfly equalizer to obtain two different binary bit streams includes: and processing the result output by the decision device through a demodulator to obtain two paths of different binary bit streams.
In the embodiment of the application, the butterfly equalizer with the cross DFE is adopted, so that the processing capacity of the receiving end on the interference between signals can be enhanced.
In a possible implementation manner, after the equalizing two different digital signals by the butterfly equalizer and before the demodulating the result output by the butterfly equalizer by the demodulator to obtain two different binary bit streams, the method further includes: the result output by the butterfly equalizer is equalized again through the equalizer; the demodulating, by the demodulator, the result output by the butterfly equalizer to obtain two different binary bit streams includes: and demodulating the result output by the equalizer through a demodulator to obtain two paths of different binary bit streams.
In embodiments of the present application, the equalizer may include one or more of a DFE, MLSE, PR, or a decision device, among others.
In a possible implementation manner, before the demodulating, by the demodulator, the result output by the butterfly equalizer to obtain two different binary bit streams, the method further includes: processing the result output by the butterfly equalizer through a decision device; the demodulating, by the demodulator, the result output by the butterfly equalizer to obtain two different binary bit streams includes: and demodulating the result output by the decision device through a demodulator to obtain two paths of different binary bit streams.
In the embodiment of the present application, the above-mentioned determiner may be replaced with any one or more of the following: decision feedback equalizer DFE, partial response PR, or maximum likelihood sequence estimation MLSE. For example, when the decision device is replaced by an MLSE, the demodulator may demodulate the output result of the MLSE. For example, when the decision device is replaced by a PR, the demodulator may demodulate the result output by the PR. For example, when the decision device is replaced by DFE and MLSE, the output result of the butterfly equalizer may be sequentially input to the DFE and MLSE, in which case the demodulator may demodulate the output result of the MLSE.
In the embodiment of the present application, in addition to the decision device processing the output result of the butterfly equalizer, any one or more of the decision feedback equalizer DFE, the partial response PR, or the maximum likelihood sequence estimation MLSE may also process the output result of the butterfly equalizer, and therefore, detailed description thereof is omitted here. Optionally, after the decision device processes the result output by the butterfly equalizer, the result output by the decision device may also be fed back to the butterfly equalizer.
In a third aspect, an embodiment of the present application provides a communication apparatus, including:
a two-way distributor for obtaining two different binary bit streams; a modulator for modulating the two different binary bit streams; the digital-to-analog converter is used for processing the result output by the modulator to obtain two paths of different analog signals; and the differential transmission interface is used for sending the two different analog signals, the two different analog signals are transmitted through a differential transmission line, one transmission line in the differential transmission line corresponds to one analog signal, and the differential transmission line shares one ground wire.
In one possible implementation, one of the two different analog signals is translated and/or linearly transformed, and then the other analog signal cannot be obtained.
In one possible implementation, the communication apparatus further includes: the butterfly equalizer is used for carrying out equalization processing on the result output by the modulator; and the digital-to-analog converter is specifically used for processing the result output by the butterfly equalizer to obtain two paths of different analog signals.
In a fourth aspect, an embodiment of the present application provides a communication apparatus, including:
the differential transmission interface is used for receiving two paths of different analog signals transmitted by a differential transmission line, one transmission line of the differential transmission line corresponds to one path of analog signal, and the differential transmission line shares one ground wire; the analog-to-digital converter is used for processing the two paths of different analog signals to obtain two paths of different digital signals; the butterfly equalizer is used for carrying out equalization processing on the two paths of different digital signals; and the demodulator is used for demodulating the result output by the butterfly equalizer to obtain two paths of different binary bit streams.
In one possible implementation, one of the two different analog signals is translated and/or linearly transformed, and then the other analog signal cannot be obtained.
In one possible implementation, the communication apparatus further includes: and the two-way combiner is used for combining two different binary bit streams to obtain a binary data stream.
In one possible implementation, there is interference between two different analog signals transmitted by the differential transmission line, so the butterfly equalizer is used to reduce the interference between two different digital signals.
In a possible implementation manner, the differential transmission interface is specifically configured to receive two different mode signals when the operating mode of the butterfly equalizer is the first mode.
In one possible implementation, the communication apparatus further includes: the decision device is used for processing the result output by the butterfly equalizer and feeding back the result output by the decision device to the butterfly equalizer; and the demodulator is specifically used for processing the result output by the decision device to obtain two paths of different binary bit streams.
It is understood that, in a specific implementation, the communication device may further include an equalizer, a processor, a memory, and the like, and the embodiment of the present application is not limited to other components included in the communication device. The equalizer may be used to perform equalization processing again on the result output by the butterfly equalizer, and the embodiment of the present application is not limited to a specific type of equalizer.
In a fifth aspect, an embodiment of the present application provides a communication apparatus, configured to perform the method in the first aspect or any possible implementation manner of the first aspect. The communication device comprises corresponding means for performing the method of the first aspect or any possible implementation manner of the first aspect. Or alternatively, to perform the second aspect or a method in any possible implementation of the second aspect. The communication device comprises corresponding means for performing the method of the second aspect or any possible implementation of the second aspect.
For example, the communication device may include a transceiving unit and a processing unit.
In a sixth aspect, the present application provides a computer-readable storage medium for storing a computer program which, when executed, causes the method of the first aspect described above or any possible implementation manner of the first aspect to be implemented. Or, when executed, cause a method as illustrated in the second aspect or any possible implementation of the second aspect described above to be implemented.
In a seventh aspect, the present application provides a computer program product comprising a computer program or computer code which, when executed, causes the method illustrated in the first aspect or any possible implementation manner of the first aspect to be implemented. Alternatively, the computer program or computer code, when executed, causes the method illustrated by the second aspect or any possible implementation of the second aspect described above to be implemented.
In an eighth aspect, the present application provides a computer program for implementing the method of the first aspect or any possible implementation manner of the first aspect. Or a method for implementing the second aspect or any possible implementation of the second aspect.
In a ninth aspect, the present application provides a communication system, where the communication system includes a sending end and a receiving end, where the sending end is configured to execute the method shown in the first aspect or any possible implementation manner of the first aspect, and the receiving end is configured to execute the method shown in the second aspect or any possible implementation manner of the second aspect.
Drawings
Fig. 1 is a schematic transmission diagram of a differential signal provided in an embodiment of the present application;
fig. 2a is a schematic structural diagram of a differential transmission line according to an embodiment of the present application;
fig. 2b is a schematic structural diagram of a differential transmission line according to an embodiment of the present application;
fig. 3a to fig. 3e are schematic structural diagrams of five butterfly equalizers according to the embodiments of the present application;
fig. 4a is a schematic flowchart of a data transmission method according to an embodiment of the present application;
fig. 4b is a schematic diagram of a communication system according to an embodiment of the present application;
FIG. 4c is a schematic diagram of the signals at a, b and c of FIG. 4 b;
fig. 4d is a schematic diagram of a data transmission system according to an embodiment of the present application;
fig. 5a to fig. 5e are schematic structural diagrams of five communication systems provided in the embodiments of the present application;
fig. 6a is a schematic structural diagram of a communication system according to an embodiment of the present application;
fig. 6b is a schematic diagram of a data transmission system according to an embodiment of the present application;
fig. 7 is a schematic structural diagram of a communication device according to an embodiment of the present application;
fig. 8 is a schematic structural diagram of a communication device according to an embodiment of the present application;
fig. 9 is a schematic structural diagram of a communication device according to an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more clear, the present application will be further described with reference to the accompanying drawings.
The terms "first" and "second," and the like in the description, claims, and drawings of the present application are used solely to distinguish between different objects and not to describe a particular order. Furthermore, the terms "comprising" and "having," as well as any variations thereof, are intended to cover non-exclusive inclusions. Such as a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those skilled in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.
In this application, "at least one" means one or more, "a plurality" means two or more, "at least two" means two or three and three or more, "and/or" for describing an association relationship of associated objects, which means that there may be three relationships, for example, "a and/or B" may mean: only a, only B and both a and B are present. The character "/" generally indicates that the former and latter associated objects are in an "or" relationship. "at least one item(s) below" or similar expressions refer to any combination of these items. For example, at least one (one) of a, b, or c, may represent: a, b, c, "a and b," a and c, "" b and c, "or" a and b and c.
The terms referred to in the present application are described in detail below.
1. Differential transmission line: the two transmission lines share a transmission line consisting of a ground line.
The differential transmission lines may be in the form of cables, connectors, or Printed Circuit Board (PCB) wiring, etc. On the circuit board, two of the differential transmission lines may be two lines that are equal in length, equal in width, closely adjacent, and on the same plane. Illustratively, fig. 2a and fig. 2b are schematic structural diagrams of a differential transmission line provided in the present application, respectively. Conductor S1 and conductor S2 shown in fig. 2a are transmission lines of a differential transmission line, respectively, and it can also be seen from fig. 2a that two transmission lines share a ground line. Fig. 2b shows a modified differential transmission line, which includes four transmission lines, and the four transmission lines share a ground line. It is understood that fig. 2b shows only one variation, and the application is not limited to the number of transmission lines specifically included in the differential transmission line. Illustratively, in a differential transmission line, the diameter of the conductor and insulating medium combination of one transmission line may be 0.05mm to 20 mm. The diameter of the ground wire can be 0.01 mm-10 mm, and the center distance between the two transmission lines can be 0.05 mm-20 mm. The distance between the transmission line center and the ground line center can be 0.05 mm-15 mm. The diameter of the whole differential transmission line can be 0.1 mm-50 mm. It is understood that the specific structure of the differential transmission line shown here is merely an example, and in a specific implementation, there may be other sizes or types of differential transmission lines, which is not limited in this application.
Generally, two signals can be transmitted on the differential transmission line, and the two signals have the same amplitude and opposite phases with respect to the voltage difference between the two signals and the reference ground. In other words, the signals transmitted over the differential transmission lines may be differential signals, and the information carried on the differential transmission lines may be the same. When the communication device acquires one path of signals in the differential signals, the other path of signals can be obtained through negation.
However, in the present application, two different analog signals may be transmitted on the differential transmission line, that is, the information carried on the differential transmission line may be different. Optionally, the double-speed transmission may be a signal transmission technology, and is different from a traditional one signal line and one ground line, the double-speed transmission may transmit signals on both transmission lines of the differential transmission line, but amplitudes of the two signals may not have the same relationship, and phases may not have an opposite relationship. It can be understood that, in the present application, since the information carried in the differential transmission line is not used, the manner of transmitting two different analog signals through the differential transmission line may also be referred to as double-speed transmission.
In this application, after acquiring two different analog signals transmitted through the differential transmission line, the communication device may perform equalization processing through the butterfly equalizer shown in fig. 3a, 3b, or 3d, so as to reduce interference caused by the two different analog signals transmitted through the differential transmission line. In the communication system provided by the application, as shown in fig. 5a to 5d, the sending end can send two different analog signals to the receiving end through the differential transmission line, and correspondingly, the receiving end can receive two different analog signals transmitted through the differential transmission line. With reference to the differential transmission lines shown in fig. 2a and 2b, in the structural schematic diagrams of the communication systems shown in fig. 5a to 5d, the transmitting end may transmit two different analog signals through the differential transmission line shown in fig. 2a, and correspondingly, the receiving end may receive two different analog signals through the differential transmission line shown in fig. 2 a. In the schematic structural diagrams of the communication systems shown in fig. 6a and 6b, the transmitting end may transmit four different analog signals through the differential transmission line shown in fig. 2b, and correspondingly, the receiving end may receive four different analog signals through the differential transmission line shown in fig. 2 b. It is understood that for the specific description of the four different analog signals, reference may be made to the description of the two different analog signals, and the detailed description is omitted here.
In this application, the communication device cannot obtain another analog signal by performing translation and/or linear conversion on one analog signal. That is, after one analog signal is translated and/or linearly transformed, the other analog signal cannot be obtained. Exemplarily, when the communication device acquires one of the two different analog signals, the communication device cannot acquire the other analog signal by delaying the one analog signal; or, another analog signal cannot be obtained by multiplying the one analog signal by a multiple (including negation, that is, multiplying by-1); or, the other analog signal cannot be obtained by increasing or decreasing the fixed value of the one analog signal; or, the other path of signal can not be obtained by convolving the path of analog signal with a certain sequence; alternatively, the other signal cannot be obtained by combining the one analog signal with the above processing methods.
For example, the two different analog signals may not be symmetrical signals with equal voltages and opposite phases. For example, the two different analog signals may not be symmetrical signals with equal voltage and opposite phases at the same time.
In the present application, the differential transmission line may include two transmission lines. It is understood that the differential transmission line may also be referred to as a differential signal line, which includes two signal lines. Alternatively, the differential transmission line may include two signal lines, or the like, or the differential transmission lines described in the present application may be collectively referred to as channels, or the like, and the present application does not limit the specific names of the differential transmission lines. It is understood that the signal transmitted on the differential transmission line may specifically be an analog signal.
2. A butterfly equalizer: the digital equalization system is a multi-input and multi-output digital equalization system, and each output of the butterfly equalizer can be obtained by equalizing the multi-input signals.
As shown in fig. 3a to 3e, the present application provides five types of butterfly equalizers, respectively.
As shown in fig. 3a to 3d, port 1 and port 3 are input ports, respectively, and port 2 and port 4 are output ports, respectively. The butterfly equalizer includes four Feed Forward Equalizers (FFE), which are respectively denoted as FFE12、FFE14、FFE32And FFE34. Signals (e.g., digital signals) acquired by port 1 are passed through FFE12The signal acquired by port 3 passes through FFE32And FFE12And FFE32The output signals are added by an adder to obtain the output signal (or referred to as the output result) of the port 2. Signals acquired by port 1 pass through FFE14The signal acquired by port 3 passes through FFE34And FFE14And FFE34The output signals are added by an adder to obtain output signals of 4 ports. Reference is made to the third diagram in fig. 4c for the levels of the output signals of port 2 and port 4, and the second diagram of fig. 4c is a signal diagram before butterfly equalizer processing. It can be seen from fig. 4c that after the signals are equalized by the butterfly equalizer, there is almost no overlap between the digital signals output by the butterfly equalizer, and almost independent signals are restored. In this example, the signal sent by the modulator in the sending end is a PAM-4 modulated signal and is a four-level signal, so the two outputs of the butterfly equalizer are also respectively ideal four-level signals. However, the output result of the butterfly equalizer is still two different digital signals, but the two different digital signals can be respectively represented as four-level signals.
It is understood that the signal recovered by the butterfly equalizer may be determined by the output of the modulator in the transmitting end, in other words, the multiplexed output of the butterfly equalizer may be similar to the output of the modulator in the transmitting end. Illustratively, if the transmitting end adopts a PAM-2 modulation scheme, the butterfly equalizer may recover the two acquired digital signals to two level signals. Illustratively, if a PAM-8 modulation mode is adopted at a transmitting end, the butterfly equalizer can recover two acquired digital signals to 8 level signals.
Optionally, the butterfly equalizer of fig. 3b and 3c includes a selector (e.g., a ladder of fig. 3b and 3 c) that can be used to control the operation mode of the butterfly equalizer. Illustratively, when the control signal is 1, the selector may make the butterfly equalizer operate in a mode similar to that of fig. 3 a. For example, when the control signal is 0, the operation mode of the butterfly equalizer may be as shown in fig. 3 c. In this case, the butterfly equalizer may be equivalent to one FFE. In other words, the operation mode of the butterfly equalizer can be divided into a first mode and a second mode by the selector. For example, when the operating mode of the butterfly equalizer is the first mode, the output of the butterfly equalizer may be two different digital signals, and since the information bit rate carried by the two different digital signals is twice the information bit rate carried by the single-path signal, the first mode may also be referred to as a double-speed operating mode. Likewise, when the operation mode of the butterfly equalizer is the second mode, the second mode may also be referred to as a single speed operation mode. The butterfly equalizer shown in fig. 3b and fig. 3c is arranged in the communication device, so that the communication device can be switched between the double-speed operating mode and the single-speed operating mode, and the differential transmission line can be switched to transmit the same information (such as differential signals) or different information. In other words, the butterfly equalizer shown in fig. 3b can improve the utilization of the differential transmission line.
It is understood that when the control signal is 0, the input signal of port 3 of the butterfly equalizer may be converted into a signal with a phase opposite to that of the input signal, and then added to the signal input at port 1. In other words, the input signal of port 3 of the butterfly equalizer is inverted and added to the input signal of port 1.
Optionally, two Decision Feedback Equalizers (DFE) are added to the butterfly equalizer shown in fig. 3d, and are respectively denoted as DFE2And DFE4. Thus, a signal (e.g., a digital signal) output from port 2 is fed back to the DFE through port 22Thereby acting as a DFE2The input signal of (1). DFE2Delaying the input signal and outputting, and FFE14And FFE34The outputs of which are added to obtain the output signal (or referred to as the output result) of the port 4. Similarly, the signal output from port 4 is fed back to the DFE via port 44As DFE4The input signal of (1). DFE4Delaying the input signal and outputting, and FFE12And FFE32The outputs of which are added to obtain the output signal of port 2. By using the butterfly equalizer shown in fig. 3d, the communication device can enhance the signal interference processing capability, improve the equalization capability of the butterfly equalizer, and improve the quality of the equalized signal.
Optionally, the butterfly equalizer shown in fig. 3e includes x inputs and x outputs. After x paths of input respectively pass through x FFE equalizers, the output results of the x FFE equalizers are added to obtain an output signal of output 1. The remaining output principle is the same as that at port 1 and will not be described here.
It will be appreciated that the above are several types of butterfly equalizers illustrated in the present application, but are equally applicable to other types of butterfly equalizers in the method illustrated in the present application.
Most of high-speed data communication systems such as PCB, equipment backboard, equipment frame, equipment rack and equipment core rack adopt differential transmission lines for electrical interconnection. Generally, a differential transmission line can be used to transmit two signals with the same amplitude and opposite phases, and the information carried on the two transmission lines of the differential transmission line is the same. However, the above method for transmitting data often results in low utilization efficiency of the differential transmission line and low data transmission rate of the system.
In view of this, the present application provides a data transmission method and apparatus, in which different information can be transmitted by using a differential transmission line, so as to improve the utilization rate of the differential transmission line and improve the data transmission rate of a system. In other words, the method provided by the application can improve the transmission rate of the system on the premise that the density of the differential transmission lines and the frequency of the signals transmitted on each transmission line in the differential transmission lines are not changed. Compared with the data transmission method shown in fig. 1, the transmission rate can be improved by more than one time.
Fig. 4a is a schematic flowchart of a data transmission method provided in an embodiment of the present application, fig. 4b is a schematic diagram of a communication system corresponding to fig. 4a, and fig. 4c is a schematic diagram of signals at a, b, and c in fig. 4 b. The method shown in fig. 4a may be applied to a communication apparatus, which may include a wired device or the like. Alternatively, the communication device may include a router, a switch, or an Optical Transport Network (OTN) transmission device. Optionally, the communication device may further include any type of interface, for example, the interface may include a general computer interface, an OTN interface, a Peripheral Component Interconnect Express (PCIE) interface, an ethernet interface, or a SerDes interface. Optionally, the communication device may further include any type of chip, for example, the chip may include a mobile phone chip, a Central Processing Unit (CPU) chip or any chip requiring a high-speed communication interface. Optionally, the data transmission method may be applied to a high-speed electrical interconnection scenario. This scenario of high speed electrical interconnection may be understood as a high rate of data transfer between two communication devices.
Further, the data transmission method may be applied to at least two communication apparatuses, and as shown in fig. 4a, the method in the embodiment of the present application is described by taking a transmitting end and a receiving end as an example. In this embodiment of the present application, the transmitting end and the receiving end may be two communication devices connected through a differential transmission line, or may also be two chips or interfaces connected through a differential transmission line, and the present application does not limit this. As shown in fig. 4a, the data transmission method includes:
401. the sending end obtains two different binary bit streams.
In some implementations, the two different binary bit streams (which may also be referred to as binary data streams, etc.) may be from the same data or signaling. For example, the two different binary bit streams may be from the same data packet; or from the same control message, etc. Illustratively, the transmitting end may obtain two different binary bit streams through a two-way distributor. In other words, the two different binary bit streams acquired by the transmitting end may be parts of an original binary data stream (which may also be referred to as an original binary bit stream, etc.). Here, since the transmitting end needs to exchange data and/or signaling with another device when communicating with another device, the data and/or signaling acquired by the transmitting end may also be referred to as an original binary data stream (which may also be referred to as an original binary bit stream, of course). Or, the sending end may generate data and/or signaling, and the like, and how the sending end acquires the original binary data stream is not limited in this embodiment of the application.
Optionally, the two different binary bit streams obtained by the sending end may be half of the original binary data stream, and under this condition, it can be ensured that the two different binary bit streams can be transmitted simultaneously, and the data transmission efficiency is improved. As an example, the sending end may sequentially divide the original binary data stream into two paths through a dual-way divider (DeMux), such as allocating a first data (which may be data in binary form) of the original binary data stream to a first binary bit stream, allocating a second data to a second binary bit stream, allocating a third data to the first binary bit stream, and so on. For example, the original binary data stream is 1,0,1,1,0,1,0,0, and the first binary bit stream is 1,1,0,0, and the second binary bit stream is 0,1,1, 0. Alternatively, the binary bit stream shown in the embodiment of the present application may also be referred to as a signal stream, and the specific name of the binary bit stream is not limited in the embodiment of the present application. For the specific description of the above implementation, reference may also be made to fig. 5a to 5c provided in the embodiments of the present application.
In other implementation manners, the two different binary bit streams may also be from different data and/or signaling, such as different data messages or control messages, and the source of the two different binary bit streams is not limited in this embodiment of the application. For this implementation, reference may also be made to fig. 5d provided in the embodiments of the present application.
402. The transmitting end modulates two paths of different binary bit streams through a modulator.
In the embodiment of the present application, the modulation scheme may include Pulse Amplitude Modulation (PAM), Quadrature Amplitude Modulation (QAM), and the like. Generally, the number of levels of the modulated signal is the same as the number of levels of the signal restored by the butterfly equalizer. For example, the transmitting end may perform symbol mapping on two different binary bit streams. For example, for a PAM-4 modulation scheme, a transmitting end may use a gray code to perform symbol mapping, for example, mapping 0,0 to-3; 0,1 maps to-1; 1,1 is mapped to + 1; 1,0 maps to + 3. For another example, for the QAM-16 modulation scheme, the sending end may map the first two bits of every four bits to real part symbols by using gray codes, and the last two bits to imaginary part symbols by using gray codes. Such as mapping 0,0,0,0 to-3, -3 j; 0,0,0,1 is mapped to-3, -1 j; 0,0,1,1 is mapped to-3, +1 j; 0,0,1,0 is mapped to-3, +3 j; 0,1,0,0 maps to-1, -3j, and so on.
403. The sending end processes the result output by the modulator through a digital-to-analog converter (DAC) to obtain two different analog signals.
In the embodiment of the present application, after one of the two different analog signals is translated and/or linearly transformed, the other analog signal cannot be obtained. It is understood that for the specific description of the two different analog signals, reference is made to the above description, and no further details are given here.
In one possible implementation, after step 402 and before step 403, the method shown in fig. 4a may further include: and the sending end carries out equalization processing on the result output by the modulator through a butterfly equalizer.
In the embodiment of the application, the sending end comprises the butterfly equalizer, so that the sending end can perform mutual coupling pre-emphasis on the two acquired binary bit streams, undesirable effects such as signal broadening, mutual interference of two signals and the like are introduced into the differential transmission line to a certain extent, the accuracy of the receiving end for recovering the original binary data stream from the butterfly equalizer is improved, and the quality of the equalized signals of the receiving end is better. It is understood that reference may also be made to fig. 5b for this implementation.
In this case, the step 403 may be replaced by: and the sending end processes the result output by the butterfly equalizer through the digital-to-analog converter to obtain two paths of different analog signals.
404. The sending end sends two different analog signals through the differential transmission line, one transmission line in the differential transmission line corresponds to one analog signal, and the differential transmission line shares one ground wire. Correspondingly, the receiving end receives two different analog signals through the differential transmission line.
It will be appreciated that in fig. 4a two different analog signals are transmitted over differential transmission lines.
In the embodiment of the application, the two binary bit streams obtained by the sending end are different binary bit streams, so that different information can be borne on the differential transmission line, and the data transmission rate is improved. Illustratively, a PAM-4 modulation mode is adopted at a transmitting end, a baud rate of one path of binary bit stream is 56Gbd, and since one symbol corresponds to 2 bits, a signal bit rate is 112Gbps, and a bit rate of data transmission of the whole system is 224 Gbps.
It is understood that for the specific description of the differential transmission line, reference may be made to fig. 2a to 2b, which are not described in detail herein.
405. The receiving end processes two different analog signals through an analog-to-digital converter (ADC) to obtain two different digital signals.
It is understood that the embodiments of the present application are not limited to the specific type of DAC and ADC.
406. And the receiving end performs equalization processing on the two paths of different digital signals through a butterfly equalizer.
In the embodiment of the present application, interference may exist between two different analog signals transmitted by the differential transmission line, so the butterfly equalizer may be used to reduce the interference between two different digital signals. The type of the butterfly equalizer included in the receiving end may be as shown in fig. 3a, or may also be as shown in fig. 3b, and a detailed description of the butterfly equalizer will not be described here.
Optionally, after the receiving end performs equalization processing on two different paths of digital signals through the butterfly equalizer, the equalizer may perform equalization processing again on the result output by the butterfly equalizer, and then the demodulator demodulates the result output by the equalizer. For a detailed description of the equalizer, reference may be made to the embodiments illustrated below, which will not be described in detail here.
407. And the receiving end demodulates the result output by the butterfly equalizer through the demodulator to obtain two paths of different binary bit streams.
For example, the receiving end may obtain two binary bit streams through symbol demapping.
In one possible implementation, the method shown in fig. 4a may further include:
408. the receiving end combines the two different binary bit streams through a multiplexer (Mux) to obtain a binary data stream.
The binary data stream is understood to be the original binary data stream acquired by the transmitting end.
Illustratively, as shown in fig. 4b, a modulator and a DAC may be included in the transmitting end, and an ADC, a butterfly equalizer, and a demodulator may be included in the receiving end. For example, when the transmitting end is modulated by PAM-4, the analog signals output at a in fig. 4b may be as shown in the first diagram of fig. 4c, respectively. Since the two transmission lines of the differential transmission line interfere with each other, the two analog signals output from the point a are coupled together after being transmitted through the differential transmission line, as shown in the second diagram of fig. 4 c. In the second diagram of fig. 4c, the two analog signals acquired by the receiving end are superimposed, and because the channel has loss, both the two analog signals acquired by the receiving end may be disordered. However, after the receiving end performs equalization processing on the digital signals output by the two ADCs through the butterfly equalizer, the two digital signals may not overlap. As shown in the third diagram of fig. 4c, the signal output from the butterfly equalizer appears as a four-level signal, similar to the first diagram of fig. 4 c. It will be appreciated that the signal diagram shown in fig. 4c is illustrated for a butterfly equalizer as in fig. 3a, 3b or 3 d.
It will be appreciated that the two dashed lines in the differential transmission line of fig. 4b represent: when a signal is transmitted using one of the differential transmission lines, the signal is affected by the other transmission line. In other words, each of the differential transmission lines interferes with each other.
In a possible implementation manner, after step 406 and before step 407, the method shown in fig. 4a may further include: the receiving end inputs the result output by the butterfly equalizer to the decision device, and the result output by the decision device is fed back to the butterfly equalizer. In this case, step 407 may be replaced by: and processing the result output by the decision device through a demodulator to obtain two paths of different binary bit streams. It is understood that for the above implementation, reference may be made to fig. 5 c.
It is understood that reference may also be made to fig. 4d for the methods provided by embodiments of the present application. As shown in fig. 4d, the transmitting end may perform symbol mapping, modulation, pre-emphasis, and conversion to an analog signal on the acquired binary data stream. The receiving end can also convert the acquired signals into digital signals, balance, demodulate, sign reverse map and the like. It is understood that reference may also be made to fig. 4a to 4c for the data transmission method shown in fig. 4d, and detailed description thereof is omitted here.
In the embodiment of the application, different information is transmitted on the differential transmission line, so that the efficiency of data transmission can be effectively improved. Specifically, the method provided by the embodiment of the present application can increase the rate of the output data by two times (with respect to the rate shown in fig. 1) while maintaining the same modulation mode, the same signal baud rate, and the same differential transmission line. For example, for PAM-4 modulation with a baud rate of 56GBd, if differential signals are used, the data transmission bit rate of the entire system is 112 Gbps; but the data transmission bit rate of the system can be improved to 224Gbps by the embodiment of the application.
To more clearly understand the data transmission method shown in fig. 4a and 4b, several specific embodiments are shown below.
The first embodiment,
As shown in fig. 5a, the transmitting end may include a two-way divider, a symbol map, and a DAC. The receiving end may include a Continuous Time Linear Equalizer (CTLE), an ADC, a butterfly equalizer, a decider/DFE/Partial Response (PR)/Maximum Likelihood Sequence Estimation (MLSE), a symbol demapper, and a two-way combiner.
Alternatively, the result output from the butterfly equalizer may be sequentially passed through one or more of a decision device, DFE, PR, MLSE. Alternatively, the results output from the butterfly equalizer may optionally be passed through one or more of a decision taker, DFE, PR, MLSE. In other words, the embodiment of the present application does not limit the specific positions of the decision device, DFE, PR, MLSE in the receiving end or the post-signal sequence of the signal. Wherein the DFE may be used to further cancel residual interference. The decision device may be used to decide the symbol to which the level corresponds. Likewise, PR and MLSE may also decide the sign of the level. For the sake of understanding, the DFE, PR, MLSE, or decision device may be collectively referred to as an equalizer in the embodiments of the present application, so as to perform equalization processing on the result output by the butterfly equalizer again.
As shown in fig. 5a, the sending end may process the obtained binary data stream (or may also be referred to as an original binary data stream) through a two-way distributor to obtain two different binary bit streams. And then the two different binary bit streams are respectively converted into two different analog signals through symbol mapping and DAC. The transmitting end transmits two different analog signals through the differential transmission line, for example, the interfaces between the transmitting end and the differential transmission line may be port 1 and port 3 in fig. 5 a. The interfaces between the receiving end and the differential transmission line are port 2 and port 4 in fig. 5 a. After the receiving end acquires the two different analog signals through the differential transmission line, the receiving end can perform filtering processing on the acquired analog signals through the CTLE, so that the attenuation of a high-frequency part of the signals introduced by a link is reduced, the signal broadening in a time domain is reduced, and the signals are closer to the signals originally sent by the sending end. The analog signal is then converted to a digital signal by the ADC. After equalizing the digital signal output by the ADC, the butterfly equalizer obtains output results, i.e., two different binary bit streams, through one or more of a decision device, DFE, PR, or MLSE. After the two different binary bit streams pass through the two-way combiner, the receiving end can recover the binary data stream.
In the embodiment of the present application, the symbol mapping may be equivalent to the modulator shown in fig. 4a and/or fig. 4b, and the symbol demapping may be equivalent to the demodulator shown in fig. 4a and/or fig. 4 b.
It is to be understood that, for convenience of description, in the embodiments shown below, the same components as those in the transmitting end and the receiving end shown in the first embodiment are not described in detail.
In the embodiment of the application, the sending end splits the original binary data stream through the double-path distributor, so that different information is transmitted on the differential transmission line, the utilization rate of the differential transmission line is improved, and the data transmission rate of the system is improved.
Example II,
As shown in fig. 5b, a butterfly equalizer may be further included in the transmitting end. The difference from fig. 5a is that: after the sending end processes the two binary bit streams respectively through symbol mapping, the output result of the symbol mapping is used as the input of a butterfly equalizer in the sending end. And the transmitting end pre-emphasizes the output result of the symbol mapping through a butterfly equalizer and converts the output result into an analog signal through a DAC (digital-to-analog converter).
In the embodiment of the application, the signal is subjected to pre-emphasis processing through the butterfly equalizer, so that the quality of the signal after the butterfly equalizer equalizes the signal in the receiving end can be improved.
It is understood that reference may be made to fig. 5a for other descriptions in fig. 5b, which will not be described in detail herein.
Example III,
As shown in fig. 5c, the receiving end includes a decision device, and the decision device can be used to feed back the output result to the butterfly equalizer. In the embodiment of the application, the butterfly equalizer with the cross DFE equalizer is adopted, so that the system has stronger processing capability on mutual interference between two paths of signals.
It is understood that the components included in the transmitting end of fig. 5c can refer to fig. 5a and/or fig. 5b, etc., and will not be described in detail here.
It is understood that the types of butterfly equalizers in embodiments one to three may include a butterfly equalizer as shown in fig. 3 a; alternatively, a butterfly equalizer may be included when the operation mode of the butterfly equalizer is the double speed operation mode, as shown in fig. 3 b.
Example four,
It is understood that in fig. 5a to 5c, two binary bit streams acquired by the transmitting end through the two-way distributor are from the same binary data stream. However, in fig. 5d, the transmitting end can obtain different binary data streams, which are denoted as binary data stream 1 (or referred to as original binary data stream 1) and binary data stream 2 (or referred to as original binary data stream 2). The different binary data streams are transmitted through the differential transmission lines after being respectively subjected to symbol mapping and DAC. Or the different binary data streams are transmitted through a differential transmission line after respectively passing through symbol mapping, a butterfly equalizer and a DAC. Similarly, the receiving end can also restore two different binary data streams through the ADC, the butterfly equalizer, the symbol demapping, and the like. It is understood that the components included in the transmitting terminal and the receiving terminal of fig. 5d can refer to fig. 5a, fig. 5b, fig. 5c, and the like, and will not be described in detail here.
Example V,
As shown in fig. 5e, when the transmitting end needs to transmit the differential signal, the receiving end may change the operating mode of the butterfly equalizer. In other words, by changing the operation mode of the butterfly equalizer, differential signals can be transmitted on the differential transmission lines. For the specific structure of the butterfly equalizer shown in fig. 5e, reference may be made to the butterfly equalizer shown in fig. 3c, and details thereof will not be given here.
Illustratively, to enable the butterfly equalizer to process the differential signal, when the butterfly equalizer is in the second mode, the input signal of the port 3 of the butterfly equalizer may be inverted and then output to the selector. The signal output through the selector is then added to the signal input at port 1. The signals after inverse addition at port 1 and port 3 are then equalized by an FFE equalizer and output through port 2 of the butterfly equalizer. The output signal is processed by one or more of the decision device, DFE, PR and MLSE, and the receiving end can recover the original binary data stream after symbol demapping.
Alternatively, the output result of the butterfly equalizer may be sequentially input to the DFE and the decision device, and then the output result of the DFE and the decision device is fed back to the butterfly equalizer, etc., which will not be described in detail herein.
It is understood that for the other descriptions of fig. 5e, reference may also be made to the foregoing embodiments, and details will not be given here.
Example six,
The above embodiments are all exemplified by the differential transmission line transmitting two signals, however, in the embodiment of the present application, for the modified differential transmission line, more signals can be transmitted, as shown in fig. 6a and 6 b. Compared with the foregoing embodiments, in the embodiments of the present application, the number of signals transmitted by the transmitting end, the number of transmission lines, and the number of signals received by the receiving end are all changed from 2 to x.
As shown in fig. 6a and 6b, the original binary data stream is processed by a demultiplexer. Such as a demultiplexer, maps a binary data stream into an x-way binary bit stream. The bit rate of each of the x binary bit streams is 1/x of the bit rate of the original binary data stream. The x outputs of the demultiplexer are input to x modulators, respectively. The modulator modulates the input signal, such as PAM-N modulation as shown in fig. 6a and 6 b. Therefore, after the modulation (such as symbol mapping), the transmitting end can obtain x paths of PAM-N signals, and each path of signals is different, namely each transmission line bears different information. The x-way PAM-N signals (i.e., the outputs of the x modulators) may then be converted to analog signals for transmission over multiple transmission lines, which share a ground line. Or, the outputs of the x modulators may be pre-emphasized, converted into analog signals, and transmitted through a plurality of transmission lines.
Here, the multiple transmission lines may interfere with each other, and therefore, the x-path analog signal acquired by the receiving end may be a signal subjected to the mutual interference.
After the receiving end acquires the x-path analog signals, the x-path signals are used as a whole for equalization, and the equalized x-path output is input to the x-path demodulator. Here, "take x signals as a whole" means that signals with multiple inputs are used for each equalized output. The x-path demodulator demodulates the input signal of each path of demodulator in the x-path demodulator respectively to obtain x-path binary bit streams. The bit rate of each path of binary bit stream acquired by the receiving end may be consistent with the bit rate of each path of binary bit stream output by the transmitting end through the demultiplexer.
It is understood that the detailed description of the data transmission method shown in fig. 6a and fig. 6b can refer to the foregoing embodiments, and detailed description thereof is omitted here.
In the embodiment of the application, different information is transmitted on x transmission lines, so that the data transmission rate of the system is x times of the data transmission rate of each transmission line. Illustratively, for the PAM-4 modulation scheme, if the baud rate of the signal is 56Gbd, the bit rates of the x DAC output signals are all 112Gbps, and the x DACs output different information, so that the bit rate of the data transmission of the whole system is x × 112 Gbps.
It is understood that in the above-described embodiments, the internal structures of the same type of devices are the same, and the embodiments of the present application are not limited thereto. For example, the embodiment of the present application is not limited to whether the specific internal structures of the x modulators in fig. 6a are the same. For example, the embodiment of the present application is not limited to whether the type of the butterfly equalizer at the transmitting end is the same as the type of the butterfly equalizer at the receiving end.
It can be understood that the above-illustrated embodiments have respective emphasis, and the implementation manner not described in detail in one embodiment may refer to other embodiments, which are not described in detail here. Furthermore, the various embodiments described herein may be implemented as stand-alone solutions or combined in accordance with inherent logic and are intended to fall within the scope of the present application.
The following describes the communication device provided in the embodiments of the present application in detail.
Fig. 7 is a schematic structural diagram of a communication device according to an embodiment of the present disclosure, where the communication device may be configured to perform the method shown in fig. 4 a. As shown in fig. 7, the communication apparatus includes a processing unit 701 and a transceiving unit 702.
In some implementations, the communication device may be the transmitting end in the above embodiments, wherein,
a processing unit 701, configured to obtain two different binary bit streams;
or, the processing unit 701 may further obtain the two different binary bit streams through the transceiving unit 702;
the processing unit 701 is further configured to modulate two different binary bit streams; converting the modulated result into two paths of different analog signals;
the transceiver unit 702 is configured to output the two different analog signals.
The transceiver unit can output the two different analog signals through a differential transmission line, one transmission line of the differential transmission line corresponds to one analog signal, and the differential transmission line shares one ground wire.
Optionally, the processing unit 701 may be further configured to perform equalization processing on the result after modulation, and convert the result after equalization processing into two different analog signals.
It should be understood that when the communication apparatus shown in fig. 7 is a transmitting end or a component in the transmitting end that implements the above functions, the processing unit 701 may be one or more processors, the transmitting and receiving unit 702 may be a transceiver, or the transmitting and receiving unit 702 may also be a transmitting unit and a receiving unit, the transmitting unit may be a transmitter, the receiving unit may be a receiver, and the transmitting unit and the receiving unit are integrated into one device, such as a transceiver.
When the transmitting end is a circuit system such as a chip, the processing unit 701 may be one or more processing circuits, and the transceiver unit 702 may be an input/output interface, which is also referred to as a communication interface, or an interface circuit, or an interface such as a differential transmission interface, and the like.
It is understood that, for the above detailed description of the transmitting end, reference may be made to the foregoing embodiments, and details will not be provided here.
Referring again to fig. 7, in other implementations, the communication device may be the receiving end in the above embodiments, wherein,
a transceiver unit 702, configured to obtain two different analog signals;
for example, the transceiver unit may specifically obtain two different analog signals transmitted through a differential transmission line, where one transmission line of the differential transmission line corresponds to one analog signal, and the differential transmission line shares one ground line.
The processing unit 701 is configured to process two different analog signals to obtain two different digital signals;
the processing unit 701 is further configured to perform equalization processing on the two different digital signals, and demodulate a result after the equalization processing to obtain two different binary bit streams.
Optionally, the processing unit 701 is further configured to combine the two different binary bit streams to obtain a binary data stream.
Optionally, the processing unit 701 is further configured to perform decision processing on a result after the equalization processing, and demodulate a result after the decision processing to obtain two different binary bit streams.
Optionally, the processing unit 701 may be further configured to perform equalization processing on the result after the equalization processing again, and then perform demodulation to obtain two different binary bit streams.
It is to be understood that when the communication apparatus shown in fig. 7 is a receiving end or a component in the receiving end implementing the above functions, the processing unit 701 may be one or more processors, the transceiving unit 702 may be a transceiver, or the transceiving unit 702 may also be a transmitting unit and a receiving unit, the transmitting unit may be a transmitter, the receiving unit may be a receiver, and the transmitting unit and the receiving unit are integrated into one device, such as a transceiver.
When the receiving end is a circuit system such as a chip, the processing unit 701 may be one or more processing circuits, and the transceiver unit 702 may be an input/output interface, also referred to as a communication interface, or an interface circuit, or an interface such as a differential transmission interface, and the like.
It is understood that, for the above detailed description of the receiving end, reference may be made to the foregoing embodiments, and details will not be provided here.
Fig. 8 is a schematic structural diagram of a communication apparatus according to an embodiment of the present application, where the communication apparatus may be a transmitting end in the foregoing embodiment, and as shown in fig. 8, the transmitting end includes:
a two-way distributor 801 for obtaining two different binary bit streams;
a modulator 802, configured to modulate the two different binary bit streams;
the digital-to-analog converter 803 is used for processing the result output by the modulator to obtain two different analog signals;
the differential transmission interface 804 is configured to send the two different analog signals, where the two different analog signals can be transmitted through a differential transmission line, one of the differential transmission lines corresponds to one of the analog signals, and the differential transmission line shares a ground line. I.e. the differential transmission interface may be used to connect differential transmission lines.
In a possible implementation manner, the sending end may further include: a butterfly equalizer 805 for equalizing the result output from the modulator;
and a digital-to-analog converter 803, which is specifically configured to process the result output by the butterfly equalizer to obtain two different analog signals.
It is understood that the embodiments of the present application are not limited to the specific connection manner between the two-way divider, the modulator, the digital-to-analog converter, and the butterfly equalizer. And the specific type of differential transmission interface is not limited. It is understood that reference may be made to the foregoing embodiments for specific description of the relationship between the output results of the respective devices, binary bit streams, analog signals, and so forth. That is, for the specific description of the transmitting end shown in fig. 8, reference may be made to the foregoing embodiments, and details will not be given here.
It can be understood that the transmitting end shown in the embodiment of the present application may further have more components than those shown in fig. 8, and the embodiment of the present application does not limit this. And the connection shown in fig. 8 is only an example, and should not be construed as limiting the embodiments of the present application.
Fig. 9 is a schematic structural diagram of a communication apparatus according to an embodiment of the present application, where the communication apparatus may be a receiving end in the foregoing embodiment, and as shown in fig. 9, the receiving end includes:
a differential transmission interface 901, configured to receive two different analog signals transmitted through a differential transmission line, where the differential transmission interface may be used to connect the differential transmission line, and one of the differential transmission lines corresponds to one of the analog signals, and the differential transmission line shares one ground line;
the analog-to-digital converter 902 is configured to process the two different analog signals to obtain two different digital signals;
a butterfly equalizer 903, configured to perform equalization processing on the two different digital signals;
and a demodulator 904, configured to demodulate the result output by the butterfly equalizer to obtain two different binary bit streams.
In a possible implementation manner, the receiving end may further include:
and a two-way combiner 905, configured to combine two different binary bit streams to obtain a binary data stream.
In a possible implementation manner, the differential transmission interface 901 is specifically configured to receive two different mode signals when the operating mode of the butterfly equalizer is the first mode.
In a possible implementation manner, the receiving end may further include: a decision device 906, configured to process a result output by the butterfly equalizer and feed back the result output by the decision device to the butterfly equalizer;
the demodulator 904 is specifically configured to process a result output by the decision device to obtain two different binary bit streams.
In a possible implementation manner, the receiving end may further include an equalizer (not shown in fig. 9) for performing equalization processing again on the result output by the butterfly equalizer. In this case, the demodulator may be configured to demodulate the result output by the equalizer to obtain two different binary bit streams.
It is understood that the embodiments of the present application are not limited to the specific connection manner among the analog-to-digital converter, the butterfly equalizer, the demodulator, and the two-way combiner. And the specific type of differential transmission interface is not limited. It is understood that reference may be made to the foregoing embodiments for specific description of the relationship between the output results of the respective devices, binary bit streams, analog signals, and so forth. That is, for the specific description of the receiving end shown in fig. 9, reference may be made to the foregoing embodiments, and details will not be given here.
It can be understood that the transmitting end shown in the embodiment of the present application may further have more components than those shown in fig. 9, and the embodiment of the present application does not limit this.
The embodiment of the present application further provides a communication system, where the communication system includes a sending end and a receiving end, and for specific descriptions of the sending end and the receiving end, for example, for steps or functions executed by the receiving end and the sending end, and for example, for specific components included in the receiving end and the sending end, reference may be made to the foregoing embodiments, and details are not described here.
In the several embodiments provided in the present application, it should be understood that the disclosed system, apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and there may be other divisions when actually implementing, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not implemented. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may also be an electric, mechanical or other form of connection.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the technical effects of the solutions provided by the embodiments of the present application.
In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application may be substantially implemented or contributed to by the prior art, or all or part of the technical solution may be embodied in a software product, which is stored in a readable storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned readable storage medium includes: various media capable of storing program codes, such as a usb disk, a removable hard disk, a read-only memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk.
In addition, the present application also provides a computer program for implementing operations and/or processes executed by the sending end in the data transmission method provided by the present application.
The present application also provides a computer program for implementing operations and/or processes performed by a receiving end in the data transmission method provided by the present application.
The present application also provides a computer-readable storage medium having stored therein computer code, which, when run on a computer, causes the computer to perform the operations and/or processes performed by the transmitting end in the data transmission method provided by the present application.
The present application also provides a computer-readable storage medium having stored therein computer code, which, when run on a computer, causes the computer to perform the operations and/or processes performed by the receiving end in the data transmission method provided by the present application.
The present application also provides a computer program product comprising computer code or a computer program which, when run on a computer, causes the operations and/or processes performed by the sending end in the data transmission method provided by the present application to be implemented.
The present application also provides a computer program product comprising computer code or a computer program which, when run on a computer, causes the operations and/or processes performed by the receiving end in the data transmission method provided by the present application to be implemented.
The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims (22)
1. A method of data transmission, the method comprising:
receiving two different analog signals through a differential transmission line, wherein one transmission line of the differential transmission line corresponds to one analog signal, and the differential transmission line shares one ground wire;
processing the two paths of different analog signals through an analog-to-digital converter to obtain two paths of different digital signals;
carrying out equalization processing on the two paths of different digital signals through a butterfly equalizer;
and demodulating the result output by the butterfly equalizer through a demodulator to obtain two paths of different binary bit streams.
2. The method according to claim 1, wherein one of the two different analog signals is shifted and/or linearly transformed such that the other analog signal is not available.
3. The method according to claim 1 or 2, characterized in that the method further comprises:
and combining the two different binary bit streams through a two-way combiner to obtain a binary data stream.
4. The method according to any of claims 1-3, wherein said butterfly equalizer is used to reduce interference between said two different digital signals.
5. The method of any of claims 1-4, wherein receiving two different analog signals over a differential transmission line comprises:
and when the working mode of the butterfly equalizer is a first mode, receiving the two paths of different mode signals through the differential transmission line.
6. The method according to any of claims 1-5, wherein after the equalizing the two different digital signals by the butterfly equalizer and before demodulating the result output by the butterfly equalizer by the demodulator to obtain two different binary bit streams, the method further comprises:
inputting the result output by the butterfly equalizer to a decision device;
feeding back the result output by the decision device to the butterfly equalizer;
the demodulating, by the demodulator, the result output by the butterfly equalizer to obtain two different binary bit streams includes:
and demodulating the result output by the decision device through the demodulator to obtain the two different binary bit streams.
7. The method according to any of claims 1-5, wherein after said equalizing the two different digital signals by the butterfly equalizer and before said demodulating the result outputted by the butterfly equalizer by the demodulator to obtain two different binary bit streams, the method further comprises:
carrying out equalization processing on the result output by the butterfly equalizer again through the equalizer;
the demodulating, by the demodulator, the result output by the butterfly equalizer to obtain two different binary bit streams includes:
and demodulating the result output by the equalizer through the demodulator to obtain the two different binary bit streams.
8. A method of data transmission, the method comprising:
acquiring two different binary bit streams;
modulating the two different binary bit streams through a modulator;
processing the result output by the modulator through a digital-to-analog converter to obtain two paths of different analog signals;
and sending the two different analog signals through a differential transmission line, wherein one transmission line of the differential transmission line corresponds to one analog signal, and the differential transmission line shares one ground wire.
9. The method according to claim 8, wherein one of the two different analog signals is shifted and/or linearly transformed such that the other analog signal is not available.
10. The method according to claim 8 or 9, wherein said obtaining two different binary bit streams comprises:
two different binary bit streams are obtained by a two-way distributor.
11. The method according to any of claims 8-10, wherein after said modulating said two different binary bit streams by a modulator and before said processing the result outputted by said modulator by a digital-to-analog converter to obtain two different analog signals, said method further comprises:
the result output by the modulator is equalized through a butterfly equalizer;
the processing the result output by the modulator through the digital-to-analog converter to obtain two different analog signals comprises:
and processing the result output by the butterfly equalizer through the digital-to-analog converter to obtain the two different analog signals.
12. The method according to any of claims 8-11, wherein the two different binary bit streams are from the same data packet or control packet.
13. A communications apparatus, the apparatus comprising:
the differential transmission interface is used for receiving two different analog signals transmitted by a differential transmission line, one transmission line in the differential transmission line corresponds to one analog signal, and the differential transmission line shares one ground wire;
the analog-to-digital converter is used for processing the two paths of different analog signals to obtain two paths of different digital signals;
the butterfly equalizer is used for carrying out equalization processing on the two paths of different digital signals;
and the demodulator is used for demodulating the result output by the butterfly equalizer to obtain two paths of different binary bit streams.
14. The apparatus of claim 13, wherein one of the two different analog signals is shifted and/or linearly transformed such that the other analog signal is not available.
15. The apparatus of claim 13 or 14, further comprising:
and the two-path combiner is used for combining the two paths of different binary bit streams to obtain a binary data stream.
16. The apparatus according to any of claims 13-15, wherein the butterfly equalizer is configured to reduce interference between the two different digital signals.
17. The apparatus according to any one of claims 13 to 16,
the differential transmission interface is specifically configured to receive the two different mode signals when the operating mode of the butterfly equalizer is the first mode.
18. The apparatus of any one of claims 13-17, further comprising:
the decision device is used for processing the result output by the butterfly equalizer and feeding back the result output by the decision device to the butterfly equalizer;
the demodulator is specifically configured to demodulate a result output by the decision device to obtain the two different binary bit streams.
19. The apparatus of any one of claims 13-17, further comprising:
the equalizer is used for carrying out equalization processing on the result output by the butterfly equalizer again;
the demodulator is specifically configured to demodulate a result output by the equalizer to obtain the two different binary bit streams.
20. A communications apparatus, the apparatus comprising:
a two-way distributor for obtaining two different binary bit streams;
the modulator is used for modulating the two paths of different binary bit streams;
the digital-to-analog converter is used for processing the result output by the modulator to obtain two paths of different analog signals;
and the differential transmission interface is used for sending the two different analog signals, the two different analog signals are transmitted through a differential transmission line, one transmission line in the differential transmission line corresponds to one analog signal, and the differential transmission line shares one ground wire.
21. The apparatus of claim 20, wherein one of the two different analog signals is shifted and/or linearly transformed such that the other analog signal is not available.
22. The apparatus of claim 20 or 21, further comprising:
the butterfly equalizer is used for carrying out equalization processing on the result output by the modulator;
the digital-to-analog converter is specifically configured to process a result output by the butterfly equalizer to obtain the two different analog signals.
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US20150085914A1 (en) * | 2013-09-25 | 2015-03-26 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Modal PAM2/4 Pipelined Programmable Receiver Having Feed Forward Equalizer (FFE) And Decision Feedback Equalizer (DFE) Optimized For Forward Error Correction (FEC) Bit Error Rate (BER) Performance |
WO2016074803A1 (en) * | 2014-11-13 | 2016-05-19 | Telefonaktiebolaget L M Ericsson (Publ) | Digital signal processing of an optical communications signal in a coherent optical receiver |
US10263663B2 (en) * | 2015-12-17 | 2019-04-16 | Intel Corporation | M-ary pulse amplitude modulation digital equalizer |
CN109639305A (en) * | 2017-10-09 | 2019-04-16 | 深圳市中兴微电子技术有限公司 | A kind of method and receiver for realizing data receiver processing |
CN110417536B (en) * | 2018-04-27 | 2021-12-31 | 华为技术有限公司 | Phase detection method and phase detection circuit |
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