CN113886305A - Bus-based arbitration method, system, storage medium and device - Google Patents
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Abstract
The invention provides an arbitration method, a system, a storage medium and a device based on a bus, wherein the method comprises the following steps: respectively forming transmission channels between master equipment and slave equipment connected with a bus, and distributing initial arbitration weights for the transmission channels based on a preset total arbitration weight; if the bus receives a read or write operation request of a transmission channel, marking the request state in the operation state table, and if the operation request carries a locking signal or an exclusive signal, marking the locking state or the exclusive state in the operation state table; inquiring whether a locking state or an exclusive state with a mark exists in the operation state table; if the two arbitration weights do not exist, calculating the arbitration weight range of the corresponding transmission channel based on the initial arbitration weight and the total arbitration weight of the transmission channel; and collecting the random number and distributing bus use right for the transmission channel corresponding to the arbitration weight range in which the value of the random number is positioned so as to transmit the operation request in the corresponding transmission channel. The invention realizes an efficient arbitration mechanism based on the bus use right.
Description
Technical Field
The present invention relates to the field of integrated circuit technologies, and in particular, to a bus-based arbitration method, system, storage medium, and device.
Background
With the continuous development of integrated circuits, the requirements on the processing speed performance of SOC chips (system on chip) are higher and higher. The system bus is used as a central bridge for connecting each module, which has an important influence on the performance of the SOC system, and particularly in a system with a plurality of master devices and a plurality of slave devices, the arbitration mechanism of the bus influences the read-write efficiency of multi-path data, thereby influencing the performance of the SOC chip.
The AXI Bus is the most important part of an Advanced Microcontroller Bus Architecture (AMBA) 3.0 protocol proposed by ARM corporation, is an on-chip Bus oriented to high performance, high bandwidth and low delay, can meet the requirement of a new generation of SOC system on multi-user high performance and low power consumption, and has been widely applied at present.
Currently, the multi-user arbitration method for the AXI bus mainly includes the following ways:
(1) the fixed priority, i.e., the priority of each master module, is determined and does not change with the operation of the system. When multiple masters simultaneously request to use the bus resource, the arbiter assigns bus usage according to the master priorities. This approach is simple in design, but when a high priority master is using the bus all the time, a low priority master may not get bus resources, thereby rendering the low priority master instructions ineffective.
(2) Time division multiplexing, which is mainly based on time slice switching, specifies a fixed length of time for each master to occupy the bus resources, and allocates the bus resources to another master when the time ends. This approach requires a high time slice division and is associated with significant waste because the master must wait a fixed amount of time in its respective time slice, whether or not it initiates a request.
Disclosure of Invention
In view of the above, the present invention provides a bus-based arbitration method, system, storage medium and device, so as to solve the problem of unreasonable allocation mechanism of bus usage rights in the prior art.
Based on the above purpose, the present invention provides an arbitration method based on bus, comprising the following steps:
respectively forming transmission channels between each master device and each slave device connected with the bus, and distributing initial arbitration weights to the transmission channels based on preset total arbitration weights;
in response to a bus receiving a read or write operation request of a transmission channel, marking a request state of the transmission channel in an operation state table, in response to a protection signal carried by the operation request being a locking signal or an exclusive signal, marking a locking state corresponding to the locking signal or an exclusive state corresponding to the exclusive signal in the operation state table;
inquiring whether a locking state with a mark or an exclusive state with the mark exists in the operation state table;
in response to the absence of the locked state with the flag and the absence of the exclusive state with the flag, calculating an arbitration weight range of the transmission channel corresponding to the request state with the flag in the operation state table based on the initial arbitration weight and the total arbitration weight of the transmission channel;
and acquiring a random number generated by a random number generator associated with the bus, and allocating bus use right for the transmission channel corresponding to the arbitration weight range in which the value of the random number is positioned so as to transmit the operation request in the corresponding transmission channel.
In some embodiments, the method further comprises:
responding to the existence of the exclusive state with the mark in the operation state table, and allocating a transmission channel corresponding to the exclusive state of the mark for the operation request so that the operation request is transmitted in the corresponding transmission channel;
and deleting the mark of the corresponding exclusive state in response to the completion of the transmission of the operation request in the corresponding transmission channel.
In some embodiments, the method further comprises:
responding to the fact that the operation request is a read operation request and a locking state with a mark for recording the read operation state exists in the operation state table, and distributing a transmission channel corresponding to the locking state of the mark for the read operation request so that the read operation request is transmitted in the corresponding transmission channel;
and in response to the read operation request, the corresponding transmission channel is transmitted to be completed, and the mark of the locking state is deleted.
In some embodiments, the method further comprises:
and in response to the operation request being a write operation request and the locked state with the mark for recording the read operation state existing in the operation state table, suspending the bus usage right distribution of the write operation request.
In some embodiments, calculating the arbitration weight range based on the initial arbitration weight and the total arbitration weight of the transmission channel corresponding to the request state with the mark in the operation state table comprises:
calculating an actual total arbitration weight based on the initial arbitration weight of the transmission channel corresponding to the request state with the mark in the operation state table;
an arbitration weight range is calculated based on the initial arbitration weight and the actual total and total arbitration weights for the corresponding transmission channel.
In some embodiments, the method further comprises:
and deleting the mark of the request state of the corresponding transmission channel in the operation state table in response to the completion of the transmission of the operation request in the corresponding transmission channel.
In some embodiments, assigning an initial arbitration weight to each transmission channel based on a preset total arbitration weight comprises:
and allocating initial arbitration weights to the transmission channels according to the data flow of the transmission channels in the use environment of the bus and based on the preset total arbitration weight.
In another aspect of the present invention, there is also provided a bus-based arbitration system, including:
the arbitration weight distribution module is configured to form transmission channels between each master device and each slave device connected with the bus respectively, and distribute initial arbitration weights for the transmission channels based on a preset total arbitration weight;
the marking module is configured to mark a request state of a transmission channel in an operation state table in response to a read or write operation request of the transmission channel received by the bus, and mark a lock state corresponding to the lock signal or an exclusive state corresponding to the exclusive signal in the operation state table in response to a protection signal carried by the operation request being the lock signal or the exclusive signal;
the query module is configured to query whether a locking state with a mark or an exclusive state with the mark exists in the operation state table;
a calculating module configured to calculate an arbitration weight range based on an initial arbitration weight and a total arbitration weight of a transmission channel corresponding to a request state with a flag in an operation state table in response to the absence of a lock state with the flag and the absence of an exclusive state with the flag; and
and the bus use right distribution module is configured to collect the random number generated by the random number generator associated with the bus and distribute the bus use right for the transmission channel corresponding to the arbitration weight range in which the value of the random number is positioned so as to transmit the operation request in the corresponding transmission channel.
In yet another aspect of the present invention, a computer-readable storage medium is also provided, storing computer program instructions, which when executed by a processor, implement the above-described method.
In yet another aspect of the present invention, a computer device is further provided, which includes a memory and a processor, the memory storing a computer program, which when executed by the processor performs the above method.
The invention has at least the following beneficial technical effects:
the invention obtains true random number by constructing a metastable state circuit, dynamically allocates an arbitration weight range according to the actual bus use request of each master device, supports lock access transmission and Exclusive transmission, finally realizes an efficient arbitration mechanism based on bus use right, improves the utilization rate of a system bus, and further improves the performance of the whole SOC chip.
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In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other embodiments can be obtained by using the drawings without creative efforts.
FIG. 1 is a diagram illustrating a bus-based arbitration method according to an embodiment of the present invention;
FIG. 2 is a schematic structural diagram of a bus connecting two masters and two slaves according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a bus-based arbitration system provided in accordance with an embodiment of the present invention;
FIG. 4 is a schematic diagram of a computer-readable storage medium for implementing a bus-based arbitration method according to an embodiment of the present invention;
fig. 5 is a schematic hardware configuration diagram of a computer device for executing the bus-based arbitration method according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the following embodiments of the present invention are described in further detail with reference to the accompanying drawings.
It should be noted that all expressions using "first" and "second" in the embodiments of the present invention are used for distinguishing two non-identical entities with the same name or different parameters, and it is understood that "first" and "second" are only used for convenience of expression and should not be construed as limiting the embodiments of the present invention. Furthermore, the terms "comprises" and "comprising," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements does not include all of the other steps or elements inherent in the list.
In view of the above objects, a first aspect of the embodiments of the present invention proposes an embodiment of a bus-based arbitration method. Fig. 1 is a schematic diagram illustrating an embodiment of a bus-based arbitration method provided by the present invention. As shown in fig. 1, the embodiment of the present invention includes the following steps:
step S10, respectively forming transmission channels between each master device and each slave device connected with the bus, and distributing initial arbitration weights for the transmission channels based on the preset total arbitration weights;
step S20, in response to the bus receiving a read or write operation request of a transmission channel, marking a request state of the transmission channel in the operation state table, in response to the protection signal carried by the operation request being a lock signal or an exclusive signal, marking a lock state corresponding to the lock signal or an exclusive state corresponding to the exclusive signal in the operation state table;
step S30, inquiring whether the operation state table has a locking state with a mark or an exclusive state with a mark;
step S40, in response to the locking state with the mark and the exclusive state with the mark, calculating the arbitration weight range based on the initial arbitration weight and the total arbitration weight of the transmission channel corresponding to the request state with the mark in the operation state table;
step S50, collecting the random number generated by the random number generator associated with the bus, and allocating the bus use right to the transmission channel corresponding to the arbitration weight range in which the value of the random number is located, so that the operation request is transmitted in the corresponding transmission channel.
The embodiment of the invention obtains the true random number by constructing the metastable state circuit, dynamically allocates the arbitration weight range according to the actual bus use request of each master device, supports lock access transmission and Exclusive access transmission, finally realizes an efficient arbitration mechanism based on the bus use right, improves the utilization rate of a system bus, and further improves the performance of the whole SOC chip.
In some embodiments, the method further comprises: responding to the existence of the exclusive state with the mark in the operation state table, and allocating a transmission channel corresponding to the exclusive state of the mark for the operation request so that the operation request is transmitted in the corresponding transmission channel; and deleting the mark of the corresponding exclusive state in response to the completion of the transmission of the operation request in the corresponding transmission channel.
In some embodiments, the method further comprises: responding to the fact that the operation request is a read operation request and a locking state with a mark for recording the read operation state exists in the operation state table, and distributing a transmission channel corresponding to the locking state of the mark for the read operation request so that the read operation request is transmitted in the corresponding transmission channel; and in response to the read operation request, the corresponding transmission channel is transmitted to be completed, and the mark of the locking state is deleted.
In some embodiments, the method further comprises: and in response to the operation request being a write operation request and the locked state with the mark for recording the read operation state existing in the operation state table, suspending the bus usage right distribution of the write operation request.
In some embodiments, calculating the arbitration weight range based on the initial arbitration weight and the total arbitration weight of the transmission channel corresponding to the request state with the mark in the operation state table comprises: calculating an actual total arbitration weight based on the initial arbitration weight of the transmission channel corresponding to the request state with the mark in the operation state table; an arbitration weight range is calculated based on the initial arbitration weight and the actual total and total arbitration weights for the corresponding transmission channel.
In some embodiments, the method further comprises: and deleting the mark of the request state of the corresponding transmission channel in the operation state table in response to the completion of the transmission of the operation request in the corresponding transmission channel.
In some embodiments, assigning an initial arbitration weight to each transmission channel based on a preset total arbitration weight comprises: and allocating initial arbitration weights to the transmission channels according to the data flow of the transmission channels in the use environment of the bus and based on the preset total arbitration weight.
The bus-based arbitration method of an exemplary embodiment of the present invention is as follows:
fig. 2 shows a schematic diagram of a bus connecting two masters and slaves. As shown in fig. 2, the configuration includes MASTER devices (MASTER _0 and MASTER _1), SLAVE devices (SLAVE _0 and SLAVE _1), and a bus INTERCONNECT section (INTERCONNECT), which is a multi-MASTER multi-SLAVE configuration. Wherein the bus may be an AXI bus. Axi (advanced eXtensible interface) is a bus protocol, which is the most important part of AMBA3.0 protocol proposed by ARM corporation, and is an on-chip bus oriented to high performance, high bandwidth and low latency.
The specific implementation process of the exemplary embodiment is as follows:
1) constructing true random numbers
True random numbers are true random numbers that are generated by random physical phenomena and cannot be predicted. True random number generators typically extract the randomness of these uncertain events and digitize them to produce a random number sequence.
Meta-stable state of a digital circuit means that the flip-flop cannot reach an identifiable state within a certain specified period of time. When a flip-flop enters a meta-stable state, it cannot predict either the output level of the cell, or when the output will settle at some correct level. In essence, metastability can be considered noise in a digital circuit.
There are many reasons for generating the metastable state of the digital circuit, and the present embodiment proposes a metastable state circuit based on an asynchronous clock, which includes the following specific processes:
a. an external crystal oscillator clock is used for generating an 8-bit adder which adds 1 by itself;
b. acquiring the 8-bit adder value in a by using the rising edge of an AXI bus clock;
c. recording the data collected in the step b as a random number random _ 0;
the external crystal oscillator clock and the AXI bus clock used in the above process are asynchronous clocks, so the acquired value can be regarded as a true random number.
2) Bus state memory table update
The bus state is recorded and updated using the operation state table (including the write operation state table and the read operation state table).
Table 1 below is a write operation status table and table 2 below is a read operation status table. In tables 1 and 2, Locked indicates a Locked state, Exclusive indicates an Exclusive state, and Request indicates a Request state, and the value thereof may be 1 or 0 according to actual read/write operations, where 1 indicates a flag in this embodiment.
TABLE 1 write operation State Table
| Write operation transmission channel | Locked | Exclusive | Request | Arbitration weights |
| M0_S0_W | 0 | 0 | | M0_S0_W_w |
| M0_S1_W | ||||
| 1 | 0 | | M0_S1_W_w | |
| M1_S0_W | ||||
| 0 | 0 | | M1_S0_W_w | |
| M1_S1_W | ||||
| 0 | 0 | Request_w_11 | M1_S1_W_w |
The Write operation transfer channel M0_ S0_ W in table 1 indicates that MASTER _0 initiates a Write operation (Write) to SLAVE _0, M0_ S1_ W indicates that MASTER _0 initiates a Write operation to SLAVE _1, and M1_ S0_ W and M1_ S1_ W are also similar.
When the master device initiates a write operation Request to the slave device, namely when a write address valid signal (axi _ awvalid) of a write address channel of the current master device is pulled high, the Request is rewritten to 1 at the moment, and if a write protection signal axi _ awvalid is 2' b01, the Exclusive is rewritten to 1; if its write protection signal axi _ awward is 2' b10, Locked is rewritten to 1.
When the master device initiating the application obtains the bus use right, the signal of the write preparation axi _ awready is set to be 1, the handshake with axi _ awvalid is completed, the write operation is indicated to be completed, and the Request signal of the corresponding channel is set to be 0.
TABLE 2 read operation status table
| Read operation transmission channel | Locked | Exclusive | Request | Arbitration weights |
| M0_S0_R | 0 | 0 | | M0_S0_R_w |
| M0_S1_R | ||||
| 0 | 0 | | M0_S1_R_w | |
| M1_S0_R | ||||
| 0 | 0 | | M1_S0_R_w | |
| M1_S1_R | ||||
| 0 | 1 | Request_r_11 | M1_S1_R_w |
The Read operation transfer channel M0_ S0_ R in table 2 indicates that MASTER _0 initiates a Read operation (Read) to SLAVE _0, M0_ S1_ R indicates that MASTER _0 initiates a Read operation to SLAVE _1, and M1_ S0_ R and M1_ S1_ R are also similar.
When the master device initiates a read operation Request to the slave device, namely when a read address valid signal (axi _ valid) of a read address channel of the current master device is pulled high, the Request is rewritten to 1, and if a read protection signal axi _ address is 2' b01, the Exclusive is rewritten to 1; if the read protection signal axi _ arprot is 2' b10, the Locked is rewritten to 1.
When the master device initiating the application obtains the bus use right, the signal of axi _ ready is set to be 1, the handshake with axi _ invalid is completed, the sending of the read operation is completed, and the Request signal of the corresponding channel is set to be 0.
3) Presetting arbitration weight
The initial arbitration weight of each channel is preset according to the actual use environment, and the distribution is carried out according to the principle that the arbitration weight of the channel with large preset data flow is high, and the arbitration weight of the channel with small preset data flow is low. But need to satisfy all initial arbitration weights with a sum of 256 (2)8) I.e., the total arbitration weight.
M0_S0_W_w+M1_S0_W_w+M0_S1_W_w+M1_S1_W_w＝256
M0_S0_R_w+M1_S0_R_w+M0_S1_R_w+M1_S1_R_w＝256
4) Dynamic arbitration weight adjustment
a) Firstly, judging whether a read-write operation request has Locked transmission or not, namely, inquiring whether a request with Locked 1 exists in a read-write operation state table or not, if only one channel in the read-write operation is in Locked transmission, giving the next bus use right to the transmission channel until the Locked in the operation state table is rewritten into 0 after the Locked operation is completed, and temporarily not distributing bus arbitration right to the read-write channel without Locked operation. For example, if the Locked of M0_ S1_ W in the write status table is 1, the arbitration right of the next write operation is given to the channel, and the read operation temporarily does not allocate the bus right to any read operation channel until the Locked transfer of the write operation is completed.
b) Whether Exclusive transmission exists in the read-write operation request is judged, and it is indicated that both Locked transmission and Exclusive transmission are judged through read-write protection signals, so that mutual exclusion exists, namely one operation cannot be simultaneously Locked transmission and Exclusive transmission.
If some channel exists in the read or write operation and is Exclusive transmission, the next bus authority is given to the transmission channel until the Exclusive operation is completed, and then Exclusive in the state table is rewritten into 0. It does not need to suspend another read or write operation as compared to a Locked transfer.
When there are no Locked and Exclusive transfers, the subsequent steps are entered. In subsequent steps read and write operations are performed completely independently and in parallel.
c) Computing arbitration ranges
Take M0_ S0_ W-64, M0_ S1_ W-32, M1_ S0_ W-64, M1_ S1_ W-96, Request _ W _ 00-1, Request _ W _ 01-0, Request _ W _ 10-1, Request _ W _ 11-0 as an example:
Sum_w＝M0_S0_W_w*Request_w_00+M0_S1_W_w*Request_w_01+M1_S0_W_w*Request_w_10+M1_S1_W_w*Request_w_11
wherein Sum _ w represents the actual total arbitration weight;
then Sum _ w is 128;
arbitration weight range for M0_ S0_ W transmission channel: 0 to M0_ S0_ W _ Request _ W _00 _ 256/Sum _ W-1, i.e. 0 to 127 (rounded if decimal);
the arbitration weight range of the M0_ S1_ W transmission channel is 0 because it does not apply for the bus usage right;
arbitration weight range for M1_ S0_ W transmission channel: m0_ S0_ W _ Request _ W _00 _ 256/Sum _ W to M0_ S0_ W _ Request _ W _00 _ 256/Sum _ W + M1_ S0_ W Request _ W _10 _ 256/Sum _ W-1, i.e., 128 to 255;
the arbitration weight range of the M1_ S1_ W transmission channel is 0 because it does not apply for bus privilege.
d) Judging which transmission channel has the value in the arbitration range of which transmission channel according to the constructed true random number random _0, and then obtaining the bus use right of which transmission channel;
e) and c, setting the Request signal of the corresponding channel in the read-write operation state table to be 0 after the read-write operation is completed, and returning to the step a to perform the next arbitration operation.
In a second aspect of the embodiments of the present invention, a bus-based arbitration system is further provided. FIG. 3 is a schematic diagram illustrating an embodiment of a bus-based arbitration system provided by the present invention. As shown in fig. 3, a bus-based arbitration system includes: an arbitration weight distribution module 10 configured to form a transmission channel between each master device and each slave device connected to the bus, and distribute an initial arbitration weight to each transmission channel based on a preset total arbitration weight; a marking module 20, configured to mark, in response to a read or write operation request of a transmission channel received by a bus, a request state of the transmission channel in an operation state table, and mark, in response to a protection signal carried by the operation request being a lock signal or an exclusive signal, a lock state corresponding to the lock signal or an exclusive state corresponding to the exclusive signal in the operation state table; the query module 30 is configured to query whether a lock state with a flag or an exclusive state with a flag exists in the operation state table; a calculating module 40, configured to, in response to that there is no lock state with a flag and there is no exclusive state with a flag, calculate an arbitration weight range thereof based on an initial arbitration weight and a total arbitration weight of a transmission channel corresponding to a request state with a flag in the operation state table; and a bus usage right allocation module 50 configured to collect a random number generated by a random number generator associated with the bus, and allocate a bus usage right to a transmission channel corresponding to the arbitration weight range in which the value of the random number is located, so that the operation request is transmitted in the corresponding transmission channel.
In a third aspect of the embodiment of the present invention, a computer-readable storage medium is further provided, and fig. 4 is a schematic diagram illustrating a computer-readable storage medium implementing a bus-based arbitration method according to an embodiment of the present invention. As shown in fig. 4, the computer-readable storage medium 3 stores computer program instructions 31. The computer program instructions 31, when executed by a processor, implement the method of any of the embodiments described above.
It shall be understood that all embodiments, features and advantages set forth above with respect to the bus-based arbitration method according to the present invention apply equally, without conflict with each other, to the bus-based arbitration system and to the storage medium according to the present invention.
In a fourth aspect of the embodiments of the present invention, there is further provided a computer device, including a memory 402 and a processor 401 as shown in fig. 5, where the memory 402 stores therein a computer program, and the computer program implements the method of any one of the above embodiments when executed by the processor 401.
Fig. 5 is a schematic hardware structure diagram of an embodiment of a computer device for executing the bus-based arbitration method according to the present invention. Taking the computer device shown in fig. 5 as an example, the computer device includes a processor 401 and a memory 402, and may further include: an input device 403 and an output device 404. The processor 401, the memory 402, the input device 403 and the output device 404 may be connected by a bus or other means, and fig. 5 illustrates an example of a connection by a bus. The input device 403 may receive input numeric or character information and generate key signal inputs related to user settings and function control of the bus-based arbitration system. The output device 404 may include a display device such as a display screen.
The memory 402, which is a non-volatile computer-readable storage medium, may be used to store non-volatile software programs, non-volatile computer-executable programs, and modules, such as program instructions/modules corresponding to the bus-based arbitration method in the embodiments of the present application. The memory 402 may include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required for at least one function; the storage data area may store data created using a bus-based arbitration method, and the like. Further, the memory 402 may include high speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid state storage device. In some embodiments, memory 402 may optionally include memory located remotely from processor 401, which may be connected to local modules via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The processor 401 executes various functional applications of the server and data processing, i.e. implementing the bus-based arbitration method of the above-described method embodiments, by running non-volatile software programs, instructions and modules stored in the memory 402.
Finally, it should be noted that the computer-readable storage medium (e.g., memory) herein can be either volatile memory or nonvolatile memory, or can include both volatile and nonvolatile memory. By way of example, and not limitation, nonvolatile memory can include Read Only Memory (ROM), Programmable ROM (PROM), Electrically Programmable ROM (EPROM), Electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM), which can act as external cache memory. By way of example and not limitation, RAM is available in a variety of forms such as synchronous RAM (DRAM), Dynamic RAM (DRAM), Synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), Enhanced SDRAM (ESDRAM), Synchronous Link DRAM (SLDRAM), and Direct Rambus RAM (DRRAM). The storage devices of the disclosed aspects are intended to comprise, without being limited to, these and other suitable types of memory.
Those of skill would further appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the disclosure herein may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as software or hardware depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the disclosed embodiments of the present invention.
The foregoing is an exemplary embodiment of the present disclosure, but it should be noted that various changes and modifications could be made herein without departing from the scope of the present disclosure as defined by the appended claims. The functions, steps and/or actions of the method claims in accordance with the disclosed embodiments described herein need not be performed in any particular order. Furthermore, although elements of the disclosed embodiments of the invention may be described or claimed in the singular, the plural is contemplated unless limitation to the singular is explicitly stated.
It should be understood that, as used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly supports the exception. It should also be understood that "and/or" as used herein is meant to include any and all possible combinations of one or more of the associated listed items. The numbers of the embodiments disclosed in the embodiments of the present invention are merely for description, and do not represent the merits of the embodiments.
Those of ordinary skill in the art will understand that: the discussion of any embodiment above is meant to be exemplary only, and is not intended to intimate that the scope of the disclosure, including the claims, of embodiments of the invention is limited to these examples; within the idea of an embodiment of the invention, also technical features in the above embodiment or in different embodiments may be combined and there are many other variations of the different aspects of the embodiments of the invention as described above, which are not provided in detail for the sake of brevity. Therefore, any omissions, modifications, substitutions, improvements, and the like that may be made without departing from the spirit and principles of the embodiments of the present invention are intended to be included within the scope of the embodiments of the present invention.
Claims (10)
1. A method of bus-based arbitration comprising the steps of:
respectively forming transmission channels between each master device and each slave device connected with the bus, and distributing initial arbitration weights to the transmission channels based on preset total arbitration weights;
in response to the bus receiving a read or write operation request of a transmission channel, marking a request state of the transmission channel in an operation state table, in response to a protection signal carried by the operation request being a lock signal or an exclusive signal, marking a lock state corresponding to the lock signal or an exclusive state corresponding to the exclusive signal in the operation state table;
querying the operating state table for whether a locked state with the flag or an exclusive state with the flag exists;
in response to the absence of a locked state with the flag and the absence of an exclusive state with the flag, calculating an arbitration weight range thereof based on an initial arbitration weight for a transmission channel corresponding to a request state with the flag in the operating state table and the total arbitration weight;
and acquiring a random number generated by a random number generator associated with the bus, and allocating a bus use right to a transmission channel corresponding to the arbitration weight range in which the value of the random number is positioned so as to transmit the operation request in the corresponding transmission channel.
2. The method of claim 1, further comprising:
responding to the existence of the exclusive state with the mark in the operation state table, allocating a transmission channel corresponding to the exclusive state of the mark to the operation request, so that the operation request is transmitted in the corresponding transmission channel;
and deleting the corresponding mark of the exclusive state in response to the completion of the transmission of the operation request in the corresponding transmission channel.
3. The method of claim 1, further comprising:
responding to the fact that the operation request is a read operation request and a locking state with the mark exists in the operation state table and used for recording the read operation state, and distributing a transmission channel corresponding to the locking state of the mark for the read operation request so that the read operation request is transmitted in the corresponding transmission channel;
and in response to the read operation request being transmitted in the corresponding transmission channel completely, deleting the mark of the corresponding locking state.
4. The method of claim 1, further comprising:
and in response to the operation request being a write operation request and the locked state with the mark for recording the read operation state existing in the operation state table, suspending the bus right allocation of the write operation request.
5. The method of claim 1, wherein calculating the arbitration weight range based on the initial arbitration weight and the total arbitration weight of the transmission channel corresponding to the request state with the flag in the operation state table comprises:
calculating an actual total arbitration weight based on the initial arbitration weight of the transmission channel corresponding to the request state with the mark in the operation state table;
calculating an arbitration weight range for the corresponding transmission channel based on the initial arbitration weight and the actual total arbitration weight and the total arbitration weight.
6. The method of claim 1, further comprising:
and deleting the mark of the request state of the corresponding transmission channel in the operation state table in response to the completion of the transmission of the operation request in the corresponding transmission channel.
7. The method of claim 1, wherein assigning an initial arbitration weight for each transmission channel based on a predetermined total arbitration weight comprises:
and distributing initial arbitration weights for the transmission channels according to the data flow of the transmission channels in the use environment of the bus and based on a preset total arbitration weight.
8. A bus-based arbitration system, comprising:
the arbitration weight distribution module is configured to form transmission channels between each master device and each slave device connected with the bus respectively, and distribute initial arbitration weights for the transmission channels based on a preset total arbitration weight;
the marking module is configured to mark a request state of a transmission channel in an operation state table in response to a read or write operation request of the transmission channel received by the bus, and mark a lock state corresponding to the lock signal or an exclusive state corresponding to the exclusive signal in the operation state table in response to a protection signal carried by the operation request being a lock signal or an exclusive signal;
a query module configured to query whether a lock state with the flag or an exclusive state with the flag exists in the operation state table;
a calculation module configured to calculate an arbitration weight range based on an initial arbitration weight and the total arbitration weight of a transmission channel corresponding to a request state with the flag in the operation state table in response to an absence of a lock state with the flag and an absence of an exclusive state with the flag; and
and the bus use right distribution module is configured to collect the random number generated by the random number generator associated with the bus and distribute the bus use right to the transmission channel corresponding to the arbitration weight range in which the value of the random number is located, so that the operation request is transmitted in the corresponding transmission channel.
9. A computer-readable storage medium, characterized in that computer program instructions are stored which, when executed by a processor, implement the method according to any one of claims 1-7.
10. A computer device comprising a memory and a processor, characterized in that the memory has stored therein a computer program which, when executed by the processor, performs the method according to any one of claims 1-7.
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