CN113872579A - On-chip power-on reset circuit - Google Patents
On-chip power-on reset circuit Download PDFInfo
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- CN113872579A CN113872579A CN202111133635.5A CN202111133635A CN113872579A CN 113872579 A CN113872579 A CN 113872579A CN 202111133635 A CN202111133635 A CN 202111133635A CN 113872579 A CN113872579 A CN 113872579A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/22—Modifications for ensuring a predetermined initial state when the supply voltage has been applied
- H03K17/223—Modifications for ensuring a predetermined initial state when the supply voltage has been applied in field-effect transistor switches
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/125—Discriminating pulses
- H03K5/1252—Suppression or limitation of noise or interference
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Abstract
The invention discloses an on-chip power-on reset circuit, which comprises a reset pin, a Schmidt trigger circuit, an analog filter circuit, a digital filter circuit, an oscillator and an internal reset circuit, wherein the reset pin is connected with the Schmidt trigger circuit; the reset pin is used for externally connecting a reset signal; the Schmitt trigger circuit is used for filtering interference signals between input high threshold voltage and input low threshold voltage in the externally connected reset signals and outputting first-stage reset signals to the analog filter circuit; the analog filter circuit is used for filtering noise with the width below the first time in the first-stage reset signal and outputting a second-stage reset signal to the digital filter circuit; the digital filter circuit is used for filtering noise with the width from the first time to the second time and outputting an internal reset signal to the internal reset circuit. The chip power-on reset circuit can effectively filter noise in external reset signals, improves the robustness of the chip reset pin, and has low cost and low energy consumption.
Description
Technical Field
The invention relates to a semiconductor circuit technology, in particular to a chip power-on reset circuit for improving the robustness of a reset pin.
Background
When the chip is powered on, a power-on reset signal needs to be generated to inform the control module that power-on starting is completed, and the internal register of the chip is reset, so that the digital circuit starts to work from a default initial state.
As shown in fig. 1, a conventional on-chip power reset circuit includes: the power-on reset circuit comprises a filtering module 21, a voltage threshold detection module 22, a power-on reset signal generation module 23, a power-on reset signal delay module 24 and a power-on reset signal logic conversion module 25; wherein the content of the first and second substances,
the filtering module 21 is a high-frequency filtering module, and is used for filtering out high-frequency noise generated by the switching power supply, preventing the high-frequency noise from influencing a rear-stage circuit, and enhancing the stability and reliability of the circuit;
the voltage threshold detection module 22 is configured to detect and compare the voltage of the switching power supply with a preset threshold voltage, where the voltage threshold detection module 22 is a double-voltage threshold detection module, that is, for example, the power supply voltage at which the chip can normally operate is at least greater than the sum of the threshold voltage Vthn of the N-type MOS transistor and the threshold voltage Vthp of the P-type MOS transistor, that is, VDD > Vthn + Vthp, the voltage threshold detection module may ensure that the power supply voltage is sufficiently large, so that a power-on reset enable signal may be sent, and the anti-interference performance of the power-on reset circuit is greatly improved.
The power-on reset signal generating module 23 is configured to generate a power-on reset signal when the voltage of the switching power supply is greater than the preset threshold voltage after the voltage threshold detecting module 22 sends the power-on reset enable signal.
The power-on reset signal delay module 24 is configured to delay the power-on reset signal generated by the power-on reset signal generation module 23.
The power-on reset signal logic conversion module 25 is configured to convert the analog signal of the power-on reset signal delayed by the power-on reset signal delay module 24 into a digital logic signal, and provide the digital logic signal to a subsequent control system.
The chip power-on reset circuit is complex in structure, high in cost and large in chip power consumption.
Schmitt trigger (Schmitt trigger) is a comparator circuit that contains positive feedback. For a standard schmitt trigger, when the input voltage is higher than the forward threshold voltage, the output is high; when the transmission voltage is lower than the negative threshold voltage, the output is low; when the input voltage is between the positive and negative threshold voltages, the output is unchanged, that is, the output is inverted from the high level to the low level, or from the low level to the high level, the corresponding threshold voltages are different. The output will only change when there is a sufficient change in the input voltage, so this element is named a flip-flop. This dual threshold action is known as hysteresis, indicating that the schmitt trigger has memory. Essentially, a schmitt trigger is a bistable multivibrator. Schmitt triggers can be used as waveform shaping circuits to shape analog signal waveforms into square waveforms that can be processed by digital circuits, and can be used for interference rejection due to their hysteretic nature, including use in open-loop configurations for interference rejection, and in closed-loop positive/negative feedback configurations for implementing multivibrators. The schmitt trigger circuit is widely applied to the IO (input/output) design of a chip, can filter interference signals between a positive threshold voltage VIH and a negative threshold voltage VIL, but cannot filter abnormal noise;
the analog filter circuit is limited by the chip cost, and normally only nanosecond-level noise (glitch) is filtered;
the digital filter circuit can filter noise (burrs) with any width, but needs clock sampling, and the power consumption of the digital filter circuit is obviously increased by adopting a clock with too high frequency, so that the power consumption of a chip is too large. Generally, to ensure low power consumption of the digital filter circuit, the clock frequency used by the digital filter circuit is not higher than 20 MHz. The minimum value of the noise (spur) width that can be effectively filtered by digital filtering is related to the clock frequency used by the digital filtering, and the minimum value of the noise (spur) width that can be effectively filtered by digital filtering with low power consumption is usually 100 ns.
Disclosure of Invention
The invention aims to provide an on-chip power reset circuit which can effectively filter noise in an external reset signal, improves the robustness of a chip reset pin, and has low cost and low energy consumption.
In order to solve the technical problem, the chip power-on reset circuit provided by the invention comprises a reset pin, a Schmidt trigger circuit, an analog filter circuit, a digital filter circuit, an oscillator and an internal reset circuit;
the reset pin is used for being externally connected with a reset signal;
the Schmitt trigger circuit is used for filtering interference signals between input high threshold voltage and input low threshold voltage in external reset signals and outputting first-stage reset signals to the analog filter circuit;
the analog filter circuit is used for filtering noise with the width below first time in the first-stage reset signal and outputting a second-stage reset signal to the digital filter circuit;
the digital filter circuit is used for filtering noise with a width ranging from a first time to a second time and outputting an internal reset signal to the internal reset circuit, wherein the second time is longer than the first time.
Preferably, the analog filter circuit is an RC low-pass filter.
Preferably, the external reset signal is input through an external key.
Preferably, the first time is 100 nanoseconds.
Preferably, the second time is 50 microseconds.
Preferably, the chip power-on reset circuit further comprises an oscillator;
the oscillator is started when the secondary reset signal is in an effective state, and starts to output a clock signal to the digital filter circuit;
the digital filter circuit comprises a counter;
the digital filter circuit starts to work when receiving the clock signal and the counter starts to count;
when the count value of the counter reaches a set value, if the secondary reset signal is in an invalid state, the digital filter circuit does not generate an internal reset signal; if the secondary reset signal is in an effective state, the digital filter circuit generates an internal reset signal and outputs the internal reset signal to the internal reset circuit;
the period of the clock signal is less than the second time, and the set value is equal to or greater than the second time divided by an rounded-up value of the period of the clock signal.
Preferably, the period of the clock signal is less than 1/2 of the second time, and the set value is greater than 2;
preferably, the active state of the secondary reset signal is low, and the inactive state is high.
According to the chip power-on reset circuit, on the basis of effectively identifying the reset signal, the reset signal externally connected with the reset pin is firstly subjected to waveform shaping through the Schmitt trigger circuit, noise between input high threshold voltage and input low threshold voltage is filtered, then noise (burr) with the width smaller than the first time is filtered by adopting an analog filter circuit at the later stage, and finally noise (burr) with the width from the first time to the second time is filtered by adopting a digital filter circuit. This chip power-on reset circuit utilizes the complementary effect of analog filter circuit and digital filter circuit when the filtering noise, has solved the unable problem of filtering noise (burr) of schmitt trigger circuit to the analog filter circuit filtering width that can avoid is not enough, problem with high costs, can also avoid the too high problem of digital filter circuit energy consumption, noise in the external reset signal of ability effective filtering, the robustness of chip reset pin has been promoted, and with low costs the energy consumption is little.
Drawings
In order to more clearly illustrate the technical solution of the present invention, the drawings needed to be used in the present invention are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 illustrates a conventional on-chip power reset circuit;
fig. 2 is a circuit diagram of an embodiment of a power-on reset circuit of the invention.
Detailed Description
The technical solutions in the present invention will be described clearly and completely with reference to the accompanying drawings, and it should be understood that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Example one
The chip power-on reset circuit comprises a reset pin, a Schmidt trigger circuit, an analog filter circuit, a digital filter circuit, control logic, an oscillator and an internal reset circuit;
the reset pin is used for being externally connected with a reset signal;
the Schmitt trigger circuit is used for filtering interference signals between input high threshold voltage and input low threshold voltage in external reset signals and outputting first-stage reset signals to the analog filter circuit;
the analog filter circuit is used for filtering noise with the width below first time in the first-stage reset signal and outputting a second-stage reset signal to the digital filter circuit;
the digital filter circuit is used for filtering noise with a width ranging from a first time to a second time and outputting an internal reset signal to the internal reset circuit, wherein the second time is longer than the first time.
Preferably, the first time is 100 nanoseconds.
Preferably, the second time is 50 microseconds.
Preferably, the analog filter circuit is an RC low-pass filter.
Preferably, the external reset signal may be input through an external key.
In the power-on reset circuit of the chip according to the first embodiment, on the basis of effectively identifying the reset signal, the schmitt trigger circuit is used to shape the waveform to filter the noise between the input high threshold voltage and the input low threshold voltage, the analog filter circuit is used to filter the noise (glitch) whose width is smaller than the first time at the next stage, and the digital filter circuit is used to filter the noise (glitch) whose width is from the first time to the second time. This chip power-on reset circuit utilizes the complementary effect of analog filter circuit and digital filter circuit when the filtering noise, has solved the unable problem of filtering noise (burr) of schmitt trigger circuit to the analog filter circuit filtering width that can avoid is not enough, problem with high costs, can also avoid the too high problem of digital filter circuit energy consumption, noise in the external reset signal of ability effective filtering, the robustness of chip reset pin has been promoted, and with low costs the energy consumption is little.
Example two
Based on the first embodiment, the chip power-on reset circuit further comprises an oscillator;
the oscillator is started when the secondary reset signal is in an effective state, and starts to output a clock signal to the digital filter circuit;
the digital filter circuit comprises a counter;
the digital filter circuit starts to work when receiving the clock signal and the counter starts to count;
when the count value of the counter reaches a set value, if the secondary reset signal is in an invalid state, the digital filter circuit does not generate an internal reset signal; if the secondary reset signal is in an effective state, the digital filter circuit generates an internal reset signal and outputs the internal reset signal to the internal reset circuit;
the period of the clock signal is less than the second time, and the set value is equal to or greater than the second time divided by an rounded-up value of the period of the clock signal.
Preferably, the period of the clock signal is less than 1/2 of the second time, and the set value is greater than 2;
preferably, the active state of the secondary reset signal is low, and the inactive state is high.
In the chip power-on reset circuit of the second embodiment, when the count value of the counter reaches a set value, it indicates that an interference signal in a reset signal from the outside of the chip is filtered out, and if the reset signal is in an invalid state, the oscillator is turned off, and the digital filter circuit does not generate an internal reset signal; if the reset signal is in an active state at this time, the oscillator operates, and the digital filter circuit generates an internal reset signal to be output to the internal reset circuit. In the second embodiment of the power-on reset circuit for a chip, the oscillator operates only when the reset signal is in an active state, and the digital filter circuit determines that the external reset signal is the active reset signal only when the reset signal is in the active state and the duration of the active state is longer than the upper limit filtering width (second time) of the noise (glitch) of the digital filter circuit, so that the internal reset signal is sent to the internal reset circuit, thereby ensuring that the small-width noise and the large-width noise (glitch) in the external reset signal are effectively filtered, and improving the robustness of the reset pin and effectively reducing the power consumption and the cost of the chip.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.
Claims (8)
1. An on-chip power reset circuit is characterized by comprising a reset pin, a Schmidt trigger circuit, an analog filter circuit, a digital filter circuit, an oscillator and an internal reset circuit;
the reset pin is used for being externally connected with a reset signal;
the Schmitt trigger circuit is used for filtering interference signals between input high threshold voltage and input low threshold voltage in external reset signals and outputting first-stage reset signals to the analog filter circuit;
the analog filter circuit is used for filtering noise with the width below first time in the first-stage reset signal and outputting a second-stage reset signal to the digital filter circuit;
the digital filter circuit is used for filtering noise with a width ranging from a first time to a second time and outputting an internal reset signal to the internal reset circuit, wherein the second time is longer than the first time.
2. The on-chip power-on-reset circuit of claim 1,
the analog filter circuit is an RC low-pass filter.
3. The chip of claim 1,
the external reset signal is input through an external key.
4. The on-chip power-on-reset circuit of claim 1,
the first time is 100 nanoseconds.
5. The chip of claim 4,
the second time is 50 microseconds.
6. The on-chip power-on-reset circuit of claim 1,
the chip power-on reset circuit also comprises an oscillator;
the oscillator is started when the secondary reset signal is in an effective state, and starts to output a clock signal to the digital filter circuit;
the digital filter circuit comprises a counter;
the digital filter circuit starts to work when receiving the clock signal and the counter starts to count;
when the count value of the counter reaches a set value, if the secondary reset signal is in an invalid state, the digital filter circuit does not generate an internal reset signal; if the secondary reset signal is in an effective state, the digital filter circuit generates an internal reset signal and outputs the internal reset signal to the internal reset circuit;
the period of the clock signal is less than the second time, and the set value is equal to or greater than the second time divided by an rounded-up value of the period of the clock signal.
7. The on-chip power-on-reset circuit of claim 6,
the period of the clock signal is less than 1/2 of the second time, and the set value is greater than 2.
8. The on-chip power-on-reset circuit of claim 6,
the active state of the secondary reset signal is low level and the inactive state is high level.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111133635.5A CN113872579A (en) | 2021-09-27 | 2021-09-27 | On-chip power-on reset circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111133635.5A CN113872579A (en) | 2021-09-27 | 2021-09-27 | On-chip power-on reset circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN113872579A true CN113872579A (en) | 2021-12-31 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202111133635.5A Pending CN113872579A (en) | 2021-09-27 | 2021-09-27 | On-chip power-on reset circuit |
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| Country | Link |
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| CN (1) | CN113872579A (en) |
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2021
- 2021-09-27 CN CN202111133635.5A patent/CN113872579A/en active Pending
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