CN113851377A - Metal mask plate and preparation method and application thereof - Google Patents

Metal mask plate and preparation method and application thereof Download PDF

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Publication number
CN113851377A
CN113851377A CN202111107087.9A CN202111107087A CN113851377A CN 113851377 A CN113851377 A CN 113851377A CN 202111107087 A CN202111107087 A CN 202111107087A CN 113851377 A CN113851377 A CN 113851377A
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China
Prior art keywords
mask plate
metal
metal sheet
size
focused ion
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CN202111107087.9A
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Chinese (zh)
Inventor
韩斌
王光辉
许并社
马淑芳
夏林飞
王豆
穆含香
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Shaanxi University of Science and Technology
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Shaanxi University of Science and Technology
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Priority to CN202111107087.9A priority Critical patent/CN113851377A/en
Publication of CN113851377A publication Critical patent/CN113851377A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/3086—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/3088—Process specially adapted to improve the resolution of the mask

Abstract

The invention relates to the technical field of semiconductor device preparation, and discloses a metal mask plate and a preparation method and application thereof, wherein the preparation method comprises the following steps: s1, placing the metal sheet as a raw material under a focused ion beam; s2, opening the focused ion beam to obtain the image of the metal sheet under the vacuum condition, determining the coordinate position of the metal sheet needing a mask, and drawing a preset mask shape on the operation main screen of the focused ion beam according to the actual requirement; s3, adjusting the beam size of the focused ion beam according to the thickness of the selected metal sheet, roughly machining the metal sheet in the mask area until the metal sheet in the machining area is cut completely to obtain a hole in a preset mask shape, and then finely machining the hole by adjusting the beam size of the focused ion beam to enable the edge flatness of the hole to be 10-30 nm, thus obtaining the metal mask plate. The preparation method of the metal mask plate provided by the invention is short in preparation period and simple, and the mask plate is not easy to damage.

Description

Metal mask plate and preparation method and application thereof
Technical Field
The invention relates to the technical field of semiconductor device preparation, in particular to a metal mask plate and a preparation method and application thereof.
Background
The electronics industry has made significant advances since the mid-20 th century, and is now the largest industry in the world, based on semiconductor devices. To meet the great demands of the electronics industry, the field of semiconductor devices has been developed dramatically. Among them, the most important step in the fabrication of semiconductor devices is the fabrication of metal electrodes.
At present, the two most common methods for preparing electrodes are a photolithography method and a mask plate method. The photolithography method seriously affects the performance of the device due to the residue of the photoresist. The mask plate method can prepare clean and pollution-free metal electrodes, so that the method is widely developed.
The mask plate method is a hard mask plate method, in which silicon nitride and silicon are used as raw materials, and electrode holes are etched by an etching method, so that a desired metal electrode is obtained. However, the method has many problems at present, such as the silicon nitride mask plate is fragile in the using process and the preparation method is complex; the silicon mask plate has high etching difficulty and long preparation period.
At present, a method for manufacturing a flexible mask plate represented by PMMA (polymethyl methacrylate) and PDMS (polydimethylsiloxane) is available, but the flexible mask plate is low in preparation success rate and very complex in preparation process, and cannot be used for multiple times, which is a conventional main problem, so that the preparation cost is increased.
Therefore, it is necessary to develop a mask plate which is simple to prepare, short in manufacturing period, not easy to damage and capable of being used for multiple times.
Disclosure of Invention
In order to overcome the defects in the prior art, the invention provides the metal mask plate and the preparation method and application thereof, and the preparation method is simple and safe, has a short preparation period and can be used for multiple times.
The metal mask plate and the preparation method and the application thereof are realized by the following technical scheme:
the invention aims to provide a preparation method of a metal mask plate, which comprises the following steps:
s1, placing the metal sheet as a raw material under a focused ion beam;
s2, opening the focused ion beam to obtain the image of the metal sheet under the vacuum condition, determining the coordinate position of the metal sheet needing the mask, and drawing the shape of the mask according to the actual requirement on the operation main screen of the focused ion beam;
s3, adjusting the beam size of a proper focused ion beam according to the thickness and hardness of the selected metal sheet, roughly machining the metal sheet in the mask area until the metal sheet in the machining area is cut completely to obtain a hole in a preset mask shape, and then finely machining the hole by adjusting the beam to enable the edge flatness of the hole to be 10-30 nm, thus obtaining the metal mask plate.
Further, the size of the rough machining beam is 500-90000 pA;
the size of the finely processed beam is 1-50000 pA.
Further, when the thickness of the metal sheet is less than 10um, the size of the rough machining beam is adjusted to be 500-10000 pA;
when the thickness of the metal sheet is larger than 10um, the beam size of the rough machining is adjusted to 30000-90000 pA.
Further, the size of the beam for fine machining is smaller than that of the beam for rough machining.
Further, the metal sheet is made of any one of tantalum, gold, molybdenum, copper, iron, aluminum and nickel.
Further, the vacuum degree of the vacuum condition is 10-6～10-4Pa。
The second purpose of the invention is to provide a metal mask plate prepared by the preparation method.
The third purpose of the invention is to provide the application of the metal mask plate in the preparation of semiconductor devices.
Further, the field effect transistor is prepared by utilizing the metal mask plate, and the preparation method comprises the following steps:
obtaining a functional two-dimensional nanosheet by a mechanical stripping method, then placing the functional two-dimensional nanosheet on a silicon chip, then placing a metal mask plate on the functional two-dimensional nanosheet under an optical transfer platform, aligning mask holes of the metal mask plate with the functional two-dimensional nanosheet, plating Au electrodes at the positions of the mask holes by utilizing magnetron sputtering, and then manufacturing a back gate to obtain a field effect transistor;
wherein the functional two-dimensional nano sheet is MoS2Nanoplates or black phosphorus nanoplates.
Compared with the prior art, the invention has the following beneficial effects:
the invention takes various metal sheets as raw materials, uses FIB (focused ion beam) to carry out micro-processing on the metal sheets to obtain a metal mask plate with a pre-designed electrode structure, then pastes the metal mask plate on a substrate material, and carries out metal plating to obtain a preset mask structure. The metal mask plate prepared by FIB is adopted, steps of spin coating, ultraviolet exposure, photoresist removal and the like are omitted in the preparation process for preparing a single semiconductor device, and compared with the existing photoetching preparation method, the method is shorter in time consumption and simpler in process.
The preparation method of the metal mask plate provided by the invention is short in preparation period and simple, and the mask plate is not easy to damage in the use process due to the toughness of metal. The metal mask plate obtained by the invention can be used for preparing a metal mask structure with a complex structure on any substrate.
Drawings
Fig. 1 is an SEM image of a metal mask plate provided in example 1;
FIG. 2 shows MoS in example 92A photograph of the nanoplatelets;
FIG. 3 is a MoS alignment of metal mask in example 92A photo after nanosheet;
FIG. 4 shows MoS of example 92Field effect transistor photo.
Detailed Description
The technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention.
Example 1
A10 μm thick sheet of tantalum metal was placed in the FIB under vacuum 5X 10-4Below Pa, the Ga ion source was turned on with the sample stage rotated 53 ° (tult53 °), the beam size was adjusted to 50000Pa, 3 square holes 40 × 40 μm in size and 10 × 30 μm in size were drawn and arranged in this order, the width of the reserve channel was controlled to 10 μm, and then rough machining was performed for 90 minutes. And then, finely trimming the holes by adjusting the beam current to 30000pA and 10000pA in sequence to ensure that the edge flatness of the holes is 10nm to obtain a metal mask plate, wherein an SEM picture of the metal mask plate is shown in figure 1.
Example 2
A10 μm thick sheet of tantalum metal was placed in the FIB under vacuum 5X 10-4Below Pa, the Ga ion source was turned on with the sample stage rotated 53 ° (tult53 °), the beam size was adjusted to 50000Pa, 3 square holes 40 × 40 μm in size and 10 × 30 μm in size were drawn and arranged in this order, the width of the reserve channel was controlled to 10 μm, and then rough machining was performed for 90 minutes. And after 90 minutes, finely repairing the holes by adjusting the beam current to 30000pA and 10000pA in sequence to ensure that the edge flatness of the holes is 10nm, thus obtaining the metal mask plate.
Example 3
A10 μm thick sheet of tantalum metal was placed in the FIB under vacuum 5X 10-4Below Pa, the Ga ion source was turned on with the sample stage rotated 53 ° (tult53 °), turned on, and adjusted to 50000Pa beam size, 3 square holes 30 × 30 μm in size and 10 × 30 μm rectangular holes were drawn and arranged in this order, the width of the reserve channel was controlled to 10 μm, and then rough machining was performed for 60 minutes. And after 60 minutes, adjusting the beam current to 30000pA and 10000pA in sequence, and finely trimming the perforated plate of the device to ensure that the edge flatness of the hole is 20nm to obtain the metal mask plate.
Example 4
A10 μm thick sheet of tantalum metal was placed in the FIB under vacuum 5X 10-4Pa below, the Ga ion source was turned on with the sample stage rotated 53 ° (tult53 °)And adjusting the beam size to 50000pA, drawing 3 square holes with the size of 20 multiplied by 20 mu m and rectangular holes with the size of 10 multiplied by 30 mu m, arranging the square holes and the rectangular holes in sequence, controlling the width of the reserved channel to be 5 mu m, and then roughly processing the reserved channel for 50 minutes. And after 50 minutes, adjusting the beam current to 30000pA and 10000pA in sequence, and finely trimming the perforated plate of the mask to ensure that the edge flatness of the hole is 10nm to obtain the metal mask plate.
Example 5
A10 μm thick sheet of tantalum metal was placed in the FIB under vacuum 5X 10-4Pa or less, the Ga ion source was turned on with the sample stage rotated at 53 ° (tult53 °), the beam size was adjusted to 50000pA, circular holes of 5X 5 diameter of 5 μm and 1 μm interval were drawn, and then rough machining was performed for 60 minutes. And after 60 minutes, finely trimming the hole plate of the device by adjusting the beam current to 30000pA and 10000pA in sequence to ensure that the edge flatness of the hole is 10nm, thereby obtaining the metal mask plate.
Example 6
A3 μm thick sheet of tantalum metal was placed in the FIB under vacuum 5X 10-4Below Pa, the Ga ion source was turned on with the sample stage rotated 53 ° (tult53 °), the beam size was adjusted to 500Pa, 3 square holes 40 × 40 μm in size and 10 × 30 μm in size were drawn and arranged in this order, the width of the reserve channel was controlled to 10 μm, and then rough machining was performed for 120 minutes. And then adjusting the beam current to 300pA and 50pA in sequence, and finely repairing the holes to ensure that the edge flatness of the holes is 10nm to obtain the metal mask plate.
Example 7
A9 μm thick sheet of tantalum metal was placed in the FIB under vacuum 5X 10-4Pa or less, the Ga ion source is turned on under the condition that the sample platform rotates at 53 degrees (tult53 degrees), the beam current is adjusted to 10000pA, 3 square holes with the size of 40 x 40 mu m and rectangular holes with the size of 10 x 30 mu m are drawn and arranged in sequence, the width of the reserved channel is controlled to be 10 mu m, and then rough machining is carried out on the reserved channel, and the machining time is 90 minutes. And then adjusting the beam current to 5000pA and 1000pA in sequence, and finely trimming the holes to ensure that the edge flatness of the holes is 10nm to obtain the metal mask plate.
Example 8
A20 μm thick sheet of tantalum metal was placed in the FIB under vacuum 5X 10-4Pa or less, the Ga ion source was turned on with the sample stage rotated at 53 ° (tult53 °), the beam size was adjusted to 90000pA, 3 square holes of 40X 40 μm and 10X 30 μm in size were drawn and arranged in this order, the width of the reserve channel was controlled to 10 μm, and then rough machining was performed for 60 minutes. And then adjusting the beam current to 50000pA and 10000pA in sequence, and finely repairing the holes to ensure that the edge flatness of the holes is 10nm to obtain the metal mask plate.
Example 9
A10 μm thick metal copper sheet was placed in the FIB under vacuum 10-6Below Pa, the Ga ion source was turned on with the sample stage rotated 53 ° (tult53 °), the beam size was adjusted to 30000Pa, 3 square holes 40 × 40 μm in size and 10 × 30 μm in size were drawn and arranged in this order, the width of the reserve channel was controlled to 10 μm, and then rough machining was performed for 80 minutes. And then adjusting the beam current to 20000pA and 9000pA in sequence, and finely repairing the holes to ensure that the edge flatness of the holes is 10nm, thereby obtaining the copper mask plate.
Example 10
A10 μm thick sheet of metallic iron was placed in the FIB under vacuum 10-5Below Pa, the Ga ion source was turned on with the sample stage rotated 53 ° (tult53 °), the beam size was adjusted to 40000Pa, 3 square holes 40 × 40 μm in size and 10 × 30 μm in size were drawn and arranged in this order, the width of the reserve channel was controlled to 10 μm, and then rough machining was performed for 70 minutes. And then adjusting the beam current to 10000pA and 5000pA in sequence, and finely repairing the holes to ensure that the edge flatness of the holes is 10nm to obtain the iron mask plate.
Example 11
A10 μm thick sheet of aluminum was placed in the FIB under vacuum at 5X 10-5Below Pa, the Ga ion source was turned on with the sample stage rotated 53 ° (tult53 °), the beam size was adjusted to 30000Pa, 3 square holes 40 × 40 μm in size and 10 × 30 μm in size were drawn and arranged in this order, the width of the reserve channel was controlled to 10 μm, and then rough machining was performed for 70 minutes. The beam current is adjusted to beAnd 20000pA and 10000pA are used for finely trimming the holes to ensure that the edge flatness of the holes is 10nm, so as to obtain the aluminum mask plate.
Example 12
A10 μm thick metal plate was placed in the FIB under vacuum at 5X 10-4Below Pa, the Ga ion source was turned on with the sample stage rotated 53 ° (tult53 °), the beam size was adjusted to 50000Pa, 3 square holes 40 × 40 μm in size and 10 × 30 μm in size were drawn and arranged in this order, the width of the reserve channel was controlled to 10 μm, and then rough machining was performed for 60 minutes. And then, finely trimming the holes by adjusting the beam current to 30000pA and 10000pA in sequence to ensure that the edge flatness of the holes is 10nm, thus obtaining the gold mask plate.
Example 13
This example obtained MoS on a silicon substrate by mechanical lift-off2Nanosheets, as shown in fig. 2, were then aligned with the mask holes of the metal mask plate prepared in example 1 under an optical transfer stage to form two-dimensional sheet-like MoS on the silicon wafer2As shown in fig. 3, the MoS can be successfully prepared by plating an Au electrode at the hole position by magnetron sputtering and making a back gate2Field effect transistor, MoS2A photograph of a field effect transistor mirror is shown in fig. 4.
MoS of this example was calculated by experiment2The carrier mobility of the field effect transistor can reach 70cm at most2V-1·s-1。
Example 14
This example differs from example 13 in that:
the two-dimensional flaky black phosphorus is used in the embodiment, and the black phosphorus field effect transistor can be successfully prepared on a silicon wafer.
It should be noted that, since the steps and methods adopted are the same as those of the embodiments, the preferred embodiments are described in the present invention for the sake of avoiding redundancy, but once the basic inventive concepts are known, those skilled in the art may make further changes and modifications to these embodiments. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all such alterations and modifications as fall within the scope of the invention.
It is to be understood that the above-described embodiments are only a few embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

Claims (8)

1. A preparation method of a metal mask plate is characterized by comprising the following steps:
s1, placing the metal sheet as a raw material under a focused ion beam;
s2, opening the focused ion beam to obtain the image of the metal sheet under the vacuum condition, determining the coordinate position of the metal sheet needing a mask, and drawing a preset mask shape on the operation main screen of the focused ion beam according to the actual requirement;
s3, adjusting the beam size of the focused ion beam according to the thickness of the selected metal sheet, roughly machining the metal sheet in the mask area until the metal sheet in the machining area is cut completely to obtain a hole in a preset mask shape, and then finely machining the hole by adjusting the beam size of the focused ion beam to enable the edge flatness of the hole to be 10-30 nm, thus obtaining the metal mask plate.
2. The method according to claim 1, wherein the size of the rough beam is 500-90000 pA;
the size of the finely processed beam is 50-50000 pA.
3. The method as claimed in claim 2, wherein when the thickness of the metal sheet is less than 10 μm, the beam current of the rough machining is adjusted to 500-10000 pA;
when the thickness of the metal sheet is greater than or equal to 10 μm, the beam size of the rough machining is adjusted to 30000-90000 pA.
4. The method of claim 3, wherein the size of the fine machined beam is smaller than the size of the rough machined beam.
5. The method of claim 1, wherein the vacuum condition has a vacuum degree of 10-6～10-4Pa。
6. A metal mask plate produced by the production method according to any one of claims 1 to 5.
7. Use of a metal mask according to claim 6 in the manufacture of a semiconductor device.
8. The use of the metal mask plate according to claim 7 for manufacturing a semiconductor device, wherein the metal mask plate is used for manufacturing a field effect transistor, and the manufacturing method comprises the following steps:
obtaining a functional two-dimensional nanosheet by a mechanical stripping method, then placing the functional two-dimensional nanosheet on a silicon chip, then placing a metal mask plate on the functional two-dimensional nanosheet under an optical transfer platform, aligning mask holes of the metal mask plate with the functional two-dimensional nanosheet, plating Au electrodes at the positions of the mask holes by utilizing magnetron sputtering, and then manufacturing a back gate to obtain a field effect transistor;
wherein the functional two-dimensional nano sheet is MoS2Nanoplates or black phosphorus nanoplates.
CN202111107087.9A 2021-09-22 2021-09-22 Metal mask plate and preparation method and application thereof Pending CN113851377A (en)

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Application Number Priority Date Filing Date Title
CN202111107087.9A CN113851377A (en) 2021-09-22 2021-09-22 Metal mask plate and preparation method and application thereof

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115831760A (en) * 2023-02-08 2023-03-21 中南大学 Preparation method of field effect transistor and field effect transistor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115831760A (en) * 2023-02-08 2023-03-21 中南大学 Preparation method of field effect transistor and field effect transistor

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