CN113838750A - Dicing method and dicing apparatus for semiconductor device - Google Patents
Dicing method and dicing apparatus for semiconductor device Download PDFInfo
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- CN113838750A CN113838750A CN202111117128.2A CN202111117128A CN113838750A CN 113838750 A CN113838750 A CN 113838750A CN 202111117128 A CN202111117128 A CN 202111117128A CN 113838750 A CN113838750 A CN 113838750A
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- 238000000034 method Methods 0.000 title claims abstract description 57
- 239000004065 semiconductor Substances 0.000 title claims abstract description 28
- 238000005520 cutting process Methods 0.000 claims abstract description 242
- 230000008569 process Effects 0.000 claims abstract description 30
- 230000007246 mechanism Effects 0.000 claims description 46
- 238000003698 laser cutting Methods 0.000 claims description 34
- 229910003460 diamond Inorganic materials 0.000 claims description 12
- 239000010432 diamond Substances 0.000 claims description 12
- 239000011521 glass Substances 0.000 abstract description 20
- 238000002161 passivation Methods 0.000 abstract description 15
- 238000000227 grinding Methods 0.000 description 9
- 230000000694 effects Effects 0.000 description 8
- GVVPGTZRZFNKDS-JXMROGBWSA-N geranyl diphosphate Chemical compound CC(C)=CCC\C(C)=C\CO[P@](O)(=O)OP(O)(O)=O GVVPGTZRZFNKDS-JXMROGBWSA-N 0.000 description 8
- 239000000155 melt Substances 0.000 description 7
- 238000005516 engineering process Methods 0.000 description 6
- 230000006378 damage Effects 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 238000009825 accumulation Methods 0.000 description 2
- 238000005336 cracking Methods 0.000 description 2
- 230000029087 digestion Effects 0.000 description 2
- 238000002309 gasification Methods 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 230000001678 irradiating effect Effects 0.000 description 2
- 239000002210 silicon-based material Substances 0.000 description 2
- 230000003068 static effect Effects 0.000 description 2
- 238000005299 abrasion Methods 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 238000010923 batch production Methods 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000005284 excitation Effects 0.000 description 1
- 230000006355 external stress Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 230000007306 turnover Effects 0.000 description 1
- 238000009834 vaporization Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
- H01L21/3043—Making grooves, e.g. cutting
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K26/00—Working by laser beam, e.g. welding, cutting or boring
- B23K26/36—Removing material
- B23K26/362—Laser etching
- B23K26/364—Laser etching for making a groove or trench, e.g. for scribing a break initiation groove
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K26/00—Working by laser beam, e.g. welding, cutting or boring
- B23K26/36—Removing material
- B23K26/40—Removing material taking account of the properties of the material involved
- B23K26/402—Removing material taking account of the properties of the material involved involving non-metallic material, e.g. isolators
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K2101/00—Articles made by soldering, welding or cutting
- B23K2101/36—Electric or electronic devices
- B23K2101/40—Semiconductor devices
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Plasma & Fusion (AREA)
- Mechanical Engineering (AREA)
- Dicing (AREA)
- Processing Of Stones Or Stones Resemblance Materials (AREA)
Abstract
A method for scribing a semiconductor element and a scribing device are provided, wherein the scribing mode is to respectively adopt a first cutting process and a second cutting process for a first surface and a second surface of a wafer, which is equivalent to the first cutting process and the second cutting process both carry out semi-transparent cutting on the wafer and are matched together, so that cutting marks generated by the first cutting process and the second cutting process from the two surfaces are intersected in a wafer scribing way, and the problem of edge breakage on a glass passivation layer in wafer scribing is avoided. Even if some chipping is caused by real cutting errors in the process, the chipping cannot be generated on the glass passivation layer, the glass passivation layer on the surface cannot be influenced, and the stability of the electrical performance of the chip is guaranteed.
Description
Technical Field
The invention relates to the technical field of semiconductor packaging, in particular to a scribing method and a scribing device for a semiconductor element.
Background
The GPP glass passivated semiconductor device is favored due to the remarkable characteristics of bearing external stress, external cold and hot impact force, high temperature resistance, excellent comprehensive performance, suitability for batch production and the like, is widely applied to the fields of household appliances, electronic instruments, precision equipment, rail transit, data transmission, communication systems and the like at present, is one of industries developing in the direction of high-tech products, and has extremely wide application prospect and market prospect.
The glass passivation layers are arranged on two sides of a double-sided groove GPP glass passivation semiconductor product, and the glass passivation layers are harder and more brittle than a semiconductor silicon material, so that the conventional double-sided groove GPP glass passivation product adopts a mechanical cutting mode to cut a wafer with a blue film or split the wafer with the blue film, but the chip is damaged in different degrees no matter the wafer is cut through or the wafer is semi-split, so that the appearance quality of the cut product is poor, and the performance of the product is influenced.
Therefore, an effective dicing method is needed to effectively reduce the problem of edge chipping in the product, so that the obtained semiconductor element can meet the quality requirement of the market, and the performance of the semiconductor device is improved.
Disclosure of Invention
The invention provides a scribing method and a scribing device for a semiconductor element, which mainly solve the technical problem of how to effectively reduce the problem of edge breakage in a product and improve the appearance and quality of the obtained semiconductor element.
According to a first aspect, an embodiment provides a method of dicing a semiconductor element, comprising:
aligning to a scribing channel on a first surface of a wafer, and performing a first cutting process, wherein the cutting depth of the first cutting process is a first preset depth, and the first cutting process is an ultraviolet laser cutting process or a mechanical cutting process;
aligning to a scribing way on the second surface of the wafer, and performing a second cutting process, wherein the cutting depth of the second cutting process is a second preset depth, and the second cutting process is a mechanical cutting process;
the sum of the first preset depth and the second preset depth is larger than the thickness of the wafer.
Optionally, the cutting width of the first cutting process is adjusted to be smaller than the cutting width of the second cutting process.
Optionally, when the first cutting process is an ultraviolet laser cutting process, the wavelength of the ultraviolet laser in the ultraviolet laser cutting process is 355 nm.
Optionally, when the first cutting process is an ultraviolet laser cutting process, the first preset depth is less than or equal to half of the thickness of the wafer.
Optionally, the mechanical cutting process includes cutting the scribe lines aligned on the second side of the wafer using a diamond wheel blade.
According to a second aspect, an embodiment provides a dicing apparatus for a semiconductor element, including:
a wafer placing table;
the first cutting mechanism is used for aligning with scribing channels on the first surface of the wafer and carrying out a first cutting process, the cutting depth of the first cutting process is a first preset depth, and the first cutting mechanism is an ultraviolet laser cutting mechanism or a mechanical cutting mechanism;
the second cutting mechanism is used for aligning to scribing channels on the second surface of the wafer and performing a second cutting process, wherein the cutting depth of the second cutting process is a second preset depth, and the second cutting process is a mechanical cutting mechanism;
the second cutting mechanism is matched with the first cutting mechanism to cut the wafer, and the sum of the first preset depth and the second preset depth is larger than the thickness of the wafer.
Optionally, the cutting width of the first cutting mechanism for cutting the first surface of the wafer is a first width, the cutting width of the second cutting mechanism for cutting the second surface of the wafer is a second width, and the first width is smaller than the second width.
Optionally, when the first cutting mechanism is an ultraviolet laser cutting mechanism, the wavelength of ultraviolet laser in the ultraviolet laser cutting mechanism is 355 nm.
Optionally, when the first cutting mechanism is an ultraviolet laser cutting mechanism, the first preset depth for cutting the first surface of the wafer is less than or equal to half of the thickness of the wafer.
Optionally, the second cutting mechanism comprises a diamond wheel blade.
According to the semiconductor element scribing method and the semiconductor element scribing device, the first cutting process and the second cutting process are respectively adopted for the first surface and the second surface of the wafer in the scribing method, the first cutting process and the second cutting process are equivalent to semi-transparent cutting of the wafer and are matched together, so that cutting marks generated by the first cutting process and the second cutting process from the two surfaces are intersected in a wafer scribing channel, and the problem of edge breakage on a glass passivation layer in wafer scribing is avoided. Even if some chipping is caused by real cutting errors in the process, the chipping cannot be generated on the glass passivation layer, the glass passivation layer on the surface cannot be influenced, and the stability of the electrical performance of the chip is guaranteed.
Drawings
Fig. 1 is a flowchart of a dicing method according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the following detailed description and accompanying drawings. Wherein like elements in different embodiments are numbered with like associated elements. In the following description, numerous details are set forth in order to provide a better understanding of the present application. However, those skilled in the art will readily recognize that some of the features may be omitted or replaced with other elements, materials, methods in different instances. In some instances, certain operations related to the present application have not been shown or described in detail in order to avoid obscuring the core of the present application from excessive description, and it is not necessary for those skilled in the art to describe these operations in detail, so that they may be fully understood from the description in the specification and the general knowledge in the art.
Furthermore, the features, operations, or characteristics described in the specification may be combined in any suitable manner to form various embodiments. Also, the various steps or actions in the method descriptions may be transposed or transposed in order, as will be apparent to one of ordinary skill in the art. Thus, the various sequences in the specification and drawings are for the purpose of describing certain embodiments only and are not intended to imply a required sequence unless otherwise indicated where such sequence must be followed.
The numbering of the components as such, e.g., "first", "second", etc., is used herein only to distinguish the objects as described, and does not have any sequential or technical meaning. The term "connected" and "coupled" when used in this application, unless otherwise indicated, includes both direct and indirect connections (couplings).
As can be seen from the background art, in the dicing process of the double-sided-groove GPP glass-passivated semiconductor device, the problem of edge chipping exists, so that the appearance and performance of the manufactured semiconductor device are not guaranteed.
Through analysis, in the scribing process of the double-side groove GPP glass passivated semiconductor device, a mechanical cutting mode is used for carrying out abrasive wheel cutting, one mode is a one-edge cutting mode, namely, the double-side groove GPP glass passivated semiconductor device is cut through from one side of a wafer to the other side, firstly, the mode must endure the problem of low cutting speed in order to guarantee cutting thickness and accuracy in the cutting process, secondly, when the abrasive wheel is cut to the second side, the hardness of the abrasive wheel and the glass passivation layer on the second side collide forcibly, and cracking is inevitably formed, so that the edge cracking of the glass passivation layer of a chip can be possibly influenced; the other method is to cut the wafer to half depth and then split the wafer (crushing the whole wafer into small particles), which inevitably generates cracks in the breaking process, but the efficiency of splitting by direct crushing is improved greatly, and the abrasion of the grinding wheel during cutting can also be reduced, so that the cost is reduced, and the method is the main method used in the scribing at present. For a fine and high-precision device such as a chip, not only the time cost and economic cost of the whole process but also the performance of the chip need to be considered in the manufacturing process. It can be known that, there is a relatively efficient cutting method, that is, an ultraviolet cutting method, but the current ultraviolet cutting method cannot be applied to cutting of double-sided groove GPP glass passivated semiconductors because the energy of the emitted laser is large and fast, and the laser can penetrate rapidly, but the laser itself is discrete, and one laser beam is one beam and one beam is hit on the scribe lane of the wafer, so that when the wafer is scribed and cut, the laser beam irradiates on the material surface to generate high temperature vaporization, and form continuous and tight cutting points (blind holes), which will form scratches or have cutting effect when connected together, but when the laser forms each cutting point, the glass passivation layer or the semiconductor silicon material will quickly sublimate under the excitation of high energy to generate a melt to block on the scribe lane, therefore, in the actual operation process, the laser cutting cannot achieve the cutting effect, only the notch similar to the saw-tooth shape is formed on the scribing channel, and the scribing can be completed only by further carrying out the splitting operation on the notch, so that the laser cutting cannot avoid the splitting, and micro-cracks and edge breakage can also be generated.
In the embodiment of the invention, the first cutting process and the second cutting process are respectively adopted for the first surface and the second surface of the wafer, which is equivalent to that the first cutting process and the second cutting process are semi-transparent and cooperate with each other to realize a positive and negative cutting alternative scribing mode, so that the cutting marks generated by the first cutting process and the second cutting process from the two surfaces are intersected in the wafer scribing channel, even if some breakage is generated in the process due to real cutting errors, the breakage cannot be generated on a glass passivation layer, the glass passivation layer on the surface cannot be influenced, and the stability of the electrical performance of the chip is ensured.
Referring to fig. 1, the present embodiment provides a method for dicing a semiconductor element, including:
The wafer in this embodiment may be a glass passivated diode wafer (GPP), where the wafer has a first side and a second side opposite to the first side, the first side and the second side both have scribe lanes, and the scribe lanes on the first side and the scribe lanes on the second side are completely corresponding. Before scribing of the first cutting process is carried out on the wafer, scribing channels on the first surface of the wafer need to be aligned with a cutting knife of the first cutting process, so that cutting can be strictly carried out according to the scribing channels, and chips cannot be damaged.
In this embodiment, the first preset depth of the cutting when the first cutting process is used to cut the first surface of the wafer may be half of the thickness of the entire wafer, or may be less than half of the thickness of the wafer.
In this embodiment, the first cutting process is an ultraviolet laser cutting process, and the wavelength of ultraviolet laser in the ultraviolet laser cutting process is 355 nm. The high-density high-energy laser beam of 355nm ultraviolet laser in the ultraviolet laser cutting process is used for irradiating on the scribing channel, the molecular bond of the material is damaged, and cutting is formed. When utilizing ultraviolet laser cutting technology to cut, it is fast to can not produce the physics striking at the cutting surface, thereby can not have extra damage, also can not be because of leading to the cutting orbit to deviate to some extent under the effect of physics collision, the guarantee is walked the line accurately, and the fineness of cutting is higher. In addition, in the embodiment, the cutting depth by using the laser cutting process is only half of the thickness of the wafer, or less than half of the thickness of the wafer, so that the melts generated by high-energy gasification when the laser beam cuts the cutting surface can be effectively reduced, and the occurrence of the accumulation of the melts on the cutting track can be reduced.
In some embodiments, the first cutting process is a mechanical cutting process, the scribe streets on the first surface are cut by using the mechanical cutting process, and the cutting thickness of the mechanical cutting process is controlled to be a first preset depth. The mechanical cutting process comprises the step of cutting by using a diamond grinding wheel blade, and specifically comprises the step of cutting or grooving the scribing channel on the first surface by driving the diamond grinding wheel blade to rotate at a high speed through an air static pressure spindle.
And 2, aligning the scribing channels on the second surface of the wafer, and performing a second cutting process, wherein the cutting depth of the second cutting process is a second preset depth, and the second cutting process is a mechanical cutting process.
In this embodiment, after the cutting of the first surface of the wafer is completed, the wafer is turned over, so that the second surface of the wafer can be cut. And generating a cutting mark on the scribing channel of the second surface, so that the cutting mark which is cut from the first surface is intersected in the wafer scribing channel, and the scribing of the wafer is completed.
In this embodiment, the second cutting process is a mechanical cutting process, and the mechanical cutting process includes cutting the scribe line on the second surface of the wafer by using a diamond grinding wheel blade, and specifically, the diamond grinding wheel blade may be driven by an aerostatic spindle to rotate at a high speed to cut or notch the scribe line on the second surface of the wafer.
It should be noted that, when the first cutting process is an ultraviolet laser cutting process, the first preset depth is smaller than half of the wafer thickness, and the second cutting process is controlled, so that the second preset depth is greater than half of the wafer thickness, which results in the highest cutting efficiency, the probability of chipping or the degree of chipping generated by cutting is the minimum, and the cutting effect is the best. When the first cutting process is a mechanical cutting process, the first preset depth is controlled to be half of the thickness of the wafer, the second cutting process is controlled, the second preset depth is larger than half of the thickness of the wafer, so that the cutting efficiency is highest, the possibility of chipping or the degree of chipping generated by cutting is minimum, and the cutting effect is best.
In this embodiment, the scratch width that the control first cutting technology cut first face is less than the scratch width that second cutting technology cut the second face, is so for the digestion cutting in-process, because in actual operation, the cutting is at the deviation error of walking on the line to the dislocation of the scratch on two sides and the condition that produces the step has been avoided takes place.
It should be noted that, in this embodiment, it is emphasized that the second cutting process must be a mechanical cutting process, so that, when used in conjunction with the laser cutting process, the influence of the melt in the laser riding process is eliminated, the place with the melt can be cut, the advantage of fast cutting in the laser cutting process is combined to the maximum extent, and the disadvantage that continuous scribing cannot be formed is reduced.
According to the semiconductor element scribing method, the scribing efficiency is better improved through the combination of the front and back surfaces of the first cutting process and the second cutting process and the control of the first preset depth and the second preset depth, the damage of edge breakage in scribing is greatly reduced, the difficulty of combination of the first cutting process and the second cutting process in application is overcome through the control of the scratch width on the first surface and the scratch width on the second surface, and the problem of steps caused by dislocation of scratches on the two surfaces is solved.
In this embodiment, a dicing apparatus for a semiconductor device is further provided, including: the wafer placing table, the first cutting mechanism and the second cutting mechanism.
The wafer placing table is used for placing a wafer to be diced, and in the embodiment, the wafer placing table can turn over and align the wafer.
The first cutting mechanism can be aligned to a scribing way on the first surface of the wafer to perform a first cutting process, the cutting depth of the first cutting process is a first preset depth, and the first cutting mechanism is an ultraviolet laser cutting mechanism or a mechanical cutting mechanism.
In this embodiment, the first preset depth of the cutting when the first cutting process is used to cut the first surface of the wafer may be half of the thickness of the entire wafer, or may be less than half of the thickness of the wafer.
In this embodiment, the first cutting process is an ultraviolet laser cutting process, and the wavelength of ultraviolet laser in the ultraviolet laser cutting process is 355 nm. The high-density high-energy laser beam of 355nm ultraviolet laser in the ultraviolet laser cutting process is used for irradiating on the scribing channel, the molecular bond of the material is damaged, and cutting is formed. When utilizing ultraviolet laser cutting technology to cut, it is fast to can not produce the physics striking at the cutting surface, thereby can not have extra damage, also can not be because of leading to the cutting orbit to deviate to some extent under the effect of physics collision, the guarantee is walked the line accurately, and the fineness of cutting is higher. In addition, in the embodiment, the cutting depth by using the laser cutting process is only half of the thickness of the wafer, or less than half of the thickness of the wafer, so that the melts generated by high-energy gasification when the laser beam cuts the cutting surface can be effectively reduced, and the occurrence of the accumulation of the melts on the cutting track can be reduced.
In some embodiments, the first cutting process is a mechanical cutting process, the scribe streets on the first surface are cut by using the mechanical cutting process, and the cutting thickness of the mechanical cutting process is controlled to be a first preset depth. The mechanical cutting process comprises the step of cutting by using a diamond grinding wheel blade, and specifically comprises the step of cutting or grooving the scribing channel on the first surface by driving the diamond grinding wheel blade to rotate at a high speed through an air static pressure spindle.
The second cutting mechanism can be aligned to the scribing channels on the second surface of the wafer to perform a second cutting process, wherein the cutting depth of the second cutting process is a second preset depth, and the second cutting process is a mechanical cutting mechanism. The sum of the first preset depth and the second preset depth is larger than the thickness of the wafer, namely the second cutting mechanism is matched with the first cutting mechanism to cut the wafer, so that cutting marks of the wafer and cutting from the first surface are intersected in a wafer scribing channel, and scribing of the wafer is completed.
In this embodiment, the second cutting process is a mechanical cutting process, and the mechanical cutting process includes cutting the scribe line on the second surface of the wafer by using a diamond grinding wheel blade, and specifically, the diamond grinding wheel blade may be driven by an aerostatic spindle to rotate at a high speed to cut or notch the scribe line on the second surface of the wafer.
It should be noted that, when the first cutting process is an ultraviolet laser cutting process, the first preset depth is smaller than half of the wafer thickness, and the second cutting process is controlled, so that the second preset depth is greater than half of the wafer thickness, which results in the highest cutting efficiency, the probability of chipping or the degree of chipping generated by cutting is the minimum, and the cutting effect is the best. When the first cutting process is a mechanical cutting process, the first preset depth is controlled to be half of the thickness of the wafer, the second cutting process is controlled, the second preset depth is larger than half of the thickness of the wafer, so that the cutting efficiency is highest, the possibility of chipping or the degree of chipping generated by cutting is minimum, and the cutting effect is best.
In this embodiment, the scratch width that the control first cutting technology cut first face is less than the scratch width that second cutting technology cut the second face, is so for the digestion cutting in-process, because in actual operation, the cutting is at the deviation error of walking on the line to the dislocation of the scratch on two sides and the condition that produces the step has been avoided takes place.
Through first cutting mechanism and second cutting mechanism cooperation work in above-mentioned semiconductor element's the scribing device for cut respectively from tow sides to the wafer, better improvement the scribing efficiency, the harm of collapsing the limit in the scribing has greatly reduced, and, through to in the control of scratch width on first face scratch width and second face scratch width, the difficult problem of first cutting mechanism and the cooperation application of second cutting mechanism combination has been overcome, the dislocation at two sides mar and the step problem that produces has been eliminated, the practicality of improvement.
The present invention has been described in terms of specific examples, which are provided to aid understanding of the invention and are not intended to be limiting. For a person skilled in the art to which the invention pertains, several simple deductions, modifications or substitutions may be made according to the idea of the invention.
Claims (10)
1. A method for dicing a semiconductor element, comprising:
aligning to a scribing channel on a first surface of a wafer, and performing a first cutting process, wherein the cutting depth of the first cutting process is a first preset depth, and the first cutting process is an ultraviolet laser cutting process or a mechanical cutting process;
aligning to a scribing way on the second surface of the wafer, and performing a second cutting process, wherein the cutting depth of the second cutting process is a second preset depth, and the second cutting process is a mechanical cutting process;
the sum of the first preset depth and the second preset depth is larger than the thickness of the wafer.
2. The dicing method according to claim 1, wherein a cutting width of the first cutting process is adjusted to be smaller than a cutting width of the second cutting process.
3. The dicing method according to claim 1, wherein when the first cutting process is an ultraviolet laser cutting process, the wavelength of the ultraviolet laser light in the ultraviolet laser cutting process is 355 nm.
4. The dicing method of claim 1, wherein when the first cutting process is an ultraviolet laser cutting process, the first predetermined depth is less than or equal to half the wafer thickness.
5. The dicing method of claim 1, wherein the mechanical cutting process comprises cutting the scribe streets aligned on the second side of the wafer using a diamond wheel blade.
6. A dicing apparatus for a semiconductor element, comprising:
a wafer placing table;
the first cutting mechanism is used for aligning with scribing channels on the first surface of the wafer and carrying out a first cutting process, the cutting depth of the first cutting process is a first preset depth, and the first cutting mechanism is an ultraviolet laser cutting mechanism or a mechanical cutting mechanism;
the second cutting mechanism is used for aligning to scribing channels on the second surface of the wafer and performing a second cutting process, wherein the cutting depth of the second cutting process is a second preset depth, and the second cutting process is a mechanical cutting mechanism;
the second cutting mechanism is matched with the first cutting mechanism to cut the wafer, and the sum of the first preset depth and the second preset depth is larger than the thickness of the wafer.
7. The dicing apparatus of claim 6, wherein the first cutting mechanism cuts a first side of the wafer to a first width, and the second cutting mechanism cuts a second side of the wafer to a second width, the first width being less than the second width.
8. The dicing apparatus according to claim 6, wherein when the first cutting mechanism is an ultraviolet laser cutting mechanism, the wavelength of the ultraviolet laser in the ultraviolet laser cutting mechanism is 355 nm.
9. The dicing apparatus of claim 6, wherein when the first cutting mechanism is an ultraviolet laser cutting mechanism, the first predetermined depth to cut the first side of the wafer is less than or equal to half the thickness of the wafer.
10. The dicing apparatus of claim 6, wherein the second cutting mechanism comprises a diamond wheel blade.
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN114180822A (en) * | 2021-12-08 | 2022-03-15 | 华天慧创科技(西安)有限公司 | Cutting method of wafer-level stacked structure optical glass |
CN115122209A (en) * | 2022-07-01 | 2022-09-30 | 沈阳和研科技有限公司 | Dicing method for anisotropic wafer |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20110017728A (en) * | 2009-08-14 | 2011-02-22 | 에스티에스반도체통신 주식회사 | Method for wafer sawing preventing a bond pad oxidation |
CN104347760A (en) * | 2013-07-24 | 2015-02-11 | 晶能光电(江西)有限公司 | Cutting method of LED chip |
CN104599960A (en) * | 2014-12-29 | 2015-05-06 | 国家电网公司 | Laser cutting method for high-power power electronic device wafer |
CN105234563A (en) * | 2015-10-23 | 2016-01-13 | 强茂电子(无锡)有限公司 | Back face laser cutting method for glassivation silicon wafer |
CN109461701A (en) * | 2018-09-27 | 2019-03-12 | 全球能源互联网研究院有限公司 | A kind of compound dicing method and semiconductor devices of power chip |
CN110085554A (en) * | 2019-05-16 | 2019-08-02 | 强茂电子(无锡)有限公司 | A kind of cutting method of glass passivated silicon wafer |
CN113369677A (en) * | 2021-05-31 | 2021-09-10 | 深圳赛意法微电子有限公司 | Wafer cutting method and cutting equipment |
-
2021
- 2021-09-23 CN CN202111117128.2A patent/CN113838750A/en active Pending
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20110017728A (en) * | 2009-08-14 | 2011-02-22 | 에스티에스반도체통신 주식회사 | Method for wafer sawing preventing a bond pad oxidation |
CN104347760A (en) * | 2013-07-24 | 2015-02-11 | 晶能光电(江西)有限公司 | Cutting method of LED chip |
CN104599960A (en) * | 2014-12-29 | 2015-05-06 | 国家电网公司 | Laser cutting method for high-power power electronic device wafer |
CN105234563A (en) * | 2015-10-23 | 2016-01-13 | 强茂电子(无锡)有限公司 | Back face laser cutting method for glassivation silicon wafer |
CN109461701A (en) * | 2018-09-27 | 2019-03-12 | 全球能源互联网研究院有限公司 | A kind of compound dicing method and semiconductor devices of power chip |
CN110085554A (en) * | 2019-05-16 | 2019-08-02 | 强茂电子(无锡)有限公司 | A kind of cutting method of glass passivated silicon wafer |
CN113369677A (en) * | 2021-05-31 | 2021-09-10 | 深圳赛意法微电子有限公司 | Wafer cutting method and cutting equipment |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN114180822A (en) * | 2021-12-08 | 2022-03-15 | 华天慧创科技(西安)有限公司 | Cutting method of wafer-level stacked structure optical glass |
CN114180822B (en) * | 2021-12-08 | 2024-03-12 | 华天慧创科技(西安)有限公司 | Cutting method of wafer-level stacked structure optical glass |
CN115122209A (en) * | 2022-07-01 | 2022-09-30 | 沈阳和研科技有限公司 | Dicing method for anisotropic wafer |
CN115122209B (en) * | 2022-07-01 | 2024-05-28 | 沈阳和研科技股份有限公司 | Dicing method for anisotropic wafer |
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