CN113836209A - Shared resource access method of multi-core processor, processor and multi-core system - Google Patents
Shared resource access method of multi-core processor, processor and multi-core system Download PDFInfo
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- G06F16/00—Information retrieval; Database structures therefor; File system structures therefor
- G06F16/20—Information retrieval; Database structures therefor; File system structures therefor of structured data, e.g. relational data
- G06F16/25—Integrating or interfacing systems involving database management systems
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- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G06F15/7807—System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
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- G06F16/20—Information retrieval; Database structures therefor; File system structures therefor of structured data, e.g. relational data
- G06F16/22—Indexing; Data structures therefor; Storage structures
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- G06F16/20—Information retrieval; Database structures therefor; File system structures therefor of structured data, e.g. relational data
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- G06F16/27—Replication, distribution or synchronisation of data between databases or within a distributed database system; Distributed database system architectures therefor
Abstract
The invention relates to the technical field of computers, and discloses a shared resource access method of a multi-core processor, a processor and a multi-core system. The method comprises the following steps: and acquiring a shared database, wherein the shared database comprises function data pointing to the shared resources, and generating a pointer list according to the function data so that the auxiliary processor calls the function data to access the shared resources according to the pointer of the pointer list. In the embodiment, the main processor provides an access path of the shared resource to the auxiliary processors, and the pointer list is used as an access interface library of the shared resource, so that the interfaces of the auxiliary processors for accessing the shared resource are unified, the situation that the code versions of the processors are inconsistent due to the iteration of the software versions of the shared resource is avoided, and the maintenance difficulty of the code versions of the processors can be reduced.
Description
Technical Field
The invention relates to the technical field of computers, in particular to a shared resource access method of a multi-core processor, the processor and a multi-core system.
Background
With the development of the automatic driving technology, more and more application devices of automobiles are provided, and the demand of a multi-core processor based on a common bus is continuously increased.
Generally, there may be situations where multi-core processors share the same resources in implementing some automotive functions. However, when the version of the shared resource is updated, version inconsistency of the multi-core processor is caused, thereby increasing difficulty in software maintenance.
Disclosure of Invention
An object of the embodiments of the present invention is to provide a shared resource access method for a multi-core processor, a processor, and a multi-core system, which are used to solve the technical defects in the prior art.
In a first aspect, an embodiment of the present invention provides a method for accessing a shared resource of a multicore processor, including:
obtaining a shared database, wherein the shared database comprises function data pointing to shared resources;
and generating a pointer list according to the function data, so that the auxiliary processor calls the function data to access the shared resource according to the pointer of the pointer list.
Optionally, the generating a pointer list according to the function data includes:
generating an index address of the function data to obtain a pointer;
and generating a pointer list according to each pointer.
Optionally, the generating a pointer list according to each of the pointers includes:
constructing a pointer list;
and writing each pointer into the pointer list in sequence according to a fixed index format.
Optionally, the header addresses of the pointer list are agreed by the respective processors together.
Optionally, the code segments for each processor are independent.
Optionally, the shared database and/or the list of pointers is maintained by a host processor.
Optionally, the method further comprises:
and when the change of the shared resources is detected, updating the shared database and/or the pointer list.
In a second aspect, an embodiment of the present invention provides a method for accessing a shared resource of a multicore processor, including:
traversing a pointer list to obtain a target pointer, wherein the pointer list comprises a plurality of pointers, each pointer points to corresponding function data, and the target pointer is one of the plurality of pointers;
calling the function data pointed by the target pointer;
and accessing the shared resource according to the function data pointed by the target pointer.
In a third aspect, an embodiment of the present invention provides a shared resource access apparatus for a multicore processor, including:
the database module is used for acquiring a shared database, and the shared database comprises function data pointing to shared resources;
and the pointer generation module is used for generating a pointer list according to the function data so that the auxiliary processor calls the function data to access the shared resources according to the pointer of the pointer list.
Optionally, the pointer generating module is specifically configured to: and generating index addresses of the function data to obtain pointers, and generating a pointer list according to each pointer.
Optionally, the pointer generating module is further specifically configured to: and constructing a pointer list, and writing each pointer into the pointer list in sequence according to a fixed index format.
Optionally, the header addresses of the pointer list are commonly agreed by the respective processors.
Optionally, the code segments for each processor are independent.
Optionally, the shared database and/or the list of pointers is maintained by the host processor.
Optionally, the shared resource access apparatus of the multi-core processor further includes a data updating module, where the data updating module is configured to update the shared database and/or the pointer list when detecting a change in the shared resource.
In a fourth aspect, an embodiment of the present invention provides a shared resource access apparatus for a multicore processor. The shared resource access device of the multi-core processor comprises:
the pointer traversing module is used for traversing the pointer list to obtain a target pointer, the pointer list comprises a plurality of pointers, each pointer points to corresponding function data, and the target pointer is one of the plurality of pointers;
the data calling module is used for calling the function data pointed by the target pointer;
and the resource access module is used for accessing the shared resource according to the function data pointed by the target pointer.
In a fifth aspect, an embodiment of the present invention provides a storage medium storing computer-executable instructions for causing a processor to execute the above-mentioned shared resource access method for a multi-core processor.
In a sixth aspect, an embodiment of the present invention provides a processor, configured to execute the method for accessing shared resources of a multi-core processor.
In a seventh aspect, an embodiment of the present invention provides a multi-core system, including:
an electronic device for providing a shared resource;
the main processor is used for executing the shared resource access method of the multi-core processor;
and the auxiliary processor is used for executing the shared resource access method of the multi-core processor.
In the method for accessing shared resources of a multi-core processor provided by the embodiment of the invention, a shared database is obtained, the shared database comprises function data pointing to shared resources, and a pointer list is generated according to the function data, so that an auxiliary processor calls corresponding function data to access the shared resources according to pointers of the pointer list.
Drawings
One or more embodiments are illustrated by way of example in the accompanying drawings, which correspond to the figures in which like reference numerals refer to similar elements and which are not to scale unless otherwise specified.
Fig. 1 is a schematic view of an application scenario of a multi-core system according to an embodiment of the present invention;
fig. 2 is a schematic flowchart of a shared resource access method for a multi-core processor according to an embodiment of the present invention;
FIG. 3 is a state diagram illustrating code segment domains of various processors according to an embodiment of the present invention;
FIG. 4a is a schematic flow chart of S22 shown in FIG. 2;
FIG. 4b is a diagram illustrating a mapping of a pointer to a list of pointers according to an embodiment of the present invention;
FIG. 5a is a schematic view of the process of S222 shown in FIG. 4 a;
FIG. 5b is a diagram illustrating a procedure for sequentially mapping each pointer to a pointer list according to a fixed index format according to an embodiment of the present invention;
FIG. 5c is a diagram illustrating a secondary processor traversing a pointer list to access a shared resource according to an embodiment of the present invention;
FIG. 6 is a flowchart illustrating a method for accessing a shared resource of a multi-core processor according to another embodiment of the present invention;
FIG. 7a is a schematic diagram of a shared resource access apparatus of a multi-core processor according to an embodiment of the present invention;
FIG. 7b is a diagram illustrating an apparatus for accessing a shared resource of a multi-core processor according to another embodiment of the present invention;
fig. 8 is a schematic diagram of another shared resource access apparatus of a multicore processor according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without any inventive step, are within the scope of the present invention.
It should be noted that, if not conflicted, the various features of the embodiments of the invention may be combined with each other within the scope of protection of the invention. Additionally, while functional block divisions are performed in device schematics, with logical sequences shown in flowcharts, in some cases, the steps shown or described may be performed in a different order than the block divisions in the devices, or in the flowcharts. The terms "first", "second", "third", and the like used in the present invention do not limit data and execution order, but merely distinguish the same items or similar items having substantially the same function and action.
The embodiment of the invention provides a multi-core system, wherein the multi-core system can be applied to any suitable application scene, such as an automatic driving vehicle-mounted system, a mobile phone, an unmanned aerial vehicle or aviation equipment.
Referring to fig. 1, the multi-core system 100 includes an electronic device 11, a main processor 12 and an auxiliary processor 13, wherein the electronic device 11, the main processor 12 and the auxiliary processor 13 are electrically connected to a same address bus 14.
The electronic device 11 is configured to provide a shared resource, where the shared resource is a resource shared by the main processor 12 and the auxiliary processor 13 in implementing a corresponding software function, and the shared resource includes data or a driver.
In some embodiments, the electronic device 11 may be any suitable electronic product that provides shared resources, such as a memory, a hardware interface, and so on.
The main processor 12 is arranged to provide a shared database, wherein the shared database comprises function data pointing to a shared resource. The host processor 12 generates a pointer list according to the function data, the pointer list includes a plurality of pointers, each pointer can map corresponding function data, and the host processor 12 executes the function data and can access corresponding shared resources.
In some embodiments, the main processor 12 may be a processing core to form a main control system, for example, the main control system is an automobile central control system.
The secondary processor 13 may access the pointer list in order to use the shared resource, wherein the number of secondary processors 13 may be one or more than two.
In some embodiments, the secondary processor 13 may be a processing core to form a secondary control system, for example, the secondary control system is a steering wheel system or a chassis system of a vehicle.
In some embodiments, the main processor 12 and the auxiliary processor 13 are configured with independent code segments, that is, the main processor 12 can operate according to the code function of its own independent code segment, and similarly, the auxiliary processor 13 can also operate according to the code function of its own independent code segment.
When the main processor 12 needs to use the shared resource of the electronic device 11, the main processor 12 accesses the shared resource according to the function data of the shared database, or calls the corresponding function data to access the shared resource according to the pointer of the pointer list.
When the auxiliary processor 13 needs to use the shared resource of the electronic device 11, the auxiliary processor 13 calls the corresponding function data to access the shared resource according to the pointer in the pointer list, so that the auxiliary processor 13 provides the pointer list for accessing the shared resource by using the main processor 12, the shared resource can be accessed by accessing the pointer list, and when the software version of the subsequent shared resource changes, the auxiliary processor 13 does not need to update the code version of itself, but only needs the main processor 12 to update the pointer list.
Referring to fig. 1, the central control system, the steering wheel system and the chassis system share the driver stored in the electronic device 11, that is, the driver is a shared resource, wherein the central control system is a main control system with a main processor 12 as a processing core, and the steering wheel system and the chassis system are auxiliary control systems with an auxiliary processor 13 as a processing core.
The main processor 12 maps the function data of the driver in the shared database, generates a pointer list according to the function data, and the auxiliary processor 13 traverses the pointer list to obtain a target pointer, calls the function data pointed by the target pointer, and accesses the shared resource according to the function data pointed by the target pointer. Subsequently, if the software version of the driver changes, the function data of the driver also changes. Since the pointer of the pointer list is only the function address pointing to the function data, although the function data changes, the function address may not need to be changed, that is, the pointer may not need to be changed, so that the subsequent main processor 12 may adaptively update the shared database according to the change of the driver, and thus, the auxiliary processor 13 may not need to be updated, thereby reducing the difficulty in software maintenance.
In some embodiments, if the software version of the driver changes, the pointer of the pointer list may also change, i.e., the pointer list may also be updated. In the conventional art, when the processors share the same function data of the driver, the processors need to be updated separately. Compared with the prior art, the method has the advantages that only the pointer list needs to be updated, so that the resource investment is less, the software maintenance difficulty can be reduced, and the software maintenance efficiency can be improved.
As another aspect of the embodiments of the present invention, an embodiment of the present invention further provides a method for accessing shared resources of a multi-core processor. Referring to fig. 2, a method S200 for accessing shared resources of a multi-core processor includes:
s21, acquiring a shared database, wherein the shared database comprises function data pointing to shared resources;
by way of example and not limitation, a shared database is a database for storing function data, each piece of function data being directed to a corresponding shared resource, wherein the function data includes shared functions and/or shared data, the shared functions being invokable and executable by a main processor or an auxiliary processor, and the shared data being usable by the main processor or the auxiliary processor.
And S22, generating a pointer list according to the function data, so that the auxiliary processor calls the function data to access the shared resource according to the pointer of the pointer list.
As an example and not by way of limitation, the pointer list is a list for storing pointers, each pointer points to corresponding function data, the main processor generates the pointer list according to the function data, and subsequently, when the auxiliary processor needs to use the shared resource, the auxiliary processor may call the corresponding function data according to the pointer of the pointer list to access the shared resource.
Therefore, in the embodiment, the main processor provides the access path of the shared resource to the auxiliary processors, and the pointer list is used as the access interface library of the shared resource, so that the interfaces of the auxiliary processors for accessing the shared resource are unified, the situation that the code versions of the processors are inconsistent due to the iteration of the software versions of the shared resource is avoided, and the difficulty in maintaining the code versions of the processors can be reduced.
In some embodiments, the header addresses of the pointer list are jointly agreed upon by the processors, for example, the header addresses of the pointer list are jointly agreed upon by the main processor and all the auxiliary processors, and any one processor can access the pointer list according to the header addresses without actively searching for the header addresses from other processors, thereby avoiding the reduction of the access efficiency of the shared resources due to handshaking with other processors.
In some embodiments, the code segments corresponding to the processors are independent, that is, the main processor is configured with its own independent code segment, and each auxiliary processor is also configured with its own independent code segment, please refer to fig. 3, the main processor 31 is configured with a first code segment 311 and a shared database 312, and the shared database 312 includes function data pointing to the shared resource 313. The host processor 31 generates a pointer list 314 from the function data of the shared resource 313. The secondary processor 32 is configured with the second code segment 321 and the secondary processor 33 is configured with the third code segment 331, and either the secondary processor 32 or the secondary processor 33 calls function data to access the shared resource 313 according to the pointers of the pointer list 314.
The main processor 31 can independently run the first code segment 311, and similarly, the auxiliary processor 32 can independently run the second code segment 321, and the auxiliary processor 33 can independently run the third code segment 331, because each processor corresponds to an independent code segment, this method is easy to divide domains systematically, when each processor needs to update an iterative code segment, it will not affect the normal running of the code segments of other processors, compared with the conventional technology, which provides a multi-core processor sharing the same code segment and is easy to solve the problem of the iterative update difficulty of the modern code version, this embodiment can not only achieve the multi-core purpose, but also achieve the multi-domain purpose, therefore, on one hand, when the shared resource needs to be used, the auxiliary processor can access the shared resource through the pointer list, when the shared resource changes, the code segment of the auxiliary processor does not need to be changed, the main processor maintains and updates the shared database and/or the pointer list, thereby improving the efficiency of software maintenance. On the other hand, when the shared resources are not needed, each processor can independently run its own code segment, and even if the own code segment changes, the running of the code segments of other processors is not affected, so that the purpose of domain division is achieved and the software version is better maintained.
In some embodiments, when generating the pointer list, referring to fig. 4a, S22 includes:
s221, generating an index address of the function data to obtain a pointer;
s222, generating a pointer list according to each pointer.
In S221, the host processor applies to the system for an index address that can index into the function data, that is, the index address is a pointer.
In S222, the main processor combines each pointer to obtain a pointer list. For example, the structure corresponding to the shared resource includes the following function data:
the structure comprises 3 sharing functions and 1 sharing Data, wherein the 3 sharing functions are respectively a first sharing Function1, a second sharing Function2 and a third sharing Function3, and the sharing Data is Data 4.
The host processor generates a header address of the pointer list, wherein the header address is 0 xAFFFFF 000, that is, the structure Struct ShareLibs _ devs _ core1_ ops _ list is stored in 0 xAFFFFF 000. Then, the host processor indexes the address of the first shared Function1 to obtain a first pointer: 0x3FFF 0000. Similarly, the host processor indexes the address of the second sharing Function2 to obtain a second pointer: 0x3FFF 3000. The main processor indexes the address of the third shared Function3 to obtain a third pointer: 0x3FFF 2010. The main processor carries out index address on the shared Data4 to obtain a fourth pointer: 0x3FFE0010, i.e., the summary results are shown in Table 1:
TABLE 1
As shown in fig. 4b, the main processor 31 records the first pointer, the second pointer, the third pointer, and the fourth pointer in the pointer list 314, respectively. Subsequently, the auxiliary processor 32 or the auxiliary processor 33 calls the function data to access the shared resource 313 according to the pointer of the pointer list 314.
In some embodiments, when generating the pointer list, please refer to fig. 5a, S222 includes:
s2221, constructing a pointer list;
s2222, writing each pointer into the pointer list in sequence according to the fixed index format.
For example, referring to fig. 5b, the main processor 31 sequentially writes the first pointer, the second pointer, the third pointer and the fourth pointer into the pointer list 314 according to a fixed index format, which is defined by a designer, in this way, it can ensure accurate and reliable access to the shared resource.
In some embodiments, the secondary processor traverses the list of pointers to obtain a target pointer, the target pointer being one of the plurality of pointers. And then, the auxiliary processor calls the function data pointed by the target pointer and accesses the shared resource according to the function data pointed by the target pointer.
For example, referring to FIG. 5c, when access to the shared resource is required, the secondary processor 32 traverses the pointer list 314, using the first pointer as the target pointer. The secondary processor 32 then calls the Function data Function1 pointed to by the first pointer to access the shared resource according to the Function data Function 1.
In order to ensure that the main processor and the auxiliary processor can reliably and accurately access the shared resource if the shared resource changes, in some embodiments, the shared resource access method S200 of the multi-core processor further includes updating the shared database and/or the pointer list when detecting the change of the shared resource. For example, the driver may be updated to cause the function data of the shared database to change from the original function data, and thus, the main processor may adaptively update the shared database and/or the pointer list, thereby ensuring that the main processor and the auxiliary processor can reliably and accurately access the shared resource.
It should be noted that, in the foregoing embodiments, a certain order does not necessarily exist between the foregoing steps, and those skilled in the art can understand, according to the description of the embodiments of the present invention, that in different embodiments, the foregoing steps may have different execution orders, that is, may be executed in parallel, may also be executed interchangeably, and the like.
As another aspect of the embodiments of the present invention, an embodiment of the present invention provides a method for accessing shared resources of a multicore processor. Referring to fig. 6, a method S600 for accessing shared resources of a multi-core processor includes:
s61, traversing the pointer list to obtain a target pointer, wherein the pointer list comprises a plurality of pointers, each pointer points to corresponding function data, and the target pointer is one of the plurality of pointers;
s62, calling function data pointed by the target pointer;
and S63, accessing the shared resource according to the function data pointed by the target pointer.
In the embodiment, the main processor provides an access path of the shared resource to the auxiliary processors, and the pointer list is used as an access interface library of the shared resource, so that interfaces of the auxiliary processors for accessing the shared resource are unified, and the situation that code versions of the processors are inconsistent due to iteration of software versions of the shared resource is avoided, thereby reducing the difficulty in maintaining the code versions of the processors.
It is understood that the technical details which are not elaborated in the present embodiment may be referred to the shared resource access method of the multi-core processor set forth in the above embodiments.
As another aspect of the embodiments of the present invention, an embodiment of the present invention provides a shared resource access apparatus for a multicore processor. The shared resource access device of the multi-core processor may be a software module, where the software module includes a plurality of instructions, and the instructions are stored in a memory, and the processor may access the memory and call the instructions to execute the instructions, so as to complete the shared resource access method of the multi-core processor described in each of the above embodiments.
In some embodiments, the shared resource access device of the multi-core processor may also be built by hardware devices, for example, the shared resource access device of the multi-core processor may be built by one or more than two chips, and the chips may work in coordination with each other to complete the shared resource access method of the multi-core processor described in the above embodiments. For another example, the shared resource access device of the multi-core processor may be constructed by various types of logic devices, such as a general processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA), a single chip, an arm (acorn RISC machine) or other programmable logic devices, discrete gate or transistor logic, discrete hardware components, or any combination of these components.
Referring to fig. 7a, a shared resource access device 700 of a multi-core processor includes a database module 71 and a pointer generation module 72.
The database module 71 is configured to obtain a shared database, where the shared database includes function data pointing to a shared resource, and the pointer generation module 72 is configured to generate a pointer list according to the function data, so that the auxiliary processor calls the function data to access the shared resource according to the pointer of the pointer list.
In the embodiment, the main processor provides an access path of the shared resource to the auxiliary processors, and the pointer list is used as an access interface library of the shared resource, so that interfaces of the auxiliary processors for accessing the shared resource are unified, and the situation that code versions of the processors are inconsistent due to iteration of software versions of the shared resource is avoided, thereby reducing the difficulty in maintaining the code versions of the processors.
In some embodiments, the pointer generation module 72 is specifically configured to: and generating index addresses of the function data to obtain pointers, and generating a pointer list according to each pointer.
In some embodiments, the pointer generation module 72 is further specifically configured to: and constructing a pointer list, and writing each pointer into the pointer list in sequence according to a fixed index format.
In some embodiments, the header addresses of the pointer list are commonly agreed upon by the various processors.
In some embodiments, the code segments for each processor are independent.
In some embodiments, the shared database and/or the list of pointers is maintained by the host processor.
In some embodiments, referring to fig. 7b, the shared resource access apparatus 700 of the multi-core processor further includes a data update module 73, and the data update module 73 is configured to update the shared database and/or the pointer list when detecting a change in the shared resource.
As another aspect of the embodiments of the present invention, an embodiment of the present invention provides a shared resource access apparatus for a multicore processor. Referring to fig. 8, the shared resource access apparatus 800 of the multi-core processor includes a pointer traversal module 81, a data calling module 82, and a resource access module 83.
The pointer traversing module 81 is configured to traverse a pointer list to obtain a target pointer, where the pointer list includes multiple pointers, each pointer points to corresponding function data, the target pointer is one of the multiple pointers, the data calling module 82 is configured to call the function data pointed by the target pointer, and the resource accessing module 83 is configured to access a shared resource according to the function data pointed by the target pointer.
In the embodiment, the main processor provides an access path of the shared resource to the auxiliary processors, and the pointer list is used as an access interface library of the shared resource, so that interfaces of the auxiliary processors for accessing the shared resource are unified, and the situation that code versions of the processors are inconsistent due to iteration of software versions of the shared resource is avoided, thereby reducing the difficulty in maintaining the code versions of the processors.
As another aspect of the embodiments of the present invention, an embodiment of the present invention provides a processor. The processor is used to execute the method for accessing shared resources of the multi-core processor set forth in the various embodiments above, wherein the processor may be a general purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA), a single chip, an arm (acorn RISC machine) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination of these components. Also, a processor may be a microcontroller or a state machine. A processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.
As another aspect of the embodiments of the present invention, an embodiment of the present invention provides a storage medium, where the storage medium stores computer-executable instructions, and the computer-executable instructions are executed by one or more processors, so that the one or more processors may execute the shared resource access method of a multi-core processor in any of the method embodiments.
The storage medium, which is a non-volatile computer-readable storage medium, may be used to store non-volatile software programs, non-volatile computer-executable programs, and modules, such as program instructions/modules corresponding to the shared resource access method of the multi-core processor in the embodiment of the present invention. The processor executes various functional applications and data processing of the shared resource access device of the multi-core processor by running the nonvolatile software program, the instructions and the modules stored in the storage medium, that is, the shared resource access method of the multi-core processor provided by the above method embodiment and the functions of each module or unit of the above device embodiment are realized.
The storage medium includes high speed random access memory and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid state storage device. In some embodiments, the storage medium optionally includes memory located remotely from the processor, and such remote memory may be coupled to the processor via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The program instructions/modules are stored in a storage medium and, when executed by one or more processors, perform a shared resource access method for a multi-core processor in any of the method embodiments described above.
Embodiments of the present invention further provide a computer program product, which includes a computer program stored on a non-volatile computer-readable storage medium, where the computer program includes program instructions, and when the program instructions are executed by a processor, the processor is caused to execute any one of the shared resource access methods of the multi-core processor.
The above-described embodiments of the apparatus or device are merely illustrative, wherein the unit modules described as separate parts may or may not be physically separate, and the parts displayed as module units may or may not be physical units, may be located in one place, or may also be distributed on a plurality of network module units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment.
Through the above description of the embodiments, those skilled in the art will clearly understand that each embodiment can be implemented by software plus a general hardware platform, and certainly can also be implemented by hardware. Based on such understanding, the above technical solutions essentially or contributing to the related art may be embodied in the form of a software product, which can be stored in a computer-readable storage medium, such as ROM/RAM, magnetic disk, optical disk, etc., and includes several instructions for enabling a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the method according to the embodiments or some parts of the embodiments.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; within the idea of the invention, also technical features in the above embodiments or in different embodiments may be combined, steps may be implemented in any order, and there are many other variations of the different aspects of the invention as described above, which are not provided in detail for the sake of brevity; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.
Claims (11)
1. A shared resource access method of a multi-core processor is characterized by comprising the following steps:
obtaining a shared database, wherein the shared database comprises function data pointing to shared resources;
and generating a pointer list according to the function data, so that the auxiliary processor calls the function data to access the shared resource according to the pointer of the pointer list.
2. The method of claim 1, wherein generating a list of pointers from the function data comprises:
generating an index address of the function data to obtain a pointer;
and generating a pointer list according to each pointer.
3. The method of claim 2, wherein said generating a list of pointers from each of said pointers comprises:
constructing a pointer list;
and writing each pointer into the pointer list in sequence according to a fixed index format.
4. The method of claim 1, wherein the header addresses of the pointer list are commonly agreed upon by the respective processors.
5. The method of claim 1, wherein the code segments for each processor are independent.
6. The method of claim 1, wherein the shared database and/or the list of pointers is maintained by a host processor.
7. The method of any of claims 1 to 6, further comprising:
and when the change of the shared resources is detected, updating the shared database and/or the pointer list.
8. A shared resource access method of a multi-core processor is characterized by comprising the following steps:
traversing a pointer list to obtain a target pointer, wherein the pointer list comprises a plurality of pointers, each pointer points to corresponding function data, and the target pointer is one of the plurality of pointers;
calling the function data pointed by the target pointer;
and accessing the shared resource according to the function data pointed by the target pointer.
9. A storage medium storing computer-executable instructions for causing a processor to perform the method of shared resource access for a multi-core processor of claims 1 to 7 or claim 8.
10. A processor for performing the method of shared resource access of a multicore processor of claims 1 to 7 or claim 8.
11. A multi-core system, comprising:
an electronic device for providing a shared resource;
a host processor for performing the shared resource access method of the multi-core processor of any of claims 1 to 7;
a secondary processor for performing the shared resource access method of a multicore processor of claim 8.
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