CN113821160A - Memory data access device and memory data storage and reading method - Google Patents
Memory data access device and memory data storage and reading method Download PDFInfo
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- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
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Abstract
The invention discloses a memory data access device and a memory data storage and reading method, which mainly comprise the following steps: each storage unit comprises at least two continuous data storage areas in the memory; the address storage areas respectively correspond to the storage units and are used for storing the first address of the next storage unit in the memory; the data memory is used for continuously storing data in the storage units, establishing new storage units after the current storage units are full, recording the first addresses of the new storage units in the address storage areas of the original storage units, and continuously storing the data in the new storage units; and the data reader is used for obtaining the data storage area where the data element to be read is located in at least one storage unit according to the specified position of the data element to be read in the data, the number of the data storage areas of each storage unit and the information stored in the address storage area, and reading the data element from the data storage area.
Description
Technical Field
The present invention relates to the field of computer technologies, and in particular, to a memory data access device and a memory data storage and reading method.
Background
Currently, memory storage is mainly divided into two types, namely continuous memory address storage and discontinuous chain storage, and the corresponding technologies are an array storage mode and a linked list storage mode respectively.
As shown in fig. 1, the array storage manner refers to applying for a continuous memory address in the memory and storing data in the memory. When the space is insufficient, another continuous memory address is reapplied, the size of the continuous memory address is 1.5 times of the original size, the original data is copied, for example, in fig. 1, 4 groups of data are respectively data 1, data 2, data 3 and data 4 in the original space, when new data 5 is inserted, the original space is insufficient, another larger continuous memory space address is reapplied in the memory, the size of the newly applied memory space is 1.5 times of the original space, all the data in the original space are copied to the newly applied memory space, and then the data 5 is inserted into the memory space address behind the data 4.
It can be seen from the above array storage manner that: when the memory has insufficient continuous memory space, capacity expansion failure can be caused, in addition, data in the original array needs to be copied to a new array during capacity expansion, higher system overhead is caused, when the original space is larger, the problem of reducing the storage speed due to the copying of the original array can also be caused, meanwhile, the array storage mode cannot be adopted for discontinuous memory space, and fragmentation of the memory space can also be caused by frequently adopting the array storage mode.
As shown in fig. 2, the linked list storage method means that the storage of data in the memory is physically discontinuous, and the logical continuity of data is realized by recording the position (memory space address) of the next data element in each data element. When a new data element is inserted, the new data element can be inserted only by newly applying a section of memory space address for storing new data in the memory and recording the memory space first address of the new data in the data element at the tail of the linked list.
As can be seen from the above linked list storage manner: the storage position of the next data element needs to be recorded in each data element, the recording storage position occupies a memory space, the memory space occupied by the recording storage position is generally equal to the space of the recording data element in size, which results in that the actual memory space occupied by each data element is 2 times of the memory space required by the data element, meanwhile, the linked list storage mode does not support random reading, when the nth data element needs to be read, the previous n-1 elements need to be traversed first, which causes higher system overhead, and when the linked list is longer, the problem of reduction of the reading speed is also brought.
Based on the above description, how to increase the memory data access speed and reduce the system overhead becomes a problem to be solved urgently.
Disclosure of Invention
In view of the above, the present invention provides a memory data access device, a memory data storage method, and a memory data reading method, so as to reduce the system overhead caused by the memory data access while ensuring the access speed of the memory data, so that the storage speed of the data is higher than that of the array storage method, and the data reading speed is higher than that of the linked list storage method, thereby reducing the system overhead while the memory access speed is higher than that of the array storage method and the linked list storage method as a whole.
The technical scheme of the invention is realized as follows:
a memory data access device, comprising:
the number of the storage units is at least one, wherein each storage unit comprises at least two data storage areas continuously occupied in the storage space of the memory;
when the number of the storage units is at least two, between two adjacent storage units in the data storage sequence, a first address of a next storage unit in the memory is stored in the address storage area corresponding to a previous storage unit, and at least two storage units form a storage unit chain through information stored in the address storage areas;
the data memory is used for continuously storing the data in each memory area of the memory unit, establishing a new memory unit in the memory after all data memory areas of the current memory unit are full, recording the first address of the new memory unit in the memory in the address memory area corresponding to the current memory unit, and continuously storing the data in each memory area of the new memory unit;
and the data reader is used for obtaining the data storage area where the data element to be read is located in at least one storage unit according to the specified position of the data element to be read in the data, the number of the data storage areas of each storage unit and the information stored in each address storage area, and reading the data element from the data storage area where the data element is located.
Further, the space occupied by each address storage area in the memory is equal to the space occupied by each data storage area in the memory;
each address storage area is correspondingly connected with the tail end of the storage space occupied by each storage unit;
when the number of the memory units is at least two, the lengths of all the memory units are equal and the sizes of the data memory areas and all the address memory areas of all the memory units are equal.
Further, the number of the data storage areas in each of the storage units is 2 to 100.
A memory data storage method using the memory data access device as described above, comprising:
receiving data;
establishing a storage unit in a memory, and continuously storing the data in each storage area of the storage unit;
when all data storage areas of a current storage unit are full and the data are not completely stored, establishing a new storage unit in a memory and recording the first address of the new storage unit in the memory in an address storage area corresponding to the current storage unit;
and continuously storing the part of the data which is not stored in each storage area of the new storage unit.
A memory data reading method using the memory data access device as described above, comprising:
receiving a reading instruction containing a designated position of a data element to be read in the data;
acquiring a first address of a first storage unit used for storing the data in the memory;
obtaining the position of the first data storage area of the first storage unit in the memory according to the first address of the first storage unit;
in a storage unit chain for storing the data, according to the specified position, the number of data storage areas in each storage unit and the information recorded in the address storage area, obtaining a first address of a target storage unit where the data element is located in the memory;
in the target storage unit, obtaining a target data storage area of the data element in the target storage unit according to the designated position, the number of storage units from the first storage unit to the target storage unit and the number of the data storage areas in each storage unit;
data is read from the target data store to obtain the data element.
A non-transitory computer readable storage medium storing instructions that, when executed by a processor, cause the processor to perform the steps of the memory data storage method as described above.
An electronic device, comprising:
at least one processor; and the number of the first and second groups,
a memory communicatively coupled to the at least one processor; wherein the content of the first and second substances,
the memory stores instructions executable by the at least one processor to cause the at least one processor to perform the steps of the memory data storage method as described above.
A non-transitory computer readable storage medium storing instructions, wherein the instructions, when executed by a processor, cause the processor to perform the steps of the memory data reading method as described above.
An electronic device, comprising:
at least one processor; and the number of the first and second groups,
a memory communicatively coupled to the at least one processor; wherein the content of the first and second substances,
the memory stores instructions executable by the at least one processor to cause the at least one processor to perform the steps of the memory data reading method as described above.
Compared with the array storage mode, the memory data access device and the memory data storage and reading method do not need to copy the data in the existing storage unit after applying for a new continuous memory address as a new storage unit, thereby improving the data storage speed and reducing the system overhead; compared with the linked list storage mode, each storage unit comprises at least two data storage areas continuously occupied in the storage space of the memory, so that the number of the data storage areas in each storage unit is higher than the number of the address storage areas corresponding to the data storage areas, when the data elements in any one of the data storage areas are read, the number of the traversal storage units is reduced due to the increase of the number of the data storage areas in each storage unit, the times of reading the address storage areas and determining the initial addresses of the subsequent storage units of the chain of the storage units is obviously less than the times of determining the storage positions of the next data elements in the linked list storage mode, the data reading speed is increased, the system overhead is reduced, and in the whole, each storage unit comprises at least two data storage areas continuously occupied in the storage space of the memory, compared with a linked list storage mode, the storage unit and the address storage area have the advantages that the occupied space of the memory is saved.
Drawings
FIG. 1 is a diagram illustrating an array storage method in a conventional memory storage method;
FIG. 2 is a schematic diagram of a linked list storage method in a conventional memory storage method;
FIG. 3 is a diagram illustrating an embodiment of a memory data access device;
FIG. 4 is a diagram illustrating a memory data storage method according to an embodiment of the present invention;
FIG. 5 is a flowchart illustrating an embodiment of a memory data storage method according to the present invention;
FIG. 6 is a schematic diagram illustrating a method for reading memory data according to an embodiment of the present invention;
fig. 7 is a flowchart illustrating an embodiment of a memory data reading method according to the present invention;
FIG. 8 is a diagram of a memory cell in example 1 of the present invention;
FIG. 9 is a diagram of a memory cell in example 2 of the present invention;
fig. 10 is a schematic structural diagram of an electronic device in an embodiment of the invention.
In the drawings, the names of the components represented by the respective reference numerals are as follows:
10. memory cell
101. Data storage area
20. Address memory area
30. Data storage
40. Data reader
50. Memory device
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and examples.
As shown in fig. 3, the memory data access apparatus according to the embodiment of the present invention mainly includes a storage unit 10, an address storage area 20, a data storage 30, and a data reader 40. The number of the storage units 10 is at least one, each storage unit 10 occupies a continuous storage space of the memory 50, and each storage unit includes at least two data storage areas 101 that are continuously occupied in the storage space of the memory 50. The number of the address storage areas 20 is equal to the number of the storage units 10, each address storage area 20 is located at the rear end of each data storage area 10 and corresponds to each data storage area 10, when the number of the storage units 10 is at least two, the first address of the next storage unit 10 in the memory 50 is stored in the corresponding address storage area 20 connected with the tail end of the previous storage unit 10 between two adjacent storage units 10 in the data storage sequence, and at least two storage units 10 form a storage unit chain through the information stored in the address storage areas 20.
The data memory 30 is used for continuously storing data in each memory area 101 of the memory unit 10, and after all the data memory areas 101 of the current memory unit 10 are full, a new memory unit 10 is established in the memory 50, the first address of the new memory unit 10 in the memory 50 is recorded in the corresponding address memory area 20 connected with the tail end of the current memory unit 10, and the data are continuously stored in each memory area 101 of the new memory unit 10.
The data reader 40 is used for obtaining the data storage area 101 where the data element to be read is located in at least one storage unit 10 according to the designated position of the data element to be read in the data, the number of data storage areas of each storage unit 10 and the information stored in each address storage area 20, and reading the data element from the data storage area 101 where the data element is located.
Compared with the prior art, compared with the array storage mode, the memory data access device of the embodiment of the invention does not need to copy the data in the existing storage unit 10 after applying for a new continuous memory address as a new storage unit 10, thereby improving the data storage speed and reducing the system overhead; compared with the linked list storage mode, each storage unit 10 comprises at least two data storage areas 101 continuously occupied in the storage space of the memory 50, so that the number of the data storage areas 101 in each storage unit 10 is higher than the number of the address storage areas 20 corresponding to the data storage areas, when reading data elements in any one of the data storage areas 101, the number of the memory units 10 traversed is reduced due to the increase of the number of the data storage areas 101 in each storage unit 10, the number of times of reading the address storage areas 20 and determining the first address of the subsequent storage unit 10 of the chain of the storage units is significantly less than the number of times of determining the storage position of the next data element in the linked list storage mode, so that the data reading speed is increased and the system overhead is reduced, and as a whole, each storage unit 10 comprises at least two data storage areas 101 continuously occupied in the storage space of the memory 50, compared with a linked list storage mode, in the embodiment of the invention, the structures of the storage unit 10 and the address storage area 20 save more memory occupation space.
In an alternative embodiment, the space occupied by each address storage area 20 in the memory 50 is equal to the space occupied by each data storage area 101 in the memory 50, so as to facilitate the unification of the data storage lengths in the address storage areas 20 and the data storage areas 101, and facilitate the determination of the actual physical addresses of the data in the memory 50. Each address storage area 20 is correspondingly connected to the end of the storage space occupied by each storage unit 10, and each address storage area 20 and the corresponding storage unit 10 are continuously distributed on the physical address of the memory 50, thereby facilitating the speed of acquiring information in the address storage area 20 during the traversal process of the storage unit 10 when reading data elements. Further, in the preferred embodiment, when the number of memory cells 10 is at least two, the length of all memory cells 10 is equal and the size of the data memory area 101 and the size of all address memory areas 20 of all memory cells 10 are equal.
In alternative embodiments, the number of data storage areas 101 in each storage unit 10 is 2 to 100. Specifically, the number of the data storage areas 101 may be optimally set according to the actually used memory 50 and the system condition.
In the embodiment of the present invention, a data element refers to a piece of content in stored data.
Take the number of data storage areas 101 in each storage unit 10 as k as an example.
When the data memory 30 continuously stores data in each data storage area 101 of the storage unit 10, the data is sequentially stored in a first storage unit 10 established in the memory 50, a1 st data element of the data is stored in a first data storage area 101 of the first storage unit 10, a2 nd data element of the data is stored in a second data storage area 101 of the first storage unit 10, when the k-th data storage area 101 of the first storage unit 10 stores the k-th data element of the data and the data is not completely stored, the second storage unit 10 is established in the memory 50, a first address of the second storage unit 10 is stored in an address storage area 20 (located behind the k-th data storage area 101 of the first storage unit 10) corresponding to the first storage unit 10, and then a (k +1) th data element is stored in the first data storage area 101 of the second storage unit 10, the (k + 2) th data element is stored in the second data storage area 101 of the second storage unit 10, and so on until all data are stored.
When reading a specified data element, for example, when the specified position of the data element to be read in the data is the nth data element, the data reader 40 obtains the data storage area 101 in which the data element to be read (the nth data element) is located in at least one storage unit 10 according to the specified position of the data element to be read in the data (i.e., the nth data element), the number of data storage areas of each storage unit 10 (k), and the information stored in each address storage area 20, and includes:
the first address of the first storage unit 10 storing data in the memory 50 is obtained and assigned to the variable a, where a is a pointer type.
The number of memory cells 10 storing data from the 1 st data element to the nth data element is found:
t＝u＝[n/(k+1)]
wherein, the square brackets indicate rounding down the values therein, where k +1 indicates the total number of the address storage areas 20 added to all the data storage areas 101 in the storage unit 10 and the corresponding address storage areas 20, and setting the actual physical space lengths of all the data storage areas 101 and all the address storage areas 20 to be equal is for the convenience of address pointer control in the memory 50, and each adjustment of the pointer address only needs to increase or decrease the set integral multiple of the actual physical space lengths of the data storage areas 101 and the address storage areas 20. Where t is the number of storage units 10 storing data from the 1 st data element to the nth data element, u is a variable quantity used to determine whether an address pointer in the memory 50 reaches the storage unit 10 where the data element to be read (the nth data element) is located, and the initial assignment of u is the same as t.
After obtaining the value of u by t ═ u ═ n/(k +1) ], determining whether u is 0, if u is not 0, it indicates that the current address pointer does not reach the memory cell 10 where the data element to be read (nth data element) is located, then reading the first address of the next memory cell 10 from the address storage area 20 corresponding to the current memory cell 10 after the current memory cell 10, where the address pointer jumps to the address storage area 20 corresponding to the current memory cell 10 by the following formula to read the corresponding information:
a＝*(a+k)
and u is assigned to u-1, i.e., u-1. Note that a is an address pointer, and k needs to be converted according to the actual physical address length of each data storage area when performing calculation.
Then, it is continuously determined whether u is 0, and if u is still not 0, the above-described processes of a ═ k and u ═ u-1 are continuously performed.
If u is 0, it indicates that the current address pointer has reached the memory cell 10 where the data element to be read (nth data element) is located, and at this time, the data storage area 101 where the data element to be read (nth data element) is located is obtained by the following formula:
R＝a+(n-t*k)-1
where R is the address of the data storage area where the data element to be read (the nth data element) is located. Note that a is an address pointer, and when performing the calculation, (n-t × k) part needs to be converted according to the actual physical address length of each data storage area.
This completes the determination of the data storage area 101 in which the specified data element is located when the data reader 40 reads the specified data element.
Based on the foregoing memory data access device, an embodiment of the present invention further provides a memory data storage method, as shown in fig. 4, including:
receiving data;
establishing a storage unit in the memory, and continuously storing data in each storage area of the storage unit;
when all data storage areas of the current storage unit are full and the data are not completely stored, establishing a new storage unit in the memory and recording the first address of the new storage unit in the memory in the address storage area corresponding to the current storage unit;
and continuously storing the parts of the data which are not stored in the new storage units in the storage areas.
The following describes a memory data storage method according to an embodiment of the present invention with an embodiment.
In this example, the number of data storage areas in each storage unit is k, and the length of the data to be stored is the length of N1 data storage areas, as shown in fig. 5, this embodiment includes the following steps:
step a1, establishing a storage unit in the memory, recording the initial address of the storage unit, using the established storage unit as the current storage unit, and then executing step a 2;
step a2, storing the data in the current storage unit from the first data storage area to the k-th data storage area in sequence, and then executing step a 3;
step a3, judging whether the data is stored completely, if yes, finishing the data storage, otherwise, executing step a 4;
step a4, establishing a new storage unit in the memory, storing the first address of the new storage unit in the address storage area corresponding to the current storage unit, and then executing step a 5;
step a5, entering a new memory cell according to the information in the address memory area corresponding to the current memory cell, and using the new memory cell as the current memory cell, then executing step a 2.
The process of the above step a1 to step a5 is exemplified below by way of example.
Assuming that the number of data storage areas in each storage unit is 7, the length of data to be stored is 17, the process includes:
establishing a first storage unit in a memory, recording a first address of the first storage unit, and taking the first storage unit as a current storage unit;
storing data in a current storage unit (a first storage unit) from a first data storage area to a 7 th data storage area in sequence;
judging whether the data is stored completely, and if the length of the data to be stored is 17 data storage areas and the number of the data storage areas in each storage unit is 7, establishing a second storage unit in the memory if the data is not stored completely in the current storage unit (the first storage unit) (at the moment, the first storage unit stores the data with the length of the 7 data storage areas), and storing the first address of the second storage unit in the address storage area corresponding to the current storage unit (the first storage unit);
entering a second storage unit according to information in an address storage area corresponding to a current storage unit (a first storage unit), and taking the second storage unit as the current storage unit;
storing data in a current storage unit (a second storage unit) from a first data storage area to a 7 th data storage area in sequence;
judging whether the data is stored completely, and if the length of the data to be stored is 17 data storage areas and the number of the data storage areas in each storage unit is 7, establishing a third storage unit in the memory if the data is not stored completely in the current storage unit (the second storage unit) (at the moment, the data with the length of 14 data storage areas is stored in the first storage unit and the second storage unit), and storing the first address of the third storage unit in an address storage area corresponding to the current storage unit (the second storage unit);
entering a third storage unit according to the information in the address storage area corresponding to the current storage unit (second storage unit), and taking the third storage unit as the current storage unit;
entering a third storage unit according to information in an address storage area corresponding to the current storage unit (the third storage unit), and taking the third storage unit as the current storage unit;
storing data in a current storage unit (a third storage unit) from a first data storage area to a 7 th data storage area in sequence;
judging whether the data is stored completely, and since the length of the data to be stored is 17 data storage areas and the number of the data storage areas in each storage unit is 7, when the current storage unit (third storage unit) is stored into the third data storage area, the data is stored completely (at this time, the data with the length of 14 data storage areas is stored in the first storage unit and the second storage unit, the data with the length of 3 data storage areas is stored in the current storage unit, and the length of 17 data storage areas is counted), so that the data storage is completed.
Based on the above memory data access device, an embodiment of the present invention further provides a memory data reading method, as shown in fig. 6, including:
receiving a reading instruction containing a specified position of a data element to be read in data;
acquiring a first address of a first storage unit used for storing data in a memory;
obtaining the position of a first data storage area of a first storage unit in a memory according to the first address of the first storage unit;
in a storage unit chain for storing data, obtaining the first address of a target storage unit where a data element is located in a memory according to a specified position, the number of data storage areas in each storage unit and information recorded in an address storage area;
in the target storage unit, obtaining a target data storage area of the data elements in the target storage unit according to the specified position, the number of storage units from the first storage unit to the target storage unit and the number of data storage areas in each storage unit;
data is read from the target data storage area to obtain data elements to be read.
The obtaining of the first address of the first storage unit for storing data in the memory may be implemented by using the prior art, where the first address is obtained when the data is stored, and the method for obtaining the first address when the data is stored may be implemented by using the prior art, which is not described herein again.
The following describes a memory data reading method according to an embodiment of the present invention with an embodiment.
In this example, the number of data storage areas in each storage unit is k, and the data element to be read is the nth data element in the data, as shown in fig. 7, this embodiment includes the following steps:
step b1, acquiring the first address of the first storage unit for storing data in the memory, assigning the first address to a variable a, wherein a is a pointer type, and then entering step b 2;
step b2, obtaining the number of storage units storing data from the 1 st data element to the nth data element by the formula t ═ u ═ n/(k +1), and then proceeding to step b 3;
b3, judging whether u is 0, if so, entering a step b5, otherwise, entering a step b 4;
b4, assigning a according to a formula a ═ (a + k), assigning u according to a formula u ═ u-1, and then entering a step b 3;
step b5, obtaining the address of the data storage area where the nth data element is located by the formula R ═ a + (n-t × k) -1, and then entering step b 6;
step b6, reading the content of the data storage area where the nth data element is located.
The process of the above step b1 to step b6 is exemplified below by way of example.
Example 1
Referring to fig. 8, the number of data storage areas in each storage unit is 7, and the data element to be read is the 5 th data element in the data, wherein the sequence number in each data storage area indicates the address and the sequence of each data storage area, and the process includes:
acquiring a first address a of a first storage unit for storing data in the memory, wherein a is assumed to be 1, and in this example, the first data storage area in the first storage unit for storing data is denoted as 1;
the number of storage units for storing data from the 1 st data element to the 5 th data element is determined by the formula t ═ u ═ n/(k +1) ], and is t ═ u ═ 5/(7+1) ] -0;
judging u to be 0, and obtaining R-1 + (5-0 x 7) -1-5 by the formula R-a + (n-t x k) -1;
the content in the data storage area (located in the first storage unit) with address 5 is read to obtain the 5 th data element.
Example 2
Referring to fig. 9, the number of data storage areas in each storage unit is 7, and the data element to be read is the 10 th data element in the data, wherein the sequence number in each data storage area indicates the address and the sequence of each data storage area, and the process includes:
acquiring a first address a of a first storage unit for storing data in the memory, wherein a is assumed to be 1, and in this example, the first data storage area in the first storage unit for storing data is denoted as 1;
the number of storage units for storing data from the 1 st data element to the 5 th data element is determined by the formula t ═ u ═ n/(k +1) ], and is t ═ u ═ 10/(7+1) ] -1;
judging u to be 1, obtaining a-8 (1+7) by the formula a-k (a + k), obtaining u-1-0 by the formula u-1, and pointing the address pointer to the first data storage area of the second storage unit by a-8 (reference numeral 8 in fig. 9);
judging u to be 0, and obtaining R-8 + (10-1-7) -1-10 by the formula R-a + (n-t-k) -1;
the 10 th data element is obtained by reading the content of the data storage area (located in the second storage unit) with the address of 10.
Embodiments of the present invention also provide a non-transitory computer-readable storage medium storing instructions, which, when executed by a processor, cause the processor to perform the steps of the memory data storage method as described in the foregoing description.
An embodiment of the present invention further provides an electronic device for executing a memory data storage method, where as shown in fig. 10, the electronic device includes: at least one processor 1 and a memory 2. The memory 2 is communicatively connected to the at least one processor 1, for example the memory 2 and the at least one processor 1 are connected by a bus. The memory 2 stores instructions executable by the at least one processor 1 to cause the at least one processor 1 to perform the steps of the memory data storage method as described above.
Embodiments of the present invention also provide a non-volatile computer-readable storage medium, which stores instructions that, when executed by a processor, cause the processor to perform the steps in the memory data reading method as described in the foregoing description.
An embodiment of the present invention further provides an electronic device for executing a memory data reading method, where as shown in fig. 10, the electronic device includes: at least one processor 1 and a memory 2. The memory 2 is communicatively connected to the at least one processor 1, for example the memory 2 and the at least one processor 1 are connected by a bus. The memory 2 stores instructions executable by the at least one processor 1, the instructions being executable by the at least one processor 1 to cause the at least one processor 1 to perform the steps of the memory data reading method as described above.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.
Claims (9)
1. A memory data access device, comprising:
the number of the storage units is at least one, wherein each storage unit comprises at least two data storage areas continuously occupied in the storage space of the memory;
when the number of the storage units is at least two, between two adjacent storage units in the data storage sequence, a first address of a next storage unit in the memory is stored in the address storage area corresponding to a previous storage unit, and at least two storage units form a storage unit chain through information stored in the address storage areas;
the data memory is used for continuously storing the data in each memory area of the memory unit, establishing a new memory unit in the memory after all data memory areas of the current memory unit are full, recording the first address of the new memory unit in the memory in the address memory area corresponding to the current memory unit, and continuously storing the data in each memory area of the new memory unit;
and the data reader is used for obtaining the data storage area where the data element to be read is located in at least one storage unit according to the specified position of the data element to be read in the data, the number of the data storage areas of each storage unit and the information stored in each address storage area, and reading the data element from the data storage area where the data element is located.
2. The memory data access device of claim 1, wherein:
the space occupied by each address storage area in the memory is equal to the space occupied by each data storage area in the memory;
each address storage area is correspondingly connected with the tail end of the storage space occupied by each storage unit;
when the number of the memory units is at least two, the lengths of all the memory units are equal and the sizes of the data memory areas and all the address memory areas of all the memory units are equal.
3. The memory data access device of claim 1, wherein:
the number of the data storage areas in each of the storage units is 2 to 100.
4. A memory data storage method using the memory data access device according to any one of claims 1 to 3, comprising:
receiving data;
establishing a storage unit in a memory, and continuously storing the data in each storage area of the storage unit;
when all data storage areas of a current storage unit are full and the data are not completely stored, establishing a new storage unit in a memory and recording the first address of the new storage unit in the memory in an address storage area corresponding to the current storage unit;
and continuously storing the part of the data which is not stored in each storage area of the new storage unit.
5. A memory data reading method using the memory data access device according to any one of claims 1 to 3, comprising:
receiving a reading instruction containing a designated position of a data element to be read in the data;
acquiring a first address of a first storage unit used for storing the data in the memory;
obtaining the position of the first data storage area of the first storage unit in the memory according to the first address of the first storage unit;
in a storage unit chain for storing the data, according to the specified position, the number of data storage areas in each storage unit and the information recorded in the address storage area, obtaining a first address of a target storage unit where the data element is located in the memory;
in the target storage unit, obtaining a target data storage area of the data element in the target storage unit according to the designated position, the number of storage units from the first storage unit to the target storage unit and the number of the data storage areas in each storage unit;
data is read from the target data store to obtain the data element.
6. A non-transitory computer readable storage medium storing instructions which, when executed by a processor, cause the processor to perform the steps of the memory data storage method of claim 4.
7. An electronic device, comprising:
at least one processor; and the number of the first and second groups,
a memory communicatively coupled to the at least one processor; wherein the content of the first and second substances,
the memory stores instructions executable by the at least one processor to cause the at least one processor to perform the steps in the memory data storage method of claim 4.
8. A non-transitory computer readable storage medium storing instructions which, when executed by a processor, cause the processor to perform the steps of the memory data reading method of claim 5.
9. An electronic device, comprising:
at least one processor; and the number of the first and second groups,
a memory communicatively coupled to the at least one processor; wherein the content of the first and second substances,
the memory stores instructions executable by the at least one processor to cause the at least one processor to perform the steps of the memory data reading method of claim 5.
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