CN113808521B - Pixel circuit, display panel and driving method of pixel circuit - Google Patents
Pixel circuit, display panel and driving method of pixel circuit Download PDFInfo
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- CN113808521B CN113808521B CN202111107801.4A CN202111107801A CN113808521B CN 113808521 B CN113808521 B CN 113808521B CN 202111107801 A CN202111107801 A CN 202111107801A CN 113808521 B CN113808521 B CN 113808521B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0233—Improving the luminance or brightness uniformity across the screen
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Abstract
The invention discloses a pixel circuit, a display panel and a driving method of the pixel circuit. The pixel circuit comprises a driving module, a compensation module, an initialization module, a first light-emitting control module, a data writing module and a second light-emitting control module. The compensation module is connected between the first end and the control end of the driving module and is used for responding to the first luminous control signal in an initialization stage, a compensation stage and a data writing stage, and the driving module performs threshold compensation through the conducted compensation module in the compensation stage. The initialization module is electrically connected with the compensation module, and is used for responding to the second light-emitting control signal to conduct in the initialization stage, and writing the initialization voltage signal into the control end of the driving module through the compensation module. Compared with the prior art, the invention improves the display uniformity and further improves the display image quality.
Description
Technical Field
The embodiment of the invention relates to the technical field of display, in particular to a pixel circuit, a display panel and a driving method of the pixel circuit.
Background
With the continuous development of display technology, panel manufacturers and consumers have increasingly demanded high resolution and high frequency display of display panels. However, as the refresh frequency increases, a problem of incomplete compensation function of the display panel may be caused.
Specifically, in the conventional pixel circuit, the threshold compensation is set during the driving process in the same period as the data writing, and the duration of the period is determined by the effective time of the scanning signal. However, the higher the refresh frequency of the scan signal, the shorter the effective time thereof, and thus, as the refresh frequency is increased, the compensation function of the display panel is not complete, and there is a phenomenon of display unevenness.
Disclosure of Invention
The invention provides a pixel circuit, a display panel and a driving method of the pixel circuit, which are used for improving display uniformity and display image quality.
In a first aspect, an embodiment of the present invention provides a pixel circuit, including:
the driving module comprises a control end, a first end and a second end, and is used for responding to the voltage of the control end to generate driving current so as to drive the light emitting module to emit light;
the compensation module is connected between the first end and the control end of the driving module and is used for responding to a first light emitting control signal in an initialization stage, a compensation stage and a data writing stage, and the driving module performs threshold compensation through the conducted compensation module in the compensation stage; the initialization phase, the compensation phase and the data writing phase are characterized by a driving time sequence of the pixel circuit in a working period;
The initialization module is electrically connected with the compensation module, and is used for responding to a second light-emitting control signal in the initialization stage to conduct, and writing an initialization voltage signal into the control end of the driving module through the compensation module;
the first light-emitting control module is electrically connected with the second end of the driving module and is used for responding to the second light-emitting control signal in the initialization stage and the light-emitting stage to conduct, and writing a first power supply signal into the second end of the driving module;
the data writing module is electrically connected with the second end of the driving module and is used for responding to the scanning signal in the data writing stage to conduct and writing the data signal into the control end of the driving module through the compensation module;
and the second light-emitting control module is connected between the first end of the driving module and the light-emitting module and is used for responding to the first light-emitting control signal in a light-emitting stage to conduct so as to enable the driving current to flow into the light-emitting module.
Optionally, the compensation module includes a first transistor and a second transistor;
a first pole of the first transistor is connected with the control end of the driving module, a first pole of the second transistor is connected with a second pole of the first transistor, and a second pole of the second transistor is connected with the first end of the driving module;
The grid electrode of the first transistor and the grid electrode of the second transistor are both connected with the first light-emitting control signal;
optionally, the first transistor and the second transistor are both N-type transistors.
Optionally, the initialization module includes a third transistor, a first pole of the third transistor is connected to the initialization voltage signal, a second pole of the third transistor is connected to the compensation module, and a gate of the third transistor is connected to the second light emission control signal;
optionally, the third transistor is a P-type transistor.
Optionally, the first light emitting control module includes a fourth transistor, and the second light emitting control module includes a fifth transistor;
a first electrode of the fourth transistor is connected with a first power supply signal, a second electrode of the fourth transistor is connected with a second end of the driving module, and a grid electrode of the fourth transistor is connected with the second light-emitting control signal;
a first electrode of the fifth transistor is connected with a first end of the driving module, a second electrode of the fifth transistor is connected with the light emitting module, and a grid electrode of the fifth transistor is connected with the first light emitting control signal;
optionally, the fourth transistor and the fifth transistor are P-type transistors.
Optionally, the driving module includes a sixth transistor, a first pole of the sixth transistor is connected to the first light emitting control module, a second pole of the sixth transistor is connected to the compensation module, a second pole of the sixth transistor is further connected to the second light emitting control module, and a gate of the sixth transistor is connected to the compensation module;
optionally, the sixth transistor is a P-type transistor.
Optionally, the data writing module includes a seventh transistor, a first pole of the seventh transistor is connected to the data signal, a second pole of the seventh transistor is connected to the second end of the driving module, and a gate of the seventh transistor is connected to the scanning signal;
optionally, the seventh transistor is a P-type transistor.
Optionally, the pixel circuit includes a storage module, where the storage module is connected to the control end of the driving module and is used to store the voltage of the control end of the driving module;
optionally, the storage module includes a storage capacitor, a first end of the storage capacitor is connected to the first power signal, and a second end of the storage capacitor is connected to the control end of the driving module.
In a second aspect, an embodiment of the present invention further provides a display panel, where the display panel includes the pixel circuit according to any one of the first aspects.
In a third aspect, an embodiment of the present invention further provides a driving method of a pixel circuit, where the pixel circuit includes a driving module, a compensation module, an initialization module, a first light emitting control module, a data writing module, a second light emitting control module, and a light emitting module; the driving method of the pixel circuit comprises an initialization stage, a compensation stage, a data writing stage and a light emitting stage;
in the initialization stage, the compensation module is conducted in response to a first light-emitting control signal, the initialization module and the first light-emitting control module are conducted in response to a second light-emitting control signal, the initialization module writes an initialization voltage into a control end of the driving module through the conducted compensation module, and the first light-emitting control module writes a first power supply signal into a second end of the driving module;
in the compensation stage, the compensation module is conducted in response to a first light emitting control signal, and the drive module conducts threshold compensation through the conducted compensation module;
in the data writing stage, the compensation module is conducted in response to the first light emitting control signal, the data writing module is conducted in response to the scanning signal, and the data writing module writes the data signal into the control end of the driving module through the conducted driving module and the compensation module;
In the light emitting stage, the first light emitting control module is turned on in response to the second light emitting control signal, the second light emitting control module is turned on in response to the first light emitting control signal, and the driving module generates driving current in response to the voltage of the control end of the driving module to drive the light emitting module to emit light.
Optionally, the first light emitting control signal and the second light emitting control signal are defined to be effective when the first level and the second level are defined to be effective when the scanning signal is the second level, and the first level and the second level are opposite;
wherein an overlapping interval exists between the effective time intervals of the first light-emitting control signal and the second light-emitting control signal, and the effective time interval of the scanning signal is located within the overlapping interval; the start time of the effective time interval of the scanning signal is adjustable.
The embodiment of the invention provides a novel pixel circuit structure, which comprises a driving module, a compensation module, an initialization module, a first light-emitting control module, a data writing module and a second light-emitting control module. The pixel circuit is controlled by a first light emission control signal, a second light emission control signal, and a scan signal. Specifically, the compensation module is connected between the first end and the control end of the driving module, and is used for responding to the first light emitting control signal in an initialization stage, a compensation stage and a data writing stage, and is conducted in the compensation stage, and the driving module conducts threshold compensation through the conducted compensation module. The initialization module is electrically connected with the compensation module, and is used for responding to the second light-emitting control signal to conduct in the initialization stage, and writing the initialization voltage signal into the control end of the driving module through the compensation module. The first light-emitting control module is electrically connected with the second end of the driving module and is used for responding to the second light-emitting control signal in an initialization stage and a light-emitting stage to conduct, and writing a first power signal into the second end of the driving module. Therefore, unlike the prior art in which the compensation time is controlled by the effective time of the scan signal, the pixel circuit provided by the embodiment of the invention can separate the compensation phase and the data writing phase, and can control the time of the compensation phase by using the start time of the scan signal. Therefore, when the threshold compensation is performed on the driving module, the embodiment is not limited by the high refresh frequency, and in a limited time, the data signal is fully written into the control end of the driving module, so that the full compensation of the threshold voltage is realized, the display uniformity is improved, and the display image quality is further improved.
Drawings
FIG. 1 is a schematic diagram of a conventional pixel circuit;
FIG. 2 is a timing diagram of a prior art pixel circuit;
fig. 3 is a schematic structural diagram of a pixel circuit according to an embodiment of the present invention;
FIG. 4 is a timing diagram of a pixel circuit according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of another pixel circuit according to an embodiment of the present invention;
FIG. 6 is a schematic diagram of another pixel circuit according to an embodiment of the present invention;
fig. 7 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;
FIG. 8 is a schematic diagram of another pixel circuit according to an embodiment of the present invention;
fig. 9 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;
fig. 10 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;
FIG. 11 is a schematic diagram of another pixel circuit according to an embodiment of the present invention;
fig. 12 to 15 are schematic diagrams showing on states of transistors of a pixel circuit at various stages according to an embodiment of the present invention;
fig. 16 is a flowchart of a driving method of a pixel circuit according to an embodiment of the present invention;
fig. 17 is a comparison diagram of compensation phase adjustment of a pixel circuit according to an embodiment of the present invention.
Detailed Description
The invention is described in further detail below with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting thereof. It should be further noted that, for convenience of description, only some, but not all of the structures related to the present invention are shown in the drawings.
As described in the background art, the existing pixel circuit has an incomplete compensation function, and thus has a problem of uneven display on the display panel. The inventors have found that the cause of this problem is as follows.
Fig. 1 is a schematic diagram of a conventional pixel circuit, fig. 2 is a timing diagram of a conventional pixel circuit, and the timing diagram of fig. 2 is applicable to the pixel circuit shown in fig. 1. The pixel circuit includes a driving transistor MD, a first switching transistor M1, a second switching transistor M2, a third switching transistor M3, a fourth switching transistor M4, a fifth switching transistor M5, a capacitor C0, and a light emitting device D1. The driving transistor MD, the first switching transistor M1, the second switching transistor M2, the third switching transistor M3, the fourth switching transistor M4, and the fifth switching transistor M5 are P-type transistors. Illustratively, the drive timing of the pixel circuit is:
In the first period t11, i.e., the initialization phase, only the first scan signal S1 is at a low level, the third switching transistor M3 is turned on, and the initialization voltage signal Vref is written into the gate of the driving transistor MD through the third switching transistor M3. Wherein the voltage of the initialization voltage signal Vref is low compared to the data signal to ensure that the driving transistor MD is turned on.
In the second period t22, that is, the data writing and threshold compensation stage, only the second scan signal S2 is at a low level, the first switch tube M1 and the second switch tube M2 are turned on, the data signal Vdata is written into the control terminal of the driving transistor MD through the first switch tube M1, the driving transistor MD and the second switch tube M2, and finally, the voltage at the control terminal of the driving transistor MD is Vdata-Vth, where Vth is the threshold voltage of the driving transistor MD, so as to implement writing and threshold compensation of the data signal. Since the gate voltage of the driving transistor MD is low, the writing time of the data signal Vdata is long, and therefore, the data signal Vdata can be sufficiently written only when the time of the second period t22 is long enough, and the threshold compensation is complete.
In the third period t33, i.e., the light emitting period, only the light emission control signal EM is at a low level, and the fourth switching transistor M4 and the fifth switching transistor M5 are turned on. At this time, the driving transistor MD generates a driving current in response to the gate voltage thereof, and drives the light emitting device D1 to emit light.
As can be seen from the above procedure, both the data writing and the threshold compensation of the driving transistor MD occur in the second period t22, and the duration of the period is determined by the effective pulse time (low level time) of the second scan signal S2. However, as the output characteristics of the GIP circuit show that the pulse widths of the first scan signal S1 and the second scan signal S2 are equal, and the effective pulse time of the first scan signal S1 and the second scan signal S2 is shortened with the increase of the refresh frequency, the threshold compensation is insufficient, so that the light emitting device D1 emits light unevenly, and the display quality is affected.
For the above reasons, the embodiments of the present invention provide a pixel circuit to prolong the threshold compensation time, improve the display uniformity, and improve the display image quality of the display panel. Fig. 3 is a schematic structural diagram of a pixel circuit according to an embodiment of the present invention. Referring to fig. 3, the pixel circuit includes:
the driving module 100 includes a control terminal G, a first terminal A1, and a second terminal A2, and the driving module 100 is configured to generate a driving current in response to a voltage of the control terminal G, so as to drive the light emitting module 200 to emit light.
The compensation module 300 is connected between the first terminal A1 and the control terminal G of the driving module 100, and is configured to be turned on in response to the first light emitting control signal EM1 in an initialization phase, a compensation phase, and a data writing phase, and the driving module 100 is threshold compensated by the turned-on compensation module 300 in the compensation phase. The initialization phase, the compensation phase and the data writing phase are characterized as driving time sequences of the pixel circuit in a working period.
The initialization module 400 is electrically connected to the compensation module 300, and is configured to be turned on in response to the second light emission control signal EM2 during an initialization phase, and write the initialization voltage signal Vref into the control terminal G of the driving module 100 through the compensation module 300.
The first light emitting control module 500 is electrically connected to the second terminal A2 of the driving module 100, and is configured to be turned on in response to the second light emitting control signal EM2 during the initialization stage and the light emitting stage, and write the first power signal VDD into the second terminal A2 of the driving module 100.
The data writing module 600 is electrically connected to the second terminal A2 of the driving module 100, and is configured to be turned on in response to the scan signal SC during the data writing stage, and write the data signal Vdata to the control terminal G of the driving module 100 through the compensation module 300.
The second light emitting control module 700 is connected between the first end A1 of the driving module 100 and the light emitting module 200, and is turned on in response to the first light emitting control signal EM1 during the light emitting period, so that the driving current flows into the light emitting module 200.
Fig. 4 is a timing chart of a pixel circuit according to an embodiment of the invention, and the timing chart of fig. 4 is applicable to the pixel circuit shown in fig. 3. Referring to fig. 3 and 4, the pixel circuit operation may exemplarily include four phases of an initialization phase t1, a compensation phase t2, a data writing phase t3, and a light emitting phase t 4.
In the initialization phase t1, the first light emission control signal EM1 controls the compensation module 300 to be turned on, and the second light emission control signal EM2 controls the initialization module 400 and the first light emission control module 500 to be turned on, and the data writing module 600 and the second light emission control module 700 to be turned off at this phase. The initialization voltage signal Vref is written into the control terminal G of the driving module 100 through the initialization module 400 and the compensation module 300, the first power signal VDD is written into the second terminal A2 of the driving module 100 through the first light emitting control module 500, and the control terminal G and the second terminal A2 of the driving module 100 are initialized in the initialization stage t 1. Illustratively, the first power signal VDD is a positive voltage and the initialization voltage signal Vref is a negative voltage.
In the compensation phase t2, the first light emitting control signal EM1 continues to control the compensation module 300 to be turned on, and the first light emitting control module 500, the initialization module 400, the data writing module 600, and the second light emitting control module 700 are turned off at this phase. At the end of the initialization period t1, that is, at the beginning of the compensation period t2, the voltage at the second end A2 of the driving module 100 is the first power signal VDD (e.g., positive voltage), the voltage at the control end G of the driving module 100 is the initialization voltage signal Vref (e.g., negative voltage), and a large voltage difference exists between the second end A2 and the control end G of the driving module 100. Due to the balanced nature of the drive module 100 (e.g., drive transistor), the drive module 100 balances toward a steady state when not energized. Taking the driving module 100 as a P-type transistor as an example, the second end A2 of the driving module 100 continues to charge the control end G through the conducting compensation module 300 until the driving module 100 reaches an equilibrium state, and the charging is stopped. That is, when the voltage of the control terminal G minus the voltage of the second terminal A2 is- |vth|, the driving module 100 reaches an equilibrium state, where Vth is the threshold voltage of the driving module 100.
In the data writing stage t3, the first light emitting control signal EM1 continues to control the compensation module 300 to be turned on, the scan signal SC controls the data writing module 600 to be turned on, and the first light emitting control module 500, the initialization module 400, and the second light emitting control module 700 are turned off at this stage. The data signal Vdata is written into the control terminal G of the driving module 100 through the data writing module 600, the driving module 100 and the compensating module 300. Since the process of threshold compensation has been completed in the compensation stage t2, there is no need to perform threshold compensation in the data writing stage t3, and thus the time required for the data writing stage t3 is short.
In the light emitting stage t4, the second light emitting control signal EM2 controls the first light emitting control module 500 and the initialization module 400 to be turned on, and the first light emitting control signal EM1 controls the second light emitting control module 700 to be turned on, and the compensation module 300 and the data writing module 600 to be turned off in this stage. The first power signal VDD is written into the second terminal A2 of the driving module 100 through the first light emitting control module 500, and the driving module 100 generates a driving current according to the voltages of the control terminal G and the second terminal A2 thereof, so as to drive the light emitting module 200 to emit light.
As can be seen from the above process, compared with the prior art, the pixel circuit of the present embodiment adds the compensation stage t2 before the data writing stage t 3. The transistors in the driving module 100 are P-type transistors, and in the compensation phase t2, the voltage at the control terminal G is continuously raised from Vref to V0 when the equilibrium state is reached, whereas in the prior art, after the initialization phase t1 is completed, the voltage at the control terminal G of the driving module 100 is the initialization voltage signal Vref, V0> Vref. In the data writing stage t3, both in the prior art and in the embodiment of the present invention, the data signal Vdata is written into the control terminal of the driving module 100, so that the voltage of the control terminal G is vdata—vth. However, in the prior art, the voltage of the control terminal G is charged from Vref to Vdata- |vth|, and in the present embodiment, the voltage of the control terminal G is charged from V0 to Vdata- |vth|, and V0> Vref, so that the time required for raising the voltage of the control terminal G to Vdata- |vth| in the data writing stage t3 is shorter in the present embodiment than in the prior art, and the data writing in the present embodiment is more sufficient in the same time.
Moreover, the compensation time of the pixel circuit provided by the embodiment of the invention is adjustable, and as shown in the analysis, when the start time of the compensation phase t2 is the time when the second light-emitting control signal EM2 changes from low level to high level, and the end time of the compensation phase t2 is the time when the scanning signal SC changes from high level to low level, the time of the compensation phase t2 can be shortened by adjusting the left shift of the scanning signal SC, and the time of the compensation phase t2 can be prolonged by adjusting the right shift of the scanning signal SC.
In summary, the embodiment of the invention provides a novel pixel circuit structure, which includes a driving module, a compensation module, an initialization module, a first light emitting control module, a data writing module and a second light emitting control module, wherein the pixel circuit is controlled by a first light emitting control signal, a second light emitting control signal and a scanning signal. Unlike the prior art in which the compensation time is controlled by the effective time of the scan signal, the pixel circuit provided by the embodiment of the invention separates the compensation phase and the data writing phase, and can control the time of the compensation phase by using the start time of the scan signal. Therefore, when the threshold compensation is performed on the driving module, the embodiment of the invention is not limited by high refreshing frequency, and is beneficial to fully writing data signals into the control end of the driving module in a limited time, so that the full compensation of threshold voltage is realized, the display uniformity is improved, and the display image quality is further improved.
Fig. 5 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention, and referring to fig. 5, the compensation module 100 may optionally include a first transistor T1 and a second transistor T2 based on the above embodiments. The first pole of the first transistor T1 is connected to the control terminal G of the driving module 100, the first pole of the second transistor T2 is connected to the second pole of the first transistor T1, and the second pole of the second transistor T2 is connected to the first terminal A1 of the driving module 100. The gate of the first transistor T1 and the gate of the second transistor T2 are both connected to the first light emission control signal EM1.
The first transistor T1 and the second transistor T2 operate on the principle that the gates of the first transistor T1 and the second transistor T2 are connected to the first light emitting control signal EM1, that is, the on time of the first transistor T1 and the second transistor T2 is controlled by the first light emitting control signal EM1. The first transistor T1 and the second transistor T2 are turned on in the initialization stage, so that the initialization voltage signal Vref is written into the control terminal G of the driving module 100 through the first transistor T1. The first transistor T1 and the second transistor T2 are also in a conductive state during the compensation phase, and the voltage at the second terminal A2 of the driving module 100 continues to charge the control terminal G of the driving module 100 through the first transistor T1 and the second transistor T2, so as to raise the voltage at the control terminal G. The first transistor T1 and the second transistor T2 are still in an on state during the data writing stage, so that the data signal Vdata is written into the control terminal G of the driving module 100 through the driving module 100, the second transistor T2, and the first transistor T1 in sequence.
Optionally, the first transistor T1 and the second transistor T2 are both N-type transistors. The first light emitting control signal EM1 is at a low level, which controls the first transistor T1 and the second transistor T2 to be turned off, and the first light emitting control signal EM1 is at a high level, which controls the first transistor T1 and the second transistor T2 to be turned on.
Fig. 6 is a schematic structural diagram of another pixel circuit according to the embodiment of the present invention, referring to fig. 6, the initialization module 400 may optionally include a third transistor T3, a first electrode of the third transistor T3 is connected to the initialization voltage signal Vref, a second electrode of the third transistor T3 is connected to the compensation module 300, and a gate electrode of the third transistor T3 is connected to the second light emitting control signal EM2.
The third transistor T3 is operated by the principle that the gate of the third transistor T3 is connected to the second emission control signal EM2, i.e. the on-time of the third transistor T3 is controlled by the second emission control signal EM2. The third transistor T3 is turned on in the initialization stage, so that the initialization voltage signal Vref is written into the control terminal G of the driving module 100 through the turned-on compensation module 300.
Optionally, the third transistor T3 is a P-type transistor, the second light emission control signal EM2 is at a low level, and the third transistor T3 is controlled to be turned on; the second light emitting control signal EM2 is high, controlling the third transistor T3 to be turned off.
Fig. 7 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention, and referring to fig. 7, the first light emitting control module 500 includes a fourth transistor T4, and the second light emitting control module 700 includes a fifth transistor T5, which are optional based on the above embodiments. The first pole of the fourth transistor T4 is connected to the first power signal VDD, the second pole of the fourth transistor T4 is connected to the second end A2 of the driving module 100, and the gate of the fourth transistor T4 is connected to the second light emission control signal EM2. The first pole of the fifth transistor T5 is connected to the first end A1 of the driving module 100, the second pole of the fifth transistor T5 is connected to the light emitting module 200, and the gate of the fifth transistor T5 is connected to the first light emitting control signal EM1.
The operation principle of the fourth transistor T4 and the fifth transistor T5 is that the gate of the fourth transistor T4 is connected to the second light emission control signal EM2, the gate of the fifth transistor T5 is connected to the first light emission control signal EM1, that is, the on time of the fourth transistor T4 is controlled by the second light emission control signal EM2, and the on time of the fifth transistor T5 is controlled by the first light emission control signal EM1. The fourth transistor T4 is turned on in the initialization stage, and the first power signal VDD is written into the second terminal A2 of the driving module 100 through the turned-on fourth transistor T4. The fourth transistor T4 and the fifth transistor T5 are turned on in the light emitting stage, the first power signal VDD is written into the second terminal A2 of the driving module 100 through the turned-on fourth transistor T4, the driving module 100 generates a driving current according to voltages of the control terminal G and the second terminal A2 thereof, and the driving current flows into the light emitting module 200 through the fifth transistor T5, thereby lighting the light emitting module 200.
Optionally, the fourth transistor T4 and the fifth transistor T5 are P-type transistors, and the second emission control signal EM2 is at a low level, so as to control the fourth transistor T4 to be turned on; the second emission control signal EM2 is high, controlling the fourth transistor T4 to be turned off. The first light emitting control signal EM1 is low level, controlling the fifth transistor T5 to be turned on; the first light emitting control signal EM1 is at a high level, controlling the fifth transistor T5 to be turned off.
Fig. 8 is a schematic diagram of another pixel circuit according to an embodiment of the present invention, referring to fig. 8, the data writing module includes a seventh transistor T7, a first pole of the seventh transistor T7 is connected to the data signal Vdata, a second pole of the seventh transistor T7 is connected to the second end A2 of the driving module 100, and a gate of the seventh transistor T7 is connected to the scan signal SC.
The seventh transistor T7 operates on the principle that the gate of the seventh transistor T7 is connected to the scan signal SC, i.e., the on-time of the seventh transistor T7 is controlled by the scan signal SC. The seventh transistor T7 is turned on during the data writing period, so that the data signal Vdata is written into the control terminal G of the driving module 100.
Optionally, the seventh transistor T7 is a P-type transistor, the scan signal SC is at a low level, and the seventh transistor T7 is controlled to be turned on; the scan signal SC is high, controlling the seventh transistor T7 to be turned off.
Fig. 9 is a schematic structural diagram of another pixel circuit according to the embodiment of the present invention, referring to fig. 9, optionally, the driving module 100 includes a sixth transistor T6, a first pole of the sixth transistor T6 is connected to the first light emitting control module 500, a second pole of the sixth transistor T6 is connected to the compensation module 300, a second pole of the sixth transistor T6 is further connected to the second light emitting control module 700, and a gate of the sixth transistor T6 is connected to the compensation module 300.
The sixth transistor T6 operates on the principle that, in the light emitting stage, a driving current is formed according to the voltages of the gate electrode and the first electrode thereof, and the light emitting module 200 is driven to emit light.
Optionally, the sixth transistor is a P-type transistor, and when the voltage difference between the gate and the first pole of the sixth transistor T6 is lower than- |vth|, the sixth transistor T6 is turned on. In the initialization stage, an initialization voltage signal Vref is written into the gate of the sixth transistor T6, and the initialization voltage signal Vref is a negative voltage; the first power supply signal VDD is written to the first pole of the sixth transistor T6, and the first power supply signal VDD is a positive voltage. The voltage of the initialization voltage signal Vref is far lower than the first power signal VDD, such that the gate voltage of the sixth transistor T6 is far lower than the first pole voltage of the sixth transistor T6, thereby turning on the sixth transistor T6. In the compensation phase, the conducted sixth transistor T6 is balanced to a steady state through the conducted compensation module 300; in the data writing stage, the gate of the sixth transistor T6 writes the data signal Vdata to reach the stable Vdata- |vth|; in the light emitting stage, the sixth transistor T6 generates a driving current, and the voltage difference between the gate and the first electrode is Vdata- |Vth| -VDD.
Fig. 10 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention, and referring to fig. 10, the pixel circuit further includes a memory module 800, where the memory module 800 is connected to the control terminal G of the driving module 100, and is configured to store a voltage of the control terminal G of the driving module 100.
Optionally, the storage module 800 includes a storage capacitor Cst, a first end of which is connected to the first power signal VDD, and a second end of which is connected to the control end of the driving module 100. The storage capacitor Cst has a storage function. When the bipolar potential of the storage capacitor Cst is determined, the storage capacitor Cst may store a voltage difference between the bipolar potentials.
Fig. 11 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention. On the basis of the above embodiments, optionally, the compensation module 300 includes a first transistor T1 and a first transistor T2, the initialization module 400 includes a third transistor T3, the first light emitting control module 500 includes a fourth transistor T4, the second light emitting control module 700 includes a fifth transistor T5, the driving module 100 includes a sixth transistor T6, and the data writing module 600 includes a seventh transistor T7. The first transistor T1 and the first transistor T2 are both N-type transistors, and the third transistor T3 to the seventh transistor T7 are both P-type transistors.
Fig. 12 to 15 are schematic diagrams illustrating on states of transistors of a pixel circuit at various stages according to an embodiment of the present invention. Referring to fig. 12-15, and the timing diagram shown in fig. 4, the pixel circuit operates as follows:
in the initialization stage t1, as shown in FIG. 12, the first light emission control signal EM1 and the scan signal SC are both high level, the second light emission control signal EM2 is low level, and the first transistorT1, the second transistor T2, the third transistor T3 and the fourth transistor T4 are turned on, the fifth transistor T5 and the seventh transistor T7 are turned off, and the initialization voltage signal Vref is written into the gate of the sixth transistor T6, i.e. the voltage V of the control terminal G of the driving module 100, through the third transistor T3 and the first transistor T1 G The first power signal VDD is written into the first pole of the sixth transistor T6 via the fourth transistor T4, i.e. the voltage at the second end A2 of the driving module 100 is V A2 =vdd. The initialization phase T1 implements initialization of the gate and the first pole of the sixth transistor T6.
In the compensation phase T2, as shown in fig. 13, the first light emitting control signal EM1, the scan signal SC, and the second light emitting control signal EM2 are all at high level, the first transistor T1 and the second transistor T2 are turned on, the third transistor T3, the fourth transistor T4, the fifth transistor T5, and the seventh transistor T7 are turned off, the first electrode of the sixth transistor T6 continues to charge the gate of the sixth transistor T6 via its own second electrode, the second transistor T2, and the first transistor T1, and the potential of the gate is raised until the sixth transistor T6 reaches the balanced state. When the sixth transistor T6 reaches the equilibrium state, the voltage obtained by subtracting the voltage of the first electrode from the gate voltage is- |Vth|, i.e. the voltage V of the voltage of the control terminal of the driving module 100 during the compensation phase G =v0, voltage V at the second terminal of the driving module 100 A2 =v0+|vth|. In the compensation phase, the potential of the gate of the sixth transistor T6 is raised by continuing to charge the gate of the sixth transistor T6.
In the data writing stage T3, as shown in fig. 14, the first light emission control signal EM1 and the second light emission control signal EM2 are both at high level, the scan signal SC is at low level, the first transistor T1, the second transistor T2, the seventh transistor T7 is turned on, and the third transistor T3, the fourth transistor T4, and the fifth transistor T5 are turned off. The data signal Vdata is written to the gate of the sixth transistor T6 via the seventh transistor T7, the sixth transistor T6, the second transistor T2 and the first transistor T1. At the end of the data writing phase t3, the voltage V at the control terminal of the driving module 100 G =vdata- |vth|, the voltage V at the second end of the driving module 100 A2 ＝Vdata。
A light-emitting stage t4, as shown in FIG. 15, the firstThe light emitting control signal EM1 and the second light emitting control signal EM2 are both low level, the scan signal SC is high level, the first transistor T1, the second transistor T2 and the seventh transistor T7 are turned off, the third transistor T3, the fourth transistor T4 and the fifth transistor T5 are turned on, the first power signal VDD is transmitted to the first pole of the sixth transistor T6 through the fourth transistor T4, and the sixth transistor T6 generates the driving current I according to the voltages of the gate and the first pole thereof D Drive current I D Flows into the light emitting module 200 through the fifth transistor T5, thereby driving the light emitting module 200 to emit light. Wherein the driving current I D ＝k*[VDD-(Vdata-|Vth|)-|Vth|] 2 ＝k*(VDD-Vdata) 2 K is the compensation coefficient.
As can be seen from the above analysis, the pixel circuit provided in this embodiment separates the compensation phase and the data writing phase, and can control the time of the compensation phase by using the start time of the scan signal, unlike the prior art in which the compensation time is controlled by the effective time of the scan signal. Therefore, when the threshold compensation is performed on the driving module, the embodiment is not limited by the high refresh frequency, and in a limited time, the data signal is fully written into the control end of the driving module, so that the full compensation of the threshold voltage is realized, the display uniformity is improved, and the display image quality is further improved.
The embodiment of the invention also provides a display panel, which comprises the pixel circuit in any embodiment, and the technical principle and the produced effect are similar and are not repeated.
The embodiment of the invention also provides a driving method of the pixel circuit, which is suitable for the pixel circuit provided by any embodiment of the invention. Fig. 16 is a flowchart of a driving method of a pixel circuit according to an embodiment of the present invention, and referring to fig. 16, the driving method of the pixel circuit includes an initialization phase, a compensation phase, a data writing phase and a light emitting phase;
S10: in the initialization stage, the compensation module is conducted in response to the first light-emitting control signal, the initialization module and the first light-emitting control module are conducted in response to the second light-emitting control signal, the initialization module writes initialization voltage into the control end of the driving module through the conducted compensation module, and the first light-emitting control module writes the first power supply signal into the second end of the driving module.
S20: in the compensation phase, the compensation module is conducted in response to the first light-emitting control signal, and the drive module conducts threshold compensation through the conducted compensation module.
S30: in the data writing stage, the compensation module is conducted in response to the first light emitting control signal, the data writing module is conducted in response to the scanning signal, and the data writing module writes the data signal into the control end of the driving module through the conducted driving module and the compensation module.
S40: in the light emitting stage, the first light emitting control module is conducted in response to the second light emitting control signal, the second light emitting control module is conducted in response to the first light emitting control signal, and the driving module generates driving current in response to the voltage of the control end of the driving module to drive the light emitting module to emit light.
Unlike the prior art in which the compensation time is controlled by the effective time of the scan signal, the driving method of the pixel circuit provided in this embodiment separates the compensation phase and the data writing phase, and can control the time of the compensation phase by using the start time of the scan signal. Therefore, the driving method of the pixel circuit in this embodiment is not limited by the high refresh frequency when the threshold compensation is performed on the driving module, and is beneficial to fully writing the data signal into the control end of the driving module in a limited time, so as to fully compensate the threshold voltage, improve the display uniformity and further improve the display image quality.
Fig. 17 is a comparison diagram of compensation phase adjustment of a pixel circuit according to an embodiment of the present invention, and referring to fig. 17, on the basis of the above embodiments, optionally, the first light emission control signal EM1 and the second light emission control signal EM2 are defined to be active at a first level, and the scan signal SC is defined to be active at a second level, where the first level and the second level are opposite. Wherein, the effective time intervals of the first light emitting control signal EM1 and the second light emitting control signal EM2 have overlapping intervals, and the effective time interval of the scanning signal SC is positioned in the overlapping intervals; the start time of the active time interval of the scan signal SC is adjustable. Wherein the active time intervals of the first light emission control signal EM1 and the second light emission control signal EM2 overlap to form a compensation phase t2 and a data writing phase t3. In this overlap interval, the flag entering the data writing stage t3 is the scan signal SC active. The earlier the scan signal SC is valid, the shorter the compensation phase t2 is; in contrast, the scan signal SC is effectively delayed and the time of the compensation phase t2 is prolonged. Thus, by adjusting the start time of the active time interval of the scan signal SC, the time of the compensation phase t2 can be adjusted. As shown in fig. 17, the scan signal SC at the lower side is shifted rightward compared to the start timing of the scan signal SC at the upper side, and obviously, the time of the compensation phase t2 is prolonged after shifting. Therefore, the pixel circuit of the embodiment of the invention can increase the time of the compensation phase t2 by adjusting the scan signal SC to shift right.
The compensation module includes a first transistor and a second transistor, the initialization module includes a third transistor, the first light emitting control module includes a fourth transistor, the second light emitting control module includes a fifth transistor, the driving module includes a sixth transistor, and the data writing module includes a seventh transistor. The first transistor and the second transistor are N-type transistors, and the third transistor, the fourth transistor, the fifth transistor, the sixth transistor and the seventh transistor are P-type transistors. The first level is high and the second level is low.
In the initialization stage t1, the first light emission control signal EM1 is located in an active time interval, the scan signal is located in an inactive time interval SC, and the second light emission control signal EM2 is located in an inactive time interval. In the compensation phase t2, the first light emitting control signal EM1 is located in an active time interval, the scan signal SC is located in an inactive time interval, and the second light emitting control signal EM2 is located in an active time interval. In the data writing stage t3, the first light emitting control signal EM1 is located in the active time interval, the scan signal SC is located in the active time interval, and the second light emitting control signal EM2 is located in the active time interval. In the light emitting stage t4, the first light emitting control signal EM1 is located in the inactive time interval, the scan signal SC is located in the inactive time interval, and the second light emitting control signal EM2 is located in the inactive time interval.
Note that the above is only a preferred embodiment of the present invention and the technical principle applied. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, while the invention has been described in connection with the above embodiments, the invention is not limited to the embodiments, but may be embodied in many other equivalent forms without departing from the spirit or scope of the invention, which is set forth in the following claims.
Claims (16)
1. A pixel circuit, comprising:
the driving module comprises a control end, a first end and a second end, and is used for responding to the voltage of the control end to generate driving current so as to drive the light emitting module to emit light;
the compensation module is connected between the first end and the control end of the driving module and is used for responding to a first light emitting control signal in an initialization stage, a compensation stage and a data writing stage, and the driving module performs threshold compensation through the conducted compensation module in the compensation stage; the initialization phase, the compensation phase and the data writing phase are characterized by a driving time sequence of the pixel circuit in a working period;
The initialization module is electrically connected with the compensation module, and is used for responding to a second light-emitting control signal in the initialization stage to conduct, and writing an initialization voltage signal into the control end of the driving module through the compensation module;
the first light-emitting control module is electrically connected with the second end of the driving module and is used for responding to the second light-emitting control signal in the initialization stage and the light-emitting stage to conduct, and writing a first power supply signal into the second end of the driving module;
the data writing module is electrically connected with the second end of the driving module and is used for responding to the scanning signal in the data writing stage to conduct and writing the data signal into the control end of the driving module through the compensation module;
and the second light-emitting control module is connected between the first end of the driving module and the light-emitting module and is used for responding to the first light-emitting control signal in a light-emitting stage to conduct so as to enable the driving current to flow into the light-emitting module.
2. The pixel circuit of claim 1, wherein the compensation module comprises a first transistor and a second transistor;
a first pole of the first transistor is connected with the control end of the driving module, a first pole of the second transistor is connected with a second pole of the first transistor, and a second pole of the second transistor is connected with the first end of the driving module;
The grid electrode of the first transistor and the grid electrode of the second transistor are both connected with the first light-emitting control signal.
3. The pixel circuit of claim 2, wherein the first transistor and the second transistor are each N-type transistors.
4. The pixel circuit according to claim 1, wherein the initialization module comprises a third transistor, a first pole of the third transistor is connected to the initialization voltage signal, a second pole of the third transistor is connected to the compensation module, and a gate of the third transistor is connected to the second light emission control signal.
5. The pixel circuit of claim 4, wherein the third transistor is a P-type transistor.
6. The pixel circuit according to claim 1, wherein the first light emission control module includes a fourth transistor, and the second light emission control module includes a fifth transistor;
a first electrode of the fourth transistor is connected with a first power supply signal, a second electrode of the fourth transistor is connected with a second end of the driving module, and a grid electrode of the fourth transistor is connected with the second light-emitting control signal;
the first electrode of the fifth transistor is connected with the first end of the driving module, the second electrode of the fifth transistor is connected with the light emitting module, and the grid electrode of the fifth transistor is connected with the first light emitting control signal.
7. The pixel circuit according to claim 6, wherein the fourth transistor and the fifth transistor are each P-type transistors.
8. The pixel circuit according to claim 1, wherein the driving module includes a sixth transistor, a first pole of the sixth transistor is connected to the first light emitting control module, a second pole of the sixth transistor is connected to the compensation module, a second pole of the sixth transistor is further connected to the second light emitting control module, and a gate of the sixth transistor is connected to the compensation module.
9. The pixel circuit according to claim 8, wherein the sixth transistor is a P-type transistor.
10. The pixel circuit of claim 1, wherein the data writing module comprises a seventh transistor, a first pole of the seventh transistor being connected to the data signal, a second pole of the seventh transistor being connected to the second terminal of the driving module, a gate of the seventh transistor being connected to the scanning signal.
11. The pixel circuit according to claim 10, wherein the seventh transistor is a P-type transistor.
12. The pixel circuit of claim 1, further comprising a storage module connected to the control terminal of the drive module for storing a voltage of the control terminal of the drive module.
13. The pixel circuit of claim 12, wherein the storage module comprises a storage capacitor, a first terminal of the storage capacitor is connected to the first power signal, and a second terminal of the storage capacitor is connected to the control terminal of the driving module.
14. A display panel comprising the pixel circuit of any one of claims 1-13.
15. The driving method of the pixel circuit is characterized in that the pixel circuit comprises a driving module, a compensation module, an initialization module, a first light-emitting control module, a data writing module, a second light-emitting control module and a light-emitting module; the driving method of the pixel circuit comprises an initialization stage, a compensation stage, a data writing stage and a light emitting stage;
in the initialization stage, the compensation module is conducted in response to a first light-emitting control signal, the initialization module and the first light-emitting control module are conducted in response to a second light-emitting control signal, the initialization module writes an initialization voltage into a control end of the driving module through the conducted compensation module, and the first light-emitting control module writes a first power supply signal into a second end of the driving module;
In the compensation stage, the compensation module is conducted in response to a first light emitting control signal, and the drive module conducts threshold compensation through the conducted compensation module;
in the data writing stage, the compensation module is conducted in response to the first light emitting control signal, the data writing module is conducted in response to the scanning signal, and the data writing module writes the data signal into the control end of the driving module through the conducted driving module and the compensation module;
in the light emitting stage, the first light emitting control module is turned on in response to the second light emitting control signal, the second light emitting control module is turned on in response to the first light emitting control signal, and the driving module generates driving current in response to the voltage of the control end of the driving module to drive the light emitting module to emit light.
16. The method according to claim 15, wherein the first light emission control signal and the second light emission control signal are defined to be active at a first level, the scanning signal is defined to be active at a second level, and the first level and the second level are opposite;
wherein an overlapping interval exists between the effective time intervals of the first light-emitting control signal and the second light-emitting control signal, and the effective time interval of the scanning signal is located within the overlapping interval; the start time of the effective time interval of the scanning signal is adjustable.
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| CN114613321A (en) * | 2022-03-30 | 2022-06-10 | 云谷（固安）科技有限公司 | Pixel driving circuit, driving method thereof and display panel |
| CN114822407A (en) * | 2022-05-27 | 2022-07-29 | 云谷（固安）科技有限公司 | Pixel driving circuit, driving method of pixel driving circuit and display panel |
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