CN113794185A

CN113794185A - High-voltage detection circuit for AC-DC converter

Info

Publication number: CN113794185A
Application number: CN202111006020.6A
Authority: CN
Inventors: 施国民; 雷晗; 夏云凯
Original assignee: Xi'an Dingxin Microelectronic Co ltd
Current assignee: Xi'an Dingxin Microelectronic Co ltd
Priority date: 2021-08-30
Filing date: 2021-08-30
Publication date: 2021-12-14

Abstract

The invention discloses a high-voltage detection circuit for an AC-DC converter, which comprises a high-voltage switch circuit, a high-voltage starting circuit, a voltage-controlled current source, a current detection circuit, a power failure detection circuit, an X capacitance detection circuit, a logic control circuit and a sampling control circuit, wherein the high-voltage switch circuit is connected with the high-voltage starting circuit; the high-voltage switch circuit is connected with the high-voltage starting circuit, the voltage-controlled current source and the sampling control circuit, the voltage-controlled current source is further connected with the high-voltage starting circuit and the current detection circuit, the current detection circuit is further respectively connected with the power failure detection circuit and the X capacitance detection circuit, and the logic control circuit is respectively connected with the power failure detection circuit, the X capacitance detection circuit, the high-voltage starting circuit and the sampling control circuit. The high-voltage detection circuit of the invention gives out power-down protection when the AC voltage is lower than the undervoltage threshold value, and gives out a system power-down signal and discharges the X capacitor to protect personal safety if the rectified voltage is detected not to change or the voltage changes very slowly.

Description

High-voltage detection circuit for AC-DC converter

Technical Field

The invention relates to the field of chips, in particular to a high-voltage detection circuit in an AC-DC converter which needs to be used for power-off protection and X capacitor discharge.

Background

The AC-DC converter is usually directly supplied with power by alternating current, needs a corresponding protection mechanism when the alternating current is abnormal, usually needs to detect the power supply condition of the alternating current at any time, and can provide power failure (BROWNOUT, BO) protection and an X capacitor (X capacitor) discharge circuit. When the alternating current is lower than a certain value, the AC-DC converter needs to stop wave generation, so that accidents are prevented; after the AC-DC converter is powered off, the voltage at two ends of the X capacitor is high, in order to protect personal safety, charges on the X capacitor need to be discharged, the voltage at two ends of the X capacitor is lower than 36V, and personal accidents caused by accidental electric shock of people are prevented.

Disclosure of Invention

In view of the above problems, the present invention provides a high voltage detection circuit for use in an AC-DC converter to detect whether an abnormality occurs in an alternating current.

The invention provides a high-voltage detection circuit for an AC-DC converter, which comprises a high-voltage switch circuit, a high-voltage starting circuit, a voltage-controlled current source, a current detection circuit, a power failure detection circuit, an X capacitance detection circuit, a logic control circuit and a sampling control circuit, wherein the high-voltage starting circuit is connected with the voltage-controlled current source; wherein the content of the first and second substances,

the high-voltage switch circuit is connected with the high-voltage starting circuit, the voltage-controlled current source and the sampling control circuit, the voltage-controlled current source is further connected with the high-voltage starting circuit and the current detection circuit, the current detection circuit is further respectively connected with the power failure detection circuit and the X capacitance detection circuit, and the logic control circuit is respectively connected with the power failure detection circuit, the X capacitance detection circuit, the high-voltage starting circuit and the sampling control circuit.

Furthermore, the high-voltage switch circuit is used for isolating the AC voltage, the high-voltage starting circuit and the voltage-controlled current source, is only started during starting and detection, and is in a turn-off state at the rest of time;

the high-voltage starting circuit is used for providing a power supply required by the system work when the VDD is lower than the starting voltage when the system is electrified, and the high-voltage starting circuit stops working after the system works normally;

the voltage-controlled current source is used for converting the rectified DC voltage into a current signal;

the current detection circuit is used for detecting the magnitude of the output current of the voltage-controlled current source and whether the output current changes, and judging whether the magnitude of the AC voltage can ensure the safe and reliable operation of the system or not according to the magnitude of the current; judging whether the AC voltage is powered down or not according to the change of the current;

the power failure detection circuit is used for judging whether the AC voltage is too low, and if the AC voltage is lower than a power failure threshold value, sending a power failure protection signal to close a system MOSFET;

the X capacitor detection circuit is used for detecting whether the AC voltage is powered down or not, and triggering X capacitor protection to start discharging the X capacitor if the AC voltage is powered down;

the logic control circuit is used for providing a time sequence and a control signal, processing output signals of the power failure detection circuit and the X capacitor detection circuit, controlling the high-voltage switch circuit to be switched on and switched off, and controlling the charge on the X capacitor to be discharged;

the sampling control circuit is used for being opened when the high-voltage is started, detected and discharged by the X capacitor, and is closed at other moments.

Further, the high-voltage switch circuit comprises a junction type field effect transistor or a depletion type transistor, an enhancement type LDMOS transistor, a first resistor and a second resistor;

the drain electrode of the junction field effect transistor or the depletion transistor is connected with the rectified DC voltage, the source electrode of the junction field effect transistor or the depletion transistor is connected with the drain electrode of the enhancement type LDMOS transistor through a first resistor, and is simultaneously connected with the gate electrodes of the junction field effect transistor or the depletion type transistor and the enhancement type LDMOS transistor through a second resistor, and is simultaneously connected with the output end of the sampling control circuit; and the source electrode of the enhanced LDMOS transistor is connected with the high-voltage starting circuit and the voltage-controlled current source.

Furthermore, the high-voltage starting circuit comprises an NMOS tube and a diode, wherein the drain electrode of the NMOS tube is connected with the drain electrode of the LDMOS tube in the high-voltage switching circuit, the grid electrode of the NMOS tube is connected with one output end of the logic control circuit, the source electrode of the NMOS tube is connected with the anode of the diode, and the cathode of the diode is connected with VDD.

Furthermore, the voltage-controlled current source comprises a resistor, a first NMOS tube and a second NMOS tube, wherein one end of the resistor is connected with a source electrode of an enhanced LDNMOS tube in the high-voltage switch circuit, and the other end of the resistor is connected with a drain electrode of the first NMOS tube; the grid electrode and the drain electrode of the first NMOS tube are in short circuit, and the source electrode is grounded; the grid electrode of the second NMOS tube is connected with the grid electrode of the first NMOS tube, the drain electrode is connected with one input end of the current detection circuit, and the source electrode is grounded.

Furthermore, the current detection circuit comprises a first PMOS transistor, a second PMOS transistor, a third PMOS transistor, a fourth PMOS transistor, a first resistor, a second resistor, a third resistor, a first current comparator, a second current comparator and a third current comparator;

the current mirror is formed by the first PMOS tube, the second PMOS tube, the third PMOS tube and the fourth PMOS tube, the grid electrodes are all connected together, the grid electrode and the drain electrode of the first PMOS tube are connected together in a short mode, the source electrodes of the four PMOS tubes are connected with VDD, the drain electrode of the first PMOS tube is used as the input end of the current detection circuit and is connected with the output of the voltage-controlled current source, the drain electrodes of the second PMOS tube, the third PMOS tube and the fourth PMOS tube are connected to the ground through the first resistor, the second resistor and the third resistor respectively and are also connected to the homodromous input ends of the first current comparator, the second current comparator and the third current comparator respectively, and the reverse input ends of the first current comparator, the second current comparator and the third current comparator are grounded; the outputs of the first current comparator and the second current comparator are connected with an X capacitance detection circuit; the output end of the third current comparator is connected with the power-off detection circuit.

Furthermore, the power failure detection circuit comprises an edge detection circuit, a timing circuit, an RS trigger and a phase inverter;

the input end of the edge detection circuit is connected with one output end of the current detection circuit, and the output end of the edge detection circuit is connected with the reset end of the timing circuit;

the reset end of the timing circuit is connected with the edge detection circuit, the clock end is connected with a clock signal, and the output end is connected with the S end of the RS trigger;

and the R end of the RS trigger is connected with a system power-on reset signal, the S end of the RS trigger is connected with the output of the timing circuit, the output of the RS trigger is connected with the input end of the phase inverter, and the output end of the phase inverter is connected with one input end of the logic control circuit.

Furthermore, the X capacitance detection circuit comprises an edge detection circuit, a NOR gate, a first inverter, a timing circuit, an RS trigger and a second inverter;

the input end of the edge detection circuit is connected with one output end of the current detection circuit, and the output end of the edge detection circuit is connected with the input end of the NOR gate; the output end of the NOR gate is connected with the reset end of the timing circuit through a first inverter;

the reset end of the timing circuit is connected with the output end of the first phase inverter, the clock end is connected with a clock signal, and the output end is connected with the S end of the RS trigger;

and the R end of the RS trigger is connected with a system power-on reset signal, the S end of the RS trigger is connected with the output end of the timing circuit, the output end of the RS trigger is connected with the input end of the second inverter, and the output end of the second inverter is connected with one input end of the logic control circuit.

Further, the logic control circuit comprises a NAND gate and three inverters; one input end of the NAND gate is connected with the power-off detection circuit, one input end of the NAND gate is connected with the output end of the first phase inverter, the input end of the first phase inverter is connected with the X capacitance detection circuit, the output end of the first phase inverter is connected with the input end of the second phase inverter, and the output end of the second phase inverter is connected with one input end of the sampling control circuit; the output end of the NAND gate is connected with the input end of the third inverter, and the output end of the third inverter is connected with the PWM control chip.

Furthermore, the sampling control circuit comprises a nor gate and a phase inverter, wherein one input end of the nor gate is connected with one output end of the logic control circuit, the other input end of the nor gate is connected with a clock signal, and the output of the nor gate is connected with one input end of the high-voltage switch circuit through the phase inverter.

The invention detects the AC voltage power supply condition when the AC-DC converter works, and protects the system when the AC voltage is undervoltage or power failure; when the voltage is undervoltage, the system stops working until the AC voltage returns to normal; after the AC voltage is powered down, the voltage at two ends of the X capacitor is discharged to 36V safety voltage, and personal safety is guaranteed.

The high-voltage detection circuit for the AC-DC converter provided by the invention can provide BO protection and X capacitor discharge, and can close a high-voltage power-taking path, thereby saving power consumption and reducing unnecessary waste.

Drawings

Fig. 1 is a schematic structural diagram of a high voltage detection circuit used in an AC-DC converter according to embodiment 1 of the present invention;

fig. 2 is a schematic diagram of an embodiment of a high voltage switch circuit in embodiment 1 of the present invention;

fig. 3 is a schematic diagram of an embodiment of a high voltage start-up circuit in embodiment 1 of the present invention;

fig. 4 is a schematic diagram of an embodiment of a voltage-controlled current source in embodiment 1 of the present invention;

fig. 5 is a schematic diagram of an embodiment of a current detection circuit in embodiment 1 of the present invention;

fig. 6 is a schematic diagram of an embodiment of a current comparator in embodiment 1 of the present invention;

fig. 7 is a schematic diagram of an embodiment of a power down detection circuit in embodiment 1 of the present invention;

fig. 8 is a schematic diagram of an embodiment of an X capacitance detection circuit in embodiment 1 of the present invention;

fig. 9 is a schematic diagram of an embodiment of a logic control circuit in embodiment 1 of the present invention;

fig. 10 is a schematic diagram of an embodiment of a sampling circuit in embodiment 1 of the present invention;

fig. 11 is a detailed circuit schematic diagram of a high voltage detection circuit used in an AC-DC converter according to embodiment 1 of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail below with reference to the drawings and the embodiments. In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced without some of these specific details. The following description of the embodiments is merely intended to illustrate examples of the present invention in synchronization to provide a better understanding of the present invention. The present invention is in no way limited to any specific configuration set forth below, but rather covers any modification, substitution, and improvement of elements, components, and algorithms without departing from the spirit of the invention. In the drawings and the following description, well-known structures and techniques are not shown in order to avoid unnecessarily obscuring the present invention.

In an AC-DC converter, the converter is powered by alternating current, and if the alternating current is too low, the converter still works continuously, so that the risk of explosion exists; after the converter stops alternating current power supply, the X electric capacity both ends between zero line and the live wire can continuously have the high pressure, if the mistake touches, the risk that can appear electrocuteeing needs to let out the electric charge of X electric capacity.

The invention provides a high-voltage detection circuit used in an AC-DC converter, which is used for detecting whether an AC current is abnormal or not. Protecting the system when the AC voltage is undervoltage or power failure; when the voltage is undervoltage, the system stops working until the AC voltage returns to normal; after the AC voltage is powered down, the voltage at two ends of the X capacitor is discharged to 36V safety voltage, and personal safety is guaranteed.

Fig. 1 is a schematic structural diagram of a high voltage detection circuit 100 for use in an AC-DC converter according to an embodiment of the present invention, in which one end of the high voltage detection circuit 100 for use in the AC-DC converter is connected to an output of a rectifier 10, and the other end is connected to a PWM control chip 20; the rectifier 10 is connected to detect whether the alternating current is abnormal, and the PWM control chip 20 is connected to turn off the MOSFET when the alternating current is abnormal. The high voltage detection circuit 100 includes: the high-voltage switch circuit 110, the high-voltage starting circuit 120, the voltage-controlled current source 130, the current detection circuit 140, the power failure detection circuit 150, the X capacitance detection circuit 160, the logic control circuit 170 and the sampling control circuit 180. The high-voltage switch circuit 110 is connected with the high-voltage starting circuit 120, the voltage-controlled current source 130 and the sampling control circuit 180, the voltage-controlled current source 130 is further connected with the high-voltage starting circuit 120 and the current detection circuit 140, the current detection circuit 140 is further connected with the power-down detection circuit 150 and the X capacitance detection circuit 160 respectively, and the logic control circuit 170 is connected with the power-down detection circuit 150, the X capacitance detection circuit 160, the high-voltage starting circuit 120 and the sampling control circuit 180 respectively.

The high-voltage switch circuit 110 is controlled by the sampling control circuit 180 to be switched on and off, is switched on only when AC-DC is started and detected, and is switched off at the rest of time to reduce power consumption; after the AC-DC converter is powered on, when VDD is lower than a starting voltage, the high-voltage switch circuit 110 is started, a capacitor connected with the VDD is charged through the high-voltage starting circuit 120, after the VDD is higher than a normal starting threshold value, the high-voltage starting circuit 120 is closed, the voltage-controlled current source 130 starts to work, the voltage-controlled current source 130 converts the rectified DC voltage into a current signal and sends the current signal to the current detection circuit 140, and the current detection circuit 140 judges whether the power supply of the AC voltage is normal or not according to the magnitude of the current; judging whether the AC voltage is in a power-down state or not according to whether the current changes or not; the current detection circuit 140 sends the detection result to the power-down detection circuit 150 and the X capacitance detection circuit 160; the power failure detection circuit 150 is used for judging whether the AC voltage is too low, and if the AC voltage is lower than a BROWNOUT threshold value, a BROWNOUT protection signal is sent out, a system MOSFET is closed, and the system is protected; the X capacitor detection circuit 160 is used for detecting whether the AC voltage is powered down, and if the AC voltage is powered down, triggering X capacitor protection and starting to discharge the X capacitor; the power failure detection circuit 150 and the X capacitor detection circuit 160 send the state of the AC voltage to the logic control circuit 170, the logic control circuit 170 processes the output signals of the power failure detection circuit and the X capacitor detection circuit, controls the on and off of the high-voltage switch, and controls the charge discharge of the X capacitor; the sampling control circuit 180 receives the control of the logic control circuit 170, and completes the on and off of the high-voltage switch tube, and is turned on when the high voltage is started, the current is converted, the X capacitor is discharged, and is turned off at other times.

The high voltage switch circuit 110 has one end connected to the rectified DC voltage and the other end connected to the high voltage start circuit 120, the voltage controlled current source 130 and the sampling control circuit 180. The high voltage switch circuit 110 is turned on when the AC-DC converter is powered on and started and when the DC voltage after AC rectification is detected, and is turned off at the rest of the time to reduce power consumption.

As shown in fig. 2, as an embodiment of the high voltage switch circuit 110, the high voltage switch circuit 110 includes a junction field effect transistor JFET or depletion transistor 1101, an enhancement LDMOS transistor 1104, and

resistors

1102 and 1103.

A junction field effect transistor or depletion transistor 1101 having a drain connected to the rectified DC voltage HV and a source connected to the drain of the enhancement LDMOS transistor 1104 via a resistor 1102, and to the gates of the junction field effect transistor or depletion transistor 1101 and the enhancement LDMOS transistor 1104 via a resistor 1103 and to the output terminal (SD _ HN) of the sampling control circuit 180; the source of the enhancement mode LDMOS transistor 1104 is connected to the high voltage start-up circuit 120 and the voltage controlled current source 130 (HV2 i).

One end of the high-voltage starting circuit 120 is connected with the high-voltage switch circuit 110, and the other end is connected with a capacitor connected with VDD; when the AC-DC converter is powered on and started, the PWM control chip 20 compares the power supply end voltage VDD with the chip starting voltage value, when the VDD is lower than the chip starting voltage value, the high-voltage switch tube is started, the high-voltage starting circuit 120 charges the capacitor connected with the VDD, until the power supply end voltage of the chip is higher than the starting voltage value, the chip turns off the high-voltage starting circuit 120, the high-voltage starting circuit 120 stops supplying current to the chip, the power supply current is supplied by the auxiliary winding, and unnecessary power consumption caused by high-voltage starting is reduced.

As shown in fig. 3, the high voltage start-up circuit 120 includes an NMOS transistor 1201(NM1) and a diode 1202 (D1). The drain of the NMOS transistor 1201 is connected to the drain (HV2i) of the LDMOS transistor 1104 in the high voltage switch circuit 110, the gate is connected to an output terminal (ON _ HN) of the logic control circuit 170, the source is connected to the anode of the diode 1202, and the cathode of the diode 1202 is connected to VDD. When the power supply is started, VDD is charged, the NMOS tube 1201 opens the diode 1202 to conduct in the forward direction, after the VDD is charged, the NMOS tube 1201 is closed, the diode is reversely biased, and the VDD is prevented from being leaked.

One end of the voltage-controlled current source 130 is connected to the high-voltage switch circuit 110, and the other end is connected to the current detection circuit 140; the voltage-controlled current source converts the AC voltage into a current signal, and BROWNOUT and X capacitance detection are completed by processing the current signal.

As shown in fig. 4, a specific embodiment of the voltage-controlled current source 130 includes a resistor 1301,

NMOS transistors

1302 and 1303; one end of the resistor 1301 is connected with the source electrode of the enhanced LDNMOS tube 1104 in the high-voltage switch circuit 110 (HV2i), and the other end is connected with the drain electrode of the NMOS tube 1302; the gate and drain of the NMOS transistor 1302 are shorted together and the source is grounded. The gate of the NMOS transistor 1303 is connected to the gate of the transistor 1302, the drain is connected to an input terminal (isns) of the current detection circuit 140, and the source is grounded. The

NMOS transistors

1302 and 1303 constitute a current mirror, the ratio is set to 10:1, and the current reduced in proportion is sent to the current detection circuit 140, so that the device size of the current detection circuit can be reduced, and the processing accuracy can be improved.

Current (I) of voltage-controlled current output_{AC_SNS}) Amplitude (V) of available alternating current_AC) And the resistance value of the resistor 1301 (R1 in the following equation) is expressed as:

the input end of the current detection circuit 140 is connected to the voltage-controlled current source 130, one output end is connected to the power-down detection circuit 150, and the other output end is connected to the X-capacitor detection circuit 160; the current detection circuit 140 is configured to detect the magnitude of the output current of the voltage-controlled current source 120 and whether the output current changes, determine whether the magnitude of the AC voltage can ensure safe and reliable operation of the system according to the magnitude of the output current, and determine whether the AC voltage is in a power-down state according to whether the current changes.

As shown in fig. 5, one embodiment of the current detection circuit 140 includes

PMOS transistors

1401, 1402, 1403, and 1404,

resistors

1405, 1406, and 1407, and

current comparators

1408, 1409, and 1410.

PMOS transistors

1401, 1402, 1403 and 1404 form a current mirror, the gates are all connected together, the gate and the drain of 1401 are shorted together, the sources of four PMOS transistors are connected to VDD, the drain of 1401 is used as the input terminal of the current detection circuit 140, the drains of voltage-controlled

current sources

130, 1402, 1403 and 1404 are connected to the ground through

resistors

1405, 1406 and 1407, respectively, and are also connected to the non-inverting input terminals of

current comparators

1408, 1409 and 1410, respectively, to complete the power-down detection and X capacitance detection, and the inverting input terminals of

current comparators

1408, 1409 and 14010 are grounded. The

current comparators

1408 and 1409 and 1410 may detect three voltage values of AC, the outputs of the

current comparators

1408 and 1409 are provided to the X capacitance detection circuit 160 for detecting whether the AC has been powered down; the output end of the current comparator 1410 is connected to the power-off detection circuit 150 for detecting whether the ac power meets the working requirement.

As shown in fig. 6, an embodiment of the current comparator includes a current mirror formed by a pair of PMOS transistors, two current sources, a resistor R2 and a schmitt trigger, the sources of the two PMOS transistors forming the current mirror are connected to VDD through the current sources, the drains of the PMOS transistors with short-circuited sources and drains of the sources are used as the same-direction input ends, the drain of the other PMOS transistor in the current mirror is connected to a resistor R2, the other end of the resistor is the reverse input end of the comparator, one end of the current source connected to the sources of the PMOS transistors is simultaneously connected to the schmitt trigger, and the output of the schmitt trigger forms the output end of the comparator.

Taking comparator 1408 as an example, the same direction of 1408 is connected to PMOS transistor 1402 and resistor 1405, and the opposite direction is connected to ground. The current flowing through the resistor 1405 is the sum of the current flowing through the PMOS transistor 1402 (set as Id) and the current I1 flowing through the current source inside the comparator, the voltage drop across the resistor 1405 is the product of the resistance of the resistor 1405 (set as R1) and the current, which is represented as (Id + I1) × R1, the voltage drop across the resistor R2 inside the comparator is I1 × R2, when the voltage drop across the resistor 1405 is higher than the voltage drop across the resistor R2, the comparator outputs a high level, and otherwise, the comparator outputs a low level. Can find out

At this time, the voltages at the resistor 1405 and the resistor R2 are equal. The current of the PMOS transistor 1402 is equal to the output current of the current detection circuit, i.e., Id ═ I_{AC_SNS}Therefore, by setting the resistance of the resistor 1405, the amplitude of the alternating current to be detected can be set. The power down detection circuit 150 has one end connected to an output end of the current detection circuit 140 and one end connected to one end of the logic control circuit 170, and outputs a power down protection signal to the logic control circuit 170 to control the PWM control chip 20 to turn off the MOSFET if the AC voltage is abnormal.

As shown in fig. 7, an embodiment of the power down detection circuit 150 includes: an edge detection circuit 1501, a timing circuit 1502, an RS flip-flop 1503, and an inverter 1504; if the edge detection circuit 1501 does not detect an edge, the timing circuit 1502 keeps timing until timing is finished, which indicates that the AC voltage is abnormal, outputs a power-down signal to trigger the RS flip-flop 1503, and is latched and output to the logic control circuit through the inverter 1504 to control the PWM control chip 20 to turn off the MOSFET; if an edge is detected, the timer is reset, indicating that the AC voltage is normal.

The input end of the edge detection circuit 1501 is connected to the output end of the current comparator 1410 in the current detection circuit 140 (BO _ sns), and the output end of the edge detection circuit 1501 is connected to the reset end of the timing circuit 1502; if the edge detection circuit 1501 does not detect an edge, the timing circuit 1502 keeps timing until the timing is finished; if an edge is detected, timing circuit 1502 resets.

The timing circuit 1502 is used for setting time, a reset end is connected with the edge detection circuit 1501, a clock end is connected with a clock signal CLK, and an output end is connected with an S end of the RS trigger 1503; and after the AC-DC converter normally starts working, the timer starts to time, if the AC voltage is always lower than a BO threshold point in the timing process, a BO signal is output after the timing is finished, and if BROWNOUT is higher than the threshold voltage before the timing is finished, the timer is reset, the AC voltage is normal, and the timing is restarted.

An RS flip-flop 1503, wherein R of the RS flip-flop is connected to the system power-on reset signal por, S of the RS flip-flop 1503 is connected to the output of the timing circuit 1502, the output of the RS flip-flop 1503 is connected to the input of an inverter 1504, the output of the inverter 1504 is connected to an input of the logic control circuit 170, and the RS flip-flop 1503 is configured to lock the BROWNOUT signal; and when the AC voltage is lower than the threshold value, after the timing is finished, setting the RS trigger to be at a high level, and latching until the AC-DC converter is powered up again.

The X capacitor detection circuit 160 has one end connected to an output end of the current detection circuit 140 and one end connected to one end of the logic control circuit 170, and outputs an X capacitor signal to the logic control circuit 170 to control the high voltage switch circuit 110 and the high voltage start circuit 120 to discharge the X capacitor if the AC voltage is abnormal.

As shown in fig. 8, an embodiment of the X _ CAP detection circuit 160 includes: edge detection circuits 1601 and 1602, nor gate 1603, inverter 1604, timing circuit 1605, RS flip-flop 1606, and inverter 1607. If the edge detection circuits 1601 and 1602 cannot detect the edge, the timer keeps timing until the timing is finished, which indicates that the AC voltage is abnormal, outputs an X capacitor signal, triggers the RS flip-flop 1606, is latched, and is output to the logic control circuit through the inverter 1607, controls the high voltage switch circuit 110 and the high voltage start circuit 120, and discharges the X capacitor; if an edge is detected, the timer is reset, indicating that the AC voltage is normal.

The input terminals of the edge detection circuits 1601, 1602 are connected to an output terminal of the current detection circuit 140, and the output terminals of the edge detection circuits 1601, 1602 are connected to the input terminal of the nor gate 1603; the output terminal of the nor gate 1603 is connected with the timing circuit 1605 through the inverter 1604, and if the edge detection circuit cannot detect an edge, the timer keeps timing until the timing is finished;

the timing circuit 1605 is used for setting time, a reset end is connected with an output end of the inverter 1604, a clock end is connected with a clock signal CLK, and an output end is connected with an S end of the RS trigger 1606; after the AC-DC converter normally starts working, the timer starts timing, if the timing is finished, the AC voltage is unchanged all the time, an X capacitance signal is output, and the X capacitance detection circuit 160 controls the high-voltage starting circuit 120 to be started to discharge the X capacitance; if an edge is detected, the timer is reset, indicating that the AC voltage is normal, and the timer is restarted.

The RS flip-flop 1606 has an R terminal connected to the system power-on reset signal por, an S terminal connected to the output of the timing circuit 1605, an output terminal of the RS flip-flop 1606 connected to an input terminal of an inverter 1607, and an output terminal of the inverter 1607 connected to an input terminal of the logic control circuit 170. The RS flip-flop 1606 is configured to lock the discharge control signal of the X capacitor, and after the AC voltage is powered down, the logic control circuit 170 starts the high voltage switch circuit 110 and the high voltage start circuit 120, so as to place the charge on the X capacitor onto the VDD capacitor through the high voltage start circuit 120.

The logic control circuit 170 has a first input connected to the power-down detection circuit 150, a second input connected to the output of the X-capacitor detection circuit 160, a first output connected to the sampling control circuit 180, and a second output connected to the PWM control chip 20.

As shown in fig. 9, an embodiment of the logic control circuit 170 includes: a nand gate 1703, three

inverters

1701, 1702 and 1704. An input end of the nand gate 1703 is connected with the power-down detection circuit 150(BO _ P), an input end of the nand gate is connected with an output end of the first inverter 1701, an input end of the first inverter 1701 is connected with the X capacitance detection circuit 160, an output end of the first inverter 1701 is connected with an input end of the second inverter 1702, and an output end of the second inverter 1702 is connected with an input end (ON _ HN) of the sampling control circuit 180; the output end of the nand gate 1703 is connected with the input end of the third inverter 1704, and the output end of the third inverter 1704 is connected with the PWM control chip 20;

the sampling control circuit 180 has one end connected to the high voltage switch circuit 110 and one end connected to the logic control circuit 170, and controls the high voltage switch circuit 110 to be turned on and off during starting and detection.

As shown in fig. 10, an embodiment of the sampling control circuit 180 includes a nor gate 1801 and an inverter 1802, wherein an input terminal of the nor gate 1801 is connected to an output terminal (ON _ HN) of the logic control circuit 170, another input terminal of the nor gate 1801 is connected to the clock signal CLK, and an output terminal of the nor gate 1801 is connected to an input terminal of the high voltage switch circuit 110 via the inverter 1802 (SD _ HN); the sampling control circuit 180 is used for controlling the on and off of the high-voltage switch circuit 110, so that the clock frequency is reduced, and the power consumption caused by always on can be reduced. According to the sampling law, only the rectified signal frequency with the switching frequency more than 2 times is needed.

Fig. 11 is a detailed circuit schematic diagram of a high voltage detection circuit used in an AC-DC converter according to embodiment 1 of the present invention. The invention detects the AC voltage power supply condition when the AC-DC converter works, and protects the system when the AC voltage is undervoltage or power failure; when the voltage is undervoltage, the system stops working until the AC voltage returns to normal; after the AC voltage is powered down, the voltage at two ends of the X capacitor is discharged to 36V safety voltage, and personal safety is guaranteed.

The foregoing is merely a preferred embodiment of the invention, which may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The present embodiments are to be considered in all respects as illustrative and not restrictive, and the invention is not to be considered as limited to the foregoing embodiments. The present invention may be modified, replaced or changed in various forms without departing from the spirit and scope of the above-described basic technical idea of the present invention to obtain the effects similar to the present invention. The scope of the invention is defined by the appended claims rather than the foregoing description, and all changes that come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.

Claims

1. A high voltage detection circuit for use in an AC-DC converter, characterized by: the circuit comprises a high-voltage switch circuit, a high-voltage starting circuit, a voltage-controlled current source, a current detection circuit, a power failure detection circuit, an X capacitance detection circuit, a logic control circuit and a sampling control circuit; wherein the content of the first and second substances,

2. The high voltage detection circuit for use in an AC-DC converter according to claim 1, wherein:

the high-voltage switch circuit is used for isolating the AC voltage, the high-voltage starting circuit and the voltage-controlled current source, is only started during starting and detection, and is in a turn-off state at the rest of time;

3. A high voltage detection circuit for use in an AC-DC converter according to claim 1 or 2, wherein:

the high-voltage switch circuit comprises a junction type field effect transistor or a depletion type transistor, an enhancement type LDMOS transistor, a first resistor and a second resistor;

4. A high voltage detection circuit for use in an AC-DC converter according to claim 3, wherein:

the high-voltage starting circuit comprises an NMOS tube and a diode, wherein the drain electrode of the NMOS tube is connected with the drain electrode of an LDMOS tube in the high-voltage switching circuit, the grid electrode of the NMOS tube is connected with one output end of the logic control circuit, the source electrode of the NMOS tube is connected with the anode of the diode, and the cathode of the diode is connected with VDD.

5. A high voltage detection circuit for use in an AC-DC converter according to claim 1 or 2, wherein:

the voltage-controlled current source comprises a resistor, a first NMOS (N-channel metal oxide semiconductor) tube and a second NMOS tube, wherein one end of the resistor is connected with a source electrode of an enhanced LDNMOS tube in the high-voltage switch circuit, and the other end of the resistor is connected with a drain electrode of the first NMOS tube; the grid electrode and the drain electrode of the first NMOS tube are in short circuit, and the source electrode is grounded; the grid electrode of the second NMOS tube is connected with the grid electrode of the first NMOS tube, the drain electrode is connected with one input end of the current detection circuit, and the source electrode is grounded.

6. A high voltage detection circuit for use in an AC-DC converter according to claim 1 or 2, wherein:

the current detection circuit comprises a first PMOS (P-channel metal oxide semiconductor) tube, a second PMOS tube, a third PMOS tube, a fourth PMOS tube, a first resistor, a second resistor, a third resistor, a first current comparator, a second current comparator and a third current comparator;

7. A high voltage detection circuit for use in an AC-DC converter according to claim 1 or 2, wherein:

the power failure detection circuit comprises an edge detection circuit, a timing circuit, an RS trigger and a phase inverter;

8. A high voltage detection circuit for use in an AC-DC converter according to claim 1 or 2, wherein:

the X capacitance detection circuit comprises an edge detection circuit, a NOR gate, a first inverter, a timing circuit, an RS trigger and a second inverter;

9. A high voltage detection circuit for use in an AC-DC converter according to claim 1 or 2, wherein:

the logic control circuit comprises a NAND gate and three inverters; one input end of the NAND gate is connected with the power-off detection circuit, one input end of the NAND gate is connected with the output end of the first phase inverter, the input end of the first phase inverter is connected with the X capacitance detection circuit, the output end of the first phase inverter is connected with the input end of the second phase inverter, and the output end of the second phase inverter is connected with one input end of the sampling control circuit; the output end of the NAND gate is connected with the input end of the third inverter, and the output end of the third inverter is connected with the PWM control chip.

10. A high voltage detection circuit for use in an AC-DC converter according to claim 1 or 2, wherein:

the sampling control circuit comprises a NOR gate and a phase inverter, wherein one input end of the NOR gate is connected with one output end of the logic control circuit, the other input end of the NOR gate is connected with a clock signal, and the output of the NOR gate is connected with one input end of the high-voltage switch circuit through the phase inverter.