CN113783622B - Optical module with top adjusting function - Google Patents
Optical module with top adjusting function Download PDFInfo
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- CN113783622B CN113783622B CN202111062431.7A CN202111062431A CN113783622B CN 113783622 B CN113783622 B CN 113783622B CN 202111062431 A CN202111062431 A CN 202111062431A CN 113783622 B CN113783622 B CN 113783622B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/50—Transmitters
- H04B10/516—Details of coding or modulation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B10/00—Transmission systems employing electromagnetic waves other than radio-waves, e.g. infrared, visible or ultraviolet light, or employing corpuscular radiation, e.g. quantum communication
- H04B10/25—Arrangements specific to fibre transmission
- H04B10/2575—Radio-over-fibre, e.g. radio frequency signal modulated onto an optical carrier
- H04B10/25752—Optical arrangements for wireless networks
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J14/00—Optical multiplex systems
- H04J14/02—Wavelength-division multiplex systems
- H04J14/0201—Add-and-drop multiplexing
- H04J14/0215—Architecture aspects
- H04J14/022—For interconnection of WDM optical networks
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W28/00—Network traffic management; Network resource management
- H04W28/02—Traffic management, e.g. flow control or congestion control
Abstract
The invention relates to an optical module with a top-adjusting function, which comprises a demodulation unit, an encoding unit, an optical receiving unit, an optical transmitting unit, an optical driving unit and a data processing unit, wherein the demodulation unit, the encoding unit and the optical driving unit are electrically connected with the data processing unit; the optical drive unit completes the modulation of 25G high-speed signals. The 12-channel 25G-rate optical module is supported, and the 12-channel optical module with the top-adjusting function can provide a high-bandwidth large-flow data channel and meet the use requirement of a 5G network.
Description
Technical Field
The invention relates to the technical field of communication, in particular to an optical module with a top-adjusting function.
Background
Since 2020, "new infrastructure", represented by 5G networks, industrial internets, big data, artificial intelligence, etc., has continuously stimulated an increase in bandwidth demand. Particularly, the rapid development of global 5G construction enables the demand of a 5G forwarding network on an optical module to grow explosively. In the 5G era, a radio access network is mainly a C-RAN architecture, DUs are deployed in a centralized manner, and a plurality of RRUs/AAUs are connected through a fronthaul network. Compared with forward-transmission connection schemes such as optical fiber direct drive, passive WDM and active WDM, the semi-active forward-transmission solution has obvious comprehensive advantages in capacity, performance and monitoring, can save a large amount of optical fiber resources for the C-RAN network with a huge base station number, and undoubtedly provides a solution with high cost performance, high reliability and high intelligence for the current 5G large-amount rapid deployment.
An optical module based on phase modulated and modulated top-modulated signals, as provided in patent application CN202110327340.5, comprises a transmitting assembly and a receiving assembly, said transmitting assembly comprising: the electric signal input module is used for inputting electric signals; the optical driving module is used for processing the input electric signal; the main control module is used for controlling the optical drive module and generating a phase modulation and modulation top modulation signal; and the light emission secondary module is in signal connection with the light driving module and the main control module and is used for converting the electric signal processed by the light driving module and the top-adjusting signal generated by the main control module into a path of optical signal.
However, a huge 5G fronthaul network is formed during 5G networking, and the existing optical module cannot meet the requirements of the 5G fronthaul network on high bandwidth and large flow.
Disclosure of Invention
In view of this, the invention provides an optical module with a top adjustment function, which meets the requirements of a 5G forwarding network on high bandwidth and large flow.
In order to achieve the above object, a technical solution to solve the technical problem of the present invention is to provide an optical module with a tuner, including: a base;
the device comprises a demodulation unit, an encoding unit, a light receiving unit, a light emitting unit, a light driving unit and a data processing unit, wherein the demodulation unit, the encoding unit and the light driving unit are electrically connected with the data processing unit; the optical driving unit completes the modulation of 25G high-speed signals; the data processing unit realizes the reporting collection, control, transmission and exchange of various information; the optical receiving unit completes the recovery of 25G high-speed photoelectric signals and low-speed top modulation signals, the demodulation unit amplifies and shapes the recovered 25G high-speed signals, then decodes and outputs the signals to the data processing unit, and the coding unit codes data sent by the data processing unit and then sends the data through the light emitting unit.
Further, the demodulation unit includes a first demodulation chip U16, a second demodulation chip U17, a capacitor C299, a capacitor C307, a capacitor C306, and a resistor R98, one end of the capacitor C307 is grounded, the other end is electrically connected to the VCC pin of the second demodulation chip U17, the IN-pin of the second demodulation chip U17 is electrically connected to the data processing unit and one end of the capacitor C306, the other end of the capacitor C306 is grounded, the VOUT pin of the second demodulation chip U17 is electrically connected to the data processing unit, the IN + pin of the second demodulation chip U17 is electrically connected to one end of the resistor R98 and one end of the capacitor C299, the other end of the capacitor C299 is grounded, the other end of the resistor R98 is electrically connected to the OUT pin of the first demodulation chip U16, and the IN pin of the first demodulation chip U16 is electrically connected to the light receiving unit.
Further, the coding unit comprises a resistor R97, a capacitor C297, a capacitor C298 and a coding chip U14, one end of the capacitor C297 and one end of the capacitor C298 are grounded, the other end of the capacitor C297 and the other end of the capacitor C298 are electrically connected with a SHDN pin of the coding chip U14, one end of the resistor R97 is electrically connected with the light emitting unit, the other end of the resistor R97 is electrically connected with an IN-pin and an OUT pin of the coding chip U14, and an IN + pin of the coding chip U14 is electrically connected with the data processing unit.
Further, the optical receiving unit includes a receiving chip FD1, a capacitor C4, a capacitor C6, a capacitor C290, a capacitor C12, a resistor R86, a resistor R17, a resistor R76, and a resistor R105, one end of the capacitor C4 is electrically connected to an RDP pin of the receiving chip FD1, one end of the capacitor C6 is electrically connected to an RDN pin of the receiving chip FD1, the other end of the capacitor C4 and the other end of the capacitor C6 are electrically connected to the optical driving unit, an RSSI pin of the receiving chip FD1 is electrically connected to one end of the capacitor C12, one end of the resistor R17, one end of the resistor R86, and an IN pin of the first demodulation chip U16, the other end of the capacitor C12 is grounded, the other end of the resistor R17 and one end of the resistor R76 are electrically connected to the data processing unit, the other end of the resistor R86 is electrically connected to one end of the capacitor C290, and the other end of the capacitor C290 is grounded; the other end of the resistor R76 and one end of the resistor R105 are electrically connected with the data processing unit, and the other end of the resistor R105 is grounded.
Further, the light emitting unit includes a light emitting chip U10, and an LD Anode pin, an LD Cathode pin, and a PD-pin of the light emitting chip U10 are electrically connected to the light driving unit and one end of the resistor R97.
Further, the optical driving unit includes a driving chip U12, a capacitor C276, a capacitor C277, a capacitor C278, a capacitor C279, a capacitor C284, a capacitor C285, and an inductor L22, wherein one end of the capacitor C276 is grounded, one end of the capacitor C277 is grounded, the other end of the capacitor C276 and one end of the capacitor C277 are electrically connected to the VCCR2 pin of the driving chip U12, one end of the capacitor C278 is electrically connected to the LDO1 pin of the driving chip U12, the other end of the capacitor C278 is electrically connected to the GNDPM1 pin of the driving chip U12, one end of the capacitor C279 is connected to a VCC level, the other end of the capacitor C279 is electrically connected to the GNDPM1 pin of the driving chip U12, one end of the capacitor C284 and one end of the capacitor C285 are electrically connected to the GNDPM5 pin of the driving chip U12, the other end of the capacitor C284 and the other end of the capacitor C285 are electrically connected to the pmstvcc pin of the driving chip U12, one end of the inductor L22 is electrically connected to the SDA pin of the driving chip U12, the driving chip pin of the driving chip 12, the driving chip out pin of the driving chip is electrically connected to the driving chip 12, the driving chip pin of the mdu, the rdu 3 pin of the led unit, and the mdu 12, and the led unit.
Further, the data processing unit comprises a processing chip U13, a capacitor C295, a capacitor C296, a resistor R2, a resistor R18 and a resistor R94, one end of the capacitor C295 and one end of the capacitor C296 are grounded, and the other end of the capacitor C295 and the other end of the capacitor C296 are electrically connected with a P0.0 pin of the processing chip U13; one end of the resistor R2 is electrically connected with a pin P0.1 of the processing chip U13, the other end of the resistor R2 is grounded, one end of the resistor R18 is electrically connected with a pin P1.1 of the processing chip U13, and the other end of the resistor R18 is grounded; resistance R94 one end with handle chip U13's VDD/VIO pin electricity and be connected, the resistance R94 other end with handle chip U13's RSTb/C2CK pin electricity and be connected, handle chip U13's P1.5 pin, P1.6 pin with driver chip U12's SDA pin, SCL pin electricity are connected, handle chip U13's P0.2 pin with the VOUT pin electricity of second demodulation chip U17 is connected, handle chip U13's P0.5 pin with the resistance R76 other end, resistance R105 one end electricity is connected, handle chip U13's P2.1 pin with coding chip U14's IN + pin electricity is connected.
Further, the specific model of the second demodulation chip U17 is LMV7239M7/NOPB.
Further, the specific model of the receiving chip FD1 is XMD _ ROSA.
Further, the specific model of the light emitting chip U10 is 25G LR TOSA with TEC.
Compared with the prior art, the optical module with the top adjusting function has the following beneficial effects:
the 12-channel 25G-rate optical module is supported by the invention, so that the optical module can meet the application of semi-active Open-WDM/MWDM, and the 12-channel optical module with the top-adjusting function can provide a high-bandwidth large-flow data channel and meet the use requirement of a 5G network.
Drawings
Fig. 1 is a block diagram of an optical module with a tuning top according to a first embodiment of the present invention;
FIG. 2 is a circuit diagram of the demodulation unit of FIG. 1;
FIG. 3 is a circuit diagram of the encoding unit of FIG. 1;
fig. 4 is a circuit diagram of the light receiving unit of fig. 1;
FIG. 5 is a circuit diagram of the light emitting unit of FIG. 1;
FIG. 6 is a circuit diagram of the light driving unit of FIG. 1;
fig. 7 is a circuit diagram of the data processing unit of fig. 1.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and do not limit the invention.
Referring to fig. 1, a first embodiment of the invention provides an optical module with a tuner, which includes: the device comprises a demodulation unit 1, an encoding unit 2, a light receiving unit 3, a light emitting unit 4, a light driving unit 5 and a data processing unit 6, wherein the demodulation unit 1, the encoding unit 2 and the light driving unit 5 are electrically connected with the data processing unit 6, the light receiving unit 3 is electrically connected with the demodulation unit 1 and the data processing unit 6, and the light emitting unit 4 is electrically connected with the encoding unit 2 and the data processing unit 6.
Referring to fig. 2, the demodulation unit 1 includes a first demodulation chip U16, a second demodulation chip U17, a capacitor C299, a capacitor C307, a capacitor C306, and a resistor R98, one end of the capacitor C307 is grounded, the other end is electrically connected to the VCC pin of the second demodulation chip U17, the IN-pin of the second demodulation chip U17 is electrically connected to the data processing unit 6 and one end of the capacitor C306, the other end of the capacitor C306 is grounded, the VOUT pin of the second demodulation chip U17 is electrically connected to the data processing unit 6, the IN + pin of the second demodulation chip U17 is electrically connected to one end of the resistor R98 and one end of the capacitor C299, the other end of the capacitor C299 is grounded, the other end of the resistor R98 is electrically connected to the OUT pin of the first demodulation chip U16, and the IN pin of the first demodulation chip U16 is electrically connected to the optical receiving unit 3.
The light receiving unit 3 receives the light signal, converts the light signal into an electric signal, sends the electric signal to the first demodulation chip U16 for demodulation through the IN pin of the first demodulation chip U16, and the second demodulation chip U17 sends the demodulated data to the data processing unit 6 for processing.
In this embodiment, the specific model of the second demodulation chip U17 is LMV7239M7/NOPB.
Referring to fig. 3, the encoding unit 2 includes a resistor R97, a capacitor C297, a capacitor C298, and an encoding chip U14, one end of the capacitor C297 and one end of the capacitor C298 are grounded, the other end of the capacitor C297 and the other end of the capacitor C298 are electrically connected to a SHDN pin of the encoding chip U14, one end of the resistor R97 is electrically connected to the light emitting unit 4, the other end of the resistor R97 is electrically connected to an IN-pin and an OUT-pin of the encoding chip U14, and an IN + pin of the encoding chip U14 is electrically connected to the data processing unit 6.
The coding chip U14 receives the data sent by the data processing unit 6 through an N + pin, codes the data, and sends a signal of completing coding to the light emitting unit 4 through an IN-pin and an OUT pin.
Referring to fig. 4, the optical receiving unit 3 includes a receiving chip FD1, a capacitor C4, a capacitor C6, a capacitor C290, a capacitor C12, a resistor R86, a resistor R17, a resistor R76, and a resistor R105, wherein one end of the capacitor C4 is electrically connected to an RDP pin of the receiving chip FD1, one end of the capacitor C6 is electrically connected to an RDN pin of the receiving chip FD1, the other end of the capacitor C4 and the other end of the capacitor C6 are electrically connected to the optical driving unit 5, an RSSI pin of the receiving chip FD1 is electrically connected to one end of the capacitor C12, one end of the resistor R17, one end of the resistor R86, and an IN pin of the first demodulation chip U16, the other end of the capacitor C12 is grounded, the other end of the resistor R17 and one end of the resistor R76 are electrically connected to the data processing unit 6, the other end of the resistor R86 is electrically connected to one end of the capacitor C290, and the other end of the capacitor C290 is grounded; the other end of the resistor R76 and one end of the resistor R105 are electrically connected with the data processing unit 6, and the other end of the resistor R105 is grounded.
The specific model of the receiving chip FD1 is XMD _ ROSA.
The receiving chip FD1 receives and processes the optical signal, and sends the processed signal to the demodulation unit 1 through the RSSI pin, and the receiving chip FD1 receives the driving signal of the optical driving unit 5 through the RDP pin and the RDN pin.
Referring to fig. 5, the light emitting unit 4 includes a light emitting chip U10, and an LD Anode pin, an LD Cathode pin, and a PD-pin of the light emitting chip U10 are electrically connected to the light driving unit 5 and one end of the resistor R97.
The light emitting unit 4 receives the coded signal coded by the coding unit 2 and the driving signal of the light driving unit 5, and sends out the coded signal.
In this embodiment, the specific model of the light emitting chip U10 is 25G LR TOSA with TEC.
Referring to fig. 6, the optical driving unit 5 includes a driving chip U12, a capacitor C276, a capacitor C277, a capacitor C278, a capacitor C279, a capacitor C284, a capacitor C285, and an inductor L22, wherein one end of the capacitor C276 is grounded, one end of the capacitor C277 is grounded, the other end of the capacitor C276 and one end of the capacitor C277 are electrically connected to the VCCR2 pin of the driving chip U12, one end of the capacitor C278 is electrically connected to the LDO1 pin of the driving chip U12, the other end of the capacitor C278 is electrically connected to the GNDPM1 pin of the driving chip U12, one end of the capacitor C279 is connected to a VCC level, the other end of the capacitor C284 is electrically connected to the GNDPM1 pin of the driving chip U12, one end of the capacitor C284 and one end of the capacitor C285 are electrically connected to the GNDPM5 pin of the driving chip U12, the other end of the capacitor C284 and the other end of the capacitor C285 are electrically connected to a pmstvcc pin of the driver chip U12, one end of the inductor L22 is electrically connected to an LI pin of the driver chip U12, one end of the inductor L22 is electrically connected to an LO pin of the driver chip U12, an RDIN pin and an RDIP pin of the driver chip U12 are electrically connected to the other end of the capacitor C4 and the other end of the capacitor C6, an MDIN pin, an OUTK pin and an OUTA pin of the driver chip U12 are electrically connected to an LD Anode pin, an LD Cathode pin and a PD-pin of the light emitting chip U10, and an SDA pin and an SCL pin of the driver chip U12 are electrically connected to the data processing unit 6.
Referring to fig. 7, the data processing unit 6 includes a processing chip U13, a capacitor C295, a capacitor C296, a resistor R2, a resistor R18, and a resistor R94, wherein one end of the capacitor C295 and one end of the capacitor C296 are grounded, and the other end of the capacitor C295 and the other end of the capacitor C296 are electrically connected to a pin P0.0 of the processing chip U13; one end of the resistor R2 is electrically connected with a pin P0.1 of the processing chip U13, the other end of the resistor R2 is grounded, one end of the resistor R18 is electrically connected with a pin P1.1 of the processing chip U13, and the other end of the resistor R18 is grounded; resistance R94 one end with handle chip U13's VDD/VIO pin electricity and be connected, the resistance R94 other end with handle chip U13's RSTb/C2CK pin electricity and be connected, handle chip U13's P1.5 pin, P1.6 pin with driver chip U12's SDA pin, SCL pin electricity are connected, handle chip U13's P0.2 pin with the VOUT pin electricity of second demodulation chip U17 is connected, handle chip U13's P0.5 pin with the resistance R76 other end, resistance R105 one end electricity is connected, handle chip U13's P2.1 pin with coding chip U14's IN + pin electricity is connected.
The optical driving unit 5 completes the modulation of 25G high-speed signals; the data processing unit 6 realizes the reporting, collection, control, transmission and exchange of various information; the optical receiving unit 3 completes the recovery of 25G high-speed photoelectric signals and low-speed top modulation signals, the demodulation unit 1 amplifies and shapes the recovered 25G high-speed signals, then decodes and outputs the signals to the data processing unit 6, and the encoding unit 2 encodes the data sent by the data processing unit 6 and sends the data through the light emitting unit 4.
The 12-channel 25G-rate optical module is supported by the invention, so that the optical module can meet the application of semi-active Open-WDM/MWDM, and the 12-channel optical module with the top-adjusting function can provide a high-bandwidth large-flow data channel and meet the use requirement of a 5G network.
The above-described embodiments of the present invention should not be construed as limiting the scope of the present invention. Any other corresponding changes and modifications made according to the technical idea of the present invention should be included in the protection scope of the present invention.
Claims (9)
1. An optical module with a jack, comprising:
the device comprises a demodulation unit, an encoding unit, a light receiving unit, a light emitting unit, a light driving unit and a data processing unit, wherein the demodulation unit, the encoding unit and the light driving unit are electrically connected with the data processing unit, the light receiving unit is electrically connected with the demodulation unit and the data processing unit, and the light emitting unit is electrically connected with the encoding unit and the data processing unit; the optical driving unit completes the modulation of 25G high-speed signals; the data processing unit realizes the reporting collection, control, transmission and exchange of various information; the optical receiving unit completes the recovery of a 25G high-speed photoelectric signal and a low-speed top modulation signal, the demodulating unit amplifies and shapes the recovered 25G high-speed signal, then decodes and outputs the signal to the data processing unit, the encoding unit encodes data sent by the data processing unit and then sends the encoded data through the light emitting unit, the demodulating unit comprises a first demodulating chip U16, a second demodulating chip U17, a capacitor C299, a capacitor C307, a capacitor C306 and a resistor R98, one end of the capacitor C307 is grounded, the other end of the capacitor C307 is electrically connected with a VCC pin of the second demodulating chip U17, an IN-pin of the second demodulating chip U17 is electrically connected with the data processing unit and one end of the capacitor C306, the other end of the capacitor C306 is grounded, a VOUT pin of the second demodulating chip U17 is electrically connected with the data processing unit, an IN + pin of the second demodulating chip U17 is electrically connected with one end of the resistor R98, one end of the capacitor C299 is grounded, the other end of the capacitor C299 is electrically connected with an OUT pin of the first demodulating chip, and the first demodulating chip of the optical receiving chip U16 is electrically connected with the first demodulating chip.
2. The optical module with a tuner of claim 1, wherein:
the coding unit includes resistance R97, electric capacity C297, electric capacity C298, code chip U14, electric capacity C297 one end electric capacity C298 one end ground connection, the electric capacity C297 other end the electric capacity C298 other end with code chip U14's SHDN pin is connected, resistance R97 one end with the light emission unit electricity is connected, the other end with code chip U14's IN-pin, OUT pin electricity are connected, code chip U14's IN + pin with the data processing unit electricity is connected.
3. The optical module with a tuner of claim 1, wherein:
the optical receiving unit comprises a receiving chip FD1, a capacitor C4, a capacitor C6, a capacitor C290, a capacitor C12, a resistor R86, a resistor R17, a resistor R76 and a resistor R105, wherein one end of the capacitor C4 is electrically connected with an RDP pin of the receiving chip FD1, one end of the capacitor C6 is electrically connected with an RDN pin of the receiving chip FD1, the other end of the capacitor C4 and the other end of the capacitor C6 are electrically connected with the optical driving unit, an RSSI pin of the receiving chip FD1 is electrically connected with one end of the capacitor C12, one end of the resistor R17, one end of the resistor R86 and an IN pin of the first demodulation chip U16, the other end of the capacitor C12 is grounded, the other end of the resistor R17 and one end of the resistor R76 are electrically connected with the data processing unit, the other end of the resistor R86 is electrically connected with one end of the capacitor C290, and the other end of the capacitor C290 is grounded; the other end of the resistor R76 and one end of the resistor R105 are electrically connected with the data processing unit, and the other end of the resistor R105 is grounded.
4. A jack-backed optical module as set forth in claim 3, wherein:
the light emitting unit comprises a light emitting chip U10, and an LD Anode pin, an LD Cathode pin and a PD-pin of the light emitting chip U10 are electrically connected with the light driving unit and one end of a resistor R97.
5. A set top optical module as claimed in claim 4, wherein:
the optical driving unit comprises a driving chip U12, a capacitor C276, a capacitor C277, a capacitor C278, a capacitor C279, a capacitor C284, a capacitor C285 and an inductor L22, wherein one end of the capacitor C276 is grounded, one end of the capacitor C277 is grounded, the other end of the capacitor C276 and one end of the capacitor C277 are electrically connected with a VCCR2 pin of the driving chip U12, one end of the capacitor C278 is electrically connected with an LDO1 pin of the driving chip U12, the other end of the capacitor C278 is electrically connected with a GNDPM1 pin of the driving chip U12, one end of the capacitor C279 is connected with a VCC level, the other end of the capacitor C279 is electrically connected with a GNDPM1 pin of the driving chip U12, one end of the capacitor C284 and one end of the capacitor C285 are electrically connected with a GNDPM5 pin of the driving chip U12, the other end of the capacitor C284 and the other end of the capacitor C285 are electrically connected to a pmstvcc pin of the driver chip U12, one end of the inductor L22 is electrically connected to an LI pin of the driver chip U12, one end of the inductor L22 is electrically connected to an LO pin of the driver chip U12, an RDIN pin and an RDIP pin of the driver chip U12 are electrically connected to the other end of the capacitor C4 and the other end of the capacitor C6, an MDIN pin, an OUTK pin and an OUTA pin of the driver chip U12 are electrically connected to an LD Anode pin, an LD Cathode pin and a PD-pin of the light emitting chip U10, and an SDA pin and an SCL pin of the driver chip U12 are electrically connected to the data processing unit.
6. The optical module with a tuner of claim 5, wherein:
the data processing unit comprises a processing chip U13, a capacitor C295, a capacitor C296, a resistor R2, a resistor R18 and a resistor R94, wherein one end of the capacitor C295 and one end of the capacitor C296 are grounded, and the other end of the capacitor C295 and the other end of the capacitor C296 are electrically connected with a P0.0 pin of the processing chip U13; one end of the resistor R2 is electrically connected with a pin P0.1 of the processing chip U13, the other end of the resistor R2 is grounded, one end of the resistor R18 is electrically connected with a pin P1.1 of the processing chip U13, and the other end of the resistor R18 is grounded; resistance R94 one end with handle chip U13's VDD/VIO pin electricity and be connected, the resistance R94 other end with handle chip U13's RSTb/C2CK pin electricity and be connected, handle chip U13's P1.5 pin, P1.6 pin with driver chip U12's SDA pin, SCL pin electricity are connected, handle chip U13's P0.2 pin with the VOUT pin electricity of second demodulation chip U17 is connected, handle chip U13's P0.5 pin with the resistance R76 other end, resistance R105 one end electricity is connected, handle chip U13's P2.1 pin and coding chip U14's IN + pin electricity is connected.
7. A set top optical module as claimed in claim 5, wherein:
the specific model of the second demodulation chip U17 is LMV7239M7/NOPB.
8. The optical module with a tuner of claim 6, wherein:
the specific model of the receiving chip FD1 is XMD _ ROSA.
9. A set top optical module as claimed in claim 4, wherein:
the specific model of the light emitting chip U10 is 25G LR TOSA with TEC.
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| CN202111062431.7A CN113783622B (en) | 2021-09-10 | 2021-09-10 | Optical module with top adjusting function |
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| CN202111062431.7A CN113783622B (en) | 2021-09-10 | 2021-09-10 | Optical module with top adjusting function |
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| CN113783622B true CN113783622B (en) | 2023-01-17 |
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