CN113781961A - Pixel circuit, display panel and driving method - Google Patents
Pixel circuit, display panel and driving method Download PDFInfo
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- CN113781961A CN113781961A CN202111254467.5A CN202111254467A CN113781961A CN 113781961 A CN113781961 A CN 113781961A CN 202111254467 A CN202111254467 A CN 202111254467A CN 113781961 A CN113781961 A CN 113781961A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0243—Details of the generation of driving signals
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
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Abstract
In the pixel circuit, the first initialization circuit is added to respond to a second scanning signal, and the first initialization signal is written into a second stage of the driving transistor generating the coupling capacitor, wherein the effective level time of the second scanning signal is before the effective level time of the light-emitting control signal. The first initialization signal can effectively remove charges accumulated by the coupling capacitor occurring in the pixel circuit, and since the second scan signal can effectively remove charges accumulated by the coupling capacitor in the pixel circuit before the driving transistor drives the light emitting device to emit light, the stability of light emission of the display device can be improved.
Description
Technical Field
The invention relates to the technical field of display, in particular to a pixel circuit, a display panel and a driving method.
Background
Organic Light Emitting Diode (OLED) panels have the characteristics of flexibility, high contrast, low power consumption, and the like, and have attracted much attention. The pixel circuit is the core technical content of the OLED panel, and has important research significance.
At present, an OLED screen pixel circuit generally adopts a combined design of a plurality of TFTs (Thin Film transistors) and a capacitor, and the pixel circuit can effectively solve various problems of pixel nonuniformity, unstable voltage writing and the like. However, due to the manufacturing process, a coupling phenomenon occurs in the pixel circuit, and a coupling capacitor is generated, which interferes with a normal display signal due to the accumulation and release of charges, so that the OLED emits unstable flicker, and the display performance is affected.
Disclosure of Invention
The embodiment of the invention provides a pixel circuit, a display panel and a driving method, which are used for solving the problem of unstable light emission of an OLED display panel in the prior art.
In a first aspect, an embodiment of the present invention provides a pixel circuit, including:
a light emitting device configured to emit light under control of a driving current;
a driving transistor configured to generate the driving current according to a data signal;
a light emission control circuit configured to turn on a first stage of the driving transistor by a voltage in response to a light emission control signal and to supply the driving current to the light emitting device;
a write compensation circuit configured to write a data signal to the driving transistor in response to a first scan signal and compensate for a threshold voltage of the driving transistor;
a storage circuit configured to store a gate potential of the driving transistor;
a reset circuit configured to reset a gate of the driving transistor in response to a reset signal;
a first initializing circuit for writing a first initializing signal into the second stage of the driving transistor in response to a second scanning signal;
wherein the second scan signal active level time is prior to the emission control signal active level time.
In one possible implementation, the second scan signal active level time is after the first scan signal active level time.
In a possible implementation manner, the device further comprises a second initialization circuit;
the second initialization circuit is configured to write a second initialization signal to an anode of the light emitting device in response to the first scan signal.
In one possible implementation, the first initialization circuit includes a first transistor;
the grid electrode of the first transistor is electrically connected with the second scanning signal end, the first electrode of the first transistor is electrically connected with the second electrode of the driving transistor, and the second electrode of the first transistor is electrically connected with the first initialization signal end.
In one possible implementation, the light emission control circuit includes a second transistor and a third transistor;
the grid electrode of the second transistor is electrically connected with a light-emitting control signal end, the first stage of the second transistor is electrically connected with a first voltage signal end, and the second stage of the second transistor is electrically connected with the first stage of the driving transistor;
the gate of the third transistor is electrically connected to the light emission control signal terminal, the first stage of the third transistor is electrically connected to the second stage of the driving transistor, and the second stage of the third transistor is electrically connected to the anode of the light emitting device.
In one possible implementation, the write compensation circuit includes a fourth transistor and a fifth transistor;
the grid electrode of the fourth transistor is electrically connected with a first scanning signal end, the first stage of the fourth transistor is electrically connected with the first stage of the driving transistor, and the second stage of the fourth transistor is electrically connected with a data signal end;
the grid electrode of the fifth transistor is electrically connected with the first scanning signal end, the first stage of the fifth transistor is electrically connected with the grid electrode of the driving transistor, and the second stage of the fifth transistor is electrically connected with the second stage of the driving transistor.
In one possible implementation, the reset circuit includes a sixth transistor;
the grid electrode of the sixth transistor is electrically connected with the reset signal end, the first stage of the sixth transistor is electrically connected with the grid electrode of the driving transistor, and the second stage of the sixth transistor is electrically connected with the second initialization signal end.
In one possible implementation manner, the first terminal of the capacitor is electrically connected to the reference voltage terminal, and the second terminal of the capacitor is electrically connected to the gate of the driving transistor.
In one possible implementation, the second initialization circuit includes a seventh transistor;
a gate of the seventh transistor is electrically connected to a first scan signal terminal, a first stage of the seventh transistor is electrically connected to an anode of the light emitting device, and a second stage of the seventh transistor is electrically connected to a second initialization signal terminal.
In a second aspect, an embodiment of the present invention further provides a display panel, including the pixel circuit as described in any one of the foregoing.
In a third aspect, an embodiment of the present invention further provides a driving method of a pixel circuit, where the pixel circuit includes a light emitting device, a driving transistor, a light emission control circuit, a write compensation circuit, a storage circuit, a reset circuit, and a first initialization circuit;
the driving method includes: a reset stage, a write compensation stage, a pre-luminescence stage and a luminescence stage;
in the reset phase, the reset circuit responds to a reset signal to reset the grid electrode of the driving transistor;
in the write compensation phase, the write compensation circuit responds to a first scanning signal, writes a data signal into the driving transistor and compensates the threshold voltage of the driving transistor;
in the pre-lighting stage, the first initialization circuit responds to a second scanning signal and writes the first initialization signal into the second stage of the driving transistor;
in the light emitting stage, the light emitting control circuit responds to a light emitting control signal to enable the first stage of the driving transistor to be connected with voltage and provide the driving current for the light emitting device;
wherein the second scan signal active level time is prior to the emission control signal active level time.
In one possible implementation, the second scan signal active level time is after the first scan signal active level time.
In one possible implementation, the pixel circuit further includes a second initialization circuit, and the method further includes:
the second initialization circuit writes a second initialization signal to an anode of the light emitting device in response to the first scan signal in the write compensation phase.
Has the advantages that:
in the pixel circuit, the display panel and the driving method provided by the embodiment of the invention, the first initialization circuit is added in the pixel circuit and used for responding to the second scanning signal and writing the first initialization signal into the second stage of the driving transistor generating the coupling capacitor, wherein the effective level time of the second scanning signal is before the effective level time of the light-emitting control signal. The first initialization signal can effectively remove charges accumulated by the coupling capacitor occurring in the pixel circuit, and since the second scan signal can effectively remove charges accumulated by the coupling capacitor in the pixel circuit before the driving transistor drives the light emitting device to emit light, the stability of light emission of the display device can be improved.
Drawings
In order to more clearly illustrate the technical solutions of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.
FIG. 1 is a diagram illustrating a pixel circuit according to the prior art according to an embodiment of the present invention;
FIG. 2 is a timing diagram of a pixel circuit according to the prior art according to an embodiment of the present invention;
fig. 3 is a schematic diagram of a pixel circuit according to an embodiment of the invention;
FIG. 4 is a timing diagram of a pixel circuit according to an embodiment of the present invention;
fig. 5 is a schematic diagram illustrating a driving method of a pixel circuit according to an embodiment of the invention;
fig. 6 is a schematic diagram of a pixel circuit in a reset phase according to an embodiment of the present invention;
FIG. 7 is a timing diagram of a pixel circuit in a reset phase according to an embodiment of the present invention;
FIG. 8 is a schematic diagram illustrating operation of a pixel circuit during a write compensation phase according to an embodiment of the present invention;
FIG. 9 is a timing diagram of a pixel circuit during a write compensation phase according to an embodiment of the present invention;
FIG. 10 is a schematic diagram of a pixel circuit during a pre-lighting period according to an embodiment of the present invention;
FIG. 11 is a timing diagram of a pixel circuit in a pre-illumination stage according to an embodiment of the present invention;
FIG. 12 is a schematic diagram of a pixel circuit during a light-emitting period according to an embodiment of the present invention;
FIG. 13 is a timing diagram of a pixel circuit in a light-emitting stage according to an embodiment of the present invention;
fig. 14 is a timing diagram of a pixel circuit in a 1-frame period according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the drawings of the embodiments of the present invention. It is to be understood that the embodiments described are only a few embodiments of the present invention, and not all embodiments. And the embodiments and features of the embodiments may be combined with each other without conflict. All other embodiments, which can be derived by a person skilled in the art from the described embodiments of the invention without any inventive step, are within the scope of protection of the invention.
Unless defined otherwise, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this invention belongs. The use of "first," "second," and similar terms in the present application do not denote any order, quantity, or importance, but rather the terms are used to distinguish one element from another. The word "comprising" or "comprises", and the like, means that the element or item listed before the word covers the element or item listed after the word and its equivalents, but does not exclude other elements or items. The terms "connected" or "coupled" and the like are not restricted to physical or mechanical connections, but may include electrical connections, whether direct or indirect.
It should be noted that the sizes and shapes of the figures in the drawings are not to be considered true scale, but are merely intended to schematically illustrate the present invention. And the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout.
Currently, an OLED (Organic Light Emitting Diode) screen pixel circuit is generally designed by a combination of a plurality of TFTs (Thin Film transistors) and a capacitor C, such as the pixel circuit shown in fig. 1, which can effectively solve various problems of non-uniformity of pixels and unstable voltage writing, and fig. 2 is a timing chart of the circuit. Due to the manufacturing process, a coupling phenomenon occurs in the pixel circuit, i.e. a coupling capacitor Co is generated at the node N1 in fig. 1, and the coupling capacitor Co interferes with the normal display signal, thereby adversely affecting the display effect.
Here, the coupling capacitance Co is generated by coupling and is not a capacitance actually existing.
In order to solve the above problem, an embodiment of the present invention provides a pixel circuit, as shown in fig. 3, including:
a light emitting device L configured to emit light under control of a driving current;
a driving transistor DT configured to generate a driving current according to the data signal data;
a light emission control circuit 10 configured to turn on a first stage of the driving transistor DT by a voltage in response to a light emission control signal em and supply a driving current to the light emitting device L;
a write compensation circuit 20 configured to write the data signal data to the driving transistor DT in response to the first scan signal gate1 and compensate for a threshold voltage of the driving transistor DT;
a storage circuit 30 configured to store a gate potential of the driving transistor DT;
a reset circuit 40 configured to reset the gate of the driving transistor DT in response to a reset signal reset;
a first initializing circuit 50 for writing a first initializing signal vinit1 into the second stage of the driving transistor DT in response to the second scan signal gate 2;
wherein, the second scan signal gate2 is active for a time before the emission control signal em is active for a time.
A pixel circuit according to an embodiment of the present invention includes a light emitting device L, a driving transistor DT, a light emission control circuit 10, a write compensation circuit 20, a memory circuit 30, a reset circuit 40, and a first initialization circuit 50, the light emitting device L emitting light under control of a driving current, the driving transistor DT generating the driving current according to a data signal data, the light emission control circuit 10 turning on a first stage of the driving transistor DT in response to the light emission control signal em and supplying the driving current to the light emitting device L, the write compensation circuit 20 writing the data signal data to the driving transistor DT and compensating for a threshold voltage of the driving transistor DT in response to a first scanning signal gate1, the memory circuit 30 storing a gate potential of the driving transistor DT, the reset circuit 40 resetting the gate of the driving transistor DT in response to a reset signal reset, the first initialization circuit 50, the first initialization signal vinit1 is written to the second stage of the driving transistor DT in response to the second scan signal gate2, and the second scan signal gate2 is active level time before the emission control signal em is active level time. Since the first initializing circuit 50 can write the first initializing signal vinit1 into the second stage of the driving transistor DT in response to the second scan signal gate2, and the second scan signal gate2 is active for a time before the emission control signal em is active for a time, the coupling capacitance in the pixel circuit can be effectively eliminated before the driving transistor DT drives the light emitting device L to emit light, so that the stability of the emission of the display device can be improved.
In particular implementation, as shown in fig. 3, the pixel circuit further includes a second initialization circuit 60 configured to write a second initialization signal vinit2 to the anode of the light emitting device L in response to the first scan signal gate 1.
The second initializing circuit 60 may initialize the anode of the light emitting device L, and remove charges at the anode of the light emitting device L, so that the display effect may be improved.
In a specific implementation, as shown in fig. 3, the first initialization circuit 50 may include a first transistor T1, the light emission control circuit 10 may include a second transistor T2 and a third transistor T3, the write compensation circuit 20 may include a fourth transistor T4 and a fifth transistor T5, the reset circuit 40 may include a sixth transistor T6, the second initialization circuit 60 may include a seventh transistor T7, and the storage circuit 30 may include a capacitor C.
Specifically, the Gate of the first transistor T1 is electrically connected to the second scan signal terminal Gate2, the first pole of the first transistor T1 is electrically connected to the second pole of the driving transistor DT, and the second pole of the first transistor T1 is electrically connected to the first initialization signal terminal Vinit 1; a gate electrode of the second transistor T2 is electrically connected to the emission control signal terminal EM, a first stage of the second transistor T2 is electrically connected to the first voltage signal terminal VDD, and a second stage of the second transistor T2 is electrically connected to the first stage of the driving transistor DT; a gate electrode of the third transistor T3 is electrically connected to the light emission control signal terminal EM, a first stage of the third transistor T3 is electrically connected to the second stage of the driving transistor DT, and a second stage of the third transistor T3 is electrically connected to an anode electrode of the light emitting device L; a Gate electrode of the fourth transistor T4 is electrically connected to the first scan signal terminal Gate1, a first stage of the fourth transistor T4 is electrically connected to the first stage of the driving transistor DT, and a second stage of the fourth transistor T4 is electrically connected to the Data signal terminal Data; a Gate electrode of the fifth transistor T5 is electrically connected to the first scan signal terminal Gate1, a first stage of the fifth transistor T5 is electrically connected to the Gate electrode of the driving transistor DT, and a second stage of the fifth transistor T5 is electrically connected to the second stage of the driving transistor DT; a gate of the sixth transistor T6 is electrically connected to the Reset signal terminal Reset, a first stage of the sixth transistor T6 is electrically connected to the gate of the driving transistor DT, and a second stage of the sixth transistor T6 is electrically connected to the second initialization signal terminal Vinit 2; a Gate electrode of the seventh transistor T7 is electrically connected to the first scan signal terminal Gate1, a first stage of the seventh transistor T7 is electrically connected to an anode electrode of the light emitting device L, and a second stage of the seventh transistor T7 is electrically connected to the second initialization signal terminal Vinit 2; a first end of the capacitor C is electrically connected with a reference voltage end Vref, and a second end of the capacitor C is electrically connected with the grid electrode of the driving transistor DT; the cathode of the light emitting device L is electrically connected to a second voltage signal terminal VSS.
The light emitting control signal terminal EM is configured to output a light emitting control signal EM, the first scan signal terminal Gate1 is configured to output a first scan signal Gate1, the second scan signal terminal Gate2 is configured to output a second scan signal Gate2, the Reset signal terminal Reset is configured to output a Reset signal Reset, the first initialization signal terminal Vinit1 is configured to output a first initialization signal Vinit1, the second initialization signal terminal Vinit2 is configured to output a second initialization signal Vinit2, the Data signal terminal Data is configured to output a Data signal Data, the first voltage signal terminal VDD is configured to output a first voltage VDD, the second voltage signal terminal VSS is configured to output a second voltage VSS, and the reference voltage terminal Vref is configured to output a reference voltage Vref.
It should be noted that the first initialization signal vinit1, the second initialization signal vinit2, and the first voltage signal vdd in the embodiment of the present invention may be constant voltage direct current signals, or alternating current signals that jump over time, which is specifically set according to the actual situation, and the present invention is not limited thereto.
In a specific implementation, the reference voltage terminal Vref may be the same as the first voltage signal terminal VDD, and at this time, the first voltage signal VDD output by the first voltage signal terminal VDD is a constant voltage dc signal, so as to implement the retention function of the capacitor.
Based on the same inventive concept, an embodiment of the present invention further provides a driving method matched with the pixel circuit, as shown in fig. 5, including:
s501, in a reset stage, a reset circuit responds to a reset signal to reset the grid electrode of the driving transistor;
s502, in a writing compensation stage, the writing compensation circuit responds to a first scanning signal, writes a data signal into the driving transistor and compensates the threshold voltage of the driving transistor;
s503, in the pre-lighting stage, the first initialization circuit responds to the second scanning signal and writes the first initialization signal into the second stage of the driving transistor;
and S504, in a light-emitting stage, the light-emitting control circuit responds to the light-emitting control signal, enables the first stage of the driving transistor to be connected with voltage, and provides driving current for the light-emitting device, wherein the effective level time of the second scanning signal is before the effective level time of the light-emitting control signal.
Optionally, the method further comprises:
the second scan signal gate2 is active level time after the first scan signal gate1 is active level time.
In the write compensation stage, the second initialization circuit 60 writes the second initialization signal vinit2 to the anode of the light emitting device L in response to the first scan signal gate 1.
Alternatively, in the pixel circuit provided in the embodiment of the present invention, as shown in fig. 3, the driving transistor DT and the first to seventh transistors T1 to T7 may be all P-type transistors. Of course, all the transistors may be N-type transistors, and are not limited herein.
Specifically, in the pixel circuit provided by the embodiment of the present invention, the P-type transistor is turned on by a low-level signal and turned off by a high-level signal; the N-type transistor is turned on under the action of a high-level signal and is turned off under the action of a low-level signal.
Therefore, when all the transistors in the pixel circuit provided by the embodiment of the present invention are P-type transistors, the signal at the active level mentioned in the driving method is a signal at a low level, and the signal at the off level is a signal at a high level.
Specifically, in the pixel circuit provided in the embodiment of the present invention, each Transistor may be a Thin Film Transistor (TFT) or a Metal Oxide semiconductor field effect Transistor (MOS), which is not limited herein. Depending on the type of each transistor and the signal of the gate of each transistor, the first electrode of each transistor may be used as a source and the second electrode may be used as a drain, or the first electrode of each transistor may be used as a drain and the second electrode may be used as a source, which is not particularly limited herein.
The present invention will be described in detail with reference to specific examples. It should be noted that the present embodiment is intended to better explain the present invention, but not to limit the present invention. In the following description, 1 represents a high level, and 0 represents a low level. It should be noted that 1 and 0 are logic levels, which are only used to better explain the specific operation of the pixel circuit, not the specific voltage values.
The following takes 4 stages of the first stage t1, the second stage t2, the third stage t3 and the fourth stage t4 in the signal timing diagram shown in fig. 4 to describe the operation process of the pixel circuit shown in fig. 3.
In the first phase t1, i.e. the reset phase, as shown in fig. 6 and 7, reset is 0, gate1 is 1, gate2 is 1, and em is 1.
When reset is 0, the sixth transistor T6 is turned on, and the sixth transistor T6 writes the second initialization signal vinit2 to the gate of the driving transistor DT to reset the gate of the driving transistor DT; the gate1 is 1, and the fourth transistor T4, the fifth transistor T5, and the seventh transistor T7 are turned off; when the gate2 is equal to 1, the first transistor T1 is turned off; em is 1, the second transistor T2 and the third transistor T3 are turned off.
In the second stage t2, i.e. the write compensation stage, as shown in fig. 8 and 9, reset is 1, gate1 is 0, gate2 is 1, and em is 1.
reset is 1, and the sixth transistor T6 is turned off; when the gate1 is equal to 0, the fourth transistor T4 is turned on, the fourth transistor T4 writes the Data signal Data into the driving transistor DT, the fifth transistor T5 is turned on, the gate of the driving transistor DT and the second electrode are turned on to form a diode structure, the gate of the driving transistor DT and the capacitor C are charged by the Data signal terminal Data, the threshold voltage of the driving transistor DT is compensated until the gate voltage of the driving transistor DT is VData + Vth, the driving transistor DT is turned off, the seventh transistor T7 is turned on, and the second initialization signal vinit2 is written into the anode of the light emitting device L to be reset; when the gate2 is equal to 1, the first transistor T1 is turned off; em is 1, the second transistor T2 and the third transistor T3 are turned off.
In the third stage t3, i.e. the pre-lighting stage, as shown in fig. 10 and 11, reset is 1, gate1 is 1, gate2 is 0, and em is 1.
reset is 1, and the sixth transistor T6 is turned off; the gate1 is 1, and the fourth transistor T4, the fifth transistor T5, and the seventh transistor T7 are turned off; when the gate2 is equal to 0, the first transistor T1 is turned on, and the first initialization signal vinit2 is written to the second stage of the driving transistor DT, i.e., the N1 node, through the first transistor T1, so as to eliminate the charges accumulated in the coupling capacitor generated in the second stage of the driving transistor DT due to the coupling phenomenon; em is 1, the second transistor T2 and the third transistor T3 are turned off.
In the fourth phase t4, i.e., the light emitting phase, as shown in fig. 12 and 13, reset is 1, gate1 is 1, gate2 is 1, and em is 0.
reset is 1, and the sixth transistor T6 is turned off; the gate1 is 1, and the fourth transistor T4, the fifth transistor T5, and the seventh transistor T7 are turned off; when the gate2 is equal to 1, the first transistor T1 is turned off; em is 0, the second transistor T2 and the third transistor T3 are turned on, the first stage of the driving transistor DT is turned on by a voltage, and a driving current is supplied to the light emitting device L to emit light.
As can be seen from the above-mentioned process and the timing diagram shown in fig. 4, the second scan signal gate2 is active before the emission control signal em, that is, the first initialization signal vinit1 provided by the embodiment of the present invention is written to the location where the second stage of the driving transistor DT generating the coupling capacitance is located before the emission phase, so that the accumulated charges are removed before the emission phase, and the first initialization circuit 50 does not operate during the emission phase, so that the normal emission can be ensured.
It should be noted that in the embodiment of the present invention, it may occur that the light emission control signal em is turned on for multiple times within 1frame (1frame), but the data signal data is written only once, as shown in fig. 14, the active level signal of the light emission control signal em appears 2 times within each frame time, i.e. 2 times of light emission, but the data signal data is written only once, i.e. no matter how many times the data signal is written, before the light emission control signal em is the active level signal, the second scan signal gate2 is definitely the active level signal, so that the generated charges accumulated by the coupling capacitor can be eliminated before the light emitting device emits light, and the light emitting stability of the display device is improved.
Based on the same inventive concept, embodiments of the present invention further provide a display panel including any one of the pixel circuits in the previous embodiments.
In the pixel circuit, the first initialization circuit 50 is added for responding to the second scan signal gate2 and writing the first initialization signal vinit1 into the second stage of the driving transistor DT generating the coupling capacitance, the first initialization signal vinit1 can effectively eliminate the coupling capacitance appearing in the pixel circuit, and because the active level time of the second scan signal gate2 is before the active level time of the light emitting control signal em, the coupling capacitance in the pixel circuit can be effectively eliminated before the driving transistor DT drives the light emitting device L to emit light, so that the stability of the light emission of the display device can be improved.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (13)
1. A pixel circuit, comprising:
a light emitting device configured to emit light under control of a driving current;
a driving transistor configured to generate the driving current according to a data signal;
a light emission control circuit configured to turn on a first stage of the driving transistor by a voltage in response to a light emission control signal and to supply the driving current to the light emitting device;
a write compensation circuit configured to write a data signal to the driving transistor in response to a first scan signal and compensate for a threshold voltage of the driving transistor;
a storage circuit configured to store a gate potential of the driving transistor;
a reset circuit configured to reset a gate of the driving transistor in response to a reset signal;
a first initializing circuit for writing a first initializing signal into the second stage of the driving transistor in response to a second scanning signal;
wherein the second scan signal active level time is prior to the emission control signal active level time.
2. The pixel circuit according to claim 1, wherein the second scan signal active level time is after the first scan signal active level time.
3. The pixel circuit according to claim 1, further comprising a second initialization circuit;
the second initialization circuit is configured to write a second initialization signal to an anode of the light emitting device in response to the first scan signal.
4. The pixel circuit according to claim 1, wherein the first initialization circuit includes a first transistor;
the grid electrode of the first transistor is electrically connected with the second scanning signal end, the first electrode of the first transistor is electrically connected with the second electrode of the driving transistor, and the second electrode of the first transistor is electrically connected with the first initialization signal end.
5. The pixel circuit according to claim 1, wherein the light emission control circuit comprises a second transistor and a third transistor;
the grid electrode of the second transistor is electrically connected with a light-emitting control signal end, the first stage of the second transistor is electrically connected with a first voltage signal end, and the second stage of the second transistor is electrically connected with the first stage of the driving transistor;
the gate of the third transistor is electrically connected to the light emission control signal terminal, the first stage of the third transistor is electrically connected to the second stage of the driving transistor, and the second stage of the third transistor is electrically connected to the anode of the light emitting device.
6. The pixel circuit according to claim 1, wherein the write compensation circuit includes a fourth transistor and a fifth transistor;
the grid electrode of the fourth transistor is electrically connected with a first scanning signal end, the first stage of the fourth transistor is electrically connected with the first stage of the driving transistor, and the second stage of the fourth transistor is electrically connected with a data signal end;
the grid electrode of the fifth transistor is electrically connected with the first scanning signal end, the first stage of the fifth transistor is electrically connected with the grid electrode of the driving transistor, and the second stage of the fifth transistor is electrically connected with the second stage of the driving transistor.
7. The pixel circuit according to claim 1, wherein the reset circuit includes a sixth transistor;
the grid electrode of the sixth transistor is electrically connected with the reset signal end, the first stage of the sixth transistor is electrically connected with the grid electrode of the driving transistor, and the second stage of the sixth transistor is electrically connected with the second initialization signal end.
8. The pixel circuit according to claim 1, wherein the storage circuit includes a capacitor;
the first end of the capacitor is electrically connected with the reference voltage end, and the second end of the capacitor is electrically connected with the grid electrode of the driving transistor.
9. The pixel circuit according to claim 3, wherein the second initialization circuit includes a seventh transistor;
a gate of the seventh transistor is electrically connected to a first scan signal terminal, a first stage of the seventh transistor is electrically connected to an anode of the light emitting device, and a second stage of the seventh transistor is electrically connected to a second initialization signal terminal.
10. A display panel, comprising: a pixel circuit as claimed in any one of claims 1-9.
11. A driving method of a pixel circuit is characterized in that the pixel circuit comprises a light emitting device, a driving transistor, a light emitting control circuit, a writing compensation circuit, a storage circuit, a reset circuit and a first initialization circuit;
the driving method includes: a reset stage, a write compensation stage, a pre-luminescence stage and a luminescence stage;
in the reset phase, the reset circuit responds to a reset signal to reset the grid electrode of the driving transistor;
in the write compensation phase, the write compensation circuit responds to a first scanning signal, writes a data signal into the driving transistor and compensates the threshold voltage of the driving transistor;
in the pre-lighting stage, the first initialization circuit responds to a second scanning signal and writes the first initialization signal into the second stage of the driving transistor;
in the light emitting stage, the light emitting control circuit responds to a light emitting control signal to enable the first stage of the driving transistor to be connected with voltage and provide the driving current for the light emitting device;
wherein the second scan signal active level time is prior to the emission control signal active level time.
12. The method of claim 11, wherein the second scan signal active level time is subsequent to the first scan signal active level time.
13. The method of claim 11, wherein the pixel circuit further comprises a second initialization circuit, the method further comprising:
the second initialization circuit writes a second initialization signal to an anode of the light emitting device in response to the first scan signal in the write compensation phase.
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