CN113767480A

CN113767480A - Inorganic light emitting diode chip and manufacturing method thereof

Info

Publication number: CN113767480A
Application number: CN202080000439.8A
Authority: CN
Inventors: 马俊杰; 卢元达; 杨山伟; 岂林霞; 熊志军; 翟明; 孙海威
Original assignee: BOE Technology Group Co Ltd; Beijing BOE Optoelectronics Technology Co Ltd
Current assignee: BOE Technology Group Co Ltd; BOE Jingxin Technology Co Ltd
Priority date: 2020-03-31
Filing date: 2020-03-31
Publication date: 2021-12-07
Also published as: WO2021196008A1

Abstract

An inorganic light emitting diode chip master is provided, comprising: an epitaxial layer, a plurality of liners, and a support reinforcement layer. Wherein, the two opposite sides of the epitaxial layer are respectively a first side and a second side; a plurality of pads are arranged on the first side of the epitaxial layer; the supporting and reinforcing layer fills gaps among the plurality of pads.

Description

Inorganic light-emitting diode chip master slice and inorganic light-emitting diode chip

Technical Field

The present disclosure relates to the field of display technologies, and in particular, to an inorganic light emitting diode chip, a method for manufacturing the inorganic light emitting diode chip, and a light emitting diode light emitting device.

Background

A mini LED (sub-millimeter Light Emitting Diode) display device or a micro LED (micro Organic Light Emitting Diode) display device is a display device composed of a large number of small-sized LED arrays, and has the advantages of high brightness, clear display image, low power consumption and the like, and has a good application prospect.

Disclosure of Invention

In one aspect, an inorganic light emitting diode chip master is provided, comprising: an epitaxial layer, a plurality of liners, and a support reinforcement layer. Wherein, the two opposite sides of the epitaxial layer are respectively a first side and a second side; a plurality of pads are arranged on the first side of the epitaxial layer; the supporting and reinforcing layer fills gaps among the plurality of pads.

In some embodiments, the ratio of the thickness of the epitaxial layer to the thickness of the liner ranges from 1:6 to 1: 2.

In some embodiments, the at least one pad has a thickness of 20 μm to 30 μm.

In some embodiments, the material of each pad comprises at least one of copper, aluminum, and copper aluminum alloy.

In some embodiments, each pad includes a pad body, and a protective layer covering sidewalls of the pad body and a surface away from the epitaxial layer; the protective layer is electrically conductive.

In some embodiments, the material of the liner body comprises at least one of copper, aluminum, and copper aluminum alloy, and the material of the protective layer comprises nickel gold.

In some embodiments, the support reinforcement layer has a thickness of 20 μm to 30 μm.

In some embodiments, a surface of the support reinforcement layer distal from the epitaxial layer is flush with a surface of the plurality of pads distal from the epitaxial layer. Or the surface of the supporting and reinforcing layer far away from the epitaxial layer is lower than the surfaces of the plurality of pads far away from the epitaxial layer.

In some embodiments, the material of the support and reinforcement layer comprises a cured glue-like material.

In some embodiments, the material of the support reinforcement layer comprises silicone, epoxy, or photoresist.

In some embodiments, the supporting and reinforcing layer is white or black.

In some embodiments, where the supporting and reinforcing layer is white, the material of the supporting and reinforcing layer comprises titanium dioxide. Under the condition that the supporting and reinforcing layer is black, the material of the supporting and reinforcing layer comprises carbon powder.

In some embodiments, a surface of the first side of the epitaxial layer has a plurality of protrusions embedded in the support and reinforcement layer.

In some embodiments, the epitaxial layer has a thickness of 5 μm to 10 μm.

In some embodiments, the inorganic light emitting diode chip master has a plurality of inorganic light emitting diode chip regions; the plurality of pads includes a plurality of first pads and a plurality of second pads. The epitaxial layer comprises a plurality of epitaxial layer units, and an epitaxial layer unit, a first gasket and a second gasket are arranged in each inorganic light emitting diode chip area.

The epitaxial layer unit includes: the light emitting device includes a first semiconductor layer, a light emitting layer, a second semiconductor layer, and a planarization layer. The first semiconductor layer comprises a first part and a second part, the light emitting layer is arranged on one side of the first part of the first semiconductor layer, the second semiconductor layer is arranged on one side, far away from the first semiconductor layer, of the light emitting layer, and the flat layer covers one side, far away from the light emitting layer, of the second semiconductor layer. The planarization layer has a first via hole and a second via hole, and the first pad is coupled to the first semiconductor layer through the first via hole and the second pad is coupled to the second semiconductor layer through the second via hole in each of the inorganic light emitting diode chip regions.

In some embodiments, the epitaxial layer unit further comprises: the semiconductor device includes a first contact electrode, an insulating layer, a conductive layer, and a second contact electrode. Wherein the first contact electrode is disposed between the second portion of the first semiconductor layer and the planarization layer; the first contact electrode is in electrical contact with a second portion of the first semiconductor layer, and the first pad is coupled with the first contact electrode through the first via.

The insulating layer is arranged between the second semiconductor layer and the flat layer. A conductive layer is disposed between the insulating layer and the planarization layer, the conductive layer in electrical contact with the second semiconductor layer. The second contact electrode is arranged between the conducting layer and the flat layer; the second contact electrode is in electrical contact with the conductive layer, the second pad is coupled with the second contact electrode through the second via; and the orthographic projection of the second contact electrode on the first semiconductor layer is at least partially overlapped with the orthographic projection of the insulating layer on the first semiconductor layer.

In another aspect, there is provided an inorganic light emitting diode chip obtained by a splitting process of an inorganic light emitting diode chip mother sheet as described above, the inorganic light emitting diode chip including: the epitaxial layer unit, set up first gasket and second gasket on epitaxial layer unit one side, and support the reinforcement unit, support the reinforcement unit and fill around first gasket and around the second gasket.

In some embodiments, the first and second pads have a thickness of 20 μm to 30 μm; the thickness of the supporting and reinforcing unit is 20-30 μm.

In another aspect, a method for fabricating an inorganic light emitting diode chip is provided, which includes: providing a substrate, and forming an epitaxial layer on one side of the substrate; preparing a plurality of gaskets on one side of the epitaxial layer far away from the substrate; forming a support reinforcement layer in gaps between the plurality of pads; and peeling the substrate from the epitaxial layer to obtain the inorganic light-emitting diode chip master slice.

In some embodiments, the gaps between the plurality of pads form a support reinforcement layer comprising: forming a supporting and reinforcing film on one side of the epitaxial layer, on which the plurality of pads are formed, by adopting an injection molding process or a film pressing process; and removing the parts, which cover the surfaces of the plurality of pads far away from the epitaxial layer, of the supporting and reinforcing film by adopting a grinding process, so that the surfaces of the plurality of pads far away from the epitaxial layer are exposed.

In some embodiments, the gaps between the plurality of pads form a support reinforcement layer comprising: forming a supporting and reinforcing film on one side of the epitaxial layer, on which the plurality of pads are formed, by using a photoresist material; and patterning the supporting and reinforcing film, and removing the parts, covering the surfaces of the plurality of pads far away from the epitaxial layer, of the supporting and reinforcing film to expose the surfaces of the plurality of pads far away from the epitaxial layer.

In some embodiments, the method for manufacturing an inorganic light emitting diode chip further includes: after the substrate is peeled off from the epitaxial layer to obtain an inorganic light-emitting diode chip master slice, dividing the inorganic light-emitting diode chip master slice into a plurality of inorganic light-emitting diode chips; and respectively carrying out point measurement on the plurality of inorganic light emitting diode chips, and sorting the plurality of inorganic light emitting diode chips according to the point measurement result.

In another aspect, a light emitting diode light emitting device is provided, including: the array substrate and a plurality of the above-mentioned inorganic light emitting diode chips arranged on the array substrate.

Drawings

In order to more clearly illustrate the technical solutions in the present disclosure, the drawings needed to be used in some embodiments of the present disclosure will be briefly described below, and it is apparent that the drawings in the following description are only drawings of some embodiments of the present disclosure, and other drawings can be obtained by those skilled in the art according to the drawings. Furthermore, the drawings in the following description may be regarded as schematic diagrams, and do not limit the actual size of products, the actual flow of methods, the actual timing of signals, and the like, involved in the embodiments of the present disclosure.

Fig. 1 is a structural diagram of an inorganic light emitting diode chip according to some embodiments in the related art;

fig. 2 is another structural diagram of an inorganic light emitting diode chip according to some embodiments in the related art;

FIG. 3A is a block diagram of a light emitting diode light emitting device according to some embodiments of the present disclosure;

FIG. 3B is a comparison graph of emission patterns of inorganic light emitting diode chips according to some embodiments;

fig. 4 is a cross-sectional view taken along section line AA' in fig. 3A.

Fig. 5A is a block diagram of an inorganic light emitting diode die master according to some embodiments of the present disclosure;

FIG. 5B is another block diagram of an inorganic light emitting diode chip master according to some embodiments of the present disclosure;

fig. 6A is a block diagram of a first semiconductor layer of an epitaxial layer unit in an inorganic light emitting diode chip according to some embodiments of the present disclosure;

fig. 6B is a block diagram of epitaxial layer elements in an inorganic light emitting diode chip according to some embodiments of the present disclosure;

fig. 7 is a block diagram of an inorganic light emitting diode chip according to some embodiments of the present disclosure;

fig. 8A-8G are diagrams of steps of methods of fabricating an inorganic light emitting diode chip according to some embodiments of the present disclosure;

fig. 9A-9G are diagrams of another step of a method of fabricating an inorganic light emitting diode chip according to some embodiments of the present disclosure;

fig. 10 is a flow chart of a method of fabricating an inorganic light emitting diode chip according to some embodiments of the present disclosure;

fig. 11A is another flow chart of a method of fabricating an inorganic light emitting diode chip according to some embodiments of the present disclosure;

fig. 11B is yet another flow chart of a method of fabricating an inorganic light emitting diode chip according to some embodiments of the present disclosure.

Detailed Description

Technical solutions in some embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings, and it is obvious that the described embodiments are only a part of the embodiments of the present disclosure, and not all of the embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments provided by the present disclosure belong to the protection scope of the present disclosure.

Unless the context requires otherwise, throughout the description and the claims, the term "comprise" and its other forms, such as the third person's singular form "comprising" and the present participle form "comprising" are to be interpreted in an open, inclusive sense, i.e. as "including, but not limited to". In the description of the specification, the terms "one embodiment", "some embodiments", "example", "specific example" or "some examples" and the like are intended to indicate that a particular feature, structure, material, or characteristic associated with the embodiment or example is included in at least one embodiment or example of the present disclosure. The schematic representations of the above terms are not necessarily referring to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be included in any suitable manner in any one or more embodiments or examples.

In the following, the terms "first", "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the embodiments of the present disclosure, "a plurality" means two or more unless otherwise specified.

In describing some embodiments, expressions of "coupled" and "connected," along with their derivatives, may be used. For example, the term "connected" may be used in describing some embodiments to indicate that two or more elements are in direct physical or electrical contact with each other. As another example, some embodiments may be described using the term "coupled" to indicate that two or more elements are in direct physical or electrical contact.

"at least one of A, B and C" has the same meaning as "A, B or at least one of C," each including the following combination of A, B and C: a alone, B alone, C alone, a and B in combination, a and C in combination, B and C in combination, and A, B and C in combination.

Some embodiments of the present disclosure provide a light emitting diode light emitting device including an array substrate and a plurality of inorganic light emitting diode chips disposed on the array substrate. The plurality of inorganic light emitting diode chips are coupled with the signal source on the array substrate, and light emission is realized under the action of the signal source.

In some examples, as shown in fig. 3A, the light emitting diode light emitting device provided by the present disclosure is a light emitting diode display device, such as a mini LED display device or a micro LED display device, including a plurality of inorganic light emitting diode chips, and may be a sub-millimeter inorganic light emitting diode chip (mini LED chip) or a micro inorganic light emitting diode chip (micro LED chip). Exemplarily, the led display device 30 includes an array substrate 20 and a plurality of inorganic led chips 10 disposed on one side of the array substrate 20, and the plurality of inorganic led chips 10 have high density, large number, and small pitch, so as to reduce the pitch of the pixels of the display device, improve the resolution, and enable the display device to have a better display effect.

Taking a mini LED display device as an example, in order to adjust and control the light pattern of light emitted by the sub-millimeter inorganic light emitting diode chip, an optical structure needs to be prepared at the gap between a plurality of sub-millimeter inorganic light emitting diode chips on the array substrate. For example, as shown in fig. 3A, in the mini LED display device 30, a wall 5 surrounding each of the inorganic light emitting diode chips 10 and having a certain height is prepared around each of the inorganic light emitting diode chips 10, for example, the wall 5 is in a shape of a square, and the light pattern of the light emitted from the inorganic light emitting diode chips 10 can be controlled by controlling parameters such as the height of the wall 5, the distance between the wall 5 and the inorganic light emitting diode chip 10, and the inclination angle of each side wall of the wall.

As shown in fig. 3B, the inventors simulated the light pattern emitted by a single inorganic light emitting diode chip. As shown in fig. 4, in the case where no enclosing wall is provided (see curve B, the adopted inorganic light emitting diode chip is the inorganic light emitting diode chip 10' shown in fig. 1), the intensity of the light emitted from the inorganic light emitting diode chip is low in the front viewing angle direction of the light emitting side of the inorganic light emitting diode chip, and the brightness of the light measured at each angle of the light emitting side of the inorganic light emitting diode chip is generally low, and the emitted light is relatively dispersed. In the case of the enclosing wall (see curve a, the adopted inorganic led chip is the inorganic led chip 10 shown in fig. 7), the light emitted by the inorganic led chip is relatively concentrated, and the light emitted by the inorganic led chip has the highest intensity in the front viewing angle direction of the light emitting side of the inorganic led chip. Therefore, if the optical structure is arranged in the mini LED display device, the brightness of the mini LED display device in the front view angle direction is the highest during displaying, so that the display effect of the display device is good. It should be noted that the front viewing angle directions mentioned in the present disclosure all refer to positions on the normal of the plane where the inorganic light emitting diode chip (or display device) is located, and the normal passes through the geometric center of the inorganic light emitting diode chip (or display device).

Therefore, the effect of regulating the light type and improving the display visual angle can be achieved by arranging the optical structure. According to current process limits, the height of the optical structure is not more than 50 μm; to achieve better dimming effect and to facilitate the fabrication of the optical structure, the thickness of the inorganic led chip 10 should be smaller than the height of the optical structure.

As shown in fig. 1 and 2, in the related art, the inorganic light emitting diode chip 10 'includes an epitaxial layer 2, and a first pad 31 and a second pad 32 disposed at one side of the epitaxial layer 2, wherein the epitaxial layer 2 includes a plurality of thin film layers such as a light emitting layer, an N-type semiconductor layer, and a P-type semiconductor layer, the first pad 31 and the second pad 32 are coupled to the N-type semiconductor layer and the P-type semiconductor layer in the epitaxial layer 2, respectively, the first pad 31 and the second pad 32 are used for coupling to an external signal source, and the inorganic light emitting diode chip 10' can emit light by applying a voltage to the first pad 31 and the second pad 32.

In the related art, a method for manufacturing an inorganic light emitting diode chip includes: an epitaxial layer and a plurality of gaskets are sequentially prepared on a substrate, the substrate is thinned to the required thickness through a grinding process to obtain an inorganic light-emitting diode chip master, then the inorganic light-emitting diode chip master is divided to obtain a plurality of inorganic light-emitting diode chips, and the structure of the obtained inorganic light-emitting diode chip 10' is shown in fig. 1. In the above manufacturing method, the inorganic light emitting diode chip mother substrate can be thinned from 700 μm to 800 μm to 80 μm by polishing the substrate, and if the substrate is continuously polished, the problem of cracking of the entire substrate may occur, resulting in a serious yield loss. Moreover, since the substrate (e.g., sapphire substrate) has a lattice structure, when the inorganic light emitting diode chip mother substrate is divided into a plurality of inorganic light emitting diode chips by the splitting process, the substrate is split along a specific direction in the lattice structure, so that the periphery of the obtained inorganic light emitting diode chip 10 'is irregular, and a bevel edge is formed, and thus, the light emission pattern of the inorganic light emitting diode chip 10' is asymmetric with respect to the normal viewing angle direction of the chip (see a curve B in fig. 4). As shown in fig. 1, since the thickness d1 of the inorganic light emitting diode chip 10' with the substrate 1 is 80 μm at the minimum and is larger than the maximum height (50 μm) of the optical structure, the optical structure is difficult to manufacture, and the light emitting shape of the inorganic light emitting diode chip cannot be effectively improved.

The other preparation method of the inorganic light-emitting diode chip comprises the following steps: after an epitaxial layer and a plurality of pads are sequentially prepared on a substrate, the substrate is peeled off from the epitaxial layer to obtain an inorganic light emitting diode chip master, and then the inorganic light emitting diode chip master is divided to obtain a plurality of inorganic light emitting diode chips, wherein the structure of the obtained inorganic light emitting diode chip 10' is shown in fig. 2. The inorganic light-emitting diode chip prepared by the method only comprises the epitaxial layer and the liner, and the epitaxial layer is easy to break under stress due to poor toughness. Therefore, each prepared led chip needs to be subjected to point measurement to perform sorting as required, and the epitaxial layer of the led chip cannot bear the force applied by the positive and negative probes during the point measurement, and is broken during the point measurement, and the epitaxial layer of the led chip is also difficult to bear the force applied during the transfer (for example, the led chip is transferred onto the array substrate), which increases the difficulty in transferring the led chip.

In summary, the method for manufacturing the inorganic light emitting diode chip and the manufactured inorganic light emitting diode chip 10 ' in the related art have the following problems that, in the case that the manufactured inorganic light emitting diode chip 10 ' has the substrate 1, the thickness of the inorganic light emitting diode chip 10 ' is thick, the manufacturing of the optical structure is not facilitated, and the light emitting shape is asymmetric. In the case where the prepared inorganic light emitting diode chip 10 'does not have a substrate, the inorganic light emitting diode chip 10' is too fragile to be subjected to spot measurement and transfer, and is difficult to be applied to a display product.

Based on this, as shown in fig. 5A and 5B, some embodiments of the present disclosure provide an inorganic light emitting diode chip mother chip 20, including: an epitaxial layer 2, a plurality of spacers 3 and a support reinforcement layer 4.

The two opposite sides of the epitaxial layer 2 are respectively a first side B1 and a second side B2, the plurality of pads 3 are disposed on the first side B1 of the epitaxial layer 2, and the supporting and reinforcing layer 4 fills gaps between the plurality of pads 3.

The inorganic light emitting diode chip mother sheet 20 is divided to obtain a plurality of inorganic light emitting diode chips 10. For convenience of description, as shown in fig. 5A and 5B, the inorganic light emitting diode chip mother sheet 20 is divided into a plurality of inorganic light emitting diode chip regions Q, and the plurality of pads 3 include a plurality of first pads 31 and a plurality of second pads 32. The epitaxial layer 2 includes a plurality of epitaxial layer units 2a, and the support reinforcing layer 4 includes a plurality of support reinforcing units 4 a. Each of the inorganic light emitting diode chip regions Q is provided with an epitaxial layer unit 2a, a support reinforcement unit 4a, a first pad 31, and a second pad 32.

As shown in fig. 7, some embodiments of the present disclosure further provide an inorganic light emitting diode chip 10, where the inorganic light emitting diode chip 10 is obtained by dividing the inorganic light emitting diode chip mother sheet 20, and the inorganic light emitting diode chip 10 includes: an epitaxial layer unit 2a, a first pad 31, a second pad 32, and a support reinforcement unit 4 a. The first pad 31 and the second pad 32 are disposed on one side of the epitaxial layer unit 2a, and the supporting reinforcement unit 4a is filled around the first pad 31 and around the second pad 32.

The inorganic light emitting diode chip mother sheet 20 provided by some embodiments of the present disclosure does not include a substrate, and the supporting and reinforcing layer 4 is filled in the gap between the plurality of pads 3, so that the strength of the inorganic light emitting diode chip mother sheet 20 is enhanced, and the situation that the epitaxial layer 2 is broken or damaged due to stress is not easy to occur, and compared with the inorganic light emitting diode chip mother sheet including a substrate in the related art, the thickness of the inorganic light emitting diode chip mother sheet 20 provided by the present disclosure is thinner. Therefore, the inorganic light emitting diode chip 10 obtained by dividing the inorganic light emitting diode chip mother sheet 20 does not have the problem of irregular periphery, has the advantages of thin thickness and high strength, can bear the force application in point measurement and the force application in transfer, and after the inorganic light emitting diode chip 10 is transferred onto the array substrate, because the inorganic light emitting diode chip 10 has the thin thickness, the manufacturing difficulty of the optical structure is reduced, and the height of the optical structure can be larger than the thickness of the inorganic light emitting diode chip 10, so that the light dimming effect of light rays emitted by the inorganic light emitting diode chip 10 is good.

As shown in fig. 5A and 5B, in some embodiments, since the inorganic light emitting diode mother chip 20 provided in the embodiment of the present disclosure does not include a substrate, in order to enhance the strength of the inorganic light emitting diode mother chip 20 and make it not easy to break, the support reinforcing layer 4 filling the gap between the plurality of pads 3 needs to have a certain thickness so as to prevent the inorganic light emitting diode chip mother chip 20 from being too thin and too weak, and similarly, the plurality of pads 3 need to have a certain thickness so as to ensure that the surfaces of the plurality of pads 3 away from the epitaxial layer 2 can be exposed, and the plurality of pads 3 cannot be too thick so as to make the total thickness of the inorganic light emitting diode chip mother chip 20 too thick.

In some examples, the thickness d2 of at least one pad 3 is 20 μm to 30 μm, so that the thickness of the pad 3 can be matched with the thickness of the supporting and reinforcing layer 4, so that the total thickness of the inorganic light emitting diode chip mother sheet 20 can be controlled within a reasonable range, and an inorganic light emitting diode chip 10 with moderate thickness and certain strength can be obtained. Illustratively, all the pads 3 included in the inorganic light emitting diode chip mother sheet 20 have a thickness of 20 μm to 30 μm, or at least one of the pads 3 has a thickness of 20 μm, 25 μm, or 30 μm, etc.

In some embodiments, the material of the pad 3 is selected to be a material with low cost and good conductivity, which is not limited by the present disclosure. Illustratively, the material of each pad 3 includes at least one of copper, aluminum, and copper aluminum alloy. The material of each pad 3 is, for example, copper. Alternatively, a portion of each pad 3 is made of copper and another portion of the pad 3 is made of copper-aluminum alloy.

In some embodiments, each pad 3 comprises a pad body, and a protective layer overlying sidewalls of the pad body and a surface remote from the epitaxial layer 2, the protective layer being electrically conductive.

The protective layer cladding is in the liner main part surface, can protect the liner main part, prevents that the liner main part from being by oxidation or by water corrosion, prolongs the life of liner 3 to the protective layer can electrically conduct, can play the effect of electrical coupling equally.

In some examples, the material of the gasket main body comprises at least one of copper, aluminum and copper-aluminum alloy, the material of the protective layer is a conductive material with high corrosion resistance, and the material of the protective layer comprises nickel-gold.

In some embodiments, in order to enhance the strength of the inorganic light emitting diode chip mother sheet 20 so that it is not easily broken, the supporting and reinforcing layer 4 filling the gap between the plurality of pads 3 needs to have a certain thickness, so that the inorganic light emitting diode chip mother sheet 20 is not too thin and too weak, and the thickness of the supporting and reinforcing layer 4 is not too thick so that the total thickness of the inorganic light emitting diode chip mother sheet 20 is too thick. Illustratively, as shown in fig. 5A and 5B, the thickness d3 of the support reinforcement layer 4 is 20 μm to 30 μm. The thickness d3 of the supporting and reinforcing layer 4 is, for example, 20 μm, 25 μm or 30 μm.

In some embodiments, as shown in fig. 5B, the surface of the support stiffener layer 4 facing away from the epitaxial layer 2 is flush with the surface of the plurality of pads 3 facing away from the epitaxial layer 2. That is, the thickness of the supporting reinforcing layer 4 is equal to the thickness of the spacers 3, and the thickness of the supporting reinforcing layer and the thickness of the spacers 3 are 25 μm, so that the surfaces of the plurality of spacers 3 far from the epitaxial layer 2 can be exposed to realize the spot-test sorting of the inorganic light emitting diode chips 10 or the coupling with the signal source on the display substrate.

In other embodiments, as shown in fig. 5A, the surface of the support reinforcement layer 4 facing away from the epitaxial layer 2 is lower than the surfaces of the plurality of pads 3 facing away from the epitaxial layer 2. That is, the supporting reinforcing layer 4 has a thickness smaller than the thickness of the spacers 3, for example, 25 μm, and the spacers 3 have a thickness of 30 μm, so that the surfaces and a portion of the sidewalls of the spacers 3 away from the epitaxial layer 2 can be exposed to realize the point measurement sorting of the inorganic led chips 10 or the coupling with the signal source on the display substrate.

In some embodiments, as shown in fig. 5A and 5B, the material of the support reinforcement layer 4 comprises a cured glue-like material. The curing glue material has good fluidity before being not cured, and can be easily filled in gaps among the plurality of gaskets 3, and after being filled, the curing glue material can be cured into a solid with high strength, and can play a role in enhancing the strength of the inorganic light-emitting diode chip mother sheet 20. The present disclosure does not limit the material of the support reinforcement layer 4 as long as the material has the above-described characteristics, and the material of the support reinforcement layer 4 exemplarily includes a silicon gel, an epoxy resin, or a photoresist.

In some embodiments, the supporting and reinforcing layer 4 is transparent, so that the light emitted from the led chip 10 can penetrate through the supporting and reinforcing layer 4, and the light can be emitted from both sides of the led chip 10.

In other embodiments, the supporting and reinforcing layer 4 has a color, for example, the supporting and reinforcing layer 4 is white or black, so as to adjust the brightness of the emitted light as required.

Illustratively, in the case where the supporting and reinforcing layer 4 is white, the material of the supporting and reinforcing layer 4 includes titanium dioxide. For example, the material of the supporting and reinforcing layer 4 includes silica gel and titanium dioxide, and the titanium dioxide and the silica gel are mixed according to a certain proportion to form a cured gel material.

In the case that the supporting and reinforcing layer 4 is white, the supporting and reinforcing layer 4 can play a role of reflecting light, and the light emitted from the epitaxial layer 2 of the inorganic light emitting diode chip 10 is reflected by the white supporting and reinforcing layer 4, so that the brightness is enhanced, and the inorganic light emitting diode chip 10 can be used in a light emitting product which needs to provide light with high brightness.

Illustratively, in the case where the supporting reinforcing layer 4 is black, the material of the supporting reinforcing layer 4 further includes carbon powder. For example, the material of the supporting and reinforcing layer 4 includes silica gel and carbon powder, and the carbon powder and the silica gel are mixed according to a certain proportion to form a cured rubber material.

Under the condition that the supporting and reinforcing layer 4 is black, the supporting and reinforcing layer 4 can absorb light, and the light emitted by the epitaxial layer unit 2a of the inorganic light-emitting diode chip 10 is weakened in brightness through the light absorption effect of the black supporting and reinforcing layer 4, so that the inorganic light-emitting diode chip 10 can be used in a display product which needs to provide light with low brightness, and the contrast of the display product is increased.

As a possible design, as shown in fig. 5A, the surface of the first side B1 of the epitaxial layer 2 has a plurality of protrusions c embedded in the supporting and reinforcing layer 4. By providing the plurality of protrusions c on the surface of the first side B1 of the epitaxial layer 2 and embedding the plurality of protrusions c in the support reinforcing layer 4, the bonding force between the epitaxial layer 2 and the support reinforcing layer 4 can be increased, and the epitaxial layer 2 and the support reinforcing layer 4 are not easily separated.

In some embodiments, as shown in fig. 5A and 5B, the thickness d4 of epitaxial layer 2 is between 5 μm and 10 μm.

In some embodiments, as shown in fig. 6A, 6B and 7, the epitaxial layer unit 2a mentioned above includes: a first semiconductor layer 21, a light emitting layer 22, a second semiconductor layer 23, and a planarization layer 28. Fig. 6B shows a top view of the epitaxial-layer unit 2a without the flat layer 28, and the cross-sectional views of the epitaxial-layer unit 2a in fig. 5A, 5B and 7 are taken along the cross-sectional line BB' in fig. 6B.

The first semiconductor layer 21 includes a first portion 21a and a second portion 21b, and illustratively, as shown in fig. 6A, the first portion 21a of the first semiconductor layer 21 surrounds the second portion 21 b.

The light-emitting layer 22 is provided on the first portion 21a side of the first semiconductor layer 21. Illustratively, the light emitting layer 22 includes a quantum well superlattice layer.

The light emitting layer 22 includes different materials to enable the inorganic light emitting diode chip 10 to emit blue, green or red light, for example, the material of the light emitting layer 22 includes aluminum indium gallium phosphide (AlGaInP), so that the inorganic light emitting diode chip 10 can emit red light. Alternatively, the material of the light emitting layer 22 includes indium gallium nitride (InGaN), so that the inorganic light emitting diode chip 10 can emit blue light. Alternatively, the material of the light emitting layer 22 includes aluminum gallium phosphide (AlGaP), so that the inorganic light emitting diode chip 10 can emit green light.

The second semiconductor layer 23 is disposed on a side of the light-emitting layer 22 away from the first semiconductor layer 21.

The planarization layer 28 covers the second semiconductor layer 23 on a side away from the light emitting layer 22, the planarization layer having a first via b1 and a second via b2, the first pad 31 being coupled to the first semiconductor layer 21 through the first via b1 and the second pad 32 being coupled to the second semiconductor layer 23 through the second via b2 in each of the inorganic light emitting diode chip regions Q. Specifically, the first pad 31 is in contact with the second portion 21b of the first semiconductor layer 21 through the first through hole b1, so as to be coupled to the first semiconductor layer 21.

In some examples, the first semiconductor layer 21 is an N-type semiconductor layer, for example, the material of the first semiconductor layer 21 is N-type gallium nitride, and the second semiconductor layer 23 is a P-type semiconductor layer, for example, the material of the first semiconductor layer 21 is P-type gallium nitride. Correspondingly, after the inorganic light emitting diode chip 10 is transferred onto the array substrate, the first pad 31 is coupled to the cathode on the array substrate, and the second pad 32 is coupled to the anode on the array substrate, so that a current path is formed among the first semiconductor layer 21, the light emitting layer 22 and the second semiconductor layer 23, and the light emitting layer 22 emits light under the action of the current, thereby realizing the light emission of the inorganic light emitting diode chip 10.

In the above example, in the case that the first semiconductor layer 21 is an N-type semiconductor layer and the second semiconductor layer 23 is a P-type semiconductor layer, the thickness of the first semiconductor layer 21 may be increased to be greater than the thickness of the second semiconductor layer 23, and for example, the thickness of the first semiconductor layer 21 is 2 to 5 times, for example, 4 times, the thickness of the second semiconductor layer 23, so that the spreading capability of the electrons from the first pad 31 in the first semiconductor layer 21 may be enhanced, and in the N-type semiconductor layer, the electron concentration is higher and the carrier transport rate is higher, and it may be ensured that the electrons from the first pad 31 have a larger transport range in the first semiconductor layer 21, thereby improving the light emitting efficiency of the inorganic light emitting diode 10. Thus, it is not necessary to provide a structure for extending the carrier transmission range corresponding to the first semiconductor layer 21 in the epitaxial layer unit 2a, and the structure for extending the carrier transmission range described herein can be referred to as the insulating layer 24 and the conductive layer 25 which appear later.

In other examples, the first semiconductor layer 21 is a P-type semiconductor layer, for example, the material of the first semiconductor layer 21 is P-type gallium nitride, and the second semiconductor layer 23 is an N-type semiconductor layer, for example, the material of the first semiconductor layer 21 is N-type gallium nitride. Correspondingly, after the inorganic light emitting diode chip 10 is transferred onto the array substrate, the first pad 31 is coupled to an anode on the array substrate, and the second pad 32 is coupled to a cathode on the array substrate, so that a current path is formed among the first semiconductor layer 21, the light emitting layer 22 and the second semiconductor layer 23, and the light emitting layer 22 emits light under the action of the current, thereby realizing the light emission of the inorganic light emitting diode chip 10.

In some embodiments, epitaxial-layer cell 2a further comprises: an insulating layer 24, a conductive layer 25, a first contact electrode 26 and a second contact electrode 27.

The first contact electrode 26 is disposed on the first semiconductor layer 21, and the first pad 31 is coupled to the first contact electrode 26 through a first via hole. By providing the first contact electrode 26, the first pad 31 can be better coupled with the first semiconductor layer 21, and the transfer rate of carriers can be improved.

The insulating layer 24 is disposed between the second semiconductor layer 23 and the planarization layer 28.

The conductive layer 25 is disposed between the insulating layer 24 and the planarization layer 28. The conductive layer 25 is in electrical contact with the second semiconductor layer 23, that is, the conductive layer 25 covers the side of the insulating layer 24 away from the first semiconductor layer 21, and the orthographic projection of the conductive layer 25 on the first semiconductor layer 21 is larger than that of the insulating layer 24 on the first semiconductor layer 21, so that the conductive layer 25 can be coupled with the second semiconductor layer 23 to realize current transmission.

Illustratively, the conductive layer 25 is made of a material having a good electrical conductivity and a strong bonding force with the second semiconductor layer 23, so that the conductive layer 25 can more effectively transmit current to the second semiconductor layer 23. For example, the material of the conductive layer 25 is Indium Tin Oxide (ITO).

The second contact electrode 27 is disposed between the conductive layer 25 and the planarization layer 28; the second contact electrode 27 is in electrical contact with the conductive layer 25, and the second pad 32 is coupled to the second contact electrode 27 through a second via b 2. And, the orthographic projection of the second contact electrode 27 on the first semiconductor layer 21 and the orthographic projection of the insulating layer 24 on the first semiconductor layer 21 at least partially overlap.

For example, as shown in fig. 6B and 7, the second contact electrode 27 includes a first portion 27a, a second portion 27B, a third portion 27c, and a fourth portion 27d, the second portion 27B, the third portion 27c, and the fourth portion 27d are connected through the first portion 27a, and the second pad 32 is coupled to the second portion 27B of the second contact electrode 27 through a second via B2. Thus, the contact area between the second contact electrode 27 and the conductive layer 25 is increased, the contact resistance is reduced, a higher current density can be obtained under the same voltage condition, and the spreading ability of the current in the conductive layer 25 is enhanced. The insulating layer 24 and the second contact electrode 17 have the same shape, and an orthogonal projection of the insulating layer 24 on the first semiconductor layer 21 and an orthogonal projection of the second contact electrode 17 on the first semiconductor layer 21 substantially overlap with each other (in fig. 6B, the insulating layer 24 is shielded by the conductive layer 25).

In the case that the first semiconductor layer 21 is a P-type semiconductor layer and the second semiconductor layer 23 is an N-type semiconductor layer, by providing the insulating layer 24 and the conductive layer 25, and in the direction perpendicular to the plane of the first semiconductor layer 21, at least a portion of the insulating layer 24 is opposite to the second contact electrode 27, so that the current received by the second contact electrode 27 from the second pad 32 can be prevented from being injected vertically into the second semiconductor layer 23, and the current can be transmitted in a laterally expanded direction in the conductive layer 25 by changing the current transmission direction in the process of transmitting the current to the second semiconductor layer 23 through the conductive layer 25. The current is transmitted to the second semiconductor layer 23 through the portion of the conductive layer 25 coupled to the second semiconductor layer 23, so that the transmission range of the current in the second semiconductor layer 23 is expanded, the current is more uniformly distributed in the second semiconductor layer 23, the light-emitting area of the light-emitting layer 22 where electrons and holes are recombined is more uniform, and the light-emitting efficiency of the light-emitting layer 22 is improved.

In some embodiments, as shown in fig. 7, some embodiments of the present disclosure provide the inorganic light emitting diode chip 10 in which the thickness d2 of the first and

second pads

31 and 32 is 20 to 30 μm, and the thickness d3 of the supporting reinforcement unit 4a is 20 to 30 μm.

Illustratively, the thickness of the first and

second pads

31 and 32 is 30 μm, the thickness of the supporting and reinforcing unit 4a is 30 μm, and the surface of the supporting and reinforcing unit 4a away from the epitaxial-layer unit 2a is flush with the surface of the first and

second pads

31 and 32 away from the epitaxial-layer unit 2 a.

Alternatively, the thickness of the first and

second pads

31 and 32 is 30 μm, the thickness of the supporting and reinforcing unit 4a is 25 μm, and the surface of the supporting and reinforcing unit 4a away from the epitaxial-layer unit 2a is lower than the surfaces of the first and

second pads

31 and 32 away from the epitaxial-layer unit 2 a.

The inorganic light emitting diode chip 10 provided by some embodiments of the present disclosure has the advantages of thin thickness and high strength, and can bear the force applied during point measurement and the force applied during transfer, and after the inorganic light emitting diode chip 10 is transferred onto the array substrate, because the thickness of the inorganic light emitting diode chip 10 is thin, the difficulty in manufacturing the optical structure is reduced, and the height of the optical structure can be made larger than the thickness of the inorganic light emitting diode chip 10, so that the light dimming effect of the light emitted by the display substrate is good.

As shown in fig. 10, 8A to 8G, and 9A to 9G, some embodiments of the present disclosure further provide a method for manufacturing an inorganic light emitting diode chip 10, where the method includes:

s1, as shown in fig. 8A, a substrate 1 is provided, and an epitaxial layer 2 is formed on one side of the substrate 1.

In some examples, the substrate 1 is a sapphire substrate or a silicon substrate. A multi-layer film included in the epitaxial layer 2 is formed on one side of the substrate 1 by a metal organic compound vapor phase epitaxy process. The epitaxial layer 2 includes a plurality of epitaxial layer units 2 a. Illustratively, as shown in fig. 8A, adjacent epitaxial-layer units 2a are spaced apart from each other. The surface of each epitaxial layer unit 2a can be covered with a protective layer, and the protective layer has strong corrosion resistance, so that the chip master slice is cut into independent chips along the interval in the subsequent step, and the protective layer is arranged on the surface of each epitaxial layer unit 2a, so that the film layer covered by the protective layer in the epitaxial layer unit 2a can be protected from being corroded, and the film layer covered by the protective layer in the epitaxial layer unit 2a is prevented from being directly exposed and being easily oxidized and corroded.

S2, as shown in fig. 8B, a plurality of pads 3 are prepared on the side of the epitaxial layer 2 away from the substrate 1.

Illustratively, a plurality of spacers 3 are prepared on a side of the epitaxial layer 2 remote from the substrate 1, using an electrochemical deposition process or an evaporation process. Wherein the plurality of pads 3 includes a plurality of first pads 31 and a plurality of second pads 32, for example, as shown in fig. 8B, one first pad 31 and one second pad 32 are prepared on the side of each epitaxial layer unit 2a away from the substrate 1.

In some examples, the material of the liner 3 is at least one of copper, aluminum, and copper aluminum alloy. The thickness of at least one pad 3 is 20 μm to 30 μm.

In some examples, the pad 3 includes a pad body, and a protective layer covering the sidewall of the pad body and the surface far from the epitaxial layer 2, the material of the pad body includes at least one of copper, aluminum and copper-aluminum alloy, and the material of the protective layer includes nickel-gold, in which case, the specific step of S2 is to form the pad bodies of the plurality of pads 3 by using at least one of copper, aluminum and copper-aluminum alloy through an electrochemical deposition process or an evaporation process, and then coat the nickel-gold material on the sidewall and the surface of the pad bodies of the plurality of pads 3 through electroless plating to form the protective layer.

S3, as shown in fig. 8C to 8E, the supporting and reinforcing layer 4 is formed in the gaps between the plurality of spacers 3.

Illustratively, the thickness of the supporting reinforcing layer 4 is 20 μm to 30 μm. The material of the supporting and reinforcing layer 4 is a cured adhesive material, for example, the material of the supporting and reinforcing layer 4 includes silicon gel, epoxy resin or photoresist.

In some embodiments, as shown in fig. 11A, 8C to 8E, the gaps between the plurality of pads 3 form S3 supporting the reinforcement layer 4, including:

s31, a support reinforcing film 4' is formed on the side of the epitaxial layer 2 where the plurality of spacers 3 are formed, using an injection molding process or a die pressing process.

In some examples, as shown in fig. 8C, a stacked structure of the substrate 1, the epitaxial layer 2, and the plurality of pads 3 is fixed in a mold 6, a material for supporting the reinforcement layer is injected into the mold 6 so that the material for supporting the reinforcement layer covers the plurality of pads 3, and the material for supporting the reinforcement layer is cured, for example, by heat curing or uv lamp curing, thereby forming a supporting reinforcement film 4' on the side of the substrate 1 where the plurality of pads 3 are formed.

The material of the support reinforcing layer is, for example, silicone or epoxy, and the support reinforcing film 4' is formed to have a thickness greater than that of the plurality of pads 3.

S32, removing the portion of the supporting and reinforcing film 4' covering the surface of the plurality of pads 3 away from the epitaxial layer by using a grinding process, so as to expose the surface of the plurality of pads 3 away from the epitaxial layer 2.

Illustratively, the support reinforcement film 4 ' is ground by a grinder until the surfaces of the plurality of pads 3 away from the epitaxial layer 2 are exposed, for example, a portion of the support reinforcement film 4 ' shown in fig. 8D above the dotted line is removed, leaving a portion of the support reinforcement film 4 ' below the dotted line, resulting in the support reinforcement layer 4 shown in fig. 8E. Here, "removing the portion of the supporting and reinforcing film 4 'covering the surface of the plurality of pads 3 away from the epitaxial layer" means removing all the portions of the supporting and reinforcing film 4' higher than the plurality of pads 3. At this time, the surface of the supporting and reinforcing layer 4 far from the epitaxial layer 2 is flush with the surfaces of the plurality of pads 3 far from the epitaxial layer 2, for example, the thickness of the supporting and reinforcing layer 4 and the thickness of the pads 3 are both 30 μm.

In other embodiments, as shown in fig. 11B, 9C to 9E, the gaps between the plurality of pads 3 form S3 supporting the reinforcing layer 4, including:

s31 ', a supporting reinforcing film 4' is formed on the side of the epitaxial layer 2 on which the plurality of spacers 3 are formed, using a photoresist material.

Illustratively, as shown in fig. 9C, a photoresist is spin-coated on one side of the epitaxial layer 2 on which the plurality of spacers 3 are formed, to form a supporting reinforcing film 4'.

S32 ', patterning the supporting and reinforcing film 4 ', removing a portion of the supporting and reinforcing film 4 ' covering the surface of the plurality of pads 3 away from the epitaxial layer 2, so as to expose the surface of the plurality of pads 3 away from the epitaxial layer 2.

Illustratively, the supporting and reinforcing film 4' is patterned by an exposure and development process, which includes the following steps:

the supporting and reinforcing film 4 'is exposed, and the depth of exposure to the supporting and reinforcing film 4' is controlled by controlling exposure parameters, such as the exposure time, the exposure intensity, and the like. For example, as shown in fig. 9D, the exposure depth in the support reinforcing film 4' is made h.

After the supporting and reinforcing film 4 ' is exposed, a developing solution is applied to the surface of the supporting and reinforcing film 4 ', so that the developing solution and the exposed portion of the supporting and reinforcing film 4 ' are dissolved in the developing solution, for example, the portion of the supporting and reinforcing film 4 ' above the dotted line in fig. 9D is dissolved in the developing solution, so as to remove the portion, and the portion of the supporting and reinforcing film 4 ' below the dotted line in fig. 9D is remained, so as to obtain the supporting and reinforcing layer 4 (as shown in fig. 9E). At this time, the surface of the support reinforcing layer 4 away from the epitaxial layer 2 is lower than the surfaces of the plurality of pads 3 away from the epitaxial layer 2, for example, the thickness of the support reinforcing layer 4 is 25 μm, and the thickness of the pads 3 is 30 μm.

By adopting the method, the thickness of the supporting and reinforcing layer can be accurately controlled through the exposure and development process, and the preparation precision is high.

S4, as shown in fig. 8F, the substrate 1 is peeled off from the epitaxial layer 2, and the inorganic light emitting diode chip mother sheet 20 is obtained.

In some examples, in the case where the substrate 1 is a sapphire substrate, the substrate 1 is peeled from the epitaxial layer 2 in S4 by using a laser lift-off technique, and in this case, before the epitaxial layer 2 is formed on one side of the substrate 1 in S1, a step of forming a buffer layer on one side of the substrate 1 is further included, and the buffer layer is made of gallium nitride, for example. In this way, in S4, the buffer layer between substrate 1 and epitaxial layer 2 is vaporized by the laser beam, and substrate 1 is separated from epitaxial layer 2.

In other examples, in the case that the material of the substrate 1 is a silicon substrate, the substrate 1 is peeled off from the epitaxial layer 2 in S4 by using an acid etching technique, for example, the substrate 1 is immersed in a strong acid etching solution to etch the substrate 1, so as to achieve the peeling of the substrate 1 from the epitaxial layer 2.

S5, as shown in fig. 8G, the inorganic light emitting diode chip mother sheet 20 is divided into a plurality of inorganic light emitting diode chips 10.

Illustratively, the inorganic light emitting diode mother chip 20 is cut into the plurality of inorganic light emitting diode chips 10 according to the divided plurality of inorganic light emitting diode chip regions by using a cutting process, which is not limited by the present disclosure, and for example, mechanical cutting or laser cutting may be used. Wherein, each of the inorganic light emitting diode chips 10 includes an epitaxial layer unit 2a, a first pad 31 and a second pad 32 disposed at one side of the epitaxial layer unit 2a, and a supporting reinforcement unit 4a filled around the first pad 31 and around the second pad 32.

And S6, respectively carrying out point measurement on the plurality of inorganic light emitting diode chips 10, and sorting the plurality of inorganic light emitting diode chips 10 according to the point measurement results.

Illustratively, the plurality of led chips 10 are individually spotted by a probe method, for example, two probes are respectively contacted with the surfaces of the first pad 31 and the second pad 32 away from the epitaxial layer 2, the optical performance of each led chip 10 is measured, and the plurality of led chips 10 are sorted according to the spotting result.

In the method for manufacturing the inorganic light emitting diode chip 10 according to some embodiments of the present disclosure, the supporting and reinforcing layer 4 is formed in the gap between the plurality of pads 3, so that the strength of the inorganic light emitting diode chip mother sheet 20 is increased, and thus, in the process of peeling the substrate 1, the inorganic light emitting diode chip mother sheet 20 can bear the stress during peeling without breaking or damaging, and the thickness of the obtained inorganic light emitting diode chip mother sheet 20 is reduced compared with that of the inorganic light emitting diode chip mother sheet having the substrate 1, so that the thickness of the obtained inorganic light emitting diode chip 10 is thinner and the strength is higher.

Moreover, the inorganic light emitting diode chip 10 prepared by the preparation method provided by the present disclosure includes the supporting and reinforcing unit 4a filled around the first pad 31 and the second pad 32, so that the strength of the inorganic light emitting diode chip 10 is improved, and therefore, the inorganic light emitting diode chip 10 can bear the force applied by the probe during the spot measurement and can bear the sample during the transfer, and is not easy to break.

In some embodiments, the light emitting diode light emitting device provided by the present disclosure is a light emitting diode display device, as shown in fig. 3A and 4, the array substrate in the light emitting diode display device is an array substrate, and the plurality of inorganic light emitting diode chips 10 are packaged on the array substrate 20, for example, the inorganic light emitting diode chips 10 may be packaged on the array substrate in a flip-chip or a mounting manner, for example, in a flip-chip manner in fig. 4.

As shown in fig. 4, the array substrate 20 includes a plurality of thin film transistors TFT, a plurality of anodes 81 and a plurality of cathodes 82, each anode 81 is coupled to a drain of one thin film transistor TFT, and two pads 3 included in each inorganic light emitting diode chip 10 are coupled to one anode 81 and one cathode 82, respectively, for example, in the case where the first semiconductor layer is an N-type semiconductor layer and the second semiconductor layer is a P-type semiconductor layer in the light emitting layer of the inorganic light emitting diode chip 10, the first pad 31 of each inorganic light emitting diode chip 10 is bound to the cathode 82 by a conductive material 9 (e.g., solder), the second pad 32 of each inorganic light emitting diode chip 10 is coupled to one anode 81 by the solder 9, whether the inorganic light emitting diode chip 10 corresponding to the thin film transistor TFT emits light is controlled by turning on and off the thin film transistor TFT, thereby realizing display.

In some examples, as shown in fig. 3A, the plurality of inorganic light emitting diode chips 10 includes a plurality of blue inorganic light emitting diode chips, a plurality of red inorganic light emitting diode chips, and a plurality of green inorganic light emitting diode chips, and the inorganic light emitting diode chips 10 of three colors are arranged in an array according to a certain rule. The optical structure 5 is disposed around each inorganic light emitting diode chip 10, for example, a rectangular enclosure with a certain height, and the thickness of the inorganic light emitting diode chip 10 provided in some embodiments of the present disclosure is relatively thin, so that the difficulty of the manufacturing process of the optical structure can be reduced, and the height of the optical structure can be greater than the thickness of the inorganic light emitting diode chip 10, thereby performing light shape control on light emitted by the inorganic light emitting diode chip 10, and improving the display viewing angle of the display device.

In other examples, the LED lighting device provided in the present disclosure is an LED lamp panel, such as a mini LED lamp panel, and the LED lamp panel can be used as a surface light source, and exemplarily, the LED lamp panel can be used as a backlight source in a backlight module to provide light for a liquid crystal display device.

The above description is only for the specific embodiments of the present disclosure, but the scope of the present disclosure is not limited thereto, and any person skilled in the art will appreciate that changes or substitutions within the technical scope of the present disclosure are included in the scope of the present disclosure. Therefore, the protection scope of the present disclosure shall be subject to the protection scope of the claims.

Claims

An inorganic light emitting diode chip master, comprising:

the two opposite sides of the epitaxial layer are respectively a first side and a second side;

a plurality of pads disposed on a first side of the epitaxial layer;

a support reinforcement layer filling gaps between the plurality of pads.
The inorganic light emitting diode chip master of claim 1, wherein a ratio of the thickness of the epitaxial layer to the thickness of the pad ranges from 1:6 to 1: 2.
The inorganic light emitting diode chip precursor of claim 1 or 2, wherein the thickness of at least one pad is 20 μm to 30 μm.
The inorganic light emitting diode die paddle of any of claims 1-3, wherein the material of each pad comprises at least one of copper, aluminum, and copper aluminum alloy.
The inorganic light emitting diode chip master of any one of claims 1 to 4, wherein each pad comprises a pad body and a protective layer covering sidewalls of the pad body and a surface away from the epitaxial layer; the protective layer is electrically conductive.
The inorganic light emitting diode die paddle of claim 5 wherein the material of the pad body comprises at least one of copper, aluminum, and copper aluminum alloy and the material of the protective layer comprises nickel gold.
The inorganic light emitting diode chip precursor according to any one of claims 1 to 6, wherein the support reinforcement layer has a thickness of 20 μm to 30 μm.
The inorganic light emitting diode die master of any one of claims 7, wherein a surface of the support reinforcement layer distal from the epitaxial layer is flush with a surface of the plurality of pads distal from the epitaxial layer; or,

the surface of the supporting and reinforcing layer far away from the epitaxial layer is lower than the surfaces of the plurality of pads far away from the epitaxial layer.
The inorganic light emitting diode chip precursor according to any one of claims 1 to 8, wherein the material of the supporting and reinforcing layer comprises a cured adhesive material.
The inorganic light emitting diode chip master of claim 9, wherein the material of the support reinforcement layer comprises silicone, epoxy, or photoresist.
The inorganic light emitting diode chip precursor according to any one of claims 1 to 10, wherein the supporting reinforcement layer is white or black.
The inorganic light emitting diode chip master of claim 11,

under the condition that the supporting and reinforcing layer is white, the material of the supporting and reinforcing layer comprises titanium dioxide;

under the condition that the supporting and reinforcing layer is black, the material of the supporting and reinforcing layer comprises carbon powder.
The inorganic light emitting diode die precursor as claimed in any one of claims 1 to 12, wherein a surface of the first side of said epitaxial layer has a plurality of protrusions embedded in said support and reinforcement layer.
The inorganic light emitting diode chip master according to any one of claims 1 to 13, wherein the epitaxial layer has a thickness of 5 to 10 μm.
The inorganic light emitting diode die precursor of any of claims 1-14, wherein said inorganic light emitting diode die precursor has a plurality of inorganic light emitting diode die areas; the plurality of pads includes a plurality of first pads and a plurality of second pads;

the epitaxial layer comprises a plurality of epitaxial layer units, and each inorganic light-emitting diode chip region is internally provided with an epitaxial layer unit, a first gasket and a second gasket;

the epitaxial layer unit includes:

a first semiconductor layer; the first semiconductor layer includes a first portion and a second portion;

a light emitting layer disposed on a first portion side of the first semiconductor layer;

the second semiconductor layer is arranged on one side, far away from the first semiconductor layer, of the light-emitting layer;

the flat layer covers one side of the second semiconductor layer, which is far away from the light-emitting layer; the planarization layer has a first via hole and a second via hole, and the first pad is coupled to the first semiconductor layer through the first via hole and the second pad is coupled to the second semiconductor layer through the second via hole in each of the inorganic light emitting diode chip regions.
The inorganic light emitting diode chip master of claim 15, wherein the epitaxial layer unit further comprises:

a first contact electrode disposed between the second portion of the first semiconductor layer and the planarization layer; the first contact electrode is in electrical contact with a second portion of the first semiconductor layer, the first pad is coupled with the first contact electrode through the first via;

an insulating layer disposed between the second semiconductor layer and the planarization layer;

a conductive layer disposed between the insulating layer and the planarization layer; the conductive layer is in electrical contact with the second semiconductor layer;

a second contact electrode disposed between the conductive layer and the planarization layer; the second contact electrode is in electrical contact with the conductive layer, the second pad is coupled with the second contact electrode through the second via; and the orthographic projection of the second contact electrode on the first semiconductor layer is at least partially overlapped with the orthographic projection of the insulating layer on the first semiconductor layer.
An inorganic light emitting diode chip obtained by dividing the mother inorganic light emitting diode chip as claimed in any one of claims 1 to 16, the inorganic light emitting diode chip comprising:

an epitaxial layer unit;

the first liner and the second liner are arranged on one side of the epitaxial layer unit;

and the supporting and reinforcing unit is filled around the first gasket and the second gasket.
The inorganic light emitting diode chip of claim 17,

the thickness of the first gasket and the second gasket is 20-30 μm;

the thickness of the supporting and reinforcing unit is 20-30 μm.
A method for manufacturing an inorganic light emitting diode chip comprises the following steps:

providing a substrate, and forming an epitaxial layer on one side of the substrate;

preparing a plurality of gaskets on one side of the epitaxial layer far away from the substrate;

forming a support reinforcement layer in gaps between the plurality of pads;

and peeling the substrate from the epitaxial layer to obtain the inorganic light-emitting diode chip master slice.
The method of fabricating an inorganic light emitting diode chip as claimed in claim 19, wherein said gaps between said plurality of pads form a support reinforcement layer comprising:

forming a supporting and reinforcing film on one side of the epitaxial layer, on which the plurality of pads are formed, by adopting an injection molding process or a film pressing process;

and removing the parts, which cover the surfaces of the plurality of pads far away from the epitaxial layer, of the supporting and reinforcing film by adopting a grinding process, so that the surfaces of the plurality of pads far away from the epitaxial layer are exposed.
The method of fabricating an inorganic light emitting diode chip as claimed in claim 19, wherein said gaps between said plurality of pads form a support reinforcement layer comprising:

forming a supporting and reinforcing film on one side of the epitaxial layer, on which the plurality of pads are formed, by using a photoresist material;

and patterning the supporting and reinforcing film, and removing the parts, covering the surfaces of the plurality of pads far away from the epitaxial layer, of the supporting and reinforcing film to expose the surfaces of the plurality of pads far away from the epitaxial layer.
A light emitting diode light emitting device comprising:

an array substrate;

a plurality of the inorganic light emitting diode chips as set forth in claim 17 or 18 disposed on the array substrate.