CN113760189B - Load data filling and storing method and system - Google Patents
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- CN113760189B CN113760189B CN202110955702.5A CN202110955702A CN113760189B CN 113760189 B CN113760189 B CN 113760189B CN 202110955702 A CN202110955702 A CN 202110955702A CN 113760189 B CN113760189 B CN 113760189B
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0638—Organizing or formatting or addressing of data
- G06F3/0644—Management of space entities, e.g. partitions, extents, pools
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0656—Data buffering arrangements
Abstract
The invention provides a load data filling and storing method and a system, comprising the following steps: step 1: receiving load data and storing the load data according to the priority; step 2: different buffer spaces are opened up, and different load data are classified and stored; step 3: in the process of receiving and storing different load data, periodically recording write pointers of different load data cache spaces; step 4: after receiving a ground load data filling instruction, searching a latest writing pointer, generating a corresponding filling frame, forming a whole page of filling data together with load data, and writing the whole page of filling data into a FLASH memory according to priority; step 5: after receiving the ground payload data playback instruction, searching corresponding payload data, and playing back the payload data written into the FLASH memory. The invention realizes the accurate filling that the load data does not meet the FLASH memory page data, and improves the utilization rate of FLASH memory space.
Description
Technical Field
The invention relates to the technical field of load data filling and storing, in particular to a load data filling and storing method and system.
Background
At present, a mode of delayed load shutdown is commonly adopted on a spacecraft, invalid load data is filled at the tail part of the valid load data, so that the valid data is completely written into a data storage space, the descending of the valid load data is realized, the mode cannot realize the accurate filling of the valid load data, and the mode has certain limitation under the condition of the shortage of a data transmission channel of deep space exploration, so that the real load data filling mode can effectively solve the problem of the descending of the valid load data at the time, the utilization rate of the storage space of the valid load data is improved, and the method has better applicability and popularization.
Patent document CN104253719A (application number: CN 201410461829.1) discloses a telemetry error code testing method based on subpacket telemetry filling data, which mainly describes the process of carrying out error code statistics by utilizing the subpacket telemetry filling data without influencing the observation of real-time telemetry and without relating to the filling aspect of load data.
Patent document CN101304408A (application number: CN 200810018359.6) discloses a processing method of remote sensing satellite load data, mainly describing a method for storing and retrieving load data according to address information, not involving storage implementation according to time information, and not involving description of load data filling requirements.
Patent document CN105245313a (application number: CN 201510674340.7) discloses a method for dynamically multiplexing multi-load data of an unmanned aerial vehicle, wherein unmanned aerial vehicle communication is divided into 3 application scenes of high speed, medium speed and low speed, a protocol processing device comprising a programmable gate array chip FPGA and a digital signal processing chip DSP is adopted in combination with the actual characteristics of each application scene, multiplexing of transmission frames is initiated according to a timing period, and a hybrid multiplexing scheme based on fixed multiplexing of low-speed data and dynamic multiplexing of high-speed data is adopted in a high-speed scene; a dynamic multiplexing scheme based on fixed length units is adopted in a medium-speed scene; and a pure dynamic multiplexing scheme is adopted in a low-speed scene. After various load data access protocol processing devices, the operation flows of data segmentation, data adaptation, storage, dynamic multiplexing framing and the like are respectively and sequentially carried out. However, this patent is not directed to storage implementations in terms of time information, nor is it directed to the description of the payload data population requirements.
Disclosure of Invention
In view of the defects in the prior art, the invention aims to provide a load data filling and storing method and system.
The load data filling and storing method provided by the invention comprises the following steps:
step 1: receiving load data and storing the load data according to the priority;
step 2: according to the spacecraft identification SCID and the virtual channel identification VCID, different cache spaces are opened up, and different load data are classified and stored;
step 3: in the process of receiving and storing different load data, periodically recording write pointers of different load data cache spaces;
step 4: after receiving a ground load data filling instruction, searching a latest writing pointer according to SCID and VCID, generating a corresponding filling frame, forming a whole page of filling data together with load data, and writing the filling data into a FLASH memory according to priority;
step 5: after receiving the ground payload data playback instruction, searching corresponding payload data according to the SCID and the VCID, and playing back the payload data which is already written into the FLASH memory.
Preferably, the payload generates data during the operation, and if the data amount does not reach 256 frames, the data is written into the DRAM without performing a return drop.
Preferably, after receiving the load data filling instruction, the field programmable gate array FPGA analyzes the information in the filling instruction, reads the corresponding write pointer, and controls the number of filling frames to complement the load data.
Preferably, when the buffer area where the load data is located is fully written with 256 frames and reaches a threshold value, the load data is automatically pushed into the FLASH memory; when the ground sends a playback command of the payload data, the payload data is automatically downloaded.
Preferably, after receiving the load data filling data instruction, an arbitration request signal is sent to the internal bus, a filling frame is generated after the internal bus returns an arbitration weighting signal, and the filling frame is sent to the internal bus, and after the filling frame is transmitted, an arbitration clearing signal is sent to the internal bus.
The load data filling storage system provided by the invention comprises:
module M1: receiving load data and storing the load data according to the priority;
module M2: according to the spacecraft identification SCID and the virtual channel identification VCID, different cache spaces are opened up, and different load data are classified and stored;
module M3: in the process of receiving and storing different load data, periodically recording write pointers of different load data cache spaces;
module M4: after receiving a ground load data filling instruction, searching a latest writing pointer according to SCID and VCID, generating a corresponding filling frame, forming a whole page of filling data together with load data, and writing the filling data into a FLASH memory according to priority;
module M5: after receiving the ground payload data playback instruction, searching corresponding payload data according to the SCID and the VCID, and playing back the payload data which is already written into the FLASH memory.
Preferably, the payload generates data during the operation, and if the data amount does not reach 256 frames, the data is written into the DRAM without performing a return drop.
Preferably, after receiving the load data filling instruction, the field programmable gate array FPGA analyzes the information in the filling instruction, reads the corresponding write pointer, and controls the number of filling frames to complement the load data.
Preferably, when the buffer area where the load data is located is fully written with 256 frames and reaches a threshold value, the load data is automatically pushed into the FLASH memory; when the ground sends a playback command of the payload data, the payload data is automatically downloaded.
Preferably, after receiving the load data filling data instruction, an arbitration request signal is sent to the internal bus, a filling frame is generated after the internal bus returns an arbitration weighting signal, and the filling frame is sent to the internal bus, and after the filling frame is transmitted, an arbitration clearing signal is sent to the internal bus.
Compared with the prior art, the invention has the following beneficial effects:
(1) According to the invention, the data multiplexing module writes the load data frame into the data storage module according to the priority, so that the data transmission problem is solved;
(2) According to the invention, different buffer spaces are respectively opened up for different loads according to SCID+VCID through the data storage module, so that the problem of classified storage of load data according to SCID+VCID is solved;
(3) According to the invention, the data storage module periodically returns SCID+VCID and the corresponding buffer write pointer design, so that the problem of filling frame data volume with subsequent load data is solved;
(4) According to the invention, through the data multiplexing module, according to the SCID+VCID content contained in the ground filling frame instruction, corresponding latest write pointer parameters are searched according to the SCID+VCID contained in the instruction, thereby realizing the accurate generation and storage of the data of the filling page of the specific load data;
(5) After receiving the specific load data playback instruction through the data storage module, the invention searches the corresponding load data according to the SCID+VCID contained in the instruction, thereby realizing the timely descending of the specific load data.
Drawings
Other features, objects and advantages of the present invention will become more apparent upon reading of the detailed description of non-limiting embodiments, given with reference to the accompanying drawings in which:
FIG. 1 is a flow chart of data processing of a data storage module;
fig. 2 is a schematic diagram of a data multiplexing module filling frame.
Detailed Description
The present invention will be described in detail with reference to specific examples. The following examples will assist those skilled in the art in further understanding the present invention, but are not intended to limit the invention in any way. It should be noted that variations and modifications could be made by those skilled in the art without departing from the inventive concept. These are all within the scope of the present invention.
Example 1:
according to the method for realizing the accurate filling and storage of the load data, a minimum system is formed by the data multiplexing module and the data storage module, the data storage module periodically returns the load SCID+VCID and the write pointer parameters of the corresponding buffer area to the data multiplexing module through the internal bus, the data multiplexing module automatically generates a certain number of filling frames of the specific load after receiving the filling instruction of the specific load on the ground, and the filling frame number is generated on a processor according to the write pointer parameters returned by the data storage module, so that the load data can be completely and accurately written into the FLASH storage space when required, and the timely and efficient downloading of the specific load data is realized.
The method comprises the following steps: step 1: receiving the load data through the data multiplexing module, and writing the load data into the data storage module according to the priority; step 2: the data storage module opens up different buffer spaces for different loads according to SCID+VCID, so as to realize classified storage of load data according to SCID+VCID; step 3: the data storage module periodically returns write pointers of different load data cache spaces to the data multiplexing module in the process of receiving and storing different SCID+VCID load data; step 4: after receiving a ground load data filling instruction, the data multiplexing module searches a corresponding latest writing pointer returned by the data storage module according to the SCID+VCID, generates a certain number of filling frames of the SCID+VCID load, forms a whole page of filling data together with the original load data, and writes the whole page of filling data into a FLASH of the data storage module according to the priority; step 5: after receiving a ground load data playback instruction, the data multiplexing module searches corresponding load data according to SCID+VCID, plays back the load data written into FLASH, and solves the problem that partial load data cannot be acquired in time due to partial load data not being full of one page;
and in the step 2, the data storage module opens up different buffer spaces for different loads according to SCID+VCID, so that the load data is stored according to SCID+VCID classification. The method for designing the write pointer corresponding to the data storage module periodically returns the load data in the step 3 solves the problem of the data size of the later filling frame. And (3) when the data multiplexing module receives a filling special instruction of a specific load, searching a corresponding latest write pointer parameter according to the SCID+VCID contained in the instruction, thereby realizing the accurate generation and storage of filling data of the specific load data. And when the data storage module receives a data playback instruction of a specific load, searching corresponding load data according to the SCID+VCID contained in the instruction, thereby realizing the timely downlink of the specific load data.
Example 2:
example 2 is a preferred example of example 1.
In the implementation method for precisely filling and storing the load data, as shown in fig. 1, in the process of designing a data storage module, a buffer space is opened up independently according to SCID+VCID, and a write pointer of the buffer space is returned for generating a filling frame instruction by a data multiplexing module.
Under certain working conditions, the data volume generated by the load is smaller, the data volume threshold of 1 logical page of the data storage module cannot be reached, but the load data under the working conditions has certain (quasi) real-time downloading requirements, and if the load data cannot be written into the FLASH storage medium in time, downloading cannot be returned in (quasi) real-time.
The payload generates a certain amount of data (scid+vcid=0x7d51) in a certain job, but the amount of data does not reach 256 frames (assuming 100 frames), the data input at this time is written into the cache DRAM by the data storage module; since it is not written to the FLASH storage medium, these data cannot be downloaded by playback.
At this time, the data storage module periodically returns the write pointer (100) of the load 7D51 to the data multiplexing module, after the data multiplexing module receives the 7D51 filling instruction, the FPGA of the data multiplexing module analyzes the (7D 51 information) in the filling instruction, reads the corresponding write pointer as 100, designs a "filling data" functional module in the FPGA, controls the filling data module to output 156 frames (256-100=156) of the filling frame of the 7D51 to the data storage module, the data storage module writes the load data into the buffer area of the 7D51 in a partitioning manner according to the original design, automatically pushes the load data of the 7D51 into the FLASH memory when the buffer area reaches the threshold after the buffer area is full of 256 frames, and automatically sends the load data of the 7D51 to the data multiplexing manner when the ground sends the playback command of the load data 7D 51.
In fig. 2, after receiving a 7D51 fill data instruction, a data module enters a working mode, sends out an arbitration request signal (arbitration_req) to an internal bus multiplexing module, and after the internal bus multiplexing module returns an arbitration grant signal (arbitration_gnt), generates 7D51 fill data according to a format of a CADU frame, and sends the 7D51 fill data to an internal bus control module; after the transmission of the current CADU frame is finished, an arbitration clearing (pending_clr) signal is sent to an internal bus multiplexing data multiplexing module; the operation mode is terminated after the amount of padding data transmitted reaches a calculated value (156). And the filling data module can perform complete priority request, arbitration and weighting operation every 1 frame, and normal writing of other load data can not be influenced.
The load data filling storage system provided by the invention comprises: module M1: receiving load data and storing the load data according to the priority; module M2: according to the spacecraft identification SCID and the virtual channel identification VCID, different cache spaces are opened up, and different load data are classified and stored; module M3: in the process of receiving and storing different load data, periodically recording write pointers of different load data cache spaces; module M4: after receiving a ground load data filling instruction, searching a latest writing pointer according to SCID and VCID, generating a corresponding filling frame, forming a whole page of filling data together with load data, and writing the filling data into a FLASH memory according to priority; module M5: after receiving the ground payload data playback instruction, searching corresponding payload data according to the SCID and the VCID, and playing back the payload data which is already written into the FLASH memory.
The payload generates data during the operation, and if the data amount does not reach 256 frames, the data is written into the DRAM without performing a return downloading. After receiving the load data filling instruction, the field programmable gate array FPGA analyzes the information in the filling instruction, reads the corresponding write pointer, and controls the number of filling frames to complement the load data. When the buffer area where the load data is located is full of 256 frames and reaches a threshold value, the load data is automatically pushed into the FLASH memory; when the ground sends a playback command of the payload data, the payload data is automatically downloaded. After receiving the load data filling data instruction, sending an arbitration request signal to the internal bus, generating a filling frame after the internal bus returns an arbitration weighting signal, sending the filling frame to the internal bus, and sending an arbitration clearing signal to the internal bus after the filling frame is transmitted.
Those skilled in the art will appreciate that the systems, apparatus, and their respective modules provided herein may be implemented entirely by logic programming of method steps such that the systems, apparatus, and their respective modules are implemented as logic gates, switches, application specific integrated circuits, programmable logic controllers, embedded microcontrollers, etc., in addition to the systems, apparatus, and their respective modules being implemented as pure computer readable program code. Therefore, the system, the apparatus, and the respective modules thereof provided by the present invention may be regarded as one hardware component, and the modules included therein for implementing various programs may also be regarded as structures within the hardware component; modules for implementing various functions may also be regarded as being either software programs for implementing the methods or structures within hardware components.
The foregoing describes specific embodiments of the present invention. It is to be understood that the invention is not limited to the particular embodiments described above, and that various changes or modifications may be made by those skilled in the art within the scope of the appended claims without affecting the spirit of the invention. The embodiments of the present application and features in the embodiments may be combined with each other arbitrarily without conflict.
Claims (4)
1. A method of payload data population storage, comprising:
step 1: receiving load data and storing the load data according to the priority;
step 2: according to the spacecraft identification SCID and the virtual channel identification VCID, different cache spaces are opened up, and different load data are classified and stored;
step 3: in the process of receiving and storing different load data, periodically recording write pointers of different load data cache spaces;
step 4: after receiving a ground load data filling instruction, searching a latest writing pointer according to SCID and VCID, generating a corresponding filling frame, forming a whole page of filling data together with load data, and writing the filling data into a FLASH memory according to priority;
step 5: after receiving a ground payload data playback instruction, searching corresponding payload data according to the SCID and the VCID, and playing back the payload data written into the FLASH memory;
the effective load generates data in operation, if the data quantity does not reach 256 frames, the data is written into the DRAM, and the return downloading is not carried out;
after receiving the load data filling instruction, analyzing information in the filling instruction through a Field Programmable Gate Array (FPGA), reading a corresponding write pointer, and controlling the number of filling frames to complement the load data;
when the buffer area where the load data is located is full of 256 frames and reaches a threshold value, the load data is automatically pushed into the FLASH memory; when the ground sends a playback command of the payload data, the payload data is automatically downloaded.
2. The method for filling and storing payload data according to claim 1, wherein after receiving the payload data filling command, an arbitration request signal is sent to the internal bus, a filling frame is generated after the internal bus returns an arbitration grant signal, and the filling frame is sent to the internal bus, and after the filling frame is transmitted, an arbitration clear signal is sent to the internal bus.
3. A load data filled storage system, comprising:
module M1: receiving load data and storing the load data according to the priority;
module M2: according to the spacecraft identification SCID and the virtual channel identification VCID, different cache spaces are opened up, and different load data are classified and stored;
module M3: in the process of receiving and storing different load data, periodically recording write pointers of different load data cache spaces;
module M4: after receiving a ground load data filling instruction, searching a latest writing pointer according to SCID and VCID, generating a corresponding filling frame, forming a whole page of filling data together with load data, and writing the filling data into a FLASH memory according to priority;
module M5: after receiving a ground payload data playback instruction, searching corresponding payload data according to the SCID and the VCID, and playing back the payload data written into the FLASH memory;
the effective load generates data in operation, if the data quantity does not reach 256 frames, the data is written into the DRAM, and the return downloading is not carried out;
after receiving the load data filling instruction, analyzing information in the filling instruction through a Field Programmable Gate Array (FPGA), reading a corresponding write pointer, and controlling the number of filling frames to complement the load data;
when the buffer area where the load data is located is full of 256 frames and reaches a threshold value, the load data is automatically pushed into the FLASH memory; when the ground sends a playback command of the payload data, the payload data is automatically downloaded.
4. A load data filling and storing system according to claim 3, wherein after receiving the load data filling and storing instruction, an arbitration request signal is sent to the internal bus, a filling frame is generated after the internal bus returns an arbitration weight signal, and the filling frame is sent to the internal bus, and after the filling frame is transmitted, an arbitration clear signal is sent to the internal bus.
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| CN115203594B (en) * | 2022-09-16 | 2022-11-29 | 成都国星宇航科技股份有限公司 | Multi-temporal remote sensing data display method, device, equipment and medium |
| CN115827063B (en) * | 2023-02-16 | 2023-06-13 | 沐曦集成电路(南京)有限公司 | Write storage system and method based on Fill Constant instruction |
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| US7826490B2 (en) * | 2006-06-29 | 2010-11-02 | Applied Micro Circuits Corporation | System and method for synchronous payload envelope mapping without pointer adjustments |
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