CN113759586A - Display panel manufacturing method and display panel - Google Patents
Display panel manufacturing method and display panel Download PDFInfo
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- CN113759586A CN113759586A CN202111017928.7A CN202111017928A CN113759586A CN 113759586 A CN113759586 A CN 113759586A CN 202111017928 A CN202111017928 A CN 202111017928A CN 113759586 A CN113759586 A CN 113759586A
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 36
- 239000000758 substrate Substances 0.000 claims abstract description 268
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 claims abstract description 80
- 238000000034 method Methods 0.000 claims abstract description 39
- 238000005520 cutting process Methods 0.000 claims abstract description 6
- 239000010410 layer Substances 0.000 claims description 170
- 239000011241 protective layer Substances 0.000 claims description 24
- 238000002161 passivation Methods 0.000 claims description 16
- 229920002120 photoresistant polymer Polymers 0.000 claims description 14
- 238000000151 deposition Methods 0.000 claims description 12
- 230000008021 deposition Effects 0.000 claims description 10
- 230000005684 electric field Effects 0.000 claims description 9
- 239000011521 glass Substances 0.000 abstract description 36
- 239000010408 film Substances 0.000 description 50
- 238000010586 diagram Methods 0.000 description 18
- 229910004205 SiNX Inorganic materials 0.000 description 5
- 239000003990 capacitor Substances 0.000 description 4
- 239000012528 membrane Substances 0.000 description 4
- 239000004973 liquid crystal related substance Substances 0.000 description 2
- 239000002699 waste material Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/133351—Manufacturing of individual cells out of a plurality of cells, e.g. by dicing
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/1303—Apparatus specially adapted to the manufacture of LCDs
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
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- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
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Abstract
The invention relates to the technical field of display, and discloses a display panel and a manufacturing method thereof, wherein the method comprises the following steps: the manufacturing method comprises the steps of providing a color film substrate and an array substrate, dividing a first display mode area and a second display mode area on the color film substrate, arranging indium tin oxide layers on two sides of the first display mode area, arranging the indium tin oxide layer on one side, far away from the array substrate, of the second display mode area, forming a to-be-cut display panel by combining the color film substrate and the array substrate into a box, and cutting the to-be-cut display panel according to the first display mode area and the second display mode area, so that display panels with different display modes can be manufactured on the same glass substrate, and the manufacturing efficiency of the display panel is improved.
Description
Technical Field
The invention relates to the technical field of display, in particular to a display panel and a manufacturing method thereof.
Background
With the improvement of living standard of people, the requirements on the quality of different display electronic products are higher and higher, and panel manufacturers need to improve the product competitiveness of different models of products through different display modes for liquid crystal panels with different sizes. At present, each large panel manufacturer adopts a nesting and cutting technology (MMG) to design two types of liquid crystal panels with different sizes on the same glass substrate in a mixed manner, so that the utilization rate of the glass substrate is greatly improved.
However, the MMG technology cannot manufacture display panels of different display modes on the same glass substrate, resulting in low manufacturing efficiency of the display panels.
The above is only for the purpose of assisting understanding of the technical aspects of the present invention, and does not represent an admission that the above is prior art.
Disclosure of Invention
The present invention is directed to a method for manufacturing a display panel and a display panel, and aims to solve the technical problem that display panels with different display modes cannot be manufactured on the same glass substrate in the prior art.
In order to achieve the above object, the present invention provides a method for manufacturing a display panel, including the steps of:
providing a color film substrate and an array substrate;
dividing a first display mode area and a second display mode area on the color film substrate;
arranging indium tin oxide layers on two sides of the first display mode area, and arranging the indium tin oxide layers on one side, far away from the array substrate, of the second display mode area;
forming a display panel to be cut after the color film substrate and the array substrate are paired into a box;
and cutting the display panel to be cut according to the first display mode area and the second display mode area to obtain target display panels with different display modes.
Optionally, the step of disposing ito layers on two sides of the first display mode region and disposing ito layers on a side of the second display mode region away from the array substrate includes:
carrying out indium tin oxide deposition on one side of the color film substrate, which is far away from the array substrate, so as to arrange indium tin oxide layers on one sides of the first display mode area and the second display mode area, which are far away from the array substrate;
a shielding plate is arranged on one side of the second display mode area facing the array substrate;
and carrying out indium tin oxide deposition on one side of the color film substrate facing the array substrate, so as to arrange an indium tin oxide layer on one side of the first display mode area facing the array substrate.
Optionally, the depositing indium tin oxide on the side of the color film substrate facing the array substrate to form an indium tin oxide layer on the side of the first display mode region facing the array substrate includes:
acquiring a public electrode pattern in a first display mode;
and carrying out indium tin oxide deposition on one side of the color film substrate facing the array substrate according to the common electrode pattern, so as to arrange an indium tin oxide layer on one side of the first display mode area facing the array substrate.
Optionally, the step of forming a to-be-cut display panel after forming a box by pairing the color film substrate and the array substrate includes:
dividing a first display mode area and a second display mode area on the array substrate;
aligning a first display mode area on the color film substrate with a first display mode area on the array substrate;
and aligning a second display mode area on the color film substrate with the second display mode area on the array substrate, and forming a box by the color film substrate and the array substrate to form a display panel to be cut.
Optionally, the first display mode is a vertical alignment type display mode, and the second display mode is a horizontal electric field type display mode.
Optionally, after the step of providing a color filter substrate and an array substrate, the method further includes:
arranging a grid electrode and a grid electrode insulating layer covering the grid electrode on the array substrate;
an active layer, a source drain electrode and a protective layer covering the active layer and the source drain electrode are arranged on the grid electrode insulating layer;
setting a color photoresist layer on the protective layer;
and arranging an organic flat layer covering the color light resistance layer on the protective layer, and arranging an indium tin oxide electrode and a support pillar.
Optionally, the step of disposing an organic planarization layer on the protection layer to cover the color photoresist layer, and disposing an indium tin oxide electrode and a support pillar includes:
dividing a first display mode area and a second display mode area on the array substrate;
when a second display mode corresponding to a second display mode area of the array substrate is an in-plane switching display mode, arranging an organic flat layer covering the color light resistance layer on the second display mode area of the array substrate;
arranging a common indium tin oxide electrode on the organic flat layer, and arranging a passivation layer covering the common indium tin oxide electrode on the organic flat layer;
arranging an organic flat layer covering the color photoresist layer on a first display mode area of the array substrate, and arranging a passivation layer on the organic flat layer;
and arranging a pixel indium tin oxide electrode and a support pillar on the passivation layer.
Optionally, the step of disposing an organic planarization layer on the protection layer to cover the color photoresist layer, and disposing an indium tin oxide electrode and a support pillar includes:
dividing a first display mode area and a second display mode area on the array substrate;
when a second display mode corresponding to a second display mode region of the array substrate is an in-plane switching display mode, arranging a pixel indium tin oxide electrode, a common indium tin oxide electrode and a support pillar on an organic flat layer corresponding to the second display mode region of the array substrate;
and arranging a pixel indium tin oxide electrode and a support pillar on the organic flat layer corresponding to the first display mode region of the array substrate.
In addition, to achieve the above object, the present application also provides a vertical alignment type display panel manufactured by the above manufacturing method of a display panel, the vertical alignment type display panel including: the array substrate and the color film substrate are arranged opposite to the array substrate, and indium tin oxide layers are arranged on two sides of the color film substrate.
Further, to achieve the above object, the present application also provides a horizontal electric field type display panel manufactured by the manufacturing method of the display panel as described above, the horizontal electric field type display panel including: the color filter comprises an array substrate and a color film substrate arranged opposite to the array substrate, wherein an indium tin oxide layer is arranged on one side of the color film substrate, which is far away from the array substrate.
The invention discloses a color film substrate and an array substrate, wherein a first display mode area and a second display mode area are divided on the color film substrate, indium tin oxide layers are arranged on two sides of the first display mode area, the indium tin oxide layer is arranged on one side, far away from the array substrate, of the second display mode area, the color film substrate and the array substrate are combined into a box to form a display panel to be cut, and the display panel to be cut is cut according to the first display mode area and the second display mode area to obtain target display panels with different display modes; according to the invention, the first display mode area and the second display mode area are divided on the color film substrate, the indium tin oxide layer is arranged on two sides of the first display mode area, the indium tin oxide layer is arranged on one side of the second display mode area, which is far away from the array substrate, and cutting is carried out according to the first display mode area and the second display mode area, so that display panels with different display modes can be manufactured on the same glass substrate, and the manufacturing efficiency of the display panel is improved.
Drawings
FIG. 1 is a schematic flow chart illustrating a method for manufacturing a display panel according to a first embodiment of the present invention;
FIG. 2 is a schematic view of a main structure of a VA display mode according to an embodiment of the method for manufacturing a display panel of the present invention;
FIG. 3 is a schematic diagram of the HFFS display mode in accordance with one embodiment of the present invention;
FIG. 4 is a schematic diagram of a main structure of an IPS display mode according to an embodiment of the method for manufacturing a display panel of the present invention;
FIG. 5 is a schematic diagram illustrating a method for dividing regions with different display modes according to an embodiment of the present invention;
FIG. 6 is a schematic view of disposing ITO layers on two sides of a first display mode region according to an embodiment of a method for manufacturing a display panel of the present invention;
FIG. 7 is a schematic view of an ITO layer disposed on one side of a second display mode region according to an embodiment of the present invention;
FIG. 8 is a flowchart illustrating a method for manufacturing a display panel according to a second embodiment of the present invention;
FIG. 9 is a schematic diagram illustrating a position of a shielding plate according to an embodiment of a method for manufacturing a display panel of the present invention;
FIG. 10 is a flowchart illustrating a method for manufacturing a display panel according to a third embodiment of the present invention;
FIG. 11 is a schematic diagram of a gate and color photoresist layer configuration according to an embodiment of a method for fabricating a display panel;
FIG. 12 is a schematic diagram illustrating a second display mode region setup when the second display mode is an in-plane switching mode according to an embodiment of the present invention;
FIG. 13 is a schematic diagram illustrating a first display mode region when the second display mode is an in-plane switching mode according to an embodiment of the present invention;
FIG. 14 is a schematic diagram illustrating a second display mode region setup when the second display mode is an in-plane switching mode according to an embodiment of the present invention;
fig. 15 is a schematic view illustrating a first display mode region setup when the second display mode is an in-plane switching display mode according to an embodiment of the method for manufacturing a display panel of the invention.
The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.
The reference numbers illustrate:
| reference numerals | Name (R) | Reference numerals | Name (R) |
| 1 | |
8 | |
| 2 | |
9 | Passivation layer |
| 3 | |
10 | |
| 4 | |
11 | Common indium |
| 5 | Source and |
12 | |
| 6 | |
13 | Indium tin oxide on the |
| 7 | Color |
14 | Indium tin oxide electrode of pixel |
Detailed Description
It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
Referring to fig. 1, fig. 1 is a schematic flow chart of a first embodiment of a manufacturing method of a display panel according to the present invention.
Step S10: a color film substrate and an array substrate are provided.
It should be understood that the conventional large-sized display panel mainly adopts a Vertical Alignment (VA) display mode, and the middle and small-sized display panel mainly adopts an In-Plane Switching (HFFS) or In-Plane Switching (IPS) display mode. Among them, the large-sized display panel may be a Television (TV) display panel, and the medium-and small-sized display panel may be a Monitor/Personal Computer (PC) display panel.
In order to distinguish the VA display mode, the HFFS display mode, and the IPS display mode, the description will be made with reference to fig. 2 to 4, but the present embodiment is not limited thereto. Fig. 2 is a schematic diagram of a main structure of a VA display mode, and the display panel of the VA display mode in fig. 2 mainly includes an array (Thin Film Transistor, TFT) substrate 1, a gate electrode 2, a gate insulating layer 3, an active layer 4, a source/drain electrode 5, a protective layer 6, a Color photoresist layer 7, an organic planarization layer 8, a passivation layer 9, a support pillar 10, a common Indium-Tin Oxide (ITO) electrode 11, a Color Filter (CF) substrate 12, a back Indium-Tin Oxide (ITO) 13, and a Pixel Indium-Tin Oxide (Pixel ITO) electrode 14.
Fig. 3 is a schematic diagram of the main structure of HFFS display mode, fig. 4 is a schematic diagram of the main structure of IPS display mode, and as can be seen from comparing fig. 2 with fig. 3 and 4, the VA display mode Pixel ITO and Com ITO are respectively located on the TFT side glass substrate and the CF side glass substrate, and the ITO electrodes of HFFS or IPS display mode are both located on the TFT side glass substrate, and the back ITO of the CF side glass substrate is used to prevent the interference of external signals to the Pixel electrode signals. Therefore, it was confirmed that the major difference between the VA display mode and the HFFS display mode or the IPS display mode was the presence or absence of the Com ITO electrode on the side of the CF-side glass substrate facing the TFT-side glass substrate.
Step S20: and dividing a first display mode area and a second display mode area on the color film substrate.
Note that the first display mode may be a Vertical Alignment (VA) display mode, and the second display mode may be a horizontal electric field display mode. Among them, the horizontal electric Field type display mode may include an In-Plane Switching (HFFS) or In-Plane Switching (IPS) display mode.
It should be understood that the major difference between the VA display mode and the HFFS display mode or the IPS display mode is the presence or absence of the Com ITO electrode on the side of the CF-side glass substrate facing the TFT-side glass substrate. Therefore, in order to form ITO on the CF side glass substrate without forming ITO in the HFFS or IPS display mode region on the side facing the TFT side glass substrate, in this embodiment, the CF side glass substrate is divided into the first display mode region and the second display mode region to perform different region processing. The first display mode area may be a VA display mode area, and the second display mode area may be an HFFS display mode area or an IPS display mode area, which is not limited in this embodiment.
For ease of understanding, the description will be made with reference to fig. 5, but this scheme is not limited thereto. Fig. 5 is a schematic view illustrating the division of different display mode regions, in which the CF-side glass substrate is divided into a first display mode region and a second display mode region.
Step S30: and arranging indium tin oxide layers on two sides of the first display mode area, and arranging the indium tin oxide layers on one side of the second display mode area, which is far away from the array substrate.
It should be understood that, in order to realize the HFFS or IPS display mode area without forming ITO on the side of the CF-side glass substrate facing the TFT-side glass substrate, in this embodiment, ITO may be deposited on both sides of the first display mode area, and ITO may be deposited on one side of the second display mode area, so that the two display mode products can be manufactured on one glass substrate without adding a new process flow.
For ease of understanding, reference is made to fig. 6 and 7, but this solution is not limited. Fig. 6 is a schematic diagram of disposing ITO layers on two sides of the first display mode region, in fig. 6, a common Indium-Tin Oxide (COM ITO) electrode 11 is deposited on one side of the Color Filter (CF) substrate 12 facing the array substrate, and a back ITO electrode 13 is deposited on one side of the Color Filter (CF) substrate away from the array substrate. Fig. 7 is a schematic diagram of an ito layer disposed on one side of the second display mode region, in which the Color Filter (CF) substrate 12 in fig. 7 has a back ito 13 deposited on a side away from the array substrate and has no ito deposited on a side facing the array substrate.
Step S40: and forming a box by the color film substrate and the array substrate to form a display panel to be cut.
It can be understood that after the color film substrate and the array substrate are paired to form a box, an uncut display panel, that is, a display panel to be cut, can be obtained.
Step S50: and cutting the display panel to be cut according to the first display mode area and the second display mode area to obtain target display panels with different display modes.
It is understood that the first display mode region and the second display mode region are two different display modes. Therefore, the display panel to be cut is cut according to the first display mode area and the second display mode area, and target display panels with different display modes can be obtained.
In a first embodiment, a color film substrate and an array substrate are provided, a first display mode area and a second display mode area are divided on the color film substrate, indium tin oxide layers are arranged on two sides of the first display mode area, an indium tin oxide layer is arranged on one side, far away from the array substrate, of the second display mode area, the color film substrate and the array substrate are combined into a box to form a display panel to be cut, and the display panel to be cut is cut according to the first display mode area and the second display mode area to obtain target display panels with different display modes; in this embodiment, the color film substrate is divided into the first display mode region and the second display mode region, the ito layers are disposed on two sides of the first display mode region, the ito layer is disposed on one side of the second display mode region away from the array substrate, and the substrate is cut according to the first display mode region and the second display mode region, so that display panels with different display modes can be manufactured on the same glass substrate, and the manufacturing efficiency of the display panel is improved.
Referring to fig. 8, fig. 8 is a schematic flow chart of a manufacturing method of a display panel according to a second embodiment of the present invention, which is based on the first embodiment shown in fig. 1.
In the second embodiment, the step S20 includes:
acquiring a first display mode area and a second display mode area;
and dividing the color film substrate according to the first display mode area and the second display mode area to obtain a first display mode area and a second display mode area.
It should be understood that, panel areas of display panels with different display modes are also different during manufacturing, and in order to reasonably divide the first display mode area and the second display mode area on the color film substrate, in this embodiment, the first display mode area and the second display mode area may be obtained first, and the color film substrate may be divided according to the first display mode area and the second display mode area to obtain the first display mode area and the second display mode area.
It should be noted that the first display mode area may be a panel area of a VA display mode, and the second display mode area may be a panel area of a HFFS display mode or an IPS display mode.
It is understood that the first display mode area and the second display mode area may be preset by a user according to actual needs.
It should be understood that, in order to improve the utilization rate of the color film substrate, in this embodiment, the color film substrate is divided by a preset division model based on the first display mode area and the second display mode area, so as to obtain the first display mode area and the second display mode area. The preset division model is used for dividing the area, and waste of the color film substrate is reduced.
In a second embodiment, a method for obtaining a first display mode area and a second display mode area is disclosed, and a color film substrate is divided according to the first display mode area and the second display mode area to obtain a first display mode area and a second display mode area; in the embodiment, the color film substrate is divided by introducing the first display mode area and the second display mode area, so that the waste of the color film substrate is avoided, and the utilization rate of the color film substrate is improved.
In the second embodiment, the step S30 includes:
step S301: and carrying out indium tin oxide deposition on one side of the color film substrate, which is far away from the array substrate, so as to arrange indium tin oxide layers on one sides of the first display mode area and the second display mode area, which are far away from the array substrate.
It should be understood that the major difference between the VA mode and the HFFS or IPS mode occurs in the presence or absence of Com ITO electrodes on the side of the CF-side glass substrate facing the array substrate. Therefore, ITO deposition can be directly carried out on the outer surface of the CF side glass substrate when the outer surface of the CF side glass substrate is processed, and no additional process treatment is needed.
Step S302: and a shielding plate is arranged on one side of the second display mode area facing the array substrate.
It is understood that, in order to realize the HFFS or IPS display mode region without forming ITO on the side of the CF-side glass substrate facing the array substrate, in the present embodiment, the HFFS or IPS display mode region is shielded by providing a shielding plate (shadow frame) on the side of the CF-side glass substrate facing the array substrate.
For ease of understanding, the description will be made with reference to fig. 9, but this scheme is not limited thereto. FIG. 9 is a schematic diagram of the position of the shielding plate, in which the rectangular area where the shadow frame is located is the shielding plate. The size and shape of the shielding plate can be adjusted according to the area of the product area of the second display mode area.
Step S303: and carrying out indium tin oxide deposition on one side of the color film substrate facing the array substrate, so as to arrange an indium tin oxide layer on one side of the first display mode area facing the array substrate.
It should be understood that, when the ITO is deposited on the side of the color film substrate facing the array substrate, the ITO can only be formed on the side of the first display mode area facing the array substrate due to the shielding of the shielding plate, and the ITO cannot be formed on the side of the second display mode area facing the array substrate, so that the back ITO is deposited on the side of the VA display mode area away from the array substrate, the COM ITO is deposited on the side of the VA display mode area facing the array substrate, the back ITO is deposited on the side of the HFFS or IPS display mode area away from the array substrate, and no ITO is formed on the side of the VA display mode area facing the array substrate.
Further, since Com ITO of the VA display mode is located on the inner surface of the CF-side glass substrate, a special process is required when ITO is deposited on the side of the CF-side glass substrate facing the array substrate. In order to achieve the above object, the step S303 includes:
acquiring a public electrode pattern in a first display mode;
and carrying out indium tin oxide deposition on one side of the color film substrate facing the array substrate according to the common electrode pattern, so as to arrange an indium tin oxide layer on one side of the first display mode area facing the array substrate.
It should be noted that the common electrode pattern may be a Com ITO pattern, and the Com ITO pattern may be preset by a user.
In a second embodiment, it is disclosed that indium tin oxide is deposited on a side of the color filter substrate away from the array substrate, so as to form an indium tin oxide layer on a side of the first display mode region and the second display mode region away from the array substrate, a shielding plate is disposed on a side of the second display mode region facing the array substrate, and indium tin oxide is deposited on a side of the color filter substrate facing the array substrate, so as to form an indium tin oxide layer on a side of the first display mode region facing the array substrate; in this embodiment, when the side of the color film substrate facing the array substrate is deposited with indium tin oxide by disposing the shielding plate on the side of the second display region facing the array substrate, indium tin oxide is not formed on the side of the second display mode region facing the array substrate, so that display panels of different display modes can be manufactured on the same glass substrate together without adding additional processes.
In the second embodiment, the step S40 includes:
step S401: and dividing a first display mode area and a second display mode area on the array substrate.
It should be understood that the difference between the VA mode and the HFFS or IPS mode is that, in addition to the presence or absence of a Com ITO electrode on the side of the CF-side glass substrate facing the array substrate, the HFFS mode requires a layer of SiNx deposited between two layers of ITO to form a capacitor, whereas the conventional VA and IPS modes do not require this layer of SiNx, and the IPS mode requires a PV layer on which a Com ITO electrode and a Pixel ITO electrode are disposed, whereas the VA mode requires only a Pixel ITO electrode on the PV layer. Therefore, in this embodiment, the array substrate needs to be divided into a first display mode area and a second display mode area for different processes.
Step S402: and aligning the first display mode area on the color film substrate with the first display mode area on the array substrate.
It can be understood that, in order to enable the display panel after the color filter is assembled into the cassette to be normally used, in this embodiment, the first display mode region on the color filter substrate needs to be aligned with the first display mode region on the array substrate.
Step S403: and aligning a second display mode area on the color film substrate with the second display mode area on the array substrate, and forming a box by the color film substrate and the array substrate to form a display panel to be cut.
It should be understood that, in addition to the first display mode region on the color filter substrate being aligned with the first display mode region on the array substrate, the second display mode region on the color filter substrate being aligned with the second display mode region on the array substrate is also required.
In a second embodiment, a method for dividing a first display mode area and a second display mode area on an array substrate is disclosed, the first display mode area on a color film substrate is aligned with the first display mode area on the array substrate, the second display mode area on the color film substrate is aligned with the second display mode area on the array substrate, and the color film substrate and the array substrate are paired to form a box to form a display panel to be cut; in the embodiment, the color film substrate is aligned with the display mode region of the array substrate and then assembled into the box, so that the reliability of the display panel is ensured.
Referring to fig. 10, fig. 10 is a schematic flow chart of a manufacturing method of a display panel according to a third embodiment of the present invention, and the manufacturing method of the display panel according to the third embodiment of the present invention is proposed based on the first embodiment shown in fig. 1.
In the third embodiment, after the step S10, the method further includes:
step S110: and arranging a grid electrode and a grid electrode insulating layer covering the grid electrode on the array substrate.
The gate electrode may be a gate electrode, and the gate insulating layer covering the gate electrode may be a GI insulating layer.
It should be understood that the gate electrode and the gate insulating layer covering the gate electrode provided on the array substrate may be a GI insulating layer in which a gate electrode and a cover gate electrode are provided on the TFT-side glass substrate.
Step S120: and an active layer, a source drain electrode and a protective layer covering the active layer and the source drain electrode are arranged on the grid electrode insulating layer.
The source and drain electrodes may be SD electrodes, and the protective layer of the source and drain electrodes may be a PV protective layer.
It is understood that the protective layer on the gate insulating layer, on which the active layer, the source and drain electrodes, and the cover active layer and the source and drain electrodes are disposed, may be a PV protective layer on the GI insulating layer, on which the active layer, the SD electrode, and the cover active layer and the SD electrode are disposed.
Step S130: and arranging a color photoresist layer on the protective layer.
It should be understood that disposing a color resist layer on the protective layer may be disposing an R/G/B resist on the PV protective layer.
For ease of understanding, the description may be made with reference to fig. 11, but this scheme is not limited thereto. Fig. 11 is a schematic diagram of arrangement of a gate electrode and a color resist layer, in fig. 11, a gate electrode 2 and a gate insulating layer 3 covering the gate electrode are firstly arranged on an array substrate 1, an active layer 4, a source/drain electrode 5 and a protective layer 6 covering the active layer 4 and the source/drain electrode 5 are arranged on the gate insulating layer 3, and a color resist layer 7 is arranged on the protective layer 6.
Step S140: and arranging an organic flat layer covering the color light resistance layer on the protective layer, and arranging an indium tin oxide electrode and a support pillar.
It is understood that the difference between the VA mode and the HFFS mode or the IPS mode is not only reflected in the presence or absence of the Com ITO electrode on the CF-side glass substrate facing the array substrate, but also reflected in the HFFS mode that a layer of SiNx is deposited between two layers of ITO to form the capacitor. In order to form the capacitor in the area of the HFFS display mode, the step S140 includes:
dividing a first display mode area and a second display mode area on the array substrate;
when a second display mode corresponding to a second display mode area of the array substrate is an in-plane switching display mode, arranging an organic flat layer covering the color light resistance layer on the second display mode area of the array substrate;
arranging a common indium tin oxide electrode on the organic flat layer, and arranging a passivation layer covering the common indium tin oxide electrode on the organic flat layer;
arranging an organic flat layer covering the color photoresist layer on a first display mode area of the array substrate, and arranging a passivation layer on the organic flat layer;
and arranging a pixel indium tin oxide electrode and a support pillar on the passivation layer.
It should be understood that the difference between the VA mode and the HFFS mode or the IPS mode is reflected in the fact that the HFFS mode requires a layer of SiNx to be deposited between two layers of ITO to form a capacitor, in addition to the presence or absence of a Com ITO electrode on the side of the CF-side glass substrate facing the array substrate, while the conventional VA mode and IPS do not require the layer of SiNx. Therefore, when the organic planarization layer and the passivation layer covering the color photoresist layer are disposed, the array substrate needs to be divided into a first display mode area and a second display mode area for separate processing.
For ease of understanding, the description will be made with reference to fig. 12 and 13, but this scheme is not limited thereto. Fig. 12 is a schematic diagram illustrating a second display mode region when the second display mode is an in-plane switching mode, in which fig. 12, an organic planarization layer 8 covering the color resist layer 7 is disposed on the second display mode region of the array substrate 1, a common ito electrode 11 is disposed on the organic planarization layer 8, a passivation layer 9 covering the common ito electrode 11 is disposed on the organic planarization layer 8, and an ito electrode 14 and a supporting pillar 10 are disposed on the passivation layer 9; fig. 13 is a schematic view showing the arrangement of the first display mode region when the second display mode is an in-plane switching type display mode, and in fig. 13, an organic planarization layer 8 covering the color resist layer 7 is arranged on the first display mode region of the array substrate 1, a passivation layer 9 is arranged on the organic planarization layer 8, and an indium tin oxide electrode 14 and a support pillar 10 are arranged on the passivation layer 9.
Further, the difference between the VA display mode and the HFFS display mode or the IPS display mode is reflected in the fact that the IPS display mode requires a PFA layer on which the Com ITO electrode and the Pixel ITO electrode are disposed, in addition to the presence or absence of the Com ITO electrode on the side of the CF-side glass substrate facing the array substrate. In order to dispose Com ITO electrodes and Pixel ITO electrodes on an area of the IPS display mode, the S140, including:
dividing a first display mode area and a second display mode area on the array substrate;
when a second display mode corresponding to a second display mode region of the array substrate is an in-plane switching display mode, arranging a pixel indium tin oxide electrode, a common indium tin oxide electrode and a support pillar on an organic flat layer corresponding to the second display mode region of the array substrate;
and arranging a pixel indium tin oxide electrode and a support pillar on the organic flat layer corresponding to the first display mode region of the array substrate.
It should be understood that the difference between the VA display mode and the HFFS display mode or the IPS display mode is that, in addition to the presence or absence of the Com ITO electrode on the side of the CF-side glass substrate facing the array substrate, the IPS display mode requires the presence of the Com ITO electrode and the Pixel ITO electrode on the PFA layer, whereas the VA display mode requires only the Pixel ITO electrode on the PFA layer. Therefore, the present embodiment also needs to divide the array substrate into a first display mode region and a second display mode region for separate processing.
For ease of understanding, the description will be made with reference to fig. 14 and 15, but this scheme is not limited thereto. Fig. 14 is a schematic diagram illustrating a second display mode region when the second display mode is an in-plane switching display mode, in fig. 14, a pixel ito electrode 14, a common ito electrode 11 and a supporting pillar 10 are disposed on the organic planarization layer 8 corresponding to the second display mode region of the array substrate 1; fig. 15 is a schematic diagram illustrating the first display mode region when the second display mode is the in-plane switching display mode, and in fig. 15, the pixel ito electrode 14 and the supporting pillar 10 are disposed on the organic planarization layer 8 corresponding to the first display mode region of the array substrate 1.
In a third embodiment, a gate and a gate insulating layer covering the gate are disposed on an array substrate, an active layer, a source drain, and a protective layer covering the active layer and the source drain are disposed on the gate insulating layer, a color photoresist layer is disposed on the protective layer, an organic planarization layer covering the color photoresist layer is disposed on the protective layer, and an indium tin oxide electrode and a support pillar are disposed, so that the array substrate can be pre-disposed.
In addition, an embodiment of the present invention further provides a vertical alignment type display panel, which is manufactured by the above-mentioned method for manufacturing a display panel, and the vertical alignment type display panel includes: the array substrate and with the various membrane base plate of array base plate relative setting, the both sides of various membrane base plate set up indium tin oxide.
Further, an embodiment of the present invention also provides a horizontal electric field type display panel manufactured by the above-described manufacturing method of the display panel, including: the array substrate and with the various membrane base plate of array base plate relative setting, one side of various membrane base plate sets up indium tin oxide. Wherein the horizontal electric field type display panel may include: an In-Plane Switching (IPS) display panel and an In-Plane Switching (HFFS) display panel.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or system. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or system that comprises the element.
The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments. In the unit claims enumerating several means, several of these means may be embodied by one and the same item of hardware. The use of the words first, second, third, etc. do not denote any order, but rather the words first, second, third, etc. are to be interpreted as names.
The above description is only a preferred embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes, which are made by using the contents of the present specification and the accompanying drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (10)
1. A method for manufacturing a display panel, comprising:
providing a color film substrate and an array substrate;
dividing a first display mode area and a second display mode area on the color film substrate;
arranging indium tin oxide layers on two sides of the first display mode area, and arranging the indium tin oxide layers on one side, far away from the array substrate, of the second display mode area;
forming a display panel to be cut after the color film substrate and the array substrate are paired into a box;
and cutting the display panel to be cut according to the first display mode area and the second display mode area to obtain target display panels with different display modes.
2. The method of manufacturing a display panel according to claim 1, wherein the step of providing the ito layers on both sides of the first display mode region and providing the ito layers on a side of the second display mode region away from the array substrate comprises:
carrying out indium tin oxide deposition on one side of the color film substrate, which is far away from the array substrate, so as to arrange indium tin oxide layers on one sides of the first display mode area and the second display mode area, which are far away from the array substrate;
a shielding plate is arranged on one side of the second display mode area facing the array substrate;
and carrying out indium tin oxide deposition on one side of the color film substrate facing the array substrate, so as to arrange an indium tin oxide layer on one side of the first display mode area facing the array substrate.
3. The method according to claim 2, wherein the step of depositing ito on a side of the color filter substrate facing the array substrate to form an ito layer on a side of the first display mode region facing the array substrate comprises:
acquiring a public electrode pattern in a first display mode;
and carrying out indium tin oxide deposition on one side of the color film substrate facing the array substrate according to the common electrode pattern, so as to arrange an indium tin oxide layer on one side of the first display mode area facing the array substrate.
4. The method for manufacturing a display panel according to claim 1, wherein the step of forming the display panel to be cut after the color filter substrate and the array substrate are paired into a box comprises:
dividing a first display mode area and a second display mode area on the array substrate;
aligning a first display mode area on the color film substrate with a first display mode area on the array substrate;
and aligning a second display mode area on the color film substrate with the second display mode area on the array substrate, and forming a box by the color film substrate and the array substrate to form a display panel to be cut.
5. The method for manufacturing a display panel according to any one of claims 1 to 4, wherein the first display mode is a vertical alignment type display mode, and wherein the second display mode is a horizontal electric field type display mode.
6. The method for manufacturing a display panel according to claim 5, wherein after the step of providing a color filter substrate and an array substrate, the method further comprises:
arranging a grid electrode and a grid electrode insulating layer covering the grid electrode on the array substrate;
an active layer, a source drain electrode and a protective layer covering the active layer and the source drain electrode are arranged on the grid electrode insulating layer;
setting a color photoresist layer on the protective layer;
and arranging an organic flat layer covering the color light resistance layer on the protective layer, and arranging an indium tin oxide electrode and a support pillar.
7. The method according to claim 6, wherein the step of disposing an organic planarization layer on the protective layer to cover the color resist layer, and disposing an indium tin oxide electrode and a support pillar comprises:
dividing a first display mode area and a second display mode area on the array substrate;
when a second display mode corresponding to a second display mode area of the array substrate is an in-plane switching display mode, arranging an organic flat layer covering the color light resistance layer on the second display mode area of the array substrate;
arranging a common indium tin oxide electrode on the organic flat layer, and arranging a passivation layer covering the common indium tin oxide electrode on the organic flat layer;
arranging an organic flat layer covering the color photoresist layer on a first display mode area of the array substrate, and arranging a passivation layer on the organic flat layer;
and arranging a pixel indium tin oxide electrode and a support pillar on the passivation layer.
8. The method according to claim 6, wherein the step of disposing an organic planarization layer on the protective layer to cover the color resist layer, and disposing an indium tin oxide electrode and a support pillar comprises:
dividing a first display mode area and a second display mode area on the array substrate;
when a second display mode corresponding to a second display mode region of the array substrate is an in-plane switching display mode, arranging a pixel indium tin oxide electrode, a common indium tin oxide electrode and a support pillar on an organic flat layer corresponding to the second display mode region of the array substrate;
and arranging a pixel indium tin oxide electrode and a support pillar on the organic flat layer corresponding to the first display mode region of the array substrate.
9. A vertically aligned display panel manufactured by the method for manufacturing a display panel according to any one of claims 1 to 8, comprising: the array substrate and the color film substrate are arranged opposite to the array substrate, and indium tin oxide layers are arranged on two sides of the color film substrate.
10. A horizontal electric field type display panel manufactured by the manufacturing method of the display panel according to any one of claims 1 to 8, comprising: the color filter comprises an array substrate and a color film substrate arranged opposite to the array substrate, wherein an indium tin oxide layer is arranged on one side of the color film substrate, which is far away from the array substrate.
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| KR20050000777A (en) * | 2003-06-24 | 2005-01-06 | 엘지.필립스 엘시디 주식회사 | Method for cutting liquid crystal display panel |
| CN107203060A (en) * | 2017-06-05 | 2017-09-26 | 昆山龙腾光电有限公司 | Color membrane substrates and liquid crystal display panel |
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| US20040100593A1 (en) * | 2002-10-19 | 2004-05-27 | Kim Jeong Rok | Method for designing mask and fabricating panel |
| KR20050000777A (en) * | 2003-06-24 | 2005-01-06 | 엘지.필립스 엘시디 주식회사 | Method for cutting liquid crystal display panel |
| US20040263737A1 (en) * | 2003-06-25 | 2004-12-30 | Won-Gyun Youn | Method of fabricating liquid crystal display device having various driving modes |
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