CN106773394B - Array substrate, display panel and display device - Google Patents
Array substrate, display panel and display device Download PDFInfo
- Publication number
- CN106773394B CN106773394B CN201611188068.2A CN201611188068A CN106773394B CN 106773394 B CN106773394 B CN 106773394B CN 201611188068 A CN201611188068 A CN 201611188068A CN 106773394 B CN106773394 B CN 106773394B
- Authority
- CN
- China
- Prior art keywords
- electrode
- substrate
- compensation
- array substrate
- shielding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 144
- 230000008878 coupling Effects 0.000 abstract description 24
- 238000010168 coupling process Methods 0.000 abstract description 24
- 238000005859 coupling reaction Methods 0.000 abstract description 24
- 238000000034 method Methods 0.000 abstract description 18
- 230000008569 process Effects 0.000 abstract description 15
- 230000000694 effects Effects 0.000 abstract description 10
- 239000003990 capacitor Substances 0.000 description 17
- 238000009826 distribution Methods 0.000 description 13
- 239000010408 film Substances 0.000 description 7
- 230000007547 defect Effects 0.000 description 6
- 238000000059 patterning Methods 0.000 description 4
- 238000011161 development Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 239000004973 liquid crystal related substance Substances 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000008859 change Effects 0.000 description 2
- 230000001808 coupling effect Effects 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000002161 passivation Methods 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 230000009471 action Effects 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136218—Shield electrodes
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Geometry (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The invention discloses an array substrate, a display panel and a display device, comprising: a substrate, a plurality of gate lines and data lines disposed on the substrate to cross each other to define a pixel region, and a plurality of common electrode lines disposed on the substrate; further comprises: the compensation electrode is arranged on one side of the data line, which is close to the substrate and is electrically connected with the common electrode line; in the direction perpendicular to the extending direction of the data lines, the orthographic projection of the compensation electrode on the substrate board at least covers the orthographic projection of the data lines located between two adjacent pixel areas on the substrate board. According to the array substrate provided by the embodiment of the invention, on the premise of not excessively depending on the process precision, the coupling capacitance can be effectively shielded through the electrostatic shielding effect, and the risk of crosstalk failure is reduced.
Description
Technical Field
The invention relates to the technical field of display, in particular to an array substrate, a display panel and a display device.
Background
In the field of display technology, flat panel display devices, such as liquid crystal displays (Liquid Crystal Display, LCD) and organic electroluminescent displays (Organic Light Emitting Display, OLED), have been in the spotlight in the field of flat panel display technology because of their light weight, thinness, low power consumption, high brightness, and high image quality.
The display device includes at least an array substrate provided with a pixel array, and typically, the array substrate is provided with a gate line, a data line, a common electrode line, and a pixel electrode, a common electrode, and the like located in a pixel region.
Taking a conventional ultra-high-level ultra-dimensional field switch (High Advanced Super Dimension Switch, HADS) mode lcd as an example, as shown in fig. 1a and 1b, in the fabrication process of the array substrate, all the areas of the array substrate (including the display area and the peripheral area surrounding the display area) will be covered with a layer of transparent electrode, in order to generate a stable horizontal electric field, in general design, only the transparent electrode above the pixel electrode 02 in the display area is subjected to the slit process as the common electrode 01 (marked by dotted line); the transparent electrode remaining above the data line 03 (data line) is not subjected to the slit processing, and the shielding electrode 04 (marked by a dotted line) is designed as a shielding electrode 04 without a slit, and the shielding electrode 04 has a certain shielding effect on the coupling capacitance (Cpd) due to a stable common voltage (Vcom), but the region has no stable horizontal electric field to control the rotation of the liquid crystal, and cannot normally display, in other words, a shielding layer (Black matrix, BM) on the color film substrate side is required, in order to ensure the aperture ratio of the pixel, the width of the shielding electrode 04 is not too wide. However, in practice, the wider the shielding electrode 04 is, the larger the overlapping area between the shielding electrode 04 with stable common voltage supply and the pixel electrodes 02 and data line 03 below the shielding electrode 04 is, the stronger the generated shielding capacitance is, and the coupling capacitance generated by mutual coupling between the pixel electrodes 02 and the data line 03 can be effectively shielded, so that the crosstalk (cross talk) defect caused by the overlarge coupling capacitance is improved. Conversely, the narrower the shielding electrode 04, the poorer the shielding effect of the shielding electrode 04 on the coupling effect between the pixel electrode 02 and the data line 03, and the serious cross talk defect is extremely easy to occur due to the influence of the alignment error in the process aspect. With the development of display technology, the resolution (PPI) of the display product is higher and the width of the shielding electrode 04 is narrower, so that it is difficult to effectively improve the cross talk defect generated by coupling the pixel electrode 02 and the data line 03 only by controlling the process precision. In fig. 1b, 05 is a base substrate, 06 is an insulating layer, and 07 is a passivation layer.
Therefore, how to improve the cross talk defect generated by the coupling of the pixel electrode and the data line is a technical problem to be solved by those skilled in the art.
Disclosure of Invention
In view of this, the embodiment of the invention provides an array substrate, a display panel and a display device, which can effectively shield a coupling capacitor and reduce the risk of crosstalk failure.
Therefore, an embodiment of the present invention provides an array substrate, including: a substrate, a plurality of gate lines and data lines disposed on the substrate to cross each other to define a pixel region, and a plurality of common electrode lines disposed on the substrate; further comprises:
the compensation electrode is arranged on one side of the data line, which is close to the substrate base plate, and is electrically connected with the common electrode line;
in the direction perpendicular to the extending direction of the data line, the orthographic projection of the compensation electrode on the substrate at least covers the orthographic projection of the data line between two adjacent pixel areas on the substrate.
In a possible implementation manner, in the above array substrate provided by the embodiment of the present invention, the method further includes: the shielding electrode is arranged on one side of the data line far away from the substrate base plate and is electrically connected with the common electrode line;
in the direction perpendicular to the extending direction of the data line, the orthographic projection of the compensation electrode on the substrate base plate at least covers the orthographic projection of the shielding electrode on the substrate base plate.
In a possible implementation manner, in the above array substrate provided by the embodiment of the present invention, the method further includes: a first transparent electrode disposed in each of the pixel regions and between the compensation electrode and the shielding electrode;
the orthographic projection of the compensation electrode on the substrate and the orthographic projection of the first transparent electrode on the substrate have overlapping areas.
In a possible implementation manner, in the array substrate provided by the embodiment of the present invention, the orthographic projection of the compensation electrode on the substrate and the orthographic projections of the adjacent two first transparent electrodes on the substrate have overlapping areas.
In a possible implementation manner, in the array substrate provided by the embodiment of the invention, the width of the compensation electrode is 12 μm to 16 μm.
In a possible implementation manner, in the array substrate provided by the embodiment of the present invention, the compensation electrode is located at a side of the common electrode line, which is close to the substrate; or alternatively, the first and second heat exchangers may be,
the compensation electrode is positioned on one side of the common electrode line away from the substrate base plate.
In a possible implementation manner, in the above array substrate provided by the embodiment of the present invention, the method further includes: and a second transparent electrode arranged on the same layer as the shielding electrode and insulated from the first transparent electrode.
In a possible implementation manner, in the array substrate provided by the embodiment of the present invention, the first transparent electrode is a common electrode, and the second transparent electrode is a pixel electrode; or alternatively, the first and second heat exchangers may be,
the first transparent electrode is a pixel electrode, and the second transparent electrode is a common electrode.
The embodiment of the invention also provides a display panel which comprises the array substrate provided by the embodiment of the invention.
The embodiment of the invention also provides a display device which comprises the display panel provided by the embodiment of the invention.
The beneficial effects of the embodiment of the invention include:
the embodiment of the invention provides an array substrate, a display panel and a display device, which comprise: a substrate, a plurality of gate lines and data lines disposed on the substrate to cross each other to define a pixel region, and a plurality of common electrode lines disposed on the substrate; further comprises: the compensation electrode is arranged on one side of the data line, which is close to the substrate and is electrically connected with the common electrode line; in the direction perpendicular to the extending direction of the data lines, the orthographic projection of the compensation electrode on the substrate board at least covers the orthographic projection of the data lines located between two adjacent pixel areas on the substrate board. According to the array substrate provided by the embodiment of the invention, on the premise of not excessively depending on the process precision, the coupling capacitance can be effectively shielded through the electrostatic shielding effect, and the risk of crosstalk failure is reduced.
Drawings
FIG. 1a is a top view of an array substrate according to the prior art;
FIG. 1b is a schematic cross-sectional view of FIG. 1a along the direction A-A';
FIG. 2a is a top view of an array substrate according to an embodiment of the present invention;
FIG. 2B is a schematic cross-sectional view of FIG. 2a along the direction B-B';
fig. 3 is a schematic diagram of equivalent capacitance of an array substrate according to an embodiment of the present invention.
Detailed Description
Specific embodiments of an array substrate, a display panel and a display device according to embodiments of the present invention are described in detail below with reference to the accompanying drawings.
The thickness and shape of each film layer in the drawing do not reflect the actual proportion of the array substrate, and the purpose is to illustrate the invention only.
An embodiment of the present invention provides an array substrate, as shown in fig. 2a and fig. 2b, including: a substrate 1, a plurality of gate lines 2 and data lines 3 disposed on the substrate 1 to cross each other to define a pixel region, and a plurality of common electrode lines 4 disposed on the substrate 1; further comprises:
a compensation electrode 5 (i.e., the input signal of the compensation electrode is a stable common electrode signal Vcom) disposed on the side of the data line 3 near the substrate 1 and electrically connected to the common electrode line 4;
in a direction perpendicular to the extending direction of the data lines 3, the orthographic projection of the compensation electrode 5 on the substrate 1 covers at least the orthographic projection of the data lines 3 located between two adjacent pixel areas on the substrate 1.
It should be noted that fig. 2a shows that the compensation electrode 5 is directly electrically connected to the common electrode line 4, and of course, the connection between the compensation electrode and the common electrode line may be other manners, such as via electrical connection or signal trace electrical connection. The connection manner between the compensation electrode and the common electrode line may be determined according to circumstances, and is not limited herein. In addition, it should be noted that "the front projection of the compensation electrode 5 on the substrate 1 in the direction perpendicular to the extending direction of the data line 3 covers at least the front projection of the data line 3 on the substrate 1 between two adjacent pixel regions" means that the front projection of the compensation electrode 5 on the substrate 1 only needs to cover the front projection of the data line 3 on the substrate 1 in the width direction thereof, and does not need to cover the remaining directions (such as the extending direction of the data line), and is not limited herein.
The array substrate provided in the embodiment of the invention comprises: a substrate, a plurality of gate lines and data lines disposed on the substrate to cross each other to define a pixel region, and a plurality of common electrode lines disposed on the substrate; further comprises: the compensation electrode is arranged on one side of the data line, which is close to the substrate and is electrically connected with the common electrode line; in the direction perpendicular to the extending direction of the data lines, the orthographic projection of the compensation electrode on the substrate board at least covers the orthographic projection of the data lines located between two adjacent pixel areas on the substrate board. On the premise that the array substrate provided by the embodiment of the invention does not depend on the process precision too much, the orthographic projection of the compensation electrode on the substrate at least covers the orthographic projection of the data line positioned between two adjacent pixel areas on the substrate in the direction perpendicular to the extending direction of the data line, and the input signal of the compensation electrode is a stable common electrode signal Vc, namely the charge distribution of the compensation electrode is stable, and the voltage of the data line can change, so that a shielding capacitor is generated between the compensation electrode and the data line, the charge distribution of the data line can be pulled through electrostatic shielding effect, the charge distribution of the data line is promoted to be redistributed and tend to be stable, the coupling capacitor can be effectively shielded, and the risk of crosstalk failure is reduced.
In a specific implementation, in the above array substrate provided by the embodiment of the present invention, in order to further effectively shield the coupling capacitance, as shown in fig. 2a and fig. 2b, the array substrate may further include: a shielding electrode 6 (i.e., the input signal of the shielding electrode is a stable common electrode signal Vcom) disposed on a side of the data line 3 away from the substrate 1 and electrically connected to the common electrode line 4; in a direction perpendicular to the extending direction of the data lines 3, the orthographic projection of the compensation electrode 5 on the substrate 1 covers at least the orthographic projection of the shielding electrode 6 on the substrate 1, i.e. as shown in fig. 2b, the width of the compensation electrode 5 may be larger than or equal to the width of the shielding electrode 6. Because the input signals of the shielding electrode and the compensating electrode are the stable common electrode signal Vcom, and the charge distribution is in a stable state, the shielding electrode and the compensating electrode respectively generate shielding capacitance with the data line under the combined action of the shielding electrode and the compensating electrode, and the charge distribution of the data line can be pulled through the electrostatic shielding effect to promote the charge redistribution of the data line to be stable, so that the coupling capacitance can be further effectively shielded, and the crosstalk bad risk is reduced. It should be noted that, although the connection manner between the shielding electrode 6 and the common electrode line 4 is not shown in fig. 2a, the connection manner between the shielding electrode and the common electrode line may be various, for example, may be electrically connected through a via or may be electrically connected through a signal trace, and the connection manner between the shielding electrode and the common electrode line may be according to circumstances, and is not limited herein. In addition, the term "the front projection of the compensation electrode 5 onto the substrate 1 in the direction perpendicular to the extending direction of the data line 3 covers at least the front projection of the shielding electrode 6 onto the substrate 1" means that the front projection of the compensation electrode 5 onto the substrate 1 only needs to satisfy the front projection of the shielding electrode 6 onto the substrate 1 in the width direction thereof, and does not need to satisfy the remaining directions (such as the extending direction of the data line), and is not limited herein.
In a specific implementation, in the above array substrate provided by the embodiment of the present invention, as shown in fig. 2a and fig. 2b, the array substrate may further include: a first transparent electrode 7 disposed in each pixel region and located between the compensation electrode 5 and the shielding electrode 6; the front projection of the compensation electrode 5 on the substrate 1 and the front projection of the first transparent electrode 7 on the substrate 1 have overlapping areas. Because the orthographic projection of the compensation electrode on the substrate and the orthographic projection of the first transparent electrode on the substrate have overlapping areas, and because the input signal of the compensation electrode is a stable common electrode signal Vcom, namely the charge distribution of the compensation electrode is stable, and the charge distribution of the first transparent electrode is driven to change when the voltage of the data line changes, the shielding capacitance is generated between the compensation electrode and the first transparent electrode, when the shielding capacitance is stronger, the charge distribution of the first transparent electrode can be pulled through electrostatic shielding effect, the stability of the charge distribution of the first transparent electrode is kept, and the coupling capacitance between the first transparent electrode and the data line can be effectively shielded, so that the crosstalk defect generated by the mutual coupling of the first transparent electrode and the data line is improved.
Further, in a specific implementation, in the array substrate provided by the embodiment of the present invention, as shown in fig. 2a and fig. 2b, the orthographic projection of the compensation electrode 5 on the substrate 1 and the orthographic projection of the two adjacent first transparent electrodes 7 on the substrate 1 have overlapping areas, that is, two ends of the compensation electrode 5 extend to the pixel area respectively, so that shielding capacitance is generated between the compensation electrode and the two adjacent first transparent electrodes, and by using electrostatic shielding effect, the charge distribution of the two adjacent first transparent electrodes can be pulled, so as to maintain the stability of the charge distribution of the two adjacent first transparent electrodes, and further effectively shield the coupling capacitance between the two adjacent first transparent electrodes and the data line, thereby further improving crosstalk defect generated by the mutual coupling between the two adjacent first transparent electrodes and the data line.
Specifically, taking the array substrate in fig. 2b as an example, as shown in fig. 3, coupling capacitors C1 and C2 are respectively disposed between two adjacent first transparent electrodes 7 and the data line 3, and if the alignment deviation occurs in the process, the distance between the first transparent electrodes 7 and the data line 3 is shortened, the coupling effect of the coupling capacitor C1 or the coupling capacitor C2 will be greatly enhanced, and crosstalk failure is very likely to occur; the shielding capacitors C3 and C4 are disposed between the shielding electrode 6 and the adjacent two first transparent electrodes 7, and the shielding capacitor C5 is disposed between the shielding electrode 6 and the data line 3, so that the width of the shielding electrode 6 is not too wide (generally about 8 μm to 12 μm) in order to ensure the aperture ratio of the pixel, the overlapping area of the shielding electrode 6 and the first transparent electrodes 7 is too small, the shielding effect of the shielding capacitors C3 and C4 is weak, and the influence on the charge distribution of the first transparent electrodes 7 is not large, so that the coupling capacitor C1 or the coupling capacitor C2 cannot be effectively shielded; the addition of the compensation electrode 5 is equivalent to adding the shielding capacitors C6 and C7 between the compensation electrode 5 and the adjacent two first transparent electrodes 7 and the shielding capacitor C8 between the compensation electrode 5 and the data line 3, because the overlapping area between the compensation electrode 5 and the first transparent electrodes 7 is larger, the shielding capacity of the shielding capacitors C6 and C7 is stronger than that of the shielding capacitors C3 and C4, the stability of charge distribution of the adjacent two first transparent electrodes 7 can be maintained, the coupling capacitor C1 or the coupling capacitor C2 can be effectively shielded, and the alignment accuracy has little influence on the same. Therefore, the array substrate provided by the embodiment of the invention can effectively improve poor crosstalk on the premise of not depending on the process precision, and is particularly suitable for high PPI products.
In particular, in the above array substrate provided in the embodiment of the present invention, when the compensation electrode is selected as the transparent electrode material, the width of the compensation electrode may be set to 12 μm to 16 μm due to the fact that the pixel aperture ratio is not considered. Typically, the width of the shielding electrode will be set between 8 μm and 12 μm, which ensures that the orthographic projection of the compensation electrode onto the substrate at least covers the orthographic projection of the shielding electrode onto the substrate.
In a specific implementation, in the array substrate provided by the embodiment of the present invention, the compensation electrode may be located on a side of the common electrode line, which is close to the substrate; alternatively, the compensation electrode may be located at a side of the common electrode line remote from the substrate base plate. Specifically, in the manufacturing process of the array substrate, the specific steps may include the following two modes:
first embodiment: firstly, forming a grid line and a public electrode line on a substrate by a patterning process (namely exposure, development and etching and the like), then forming a pattern of a compensation electrode on one side of a data line to be formed, which is close to the substrate, by the patterning process, and directly lapping the compensation electrode and the public electrode line;
second embodiment: firstly, forming a pattern of a compensation electrode on one side of a data line to be formed, which is close to a substrate, on the substrate through a patterning process (namely exposure, development and etching, and the like), forming a grid line and a public electrode line on the substrate with the formed compensation electrode pattern through the patterning process, and ensuring that the compensation electrode and the public electrode line are directly lapped together.
The second embodiment is preferable in comparison with the first embodiment, and the compensation electrode has better flatness, and when the film layer of the compensation electrode is thin, a crack (ack) is less likely to occur at the overlap joint with the common electrode line. The steps of the above manufacturing method are merely examples, and other steps may be used or include other steps, which are not limited herein.
In a specific implementation, in the above array substrate provided by the embodiment of the present invention, as shown in fig. 2a and fig. 2b, the array substrate may further include: the second transparent electrode 8 (marked by a dotted line) which is arranged on the same layer as the shielding electrode 6 and is mutually insulated from the first transparent electrode 7, so that no additional preparation process is needed when the array substrate is prepared, the patterns of the shielding electrode 6 and the second transparent electrode 8 can be formed only through a one-time composition process, the preparation cost can be saved, and the added value of a product can be improved; preferably, a transparent electrode layer film is covered on the array substrate, the transparent electrode layer film in the pixel region is subjected to the slit treatment, and the transparent electrode layer film remaining in the region above the data line 3 is not subjected to the slit treatment as the second transparent electrode 8, and is used as the shielding electrode 6 without the slit design.
Further, in a specific implementation, in the array substrate provided by the embodiment of the present invention, when the first transparent electrode is a common electrode, the second transparent electrode may be a pixel electrode, and at this time, the common electrode is a plate-shaped electrode, and the pixel electrode may be a slit electrode; or, when the first transparent electrode is a pixel electrode, the second transparent electrode may be a common electrode, and when the pixel electrode is a plate electrode, the common electrode may be a slit electrode.
In the embodiment, as shown in fig. 2b, the array substrate provided in the embodiment of the present invention generally further has other film structures such as an insulating layer 9 and a passivation layer 10, and structures such as a thin film transistor are generally formed on the substrate, and these specific structures may have various implementation manners, which are not limited herein.
Based on the same inventive concept, the embodiment of the invention also provides a display panel, which comprises the array substrate provided by the embodiment of the invention.
Based on the same inventive concept, the embodiment of the present invention further provides a display device, including the display panel provided by the embodiment of the present invention, where the display device may be: any product or component with display function such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator and the like. Other essential components of the display device will be understood by those skilled in the art, and are not described herein in detail, nor should they be considered as limiting the invention. The implementation of the display device can be referred to the embodiments of the display panel or the array substrate, and the repetition is not repeated.
The embodiment of the invention provides an array substrate, a display panel and a display device, which comprise: a substrate, a plurality of gate lines and data lines disposed on the substrate to cross each other to define a pixel region, and a plurality of common electrode lines disposed on the substrate; further comprises: the compensation electrode is arranged on one side of the data line, which is close to the substrate and is electrically connected with the common electrode line; in the direction perpendicular to the extending direction of the data lines, the orthographic projection of the compensation electrode on the substrate board at least covers the orthographic projection of the data lines located between two adjacent pixel areas on the substrate board. According to the array substrate provided by the embodiment of the invention, on the premise of not excessively depending on the process precision, the coupling capacitance can be effectively shielded through the electrostatic shielding effect, and the risk of crosstalk failure is reduced.
It will be apparent to those skilled in the art that various modifications and variations can be made to the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention also include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.
Claims (7)
1. An array substrate, comprising: a substrate, a plurality of gate lines and data lines disposed on the substrate to cross each other to define a pixel region, and a plurality of common electrode lines disposed on the substrate; characterized by further comprising:
the compensation electrode is arranged on one side of the data line, which is close to the substrate base plate, and is electrically connected with the common electrode line;
in the direction perpendicular to the extending direction of the data line, the orthographic projection of the compensation electrode on the substrate at least covers the orthographic projection of the data line between two adjacent pixel areas on the substrate;
the shielding electrode is arranged on one side of the data line far away from the substrate base plate and is electrically connected with the common electrode line;
in the direction perpendicular to the extending direction of the data line, the orthographic projection of the compensation electrode on the substrate base plate at least covers the orthographic projection of the shielding electrode on the substrate base plate;
a first transparent electrode disposed in each of the pixel regions and between the compensation electrode and the shielding electrode;
orthographic projection of the compensation electrode on the substrate and orthographic projection of two adjacent first transparent electrodes on the substrate are provided with overlapping areas;
an insulating layer.
2. The array substrate of claim 1, wherein the compensation electrode has a width of 12 μm to 16 μm.
3. The array substrate of claim 1, wherein the compensation electrode is located at a side of the common electrode line near the substrate; or alternatively, the first and second heat exchangers may be,
the compensation electrode is positioned on one side of the common electrode line away from the substrate base plate.
4. The array substrate of claim 1, further comprising: and a second transparent electrode arranged on the same layer as the shielding electrode and insulated from the first transparent electrode.
5. The array substrate of claim 4, wherein the first transparent electrode is a common electrode and the second transparent electrode is a pixel electrode; or alternatively, the first and second heat exchangers may be,
the first transparent electrode is a pixel electrode, and the second transparent electrode is a common electrode.
6. A display panel comprising an array substrate according to any one of claims 1-5.
7. A display device comprising the display panel according to claim 6.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610899639 | 2016-10-14 | ||
| CN2016108996397 | 2016-10-14 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106773394A CN106773394A (en) | 2017-05-31 |
| CN106773394B true CN106773394B (en) | 2024-04-09 |
Family
ID=58896580
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201611188068.2A Active CN106773394B (en) | 2016-10-14 | 2016-12-20 | Array substrate, display panel and display device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106773394B (en) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107369700B (en) * | 2017-07-13 | 2020-01-07 | 京东方科技集团股份有限公司 | Array substrate, preparation method thereof, display panel and display device |
| CN207337026U (en) * | 2017-11-06 | 2018-05-08 | 京东方科技集团股份有限公司 | Array base palte and display panel |
| CN107656405A (en) * | 2017-11-17 | 2018-02-02 | 深圳市华星光电半导体显示技术有限公司 | Array base palte, liquid crystal display panel and liquid crystal display |
| US10802361B2 (en) | 2017-11-17 | 2020-10-13 | Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. | Array substrate comprising a light-shielding electrode having a main section with a vertical projection covering a data line, liquid crystal display panel and liquid crystal display device |
| CN107797352B (en) * | 2017-11-17 | 2020-06-05 | 深圳市华星光电半导体显示技术有限公司 | Array substrate, display panel, display device and manufacturing method of array substrate |
| CN108231850B (en) * | 2018-01-03 | 2022-08-19 | 京东方科技集团股份有限公司 | Array substrate, preparation method thereof and display panel |
| US11042069B2 (en) | 2018-09-03 | 2021-06-22 | Chongqing Hkc Optoelectronics Technology Co., Ltd. | Array substrate, display panel, and display device |
| CN109061959B (en) * | 2018-09-03 | 2020-10-30 | 重庆惠科金渝光电科技有限公司 | Array substrate, display panel and display device |
| CN111443542A (en) * | 2020-05-06 | 2020-07-24 | 京东方科技集团股份有限公司 | Array substrate, display panel and display device |
| CN111999946B (en) * | 2020-08-28 | 2022-07-01 | 厦门天马微电子有限公司 | Display panel and display device |
| WO2023206054A1 (en) * | 2022-04-26 | 2023-11-02 | 京东方科技集团股份有限公司 | Array substrate and preparation method therefor, and display panel |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH1090702A (en) * | 1996-09-18 | 1998-04-10 | Toshiba Corp | Liquid crystal display device |
| CN101021659A (en) * | 2007-02-26 | 2007-08-22 | 友达光电股份有限公司 | Liquid crystal picture element and producing method thereof and liquid crystal display device |
| CN101221961A (en) * | 2008-01-22 | 2008-07-16 | 友达光电股份有限公司 | Pixel structure and its production method |
| CN201867560U (en) * | 2010-11-08 | 2011-06-15 | 京东方科技集团股份有限公司 | Array substrate and liquid crystal display |
| CN103499906A (en) * | 2013-10-15 | 2014-01-08 | 京东方科技集团股份有限公司 | Array substrate, manufacturing method of array substrate and display device |
| CN104516167A (en) * | 2015-01-20 | 2015-04-15 | 京东方科技集团股份有限公司 | Array baseplate and display device |
| WO2015188394A1 (en) * | 2014-06-12 | 2015-12-17 | 深圳市华星光电技术有限公司 | Thin film transistor array substrate and manufacturing method thereof |
| CN105607369A (en) * | 2016-01-05 | 2016-05-25 | 京东方科技集团股份有限公司 | Array substrate, liquid crystal display panel and display device |
| CN206248978U (en) * | 2016-10-14 | 2017-06-13 | 合肥京东方光电科技有限公司 | A kind of array base palte, display panel and display device |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4385993B2 (en) * | 2005-05-10 | 2009-12-16 | 三菱電機株式会社 | Liquid crystal display device and manufacturing method thereof |
| JP5078416B2 (en) * | 2006-04-27 | 2012-11-21 | キヤノン株式会社 | Reflective liquid crystal display device and substrate for reflective liquid crystal display device |
| US20140063419A1 (en) * | 2012-09-04 | 2014-03-06 | Shenzhen China Star Optoelectronics Technology Co. Ltd. | Display Panel and Liquid Crystal Display Device |
| CN104238207A (en) * | 2014-08-22 | 2014-12-24 | 京东方科技集团股份有限公司 | Array substrate and preparation method thereof as well as display device |
-
2016
- 2016-12-20 CN CN201611188068.2A patent/CN106773394B/en active Active
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH1090702A (en) * | 1996-09-18 | 1998-04-10 | Toshiba Corp | Liquid crystal display device |
| CN101021659A (en) * | 2007-02-26 | 2007-08-22 | 友达光电股份有限公司 | Liquid crystal picture element and producing method thereof and liquid crystal display device |
| CN101221961A (en) * | 2008-01-22 | 2008-07-16 | 友达光电股份有限公司 | Pixel structure and its production method |
| CN201867560U (en) * | 2010-11-08 | 2011-06-15 | 京东方科技集团股份有限公司 | Array substrate and liquid crystal display |
| CN103499906A (en) * | 2013-10-15 | 2014-01-08 | 京东方科技集团股份有限公司 | Array substrate, manufacturing method of array substrate and display device |
| WO2015188394A1 (en) * | 2014-06-12 | 2015-12-17 | 深圳市华星光电技术有限公司 | Thin film transistor array substrate and manufacturing method thereof |
| CN104516167A (en) * | 2015-01-20 | 2015-04-15 | 京东方科技集团股份有限公司 | Array baseplate and display device |
| CN105607369A (en) * | 2016-01-05 | 2016-05-25 | 京东方科技集团股份有限公司 | Array substrate, liquid crystal display panel and display device |
| CN206248978U (en) * | 2016-10-14 | 2017-06-13 | 合肥京东方光电科技有限公司 | A kind of array base palte, display panel and display device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN106773394A (en) | 2017-05-31 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN106773394B (en) | Array substrate, display panel and display device | |
| KR101978326B1 (en) | Array substrate and manufacturing method and driving method therefor, and display device | |
| US9368520B2 (en) | Array substrate, manufacturing method thereof and display device | |
| US10139685B2 (en) | Array substrate, manufacturing method thereof and display device | |
| EP2743766B1 (en) | Manufacturing method for array substrate | |
| US20180246369A1 (en) | Liquid Crystal Display Panel, Manufacturing Method Thereof and Display Device | |
| US9960196B2 (en) | Array substrate, display panel, display device and mask plate | |
| US9116407B2 (en) | Array substrate and manufacturing method thereof and display device | |
| US20120105778A1 (en) | Liquid crystal display device | |
| CN104880871A (en) | Display panel and display device | |
| TWI501014B (en) | Liquid crystal display device | |
| US10141345B2 (en) | Array substrate, manufacturing method thereof, and display device | |
| US9933671B2 (en) | Array substrate, manufacturing method thereof and display device | |
| CN109471279B (en) | Array substrate and liquid crystal display panel | |
| WO2016145978A1 (en) | Array substrate and method for fabrication thereof, and display device | |
| US20160004110A1 (en) | Display panel and method of producing display panel | |
| KR20110081696A (en) | Liquid crystal display panel and a manufacturing method thereof | |
| US9791755B2 (en) | Color filter-on-array substrate, display device, and method for manufacturing the color filter-on-array substrate | |
| US9213208B2 (en) | Liquid crystal display device comprising voltage fluctuations | |
| CN206248978U (en) | A kind of array base palte, display panel and display device | |
| CN107870490B (en) | Display device | |
| KR20130104429A (en) | Liquid crystal display device and method of fabricating the same | |
| KR20170077834A (en) | Display apparatus | |
| CN103534643A (en) | Liquid crystal display device and method for manufacturing same | |
| US20150116605A1 (en) | Display panel |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |