CN113747022B

CN113747022B - Image sensor, camera assembly and mobile terminal

Info

Publication number: CN113747022B
Application number: CN202111055762.8A
Authority: CN
Inventors: 杨鑫
Original assignee: Guangdong Oppo Mobile Telecommunications Corp Ltd
Current assignee: Guangdong Oppo Mobile Telecommunications Corp Ltd
Priority date: 2021-09-09
Filing date: 2021-09-09
Publication date: 2023-05-05
Anticipated expiration: 2041-09-09
Also published as: WO2023035902A1; CN113747022A

Abstract

The application relates to an image sensor, camera subassembly and mobile terminal, wherein, image sensor includes: a pixel array including a plurality of sub-units, the sub-units including two pixel circuits, wherein one pixel circuit includes a plurality of first photoelectric conversion elements, and the other pixel circuit includes a plurality of second photoelectric conversion elements, wherein the pixel circuit is configured to transfer charges generated by at least one of the first photoelectric conversion elements or the at least one of the second photoelectric conversion elements to a corresponding floating diffusion region for accumulation, and output an analog signal corresponding to the accumulated charges in the floating diffusion region; the conversion circuits comprise two analog-to-digital converters respectively connected with the two pixel circuits, and the conversion circuits are used for reading out digital signals converted by analog signals on the basis of a full resolution output mode or a combined output mode together with at least one of the two pixel circuits, so that the imaging device can be suitable for different imaging scenes and can have good imaging quality under different scenes.

Description

Image sensor, camera assembly and mobile terminal

Technical Field

The application relates to the technical field of images, in particular to an image sensor, a camera component and a mobile terminal.

Background

A camera can be arranged in the mobile phone and other terminals to realize a photographing function. An image sensor for receiving light may be disposed in the camera.

As the demand for image sensors increases, techniques for improving the quality of images generated by the image sensors are being developed. The imaging quality of a general image sensor in a highlight scene and a dim light scene is difficult to be compatible.

Disclosure of Invention

The embodiment of the application provides an image sensor, a camera component and a mobile terminal, which can be suitable for different imaging scenes and can have good imaging quality in different scenes.

An image sensor, comprising:

a pixel array comprising a plurality of sub-units, each of the sub-units comprising a plurality of color pixels and a plurality of panchromatic pixels, wherein the color pixels have a narrower spectral response than the panchromatic pixels; wherein the sub-unit comprises two pixel circuits, wherein one pixel circuit comprises a plurality of first photoelectric conversion elements which are arranged in one-to-one correspondence with a plurality of color pixels, and the other pixel circuit comprises a plurality of second photoelectric conversion elements which are arranged in one-to-one correspondence with a plurality of full-color pixels, wherein the pixel circuits are used for transferring charges generated by at least one first photoelectric conversion element or at least one second photoelectric conversion element corresponding to the same color pixels in the sub-unit to a corresponding floating diffusion region for accumulation, and outputting analog signals corresponding to the accumulated charges in the floating diffusion region;

The conversion circuits are respectively connected with the sub-units in a one-to-one correspondence manner, each conversion circuit comprises two analog-to-digital converters respectively connected with the two pixel circuits in a one-to-one correspondence manner, each conversion circuit is used for reading out digital signals converted by the analog signals on the basis of a full resolution output mode or a combined output mode together with at least one of the two pixel circuits, wherein the full resolution output mode is used for reading out the digital signals in units of pixels, and the combined output mode is used for reading out the digital signals in units of at least two pixels with the same color in the sub-units.

A camera assembly, comprising:

a lens; and

The image sensor can receive light rays passing through the lens.

A mobile terminal, comprising:

a housing; and

The camera assembly is combined with the shell.

The image sensor, the camera component and the mobile terminal comprise a pixel array and a plurality of conversion circuits. The pixel array comprises a plurality of sub-units, each sub-unit comprises a plurality of color pixels and a plurality of full-color pixels, each sub-unit comprises two pixel circuits, one pixel circuit comprises a plurality of first photoelectric conversion elements which are arranged in a one-to-one correspondence with the color pixels, the other pixel circuit comprises a plurality of second photoelectric conversion elements which are arranged in a one-to-one correspondence with the plurality of full-color pixels, each pixel circuit is used for transferring charges generated by at least one first photoelectric conversion element or at least one second photoelectric conversion element corresponding to the same color pixels in the sub-unit to a corresponding floating diffusion region for accumulation and outputting analog signals corresponding to the accumulated charges in the floating diffusion region, each conversion circuit comprises two analog-to-digital converters which are respectively connected with the two pixel circuits, and each conversion circuit is used for reading out digital signals after the analog signal conversion based on a full-resolution output mode or a combined output mode together with at least one of the two pixel circuits. That is, the image sensor provided by the application can provide a plurality of output modes, can be suitable for different imaging scenes, and can have good imaging quality under different scenes. For example, when imaging in dim light, a combined output mode may be used to realize combined output in units of at least two pixels with the same color in a subunit, so as to obtain an image with a higher signal-to-noise ratio, and in a scene with more sufficient light, a full resolution output mode may be used to realize separate output in units of pixels, so as to obtain an image with higher definition and higher signal-to-noise ratio.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

FIG. 1 is a schematic diagram of an image sensor in one embodiment;

FIG. 2 is a schematic diagram illustrating an arrangement of a pixel array according to an embodiment;

FIG. 3 is a schematic perspective view of an image sensor according to an embodiment;

FIG. 4 is one of the circuit schematic diagrams of two pixel circuits of a subunit in one embodiment;

FIG. 5 is a schematic diagram of an arrangement of subunits in one embodiment;

FIG. 6 is a second schematic circuit diagram of two pixel circuits of a subunit in one embodiment;

FIG. 7 is a third schematic circuit diagram of two pixel circuits of a subunit in one embodiment;

FIG. 8 is a circuit schematic diagram of two pixel circuits of a subunit in one embodiment;

FIG. 9 is a schematic diagram of a transition of a subunit based on a full resolution output mode in one embodiment;

FIG. 10 is a schematic diagram of a transition of a subunit based on a first stage combined output mode in one embodiment;

FIG. 11 is a schematic diagram of a transition of a subunit based on a second stage combined output mode in one embodiment;

FIG. 12 is a fifth circuit schematic of two pixel circuits of a subunit in one embodiment;

FIG. 13 is a circuit schematic of two pixel circuits of a subunit in one embodiment;

FIG. 14 is a seventh schematic circuit diagram of two pixel circuits of a subunit in one embodiment;

FIG. 15 is a circuit schematic eight of two pixel circuits of a subunit in one embodiment;

FIG. 16 is a schematic view of a camera assembly in one embodiment;

fig. 17 is a schematic diagram of a mobile terminal in one embodiment.

Detailed Description

In order to make the objects, technical solutions and advantages of the present application more apparent, the present application will be further described in detail with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the present application.

It will be understood that the terms "first," "second," and the like, as used herein, may be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another element. For example, a first switching unit may be referred to as a second switching unit, and similarly, a second switching unit may be referred to as a first switching unit, without departing from the scope of the present application. Both the first switching unit and the second switching unit are switching units, but they are not the same switching unit.

As shown in fig. 1, an embodiment of the present application provides an image sensor. The image sensor 10 includes a pixel array 11, a vertical driving unit 12, a control unit 13, a column processing unit 14, and a horizontal driving unit 15.

Among them, the image sensor 10 may employ a complementary metal oxide semiconductor (CMOS, complementary Metal Oxide Semiconductor) photosensitive element or a Charge-coupled Device (CCD) photosensitive element.

As shown in fig. 2, the pixel array 11 includes a plurality of color pixels (for example, A, B, C) and a plurality of full-color pixels W two-dimensionally arranged in an array form (i.e., two-dimensionally matrix-form arrangement). Wherein the color pixels have a narrower spectral response than the panchromatic pixels. Specifically, the color pixels may include one of a first color pixel a, a second color pixel B, and a third color pixel C. The first color pixel a may be a red pixel R; the second color pixel B may be a green pixel G; the third color pixel C may be a blue pixel Bu. The response spectrum of the color pixel is, for example, a portion of the response spectrum of the panchromatic pixel W.

The two-dimensional pixel array 11 includes a plurality of minimum repeating units 110. The minimal repeating units 110 are duplicated and arranged in rows and columns. Illustratively, the pixel array 11 includes, but is not limited to, 4 rows and 4 columns, 6 rows and 6 columns, 8 rows and 8 columns, 10 rows and 10 columns of minimum repeating units 110. Each minimal repeating unit 110 comprises a plurality of subunits 111. Each minimal repeating unit 110 includes, but is not limited to, 2 rows and 2 columns, 3 rows and 3 columns, 4 rows and 4 columns of subunits 111. For example, each minimal repeating unit 110 may include four sub-units 111, wherein one sub-unit 111 includes a plurality of first color pixels a and a plurality of full color pixels W, two sub-units 111 include a plurality of second color pixels B and a plurality of full color pixels W, and the remaining one sub-unit 111 includes a plurality of third color pixels C and a plurality of full color pixels W. Each sub-unit 111 includes a plurality of color pixels and a plurality of full-color pixels W. In the same subunit 111, the color of the plurality of color pixels is the same, that is, the plurality of color pixels are all single color pixels.

Specifically, the minimum repeating unit may be 8 rows and 8 columns of 64 pixels, and the arrangement manner is as follows:

wherein W represents a full-color pixel; a represents a first color pixel of a plurality of color pixels; b represents a second color pixel of the plurality of color pixels; c represents a third color pixel of the plurality of color pixels. The full-color pixels W are disposed in the first diagonal direction D1 and the color pixels are disposed in the second diagonal direction D2.

Specifically, the sub-unit 111 includes m rows and m columns of pixels. Wherein m is a positive integer greater than or equal to 2. Specifically, m may be 2, 3, 4, 5, 6, 8, 10, etc. Specifically, in the sub-unit 111, the full-color pixel W is disposed in the first diagonal direction D1, and the color pixel W is disposed in the second diagonal direction D2. Meanwhile, in the minimum repeating unit 110, the full-color pixels W are disposed in the first diagonal direction D1 and the color pixels are disposed in the second diagonal direction D2. The first diagonal direction D1 is different from the second diagonal direction D2. For example, the first diagonal and the second diagonal are perpendicular.

Alternatively, the color pixels W may be disposed in the first diagonal direction D1 and the full-color pixels may be disposed in the second diagonal direction D2.

Note that the first diagonal direction D1 and the second diagonal direction D2 are not limited to diagonal lines, and include directions parallel to diagonal lines. The term "direction" is not a single direction, but is understood to mean the concept of a straight line which is arranged, and there may be two directions at both ends of the straight line.

The diagonal dot line setting mode provided by the embodiment of the application can be beneficial to balancing the resolution and the color representation of images in the row and column directions, and improves the display effect.

With continued reference to fig. 1 and 2, the vertical driving unit 12 includes a shift register and an address decoder. The vertical drive unit 12 includes a readout scan and a reset scan function. The readout scanning refers to sequentially scanning the unit sub-units 111 line by line, and reading signals from these unit sub-units 111 line by line. For example, the signal output by each subunit 111 in the row of subunits 111 that is selected and scanned is transmitted to the column processing unit 14. The reset scan is used to reset charges, and photo charges of the photoelectric conversion element are discarded, so that accumulation of new photo charges can be started.

For example, the signal processing performed by the column processing unit 14 is Correlated Double Sampling (CDS) processing. In the CDS processing, the reset level and the signal level output from each subunit 111 in the selected subunit 111 row are taken out, and the level difference is calculated. Thus, signals of the subunits 111 in a row are obtained. The column processing unit 14 may have an analog-to-digital (a/D) conversion function for converting an analog pixel signal into a digital format, and a function of performing an averaging operation on a plurality of digital signals after analog-to-digital conversion.

For example, the horizontal driving unit 15 includes a shift register and an address decoder. The horizontal driving unit 15 sequentially scans the pixel array 11 column by column. Each sub-unit 111 column is sequentially processed by the column processing unit 14 by a selection scanning operation performed by the horizontal driving unit 15, and is sequentially output.

For example, the control unit 13 configures timing signals according to an operation mode, and controls the vertical driving unit 12, the column processing unit 14, and the horizontal driving unit 15 to operate cooperatively using various timing signals. Meanwhile, the control unit can also control the on or off state of each switch unit in the image sensor.

As shown in fig. 3, the image sensor further includes a filter array 16 and a microlens array 17. The filter array 16 includes a plurality of filters 161, each filter 161 covering a corresponding one of the pixels. The spectral response of each pixel (i.e., the color of light that the pixel is capable of receiving) is determined by the color of the filter 161 corresponding to that pixel. The color pixels and the panchromatic pixels are distinguished by the wavelength band of light that the filter 161 overlaying them can pass. The microlens array 17 includes a plurality of lenses 171, each lens 171 covering a corresponding one of the sub-units 111, or each lens 171 may cover a corresponding one of the pixels.

As shown in fig. 4, each sub-unit includes two pixel circuits, one of which includes a plurality of first photoelectric conversion elements 1111 disposed in one-to-one correspondence with the color pixels, and the other of which includes a plurality of second photoelectric conversion elements 1111' disposed in one-to-one correspondence with the full-color pixels. The photoelectric conversion element may be a Photodiode (PD) or a clamp Photodiode (Pinned Photodiode, PPD). The photoelectric conversion element is used to convert light into electric charges according to the intensity of the light incident thereon. The number and arrangement of the first photoelectric conversion elements 1111 are the same as those of the color pixels. The number and arrangement of the second photoelectric conversion elements 1111' are the same as those of the full-color pixels.

The pixel circuit is for converting the received optical signal into an electrical signal and supplying the generated electrical signal to the column processing unit 14 shown in fig. 1. Wherein the pixel circuits each comprise a floating diffusion region, wherein pixels of the same color can share the floating diffusion region of the pixel circuit. That is, all color pixels in a subunit may share one floating diffusion region; all panchromatic pixels in a subunit can share another floating diffusion region.

In the embodiment of the present application, the photoelectric conversion element provided corresponding to the full-color pixel may be referred to as a first photoelectric conversion element 1111, and the photoelectric conversion element provided corresponding to the color pixel may be referred to as a second photoelectric conversion element 1111'. For convenience of explanation, in the present embodiment, the photoelectric conversion elements provided corresponding to full-color pixels are referred to as second photoelectric conversion elements 1111', and the photoelectric conversion elements provided corresponding to color pixels are referred to as first photoelectric conversion elements 1111, respectively, are described as an example.

The two pixel circuits may include a first pixel circuit 101 and a second pixel circuit 102. Wherein the first pixel circuit 101 may comprise a first floating diffusion FD1, which first floating diffusion FD1 is common to all the color pixels in the same subunit 111. Specifically, the first pixel circuit 101 is configured to transfer the first charges generated by the first photoelectric conversion element 1111 corresponding to at least one color pixel in the same subunit 111 to the first floating diffusion FD1 for accumulation, and output the first analog signal corresponding to the first charges in the first floating diffusion FD1. The second pixel circuit 102 includes a second floating diffusion FD2, which is common to all the full color pixels in the same subunit 111. That is, the second pixel circuit 102 may transfer the second charges generated by the second photoelectric conversion element 1111' corresponding to at least one full-color pixel to the second floating diffusion FD2 to be accumulated, and output the second analog signal corresponding to the second charges in the second floating diffusion FD2.

With continued reference to fig. 4, the image sensor further includes a plurality of conversion circuits 141. Wherein the conversion circuit 141 may be integrated in the column processing unit 14. Specifically, the plurality of conversion circuits 141 may be connected to the plurality of sub-units 111 in a one-to-one correspondence manner. Specifically, the conversion circuit 141 includes two analog-to-digital converters connected to the two pixel circuits in one-to-one correspondence, respectively. The analog-to-digital converter can convert an analog signal output by the pixel circuit into a digital signal. Further, the conversion circuit 141 may also read out the digital signal converted from the analog signal based on a full resolution output mode or a combined output mode together with at least one of the two pixel circuits.

In the present embodiment, for convenience of explanation, two analog-to-digital converters in the conversion circuit 141 may include a first analog-to-digital converter 1411 and a second analog-to-digital converter 1412. The first analog-to-digital converters 1411 are respectively connected to the first pixel circuits 101 in a one-to-one correspondence manner, the first analog-to-digital converters 1411 are used for converting the first analog signals output by the first pixel circuits 101 into first digital signals, and the second analog-to-digital converters 1412 are used for converting the second analog signals output by the second pixel circuits 102 into second digital signals. The conversion circuit 141 may read out the digital signals converted from the first analog signal and the second analog signal based on a full resolution output mode or a combined output mode together with at least one of the first pixel circuit 101 and the second pixel circuit 102.

Wherein the full resolution output mode is used for reading out the digital signal in units of pixels. The combined output mode is used for reading out the digital signals in units of at least two pixels having the same color in the subunit. Specifically, the combined output mode may read out the digital signal with at least two color pixels having the same color in the sub-unit as a first unit and with at least two full color pixels in the sub-unit as a second unit. In the embodiment of the present application, the merging output mode may be divided into a first-stage merging output mode and a second-stage merging output mode, where the first-stage merging output mode may be understood as: the digital signal is read out in units of pixels having the same color in part of the sub-unit 111. The second stage combined output mode can be understood as: the digital signal is read out in units of pixels all having the same color in the sub-unit 111.

The image sensor in the embodiment of the application comprises a pixel array and a plurality of conversion circuits. The pixel array comprises a plurality of sub-units, each sub-unit comprises a plurality of color pixels and a plurality of full-color pixels, each sub-unit comprises two pixel circuits, one pixel circuit comprises a plurality of first photoelectric conversion elements which are arranged in a one-to-one correspondence with the color pixels, the other pixel circuit comprises a plurality of second photoelectric conversion elements which are arranged in a one-to-one correspondence with the plurality of full-color pixels, each pixel circuit is used for transferring charges generated by at least one first photoelectric conversion element or at least one second photoelectric conversion element corresponding to the same color pixels in the sub-unit to a corresponding floating diffusion region for accumulation and outputting analog signals corresponding to the accumulated charges in the floating diffusion region, each conversion circuit comprises two analog-to-digital converters which are respectively connected with the two pixel circuits, and each conversion circuit is used for reading out digital signals after the analog signal conversion based on a full-resolution output mode or a combined output mode together with at least one of the two pixel circuits. That is, the image sensor provided by the application can provide a plurality of output modes, can be suitable for different imaging scenes, and can have good imaging quality under different scenes. For example, when imaging in dim light, a combined output mode may be used to realize combined output in units of at least two pixels with the same color in a subunit, so as to obtain an image with a higher signal-to-noise ratio, and in a scene with more sufficient light, a full resolution output mode may be used to realize separate output in units of pixels, so as to obtain an image with higher definition and higher signal-to-noise ratio.

With continued reference to fig. 4, the first pixel circuit 101 and the second pixel circuit 102 in fig. 4 may be applied to each sub-unit 111 in the pixel array 11 shown in fig. 2. The operation principle of the pixel circuit will be described with reference to fig. 2 to 4.

The pixel circuit may transfer the charges generated by at least one first photoelectric conversion element 1111 or at least one second photoelectric conversion element 1111' corresponding to the same color pixels in the same sub-unit 111 to the corresponding floating diffusion region for accumulation, and output an analog signal corresponding to the accumulated charges in the floating diffusion region. Each pixel circuit may further include a plurality of transfer transistors and a readout circuit. That is, all color pixels in a subunit may share one floating diffusion region and one readout circuit; all panchromatic pixels W in a subunit can share another floating diffusion region and another readout circuit.

For convenience of description, the transfer transistor included in the first pixel circuit 101 may be referred to as a first transfer transistor 1112, and the readout circuit included in the first pixel circuit 101 may be referred to as a first readout circuit 1113. The transfer transistor included in the second pixel circuit 102 may be referred to as a second transfer transistor 1112', and the readout circuit included in the second pixel circuit 102 may be referred to as a second readout circuit 1113'.

Wherein the number of first transfer transistors 1112 is equal to the number of first photoelectric conversion elements 1111. First ends of the plurality of first transfer transistors 1112 are connected to cathodes of the plurality of first photoelectric conversion elements 1111 one by one, respectively, and anodes of the respective first photodiodes are connected to, for example, ground. A second terminal of each first transfer transistor 1112 is connected to the first floating diffusion FD1. The control terminal of the first transfer transistor 1112 is configured to receive a transfer control signal, and is configured to transfer charges generated by the correspondingly connected first photoelectric conversion element 1111 to the first floating diffusion FD1 under the control of the transfer control signal. In the embodiment of the present application, the charges generated by the plurality of first photoelectric conversion elements 1111 connected thereto correspondingly can be transferred to the first floating diffusion FD1 simultaneously or time-divisionally by the control of the plurality of first transfer transistors 1112 simultaneously.

Accordingly, a second terminal of each second transfer transistor 1112' is connected to the second floating diffusion FD2. The plurality of second transfer transistors 1112 'may transfer charges generated by the corresponding connected plurality of second photoelectric conversion elements 1111' to the second floating diffusion FD2 simultaneously or time-division. In the embodiment of the present application, the working principle of the second transfer transistor 1112' is the same as that of the first transfer transistor 1112, and will not be repeated herein.

Further, each pixel circuit is further configured with a column control line COL, and the analog signal output by the pixel circuit can be transmitted to the conversion circuit 141 through the column control line COL. The readout circuit 1113 includes an input terminal connected to the floating diffusion region and an output terminal connected to the column control line COL, and outputs an analog signal corresponding to the charges transferred into the floating diffusion region to the conversion circuit 141 via the column control line COL.

Fig. 5 is a schematic diagram illustrating an arrangement of pixels in a subunit according to an embodiment of the present application. The sub-unit 111 may be 4 rows and 4 columns of 16 pixels, and the arrangement manner is as follows:

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w represents a full-color pixel; a represents a first color pixel of a plurality of color pixels; the full-color pixels W are disposed in the first diagonal direction D1 and the color pixels are disposed in the second diagonal direction D2.

For convenience of explanation, in the embodiment of the present application, a subunit shown in fig. 5 is taken as an example, where the subunit includes four rows and four columns of 16 pixels. As shown in fig. 6 to 8, eight full-color pixels W and eight color pixels a are included in the sub-unit 111. Specifically, the first pixel circuit 101 may include eight first photoelectric conversion elements 1111, eight first transfer transistors 1112, a first floating diffusion FD1, and a first readout circuit 1113. The first pixel circuit 101 may be further configured with eight first exposure control lines for providing exposure control signals, each of which may be connected to the gates (TG 2, TG4, TG5, TG7, TG10, TG12, TG13, TG 15) of the eight first transfer transistors, respectively. When a pulse of an active level (e.g., VPIX level) is transmitted to the gate of the first transfer transistor 1112 through the first exposure control line, the first transfer transistor 1112 is turned on, and the first transfer transistor 1112 transmits the charge photoelectrically converted by the first photoelectric conversion element 1111 to the corresponding first floating diffusion FD1. The second pixel circuit 102 may include eight second photoelectric conversion elements 1111', eight second transfer transistors 1112', a second floating diffusion FD2, and a second readout circuit 1113'. The second pixel circuit 102 may be further configured with eight second exposure control lines for providing exposure control signals, each of which may be correspondingly connected to gates (TG 1, TG3, TG6, TG8, TG9, TG11, TG14, TG 16) of the eight second transfer transistors 1112'. When a pulse of an active level (e.g., VPIX level) is transmitted to the gate of the second transfer transistor 1112 'through the second exposure control line, the second transfer transistor 1112' is turned on, and the second transfer transistor 1112 'transmits the charge photoelectrically converted by the second photoelectric conversion element 1111' to the corresponding second floating diffusion FD2.

Specifically, the readout circuit 1113 includes a reset transistor 11131, an amplifying transistor 11132 (which may also be referred to as a follower transistor), and a selection transistor 11133. A first terminal of the reset transistor 11131 is connected to the corresponding floating diffusion region, a second terminal of the reset transistor 11131 is configured to receive a reset voltage, and a control terminal of the reset transistor 11131 is configured to receive a reset control signal, and to reset the floating diffusion region according to the reset control signal. A control terminal of the amplifying transistor 11132 is connected to the floating diffusion region, and a first terminal of the amplifying transistor 11132 is connected to a second terminal of the reset transistor 11131, for amplifying charges in the floating diffusion region. A first terminal of the selection transistor 11133 is connected to the second terminal of the amplifying transistor 11132, a second terminal of the selection transistor 11133 is connected to a corresponding column control line COL, and a control terminal of the selection transistor 11133 is configured to receive a selection control signal, and output an analog signal corresponding to the amplified charge to the column control line COL according to the selection control signal, so as to be transmitted to a corresponding analog-to-digital converter via the column control line COL. For convenience of explanation, in the embodiment of the present application, each transistor in the pixel circuit is exemplified as a MOS transistor.

The drain of the reset transistor 11131 is connected to the power supply VPIX. The source of the reset transistor 11131 is connected to the corresponding floating diffusion FD. A pulse of an effective reset level is transmitted to the gate RG of the reset transistor 11131 via the reset line before charge is transferred from the corresponding photoelectric conversion element to the floating diffusion FD, and the reset transistor 11131 is turned on. The reset transistor 11131 resets the floating diffusion FD to the subunit 111 power supply VPIX. The gate of the amplifying transistor 11132 is connected to the corresponding floating diffusion FD. The drain of the amplifying transistor 11132 is connected to the power supply VPIX. After the floating diffusion FD is reset by the reset transistor 11131, the amplifying transistor 11132 outputs a reset level and an analog signal corresponding to electric charges via the selection transistor 11133. After the charge of the photodiode is transferred by the transfer transistor 1113, the amplifying transistor 11132 outputs an analog signal to the column control line COL via the selection transistor 11133 to be transferred into a corresponding analog-to-digital conversion via the column control line COL.

For convenience of explanation, the operation principle of the addition mode in the full resolution output mode and the combined output mode will be described by taking the image sensor as shown in fig. 7 and 8 as an example.

The full-resolution output mode is understood as a digital signal obtained by converting the readout analog signal in pixel units by the conversion circuit 141 together with the two pixel circuits.

Full resolution output mode: in the same exposure time, the gates TG1, TG2 of the transfer transistor 1113 are controlled to be input high, and the charge generated by the pixel A2 is transferred to the first floating diffusion FD1 and the charge generated by the pixel W1 is transferred to the second floating diffusion FD2 in response to the transfer transistor 1113 being turned on. Subsequently, the gates TG1 and TG2 of the transfer transistor 1113 are controlled to input a low level, the corresponding transfer transistor 1113 is turned off, the charges in the first floating diffusion FD1 are amplified by the amplifying transistor 11132, the converted analog signals are input to the first analog-to-digital converter 1411 through the column first column control line COL1, and the digital signals corresponding to the charges generated by the pixel A2 are read after analog-to-digital conversion; the charge in the second floating diffusion FD2 is amplified by the amplifying transistor 11132, and the converted analog signal is input to the second analog-to-digital converter 1412 through the second column control line COL2, and the digital signal corresponding to the charge generated by the pixel W1 is read after analog-to-digital conversion. Next, the gates TG3 and TG4 of the control transfer transistor 1113 are controlled to input high level, and the digital signals corresponding to the charges generated by the pixels W3 and A4 can be read out similarly to the readout of the pixels A2 and W1, and the digital signals corresponding to the charges generated by each pixel in the readout subunit 111 can be correspondingly read out by the same way. The process of reading out the pixel data using the full resolution output mode may be as shown in fig. 9.

The addition mode can be understood as: at least two pixels having the same color in the same sub-unit 111 are read out after analog-digital conversion of the total charge accumulated in the corresponding floating diffusion region. Specifically, the first total charges accumulated in the corresponding floating diffusion region by at least two color pixels in the same subunit 111 are read after analog-to-digital conversion, and the second total charges accumulated in the corresponding floating diffusion region by at least two full-color pixels in the same subunit 111 are read after analog-to-digital conversion.

In the embodiment of the application, the addition mode may be divided into a plurality of different levels of addition modes according to the total charges accumulated in the corresponding floating diffusion regions by n pixels of the same color during the same exposure time. In particular, ton=2, and n=8 (i.e., n=m ² And/2) is described as an example. Wherein when n < m ² And/2, the corresponding level is the first-stage addition mode, namely the first-stage addition mode in the first-stage combined output mode. When n=m ² And/2, the corresponding level is the second-stage addition mode, namely the first-stage addition mode in the second-stage combined output mode.

First-stage addition mode: in the same exposure time, the gates TG1, TG6, TG2, TG5 of the transfer transistors 1113 are controlled to input high level simultaneously, the corresponding transfer transistors 1113 are turned on, charges generated by two color pixels of the pixels A2, A5 are transferred to the first floating diffusion FD1 simultaneously for accumulation, and charges generated by two full-color pixels of the pixels W1, W6 are transferred to the second floating diffusion FD2 for accumulation. Subsequently, the gates TG1, TG6, TG2, TG5 of the transfer transistor 1113 are controlled to simultaneously input a low level, the corresponding transfer transistor 1113 is turned off, the accumulated charges of the first floating diffusion FD1 are amplified by the amplifying transistor 11132, the converted analog signals are input to the first analog-to-digital converter 1411 through the column first column control line COL1, and digital signals corresponding to the accumulated charges of the pixels A2, A5 are read after analog-to-digital conversion; the charges in the second floating diffusion FD2 are amplified by the amplifying transistor 11132, and the converted analog signals are input to the second analog-to-digital converter 1412 through the second column control line COL2, and digital signals corresponding to the charges accumulated and generated by the pixels W1 and W6 are read out after analog-to-digital conversion. By doing so, the digital signal corresponding to the accumulated charges of the two same color pixels in the readout subunit 111 during the same exposure time can be corresponded. In this case, the process of reading out the pixel data using the first-stage addition mode may be as shown in fig. 10.

In the first-stage addition mode, the level signals applied to the gates of the plurality of different transfer transistors may be controlled simultaneously so that the charges of the plurality of pixels of the same color are transferred to the same floating diffusion region. In performing the first-stage addition mode, the resolution of the pixel data read out thereof in the row direction and the column direction is the same for the same subunit.

In one embodiment, the addition mode further comprisesThe method comprises the following steps: all pixels with the same color in the same subunit are read out after analog-digital conversion of the total charge accumulated in the corresponding floating diffusion region. The addition pattern may correspond to n=m ² Second-stage addition mode at/2.

Second-stage addition mode: in the same exposure time, the gates TG2, TG4, TG5, TG7, TG10, TG12, TG13, TG15, TG1, TG3, TG6, TG8, TG9, TG11, TG14, TG16 of the transfer transistors 1113 are controlled to input high levels at the same time, and charges generated by eight color pixels of the pixels A2, A4, A5, A7, a10, a12, a13, a15 are transferred to the first floating diffusion FD1 at the same time to be accumulated, and charges generated by eight full color pixels of the pixels W1, W3, W6, W8, W9, W11, W14, W16 are transferred to the second floating diffusion FD2 to be accumulated. Subsequently, the gates TG2, TG4, TG5, TG7, TG10, TG12, TG13, TG15, TG1, TG3, TG6, TG8, TG9, TG11, TG14, TG16 of the transfer transistor 1113 are controlled to simultaneously input a low level, the corresponding transfer transistor 1113 is turned off, the accumulated charges of the first floating diffusion FD1 are amplified by the amplifying transistor 11132, the converted analog signal is input to the first analog-to-digital converter 1411 through the column control line COL1, and the digital signal corresponding to the accumulated charges of the pixels A2, A4, A5, A7, a10, a12, a13, a15 is read out after analog-to-digital conversion; the charges in the second floating diffusion FD2 are amplified by the amplifying transistor 11132, and the converted analog signals are input to the second analog-to-digital converter 1412 through the second column control line COL2, and digital signals corresponding to the charges accumulated in the pixels W1, W3, W6, W8, W9, W11, W14, and W16 are read out after analog-to-digital conversion. In which the process of reading out the pixel data using the second-stage addition mode can be as shown in fig. 11.

As shown in fig. 12, in one embodiment, the first pixel circuit further includes: a first switching unit having a plurality of first terminals connected to the second terminals of the first transfer transistors 1112, respectively, and a plurality of second terminals connected to the first floating diffusion FD1 and the second floating diffusion FD2, respectively; the first switching unit is used for selectively turning on a transfer path between the second end of any one of the first transfer transistors 1112 and the first floating diffusion FD1 and the second floating diffusion FD2, respectively. The second pixel circuit further includes a second switching unit, wherein first ends of the second switching unit are respectively connected to second ends of the second transfer transistors 1112', and second ends of the second switching unit are respectively connected to the first floating diffusion FD1 and the second floating diffusion FD 2. The second switching unit is configured to selectively turn on a transfer path between a second terminal of any one of the second transfer transistors 1112' and the first floating diffusion FD1 and the second floating diffusion FD2, respectively. In the embodiment of the present application, the transfer transistor 1113 connected to the first photoelectric conversion element 1111 is a first transfer transistor 1112, and the transfer transistor 1113 connected to the second photoelectric conversion element 1111 'is a second transfer transistor 1112'.

In one embodiment, if the sub-unit includes m rows and m columns of pixels, the first switch unit includes m first switches, and a first end of each first switch is connected to a second end of each first transfer transistor 1112, and two second ends of each first switch are connected to the first floating diffusion FD1 and the second floating diffusion FD2, respectively. The second switching unit includes m second switches, first ends of the second switches are respectively connected to second ends of the second transfer transistors 1112', and two second ends of the second switches are respectively connected to the first floating diffusion FD1 and the second floating diffusion FD 2. For convenience of explanation, m=4 is taken as an example. The first unit may include 4 first switches, which may be denoted as first switches S1, S4, S5, S8, respectively, for example. Each first switch is a single pole double throw switch. Specifically, the single terminals of the first switches S1, S4, S5, S8 are respectively connected to the first transfer transistors 1112 of the first row, the first transfer transistors 1112 of the second row, the first transfer transistors 1112 of the third row, and the first transfer transistors 1112 of the fourth row in a one-to-one correspondence manner, and the two selection terminals of the first switches S1, S4, S5, S8 are respectively connected to the first floating diffusion FD1 and the second floating diffusion FD2 in a one-to-one correspondence manner.

The second switching unit may comprise 4 second switches, which may be denoted as second switches S2, S3, S6, S7, respectively, for example. Each first switch is a single pole double throw switch. Correspondingly, the single terminals of the second switches S2, S3, S6, S7 are respectively connected with the second transfer transistors 1112 'of the first row, the second transfer transistors 1112' of the second row, the second transfer transistors 1112 'of the third row, and the second transfer transistors 1112' of the fourth row in a one-to-one correspondence manner, and the two selection terminals of the second switches S2, S3, S6, S7 are respectively connected with the first floating diffusion FD1 and the second floating diffusion FD2 in a one-to-one correspondence manner.

Alternatively, the first switch unit may be a multi-pole multi-throw switch, and the second switch unit may be a multi-pole multi-throw switch. In the embodiment of the present application, the combination of the first switch unit and the second switch unit is not limited to the above-mentioned illustration, but may be a combination of other types of switches.

In one embodiment, the first pixel circuit and the second pixel circuit further configure a first transfer control line and a second transfer control line, wherein a plurality of input ends (for example,

contacts

2, 4, 6, 8) of the first transfer control line are respectively connected with the first switch and the second switch; the output terminal of the first transfer control line is connected to the first floating diffusion FD 1. A plurality of input ends (for example,

contacts

1, 3, 5 and 7) of the second transfer control line are respectively connected with the first switch and the second switch; the output terminal of the second transfer control line is connected to the second floating diffusion FD 2.

For convenience of explanation, the operation principle of the addition mode in the full resolution output mode and the combined output mode will be described by taking the image sensor as shown in fig. 12 as an example.

Full resolution output mode: during the same exposure time, the first switch S1 is controlled to be connected to the contact 2, the second switch S2 is controlled to be connected to the contact 1, the second switch S3 is controlled to be connected to the contact 3, the first switch S4 is controlled to be connected to the contact 4, the first switch S5 is controlled to be connected to the contact 6, the second switch S6 is controlled to be connected to the contact 5, the second switch S7 is controlled to be connected to the contact 7, and the first switch S8 is controlled to be connected to the contact 8. The readout of the data of the charges generated by the respective pixels in the sub-unit 111 may refer to the full resolution output mode in the foregoing embodiment, and will not be described here again.

First addition mode in the merged output mode: during the same exposure time, the first switch S1 is controlled to be connected to the contact 2, the second switch S2 is controlled to be connected to the contact 1, the second switch S3 is controlled to be connected to the contact 3, the first switch S4 is controlled to be connected to the contact 4, the first switch S5 is controlled to be connected to the contact 6, the second switch S6 is controlled to be connected to the contact 5, the second switch S7 is controlled to be connected to the contact 7, and the first switch S8 is controlled to be connected to the contact 8. The data readout of the charges accumulated in at least two pixels of the same color in the sub-unit 111 may refer to the addition mode in the foregoing embodiment, and will not be described here again.

As shown in fig. 13, in one embodiment, the conversion circuit 141 further includes a third switch unit 1413, where a first end of the third switch unit 1413 is connected to an output terminal of one of the analog-to-digital converters, and a second end of the third switch unit 1413 is connected to an output terminal of the other analog-to-digital converter. The third switch unit 1413 may include a switch S10, where a first terminal of the switch S10 is configured to be connected to an output terminal of the first analog-to-digital converter 1411, and a second terminal of the switch S10 is configured to be connected to an output terminal of the second analog-to-digital converter 1412. When the third switching unit 1413 is turned on, the first digital signal output from the first analog-to-digital converter 1411 and the second digital signal output from the second analog-to-digital converter may be digitally averaged.

Based on the image sensor as described in fig. 13, the conversion circuit 141 is further configured to read out the digital signal converted from the analog signal based on the full resolution output mode or the combined output mode together with the first pixel circuit and the second pixel circuit. Wherein the combined output mode may further include a digital average mode and a first mixed mode in addition to the addition mode in the foregoing embodiments.

The digital average mode can be understood as: each charge generated by time-sharing at least two pixels with the same color in the same subunit 111 is respectively subjected to analog-to-digital conversion, and each converted digital signal is averaged and then read out. Specifically, the digital average mode can also be understood as: each charge generated in time division of at least two color pixels in the same subunit 111 is respectively subjected to analog-to-digital conversion, and each converted digital signal is averaged and then read out, and each charge generated in time division of at least two full-color pixels in the same subunit 111 is respectively subjected to analog-to-digital conversion, and each converted digital signal is averaged and then read out. Wherein the digital average mode may be one of the first stage combined output modes.

The first hybrid mode can be understood as: a first digital signal output after analog-to-digital conversion of a first analog signal accumulated in the floating diffusion region of a first part of pixels in the same subunit 111, and a second digital signal output after analog-to-digital conversion of a second analog signal accumulated in the floating diffusion region of a second part of pixels in the same subunit 111 are averaged and read out; wherein the first partial pixels and the second partial pixels are the same in color, and the total number of pixels of all partial pixels is equal to the total number of the color pixels or the full-color pixels. Wherein the first mixed mode may be one of the second stage combined output modes.

For convenience of explanation, the operation principle of the digital average mode and the first hybrid mode will be described by taking the image sensor as shown in fig. 13 as an example.

Digital average mode: the first switch S1 is controlled to be connected to the contact 2, the second switch S2 is connected to the contact 2, the second switch S3 is connected to the contact 3, the first switch S4 is connected to the contact 3, the first switch S5 is connected to the contact 6, the second switch S6 is connected to the contact 5, the second switch S7 is connected to the contact 7, the first switch S8 is connected to the contact 7, and the switch S10 is controlled to be turned on. In the same exposure time, the gates TG2, TG5 of the transfer transistor 1113 are controlled to be input high, and the charge generated by the pixel A2 is transferred to the first floating diffusion FD1 and the charge generated by the pixel A5 is transferred to the second floating diffusion FD2 in response to the transfer transistor 1113 being turned on. Subsequently, the gates TG2 and TG5 of the transfer transistor 1113 are controlled to input a low level, the corresponding transfer transistor 1113 is turned off, the charges in the first floating diffusion FD1 are amplified by the amplifying transistor 11132, the converted analog signals are input to the first analog-to-digital converter 1411 through the column first column control line COL1, and the first digital signals corresponding to the charges generated by the pixel A2 are read after analog-to-digital conversion; the charges in the second floating diffusion FD2 are amplified by the amplifying transistor 11132, and the converted analog signal is input to the second analog-to-digital converter 1412 through the second column control line COL2, and the second digital signal corresponding to the charges generated by the pixel A5 is read after analog-to-digital conversion. After being connected through the switch S10, the digital average (digital average) signal of the first digital signal and the second digital signal can be correspondingly output. Other color pixels in the sub-unit can also read out their corresponding digital average signals by using the digital average mode, and full-color pixels in the sub-unit can also read out their corresponding digital average signals by using the digital average mode, which is not described herein. The process of reading out the pixel data using the digital average mode may be as shown in fig. 10.

First hybrid mode: the first switch S1 is controlled to be connected to the contact 2, the second switch S2 is connected to the contact 2, the second switch S3 is connected to the contact 4, the first switch S4 is connected to the contact 4, the first switch S5 is connected to the contact 6, the second switch S6 is connected to the contact 5, the second switch S7 is connected to the contact 7, the first switch S8 is connected to the contact 7, and the switch S10 is controlled to be turned on. In the same exposure time, the gates TG2, TG4, TG5, TG7, TG10, TG12, TG13, TG15 of the transfer transistors 1113 are controlled to input high level simultaneously, the corresponding transfer transistors 1113 are turned on, charges generated by the four color pixels of the pixels A2, A4, A5, A7 are transferred to the first floating diffusion FD1 simultaneously for accumulation, and charges generated by the pixels a10, a12, a13, a15 are transferred to the second floating diffusion FD2 for accumulation. Subsequently, the gates TG2, TG4, TG5, TG7, TG10, TG12, TG13, TG15 of the transfer transistor 1113 are controlled to simultaneously input low level, the corresponding transfer transistor 1113 is turned off, the accumulated charges of the first floating diffusion FD1 are amplified by the amplifying transistor 11132, the converted analog signal is input to the first analog-to-digital converter 1411 through the column first column control line COL1, and the second digital signal corresponding to the accumulated charges of the pixels A2, A4, A5, A7 is read after analog-to-digital conversion; the charges in the second floating diffusion FD2 are input to the second analog-to-digital converter 1412 through the second column control line COL2 after being amplified by the amplifying transistor 11132, and the second digital signals corresponding to the charges accumulated and generated by the pixels a10, a12, a13, a15 are read out after analog-to-digital conversion. After being connected through the switch S10, the digital average (digital average) signal of the first digital signal and the second digital signal can be correspondingly output. Based on the aforementioned first mixed mode, a digital average signal corresponding to the electric charges accumulated in the eight full-color pixels in the readout subunit 111 during the same exposure time can be corresponded. The process of reading out the pixel data using the first mixed mode may be as shown in fig. 11.

As shown in fig. 14 and 15, in one embodiment, the conversion circuit 141 further includes a fourth switching unit 1414. Wherein, a first end of the fourth switch unit 1414 is connected with the readout circuit 1113 of the first pixel circuit, and a second end of the fourth switch unit 1414 is connected with the readout circuit 1113 of the second pixel circuit. In particular, the fourth switching unit 1414 may include a switch S9. Wherein a first terminal of the switch S9 is connected to a first terminal of the selection transistor 11133 in the first readout circuit 1113, and a second terminal of the switch S9 is connected to a first terminal of the selection transistor 11133 in the second readout circuit 1113'. The fourth switching unit 1414 is used in the embodiment of the present application to select whether to turn on or off the average path between the two readout circuits 1113. That is, when the fourth switching unit 1414 turns on the averaging path between the first readout circuit 1113 and the second readout circuit 1113', the first analog signal output by the first readout circuit 1113 and the second analog signal output by the second readout circuit 1113' may be analog-averaged.

Based on the image sensor as described in fig. 14 and 15, the conversion circuit 141 may also read out the digital signal converted from the analog signal based on the full resolution output mode or the combined output mode together with the first pixel circuit 101 and the second pixel circuit 102. Wherein the combined output mode may further include an analog average mode and a second mixed mode in addition to the addition mode in the previous embodiment.

The analog average mode is: and averaging the charge numbers generated by time sharing of at least two pixels with the same color in the same subunit corresponding to the two analog signals, and reading out after analog-to-digital conversion. Wherein the analog average mode may be one of the first stage combined output modes.

The second mixing mode is: averaging the first analog signals accumulated in the floating diffusion area by the first part of pixels in the same subunit and the second analog signals accumulated in the floating diffusion area by the second part of pixels in the same subunit, and reading out after analog-to-digital conversion; wherein the first partial pixels and the second partial pixels are the same in color, and the total number of pixels of all partial pixels is equal to the total number of the color pixels or the full-color pixels. Wherein the second mixed mode may be one of the second stage combined output modes.

For convenience of explanation, the operation principle of the analog average mode and the second hybrid mode will be explained by taking the image sensor as shown in fig. 14 and 15 as an example.

Analog average mode: the first switch S1 is controlled to be connected to the contact 2, the second switch S2 is connected to the contact 2, the second switch S3 is connected to the contact 3, the first switch S4 is connected to the contact 3, the first switch S5 is connected to the contact 6, the second switch S6 is connected to the contact 6, the second switch S7 is connected to the contact 7, the first switch S8 is connected to the contact 7, and the switch S9 is controlled to be turned on. If the image sensor includes a switch S10, the switch S10 is controlled to be turned off. In the same exposure time, the gates TG1, TG6 of the transfer transistor 1113 are controlled to be input high, and the charge generated by the pixel W1 is transferred to the first floating diffusion FD1 and the charge generated by the pixel W6 is transferred to the second floating diffusion FD2 in response to the transfer transistor 1113 being turned on. The gates TG1, TG6 of the transfer transistor 1113 are controlled to input a low level, corresponding to the transfer transistor 1113 being turned off, the charge in the first floating diffusion FD1 is converted into a first analog signal after passing through the amplifying transistor 11132, and the charge in the second floating diffusion FD2 is converted into a second analog signal after passing through the amplifying transistor 11132. Since the switch S9 is connected to the first readout circuit 1113 and the second readout circuit 1113', the first Analog signal and the second Analog signal may be output through the first Analog-to-digital converter 1411 or the second Analog-to-digital converter 1412 after Analog averaging (Analog average). Other panchromatic pixels and color pixels in the subunit 111 may also use this analog averaging mode to read out the digital average signal corresponding to the analog average signal, which is not described herein again. The process of reading out the pixel data using the analog average mode may be as shown in fig. 10.

Second hybrid mode: the first switch S1 is controlled to be connected to the contact 2, the second switch S2 is connected to the contact 2, the second switch S3 is connected to the contact 4, the first switch S4 is connected to the contact 4, the first switch S5 is connected to the contact 5, the second switch S6 is connected to the contact 5, the second switch S7 is connected to the contact 7, the first switch S8 is connected to the contact 7, and the switch S9 is controlled to be turned on. If the image sensor includes a switch S10, the switch S10 is controlled to be turned off. In the same exposure time, the gates TG1, TG3, TG6, TG8, TG9, TG11, TG14, TG16 of the transfer transistors 1113 are controlled to input high level simultaneously, the corresponding transfer transistors 1113 are turned on, charges generated by four full-color pixels of the pixels W1, W3, W6, W8 are transferred to the first floating diffusion FD1 simultaneously for accumulation, and charges generated by the pixels W9, W11, W14, W16 are transferred to the second floating diffusion FD2 for accumulation. Subsequently, the gates TG1, TG3, TG6, TG8, TG9, TG11, TG14, TG16 of the transfer transistor 1113 are controlled to be simultaneously input with a low level, and the corresponding transfer transistor 1113 is turned off, the charges in the first floating diffusion FD1 are converted into a first analog signal after passing through the amplifying transistor 11132, and the charges in the second floating diffusion FD2 are converted into a second analog signal after passing through the amplifying transistor 11132. Since the switch S9 is connected to the first readout circuit 1113 and the second readout circuit 1113', the first Analog signal and the second Analog signal may be output through the first Analog-to-digital converter 1411 or the second Analog-to-digital converter 1412 after Analog averaging (Analog average). All color pixels in the subunit 111 may also use the second mixed mode to read out the digital average signal corresponding to the analog average signal, which is not described herein. The process of reading out the pixel data using the second mixed mode may be as shown in fig. 11.

Based on the image sensor as described in fig. 15, the conversion circuit 141 may also read out the digital signal converted from the analog signal based on the full resolution output mode or the combined output mode together with the first pixel circuit and the second pixel circuit. Wherein the combined output mode includes a third mixed mode in addition to the addition mode, the analog average mode, the digital average mode, the first mixed mode, and the second mixed mode in the foregoing embodiments.

The third hybrid mode is: averaging a first analog signal accumulated in the floating diffusion area by a first sub-part pixel in the same subunit and a second analog signal accumulated in the floating diffusion area by a second sub-part pixel in the same subunit, and outputting a first digital signal through analog-to-digital conversion; the third analog signals accumulated in the floating diffusion area by the third sub-part pixels in the same sub-unit and the fourth analog signals accumulated in the floating diffusion area by the fourth sub-part pixels in the same sub-unit are averaged, a second digital signal is output through analog-to-digital conversion, and the first digital signal and the second digital signal are read after being averaged; wherein the first sub-portion pixel, the second sub-portion pixel, the third sub-portion pixel, the fourth sub-portion pixel are the same color, and the total number of pixels of all sub-portion pixels is equal to the total number of the color pixels or the full-color pixels. The third mixed mode may be one of the second stage combined output modes.

For convenience of explanation, the operation principle of the third hybrid mode will be explained taking an image sensor as shown in fig. 15 as an example.

Third hybrid mode: the first switch S1 is controlled to be connected to the contact 2, the second switch S2 is connected to the contact 2, the second switch S3 is connected to the contact 4, the first switch S4 is connected to the contact 4, the first switch S5 is connected to the contact 5, the second switch S6 is connected to the contact 5, the second switch S7 is connected to the contact 7, the first switch S8 is connected to the contact 7, and the switch S9 is controlled to be turned on, and the switch S10 is controlled to be turned on. In the first exposure time, the gates TG1, TG3, TG9, TG11 of the transfer transistors 1113 are controlled to input high level at the same time, the corresponding transfer transistors 1113 are turned on, charges generated by two full-color pixels of the pixels W1, W3 are transferred to the first floating diffusion FD1 at the same time to accumulate, and charges generated by two full-color pixels of the pixels W9, W11 are transferred to the second floating diffusion FD2 to accumulate. Subsequently, the gates TG1, TG3, TG9, TG11 of the transfer transistor 1113 are controlled to be simultaneously input with a low level, and the charge in the first floating diffusion FD1 is converted into a first analog signal after passing through the amplifying transistor 11132, and the charge in the second floating diffusion FD2 is converted into a second analog signal after passing through the amplifying transistor 11132, corresponding to the off state of the transfer transistor 1113. Since the switch S9 connects the first readout circuit 1113 and the second readout circuit 1113', the on state of the selection amplifier can be controlled so that the analog signal after analog averaging outputs the first digital signal through the first analog-to-digital converter 1411. Then, after the reset transistor 11131 is reset at a high level, the charges in the first floating diffusion FD1 and the second floating diffusion FD2 are cleared. In the second exposure time, the gates TG6, TG8, TG14, TG16 of the transfer transistors 1113 are controlled to input high level simultaneously, the corresponding transfer transistors 1113 are turned on, charges generated by two full-color pixels of the pixels W6, W8 are transferred to the first floating diffusion FD1 simultaneously for accumulation, and charges generated by two full-color pixels of the pixels W14, W16 are transferred to the second floating diffusion FD2 for accumulation. Subsequently, the gates TG6, TG8, TG14, TG16 of the transfer transistor 1113 are controlled to be simultaneously inputted with a low level, and the charge in the first floating diffusion FD1 is converted into a third analog signal after passing through the amplifying transistor 11132, and the charge in the second floating diffusion FD2 is converted into a fourth analog signal after passing through the amplifying transistor 11132, corresponding to the turn-off of the transfer transistor 1113. Since the switch S9 connects the first readout circuit 1113 and the second readout circuit 1113', the on state of the selection amplifier can be controlled so that the analog signal after analog averaging outputs a second digital signal through the second analog-to-digital converter 1412. Since the switch S10 is connected, a digital average (digital average) signal of the first digital signal and the second digital signal can be outputted correspondingly. The color pixels in the sub-units may also read out their corresponding digital average signals using such a digital average pattern. Here, the description is omitted. The process of reading out the pixel data using the third mixed mode may be as shown in fig. 11.

The image sensor in the embodiment of the application can support the readout of the charge data of each pixel in each subunit in the full-resolution output mode, the first-stage combined output mode or the second-stage combined output mode, can expand the flexibility of the output mode of the image sensor, and can be further suitable for more use scenes. In the process of performing the readout control of the charge data of each pixel in each subunit in the full-resolution output mode, the first-stage combined output mode, or the second-stage combined output mode, the control logic is not limited to the above-described example, and it is only necessary to satisfy that the resolution in the row direction and the column direction of the pixel data read out for each pixel in the same subunit based on the full-resolution output mode, the first-stage combined output mode, or the second-stage combined output mode is the same.

For example, for a picture taking scene, when it is desired to capture an image of a high definition scene (e.g., a scene with a relatively high texture, such as grass, etc.) or a highlight scene (e.g., outdoors on a sunny day), the image sensor may be controlled to read out data of the pixel array in a full resolution mode for full-size picture taking. When an image of a low-brightness scene (for example, an indoor scene or outdoors on a cloudy day) needs to be acquired, the image sensor can be controlled to read out data of the pixel array in a medium-resolution output mode (for example, a first-stage merging output mode) so as to take pictures; when an image of a dim light scene (e.g., night) needs to be acquired, the image sensor may be controlled to read out data of the pixel array in an output mode (e.g., second-stage merge output mode) with a high light input amount and a high signal-to-noise ratio for picture taking.

For example, for a video shooting scene, when 4K2K video needs to be shot, switching to a first-stage merging output mode to read out data of the pixel array; when 1080P video is required to be shot, the data of the pixel array can be read out by switching to the second-stage merging output mode. And for the general preview mode, the data of the pixel array can be read out by adopting the second-stage combined output mode.

As shown in fig. 16, the embodiment of the application further provides a camera assembly. The camera assembly 20 includes the image sensor 10 and the lens 21 according to any of the embodiments of the present application. The lens 21 is used for imaging onto the image sensor 10, for example, light of a subject is imaged onto the image sensor 10 through the lens 21, and the image sensor 10 is disposed on a focal plane of the lens 21. The camera assembly 20 may also include a circuit component 22. The circuit unit 22 is used for acquiring power and transmitting data to the outside, for example, the circuit unit may be connected to an external power source to acquire power, or may be connected to a memory or a processor to transmit image data or control data.

The camera assembly 20 may be disposed on the back of the mobile phone to serve as a rear camera. It will be appreciated that the camera assembly 20 may also be provided on the front of the handset as a front facing camera.

As shown in fig. 17, the embodiment of the application further provides a mobile terminal. The mobile terminal 100 includes a camera assembly 20 and a housing 80 of any of the embodiments of the present application. Camera head assembly 20 is coupled to housing 80. Specifically, the camera assembly 20 is disposed on the housing 80, the housing 80 includes a middle frame and a back plate, and the camera assembly 20 is fixedly disposed on the middle frame or the back plate.

The mobile terminal 100 also includes a processor and a memory connected by a system bus. Wherein the processor is configured to provide computing and control capabilities to support operation of the entire electronic device. The memory may include a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides a cached operating environment for operating system computer programs in the non-volatile storage medium. The electronic device may be any terminal device such as a mobile phone, a tablet computer, a PDA (PeAsonalDigital Assistant, personal digital assistant), a POS (Point of Sales), a car-mounted computer, and a wearable device.

The above examples only represent a few embodiments of the present application, which are described in more detail and are not to be construed as limiting the scope of the present application. It should be noted that it would be apparent to those skilled in the art that various modifications and improvements could be made without departing from the spirit of the present application, which would be within the scope of the present application. Accordingly, the scope of protection of the present application is to be determined by the claims appended hereto.

Claims

1. An image sensor, comprising:

a pixel array including a plurality of minimum repeating units including a plurality of sub-units each including a plurality of color pixels and a plurality of full-color pixels, in which the full-color pixels are disposed in a first diagonal direction and the color pixels are disposed in a second diagonal direction, in which the full-color pixels are disposed in the first diagonal direction and the color pixels are disposed in the second diagonal direction; the diagonal direction also includes a diagonal and a direction parallel to the diagonal; wherein the color pixels have a narrower spectral response than the panchromatic pixels; wherein the sub-unit comprises two pixel circuits, one pixel circuit comprises a plurality of first photoelectric conversion elements which are arranged in one-to-one correspondence with the color pixels, and the other pixel circuit comprises a plurality of second photoelectric conversion elements which are arranged in one-to-one correspondence with the full-color pixels, wherein the pixel circuits are used for transferring charges generated by at least one first photoelectric conversion element or at least one second photoelectric conversion element of the sub-unit to a corresponding floating diffusion region for accumulation and outputting analog signals corresponding to the accumulated charges in the floating diffusion region;

2. The image sensor of claim 1, wherein two of the pixel circuits comprise:

a first pixel circuit including a first floating diffusion region common to all of the color pixels in the same sub-unit;

a second pixel circuit including a second floating diffusion region common to all of the panchromatic pixels in the same subunit.

3. The image sensor of claim 2, wherein the image sensor further comprises a sensor element,

the first pixel circuit is used for transferring first charges generated by at least one first photoelectric conversion element in the same subunit to a first floating diffusion region for accumulation and outputting a first analog signal corresponding to the first charges in the first floating diffusion region;

The second pixel circuit is used for transferring second charges generated by at least one second photoelectric conversion element in the same subunit to a second floating diffusion region for accumulation and outputting a second analog signal corresponding to the second charges in the second floating diffusion region;

the two analog-to-digital converters comprise a first analog-to-digital converter and a second analog-to-digital converter, wherein the first analog-to-digital converters are respectively connected with the first pixel circuits in a one-to-one correspondence manner, and the second analog-to-digital converters are respectively connected with the second pixel circuits in a one-to-one correspondence manner; the conversion circuit reads out the digital signals converted by the first analog signal and the second analog signal based on a full resolution output mode or a combined output mode together with the first pixel circuit and the second pixel circuit.

4. The image sensor of claim 2, wherein each of the pixel circuits is configured with a column control line, wherein the pixel circuit comprises:

the first ends of the transfer transistors are connected with the photoelectric conversion elements which are correspondingly arranged, the control ends of the transfer transistors are used for receiving transfer control signals, and the transfer transistors are used for transferring charges generated by the photoelectric conversion elements to the floating diffusion areas under the control of the transfer control signals;

And the readout circuit comprises an input end and an output end, wherein the input end is connected with the floating diffusion region, and the output end is connected with the column control line and is used for outputting charges transferred into the floating diffusion region to the conversion circuit through the column control line.

5. The image sensor of claim 4, wherein the first pixel circuit further comprises: the first ends of the first switch units are respectively connected with the second ends of the first transfer transistors, and the second ends of the first switch units are respectively connected with the first floating diffusion region and the second floating diffusion region;

the second pixel circuit further comprises a second switch unit, wherein a plurality of first ends of the second switch unit are respectively connected with the second ends of the second transfer transistors, and a plurality of second ends of the second switch unit are respectively connected with the first floating diffusion region and the second floating diffusion region; the transfer transistor connected with the first photoelectric conversion element is the first transfer transistor, and the transfer transistor connected with the second photoelectric conversion element is the second transfer transistor.

6. The image sensor of claim 5, wherein the sub-unit comprises m rows and m columns of pixels, wherein the panchromatic pixels are disposed in a first diagonal direction and the color pixels are disposed in a second diagonal direction, the first diagonal direction being different from the second diagonal direction; m is an integer greater than or equal to 2.

7. The image sensor of claim 6, wherein the first switch unit includes m first switches, first ends of the first switches are respectively connected to second ends of the first transfer transistors, and two second ends of the first switches are respectively connected to first and second floating diffusion regions;

the second switch unit comprises m second switches, first ends of the second switches are respectively connected with second ends of the second transfer transistors, and two second ends of the second switches are respectively connected with the first floating diffusion region and the second floating diffusion region.

8. The image sensor of claim 6, wherein the sub-unit is 4 rows and 4 columns of 16 pixels arranged in the following manner:

where W represents a full-color pixel and a represents a color pixel.

9. The image sensor of any one of claims 1-8, wherein the combined output mode comprises an add mode, wherein,

the addition mode is as follows: and performing analog-digital conversion on the total charges accumulated in the corresponding floating diffusion regions by at least two pixels with the same color in the same subunit, and then reading out.

10. The image sensor of claim 9, wherein the addition mode is: all pixels with the same color in the same subunit are read out after analog-digital conversion of the total charge accumulated in the corresponding floating diffusion region.

11. The image sensor of claim 5, wherein the conversion circuit further comprises a third switching unit, a first end of the third switching unit being connected to an output of one of the analog-to-digital converters, and a second end of the third switching unit being connected to an output of the other of the analog-to-digital converters.

12. The image sensor of claim 10, wherein the combined output mode further comprises a digital average mode or a first mixed mode, wherein,

the digital average mode is: respectively carrying out analog-digital conversion on each charge generated by time-sharing of two pixels with the same color in the same subunit, and carrying out average and reading out on each converted digital signal;

The first mixing mode is: the method comprises the steps of carrying out analog-to-digital conversion on a first analog signal accumulated in a floating diffusion area by a first part of pixels in the same subunit to obtain a first digital signal, carrying out analog-to-digital conversion on a second analog signal accumulated in the floating diffusion area by a second part of pixels in the same subunit to obtain a second digital signal, and carrying out average and then reading; wherein the first partial pixels and the second partial pixels are the same in color, and the total number of pixels of all partial pixels is equal to the total number of the color pixels or the full-color pixels.

13. The image sensor according to claim 5 or 11, wherein the conversion circuit further comprises:

and the first end of the fourth switch unit is connected with the readout circuit of the first pixel circuit, and the second end of the fourth switch unit is connected with the readout circuit of the second pixel circuit and is used for selectively switching on or switching off an average path between the two readout circuits.

14. The image sensor of claim 13, wherein the readout circuitry comprises:

the first end of the reset transistor is connected with the corresponding floating diffusion region, the second end of the reset transistor is used for receiving a reset voltage, and the control end of the reset transistor is used for receiving a reset control signal and resetting the floating diffusion region according to the reset control signal;

An amplifying transistor, a control end of the amplifying transistor is connected with the floating diffusion region, and a first end of the amplifying transistor is connected with a second end of the reset transistor and is used for amplifying charges in the floating diffusion region;

a selection transistor, a first end of which is connected with a second end of the amplifying transistor, a second end of which is connected with a corresponding column control line, a control end of which is used for receiving a selection control signal and outputting amplified charges to the column control line according to the selection control signal; wherein,,

the first end of the fourth switching unit is connected with the first end of the selection transistor in the first pixel circuit, and the second end of the fourth switching unit is connected with the first end of the selection transistor in the second pixel circuit.

15. The image sensor of claim 13, wherein when the image sensor includes a third switching unit, the combined output mode further includes an analog average mode, a second mixed mode, and a third mixed mode, wherein,

the analog average mode is: each charge number generated by time sharing of two pixels with the same color in the same subunit is averaged to correspond to two analog signals, and the two analog signals are read out after analog-to-digital conversion;

The second mixing mode is: averaging the first analog signals accumulated in the floating diffusion area by the first part of pixels in the same subunit and the second analog signals accumulated in the floating diffusion area by the second part of pixels in the same subunit, and reading out after analog-to-digital conversion; wherein the first partial pixels and the second partial pixels are the same in color, and the total number of pixels of all partial pixels is equal to the total number of the color pixels or the full-color pixels;

the third hybrid mode is: averaging a first analog signal accumulated in the floating diffusion area by a first sub-part pixel in the same subunit and a second analog signal accumulated in the floating diffusion area by a second sub-part pixel in the same subunit, and outputting a first digital signal through analog-to-digital conversion; the third analog signals accumulated in the floating diffusion area by the third sub-part pixels in the same sub-unit and the fourth analog signals accumulated in the floating diffusion area by the fourth sub-part pixels in the same sub-unit are averaged, a second digital signal is output through analog-to-digital conversion, and the first digital signal and the second digital signal are read after being averaged; wherein the first sub-portion pixel, the second sub-portion pixel, the third sub-portion pixel, the fourth sub-portion pixel are the same color, and the total number of pixels of all sub-portion pixels is equal to the total number of the color pixels or the full-color pixels in the sub-unit.

16. The image sensor of claim 1, wherein the two-dimensional array of pixels comprises a plurality of minimal repeating units of 8 rows and 8 columns of 64 pixels arranged in a manner:

where W represents a full-color pixel, and A, B and C each represent a color pixel.

17. A camera assembly, comprising:

a lens; and

The image sensor of any one of claims 1-16, being capable of receiving light rays passing through the lens.

18. A mobile terminal, comprising:

a housing; and

The camera assembly of claim 17, the camera assembly being coupled to the housing.