CN113743042A - Coordinate rotation digital calculation method and system based on high-level comprehensive tool - Google Patents
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Abstract
The invention provides a coordinate rotation digital calculation method and a system based on a high-level synthesis tool for overcoming the defect that a cordic algorithm cannot be implemented on an FPGA lacking an FPU module, wherein the method comprises the following steps: adopting a high-level language to construct a coordinate rotation digital calculation model based on a long integer operation; converting the coordinate rotation digital calculation model by adopting a high-level comprehensive tool; and simulating the converted coordinate rotation digital calculation model through the FPGA to complete the coordinate rotation digital calculation. Before the coordinate rotation digital calculation model is configured to the FPGA, the operation operations of the trigonometric function, the hyperbolic curve, the exponent and the logarithm are constructed into the coordinate rotation digital calculation model based on the long integer operation, and then the coordinate rotation digital calculation model is configured to the FPGA through a high-level comprehensive tool, so that the floating point operation can be performed on the FPGA without an FPU module.
Description
Technical Field
The invention relates to the technical field of digital processing, in particular to a coordinate rotation digital calculation method and system based on a high-level synthesis tool.
Background
The cordic algorithm (Coordinate Rotation Digital Computer) is mainly applied to the calculation of trigonometric functions, hyperbolas, exponents and logarithms. The cordic algorithm replaces multiplication operations with the computation of basic addition and shift, so that the rotation and orientation computation of vectors does not require exponentiation, evolution, multiplication, etc.
For the implementation of the floating-Point operation in hardware in the cordic algorithm, conventionally, a floating-Point Unit (FPU) on an FPGA (Field Programmable Gate Array) is used, but the floating-Point operation cannot be performed for an FPGA without an FPU module.
Disclosure of Invention
The invention provides a coordinate rotation digital calculation method and system based on a high-level synthesis tool, aiming at overcoming the defect that the cordic algorithm cannot be implemented on an FPGA lacking an FPU module in the prior art.
In order to solve the technical problems, the technical scheme of the invention is as follows:
a coordinate rotation digital calculation method based on a high-level synthesis tool comprises the following steps:
s1: adopting a high-level language to construct a coordinate rotation digital calculation model based on long integer arithmetic, wherein the coordinate rotation digital calculation model comprises arithmetic operations on a trigonometric function, a hyperbola, an index and a logarithm;
s2: converting the coordinate rotation digital calculation model by adopting a high-level comprehensive tool;
s3: and simulating the converted coordinate rotation digital calculation model through the FPGA to complete the coordinate rotation digital calculation.
Preferably, the step of constructing the coordinate rotation digital computation model based on the long integer arithmetic comprises the following steps:
1) converting the floating point number to a 64-bit long integer number;
2) converting floating-point operation into long integer operation;
3) setting the type of a trigonometric function and the output precision thereof;
4) and modifying and outputting the target trigonometric function type by modifying the enumeration type, and adjusting the output precision by modifying the iteration times.
Preferably, the step of converting the coordinate rotation digital computation model by using a high-level synthesis tool includes: and converting the coordinate rotation digital calculation model constructed by adopting a high-level language into an LLVM-IR intermediate expression file, configuring the LLVM-IR intermediate expression file through a Lua script file, and converting the LLVM-IR intermediate expression file into the coordinate rotation digital calculation model expressed by a low-level language.
Preferably, the step of configuring the LLVM-IR intermediate expression file by the Lua script file includes:
performing high-level general optimization on the LLVM-IR intermediate expression file;
and performing high-level comprehensive transformation on the optimized LLVM-IR intermediate expression file, and converting the LLVM-IR intermediate expression file into a coordinate rotation digital calculation model expressed by a register transmission level code language based on behavior level time sequence constraint.
As a preferred scheme, the step of simulating the transformed coordinate rotation digital computation model through the FPGA comprises:
generating a corresponding bit stream file according to the converted coordinate rotation digital computation model, and downloading and configuring the bit stream file into the FPGA;
performing online debugging on the FPGA, comparing a debugging result with a cordic core, and outputting a coordinate rotation digital calculation result by taking the debugging result as the coordinate rotation digital calculation result when the debugging result is matched with the cordic core data; otherwise, jumping to execute step S1.
Furthermore, the invention also provides a coordinate rotation digital computing system based on the high-level synthesis tool, which comprises:
the model construction module is used for constructing a coordinate rotation digital calculation model based on the integer arithmetic by adopting a high-level language;
the high-level synthesis module is used for converting the coordinate rotation digital calculation model by adopting a high-level synthesis tool;
and the simulation module is used for carrying out simulation calculation on the converted coordinate rotation digital calculation model and outputting a coordinate rotation digital calculation result.
Preferably, the model building module includes:
the floating-point operation conversion unit is used for converting floating-point numbers into 64-bit long integer numbers and converting floating-point operations into long integer operations;
a trigonometric function setting unit for setting a trigonometric function type; the trigonometric function types comprise an SIN function, a COS function, a TAN function, a COT function, a CSC function and an SEC function;
and the precision adjusting unit is used for modifying the iteration times to adjust the precision of the output result.
As a preferred scheme, the system further comprises a human-computer interaction module, wherein the human-computer interaction module comprises an SIN selection key, a COS selection key, a TAN selection key, a COT selection key, a CSC selection key and an SEC selection key which are respectively used for selecting the set trigonometric function type, and a target precision input unit which is used for modifying the precision of the output result.
As a preferred scheme, the high-level integration module comprises:
the LLVM-IR file conversion unit is used for converting the coordinate rotation digital calculation model constructed by adopting a high-level language into an LLVM-IR intermediate expression file;
and the configuration unit is used for configuring the LLVM-IR intermediate expression file through the Lua script file and converting the LLVM-IR intermediate expression file into a coordinate rotation digital calculation model expressed through a low-level language.
As a preferred scheme, the configuration unit comprises a high-level general optimization layer, a high-level comprehensive transformation layer and a register transmission level code and behavior level timing constraint generation layer which are connected in sequence, and are respectively used for performing high-level general optimization on the LLVM-IR intermediate expression file, performing high-level comprehensive transformation on the optimized LLVM-IR intermediate expression file, and converting the optimized LLVM-IR intermediate expression file into a coordinate rotation digital calculation model expressed by a register transmission level code language based on the behavior level timing constraint.
Compared with the prior art, the technical scheme of the invention has the beneficial effects that: before the coordinate rotation digital calculation model is configured to the FPGA, the operation operations of the trigonometric function, the hyperbolic curve, the exponent and the logarithm are constructed into the coordinate rotation digital calculation model based on the long integer operation, and then the coordinate rotation digital calculation model is configured to the FPGA through a high-level comprehensive tool, so that the floating point operation can be performed on the FPGA without an FPU module.
Drawings
Fig. 1 is a flowchart of a coordinate rotation number calculation method based on a high-level synthesis tool according to embodiment 1.
FIG. 2 is a schematic diagram of a shell script corresponding to sin for modifying the output trigonometric function type of the cordic algorithm.
FIG. 3 is a schematic diagram of a shell script corresponding to the iteration number of the modified cordic algorithm.
FIG. 4 is an architecture diagram of a coordinate rotation digital computing system based on a high-level synthesis tool according to example 2.
Detailed Description
The drawings are for illustrative purposes only and are not to be construed as limiting the patent;
it will be understood by those skilled in the art that certain well-known structures in the drawings and descriptions thereof may be omitted.
The technical solution of the present invention is further described below with reference to the accompanying drawings and examples.
Example 1
The present embodiment provides a method for calculating a coordinate rotation number based on a high-level synthesis tool, and is a flowchart of the method for calculating a coordinate rotation number based on a high-level synthesis tool in the present embodiment, as shown in fig. 1.
The coordinate rotation digital calculation method based on the high-level synthesis tool provided by the embodiment comprises the following steps:
s1: and constructing a coordinate rotation digital calculation model based on long integer arithmetic by adopting a high-level language, wherein the coordinate rotation digital calculation model comprises the operation operations of trigonometric functions, hyperbolas, indexes and logarithms.
The method comprises the following steps of constructing a coordinate rotation digital calculation model based on long integer arithmetic:
1) converting the floating point number to a 64-bit long integer number;
2) converting floating-point operation into long integer operation;
3) setting the type of a trigonometric function and the output precision thereof;
4) and modifying and outputting the target trigonometric function type by modifying the enumeration type, and adjusting the output precision by modifying the iteration times.
S2: and converting the coordinate rotation digital calculation model by adopting a high-level synthesis tool. The method comprises the following specific steps:
and converting the coordinate rotation digital calculation model constructed by adopting a high-level language into an LLVM-IR intermediate expression file, configuring the LLVM-IR intermediate expression file through a Lua script file, and converting the LLVM-IR intermediate expression file into the coordinate rotation digital calculation model expressed by a low-level language.
The step of configuring the LLVM-IR intermediate expression file through the Lua script file comprises the following steps:
performing high-level general optimization on the LLVM-IR intermediate expression file;
and performing high-level comprehensive transformation on the optimized LLVM-IR intermediate expression file, and converting the LLVM-IR intermediate expression file into a coordinate rotation digital calculation model expressed by a register transmission level code language based on behavior level time sequence constraint.
S3: and simulating the converted coordinate rotation digital calculation model through the FPGA to complete the coordinate rotation digital calculation. The method comprises the following specific steps:
generating a corresponding bit stream file according to the converted coordinate rotation digital computation model, and downloading and configuring the bit stream file into the FPGA;
performing online debugging on the FPGA, comparing a debugging result with a cordic core, and outputting a coordinate rotation digital calculation result by taking the debugging result as the coordinate rotation digital calculation result when the debugging result is matched with the cordic core data; otherwise, jumping to execute step S1.
In the specific implementation process, a corresponding algorithm is written for the constructed coordinate rotation digital calculation model by visual studio 2015 and adopting C language, and the correctness of the algorithm function is verified. Specifically, the floating point number involved in the coordinate rotation digital calculation model is converted into a 64-bit long integer number by adopting C language, the floating point operation involved in the coordinate rotation digital calculation model is converted into a long integer operation, the operation of the floating point is realized by the operation of the long integer, and the type of the trigonometric function to be output is judged, which includes the following six types: sin, cos, tan, cot, csc, sec and the precision of the output thereof, and modifying the type of the output trigonometric function by modifying the enumeration type, and changing the iteration number by modifying the loop number of the for loop so as to influence the precision. In this embodiment, the type of the output parameter and the number of iterations are changed through the shell script, so that the accuracy of the output result is affected. The CORDIC algorithm is an iterative algorithm for approximating a target value, and the more the number of iterations is, the higher the accuracy is. As shown in fig. 2 and 3, a shell script corresponding to sin is output for modifying the cordic algorithm output trigonometric function type and a shell script corresponding to the cordic algorithm iteration number are respectively modified, and in the present embodiment, the iteration number is changed by replacing the for loop.
And converting the coordinate rotation digital computation model passing the verification of the correctness into Verilog codes by adopting a high-level synthesis tool. Specifically, a C language is used for generating an LLVM-IR intermediate expression file through a SHANG front end under a Linux system, then the converted LLVM-IR intermediate expression file is configured through a SHANG rear end under a Windows system through a Lua script file, and finally the LLVM-IR intermediate expression file is converted into a Verilog code.
And finally, simulating the converted coordinate rotation digital calculation model through an FPGA (field programmable gate array), adopting ILA (inline debugging architecture) online debugging of Xilinx Vivado in the embodiment, downloading the generated RTL code generation bit stream file to the FPGA, then online debugging through the ILA, comparing the debugging result with a cordic core of Xilinx, and outputting the debugging result as a coordinate rotation digital calculation result when the debugging result is matched with the cordic core data.
In this embodiment, before the coordinate rotation digital calculation model is configured to the FPGA, floating point operation is converted into long integer operation, then a high-level synthesis tool is further adopted to convert the coordinate rotation digital calculation model, and the converted coordinate rotation digital calculation model is configured to the FPGA, so that floating point operation is performed on the FPGA without the FPU module.
Example 2
The embodiment provides a coordinate rotation digital calculation system based on a high-level synthesis tool, which is applied to the coordinate rotation digital calculation method based on the high-level synthesis tool provided in embodiment 1. Fig. 4 is an architecture diagram of the coordinate rotation digital computing system based on the high-level synthesis tool according to the embodiment.
The coordinate rotation digital computing system based on the high-level synthesis tool provided by the embodiment comprises:
the model building module 1 is used for building a coordinate rotation digital calculation model based on the integer arithmetic by adopting a high-level language;
the high-level synthesis module 2 is used for converting the coordinate rotation digital calculation model by adopting a high-level synthesis tool;
and the simulation module 3 is used for carrying out simulation calculation on the converted coordinate rotation digital calculation model and outputting a coordinate rotation digital calculation result.
The model building module 1 in this embodiment includes:
the floating point operation conversion unit 11 is used for converting a floating point number into a 64-bit long integer number and converting a floating point operation into a long integer operation;
a trigonometric function setting unit 12 for setting a trigonometric function type; the trigonometric function types comprise an SIN function, a COS function, a TAN function, a COT function, a CSC function and an SEC function;
and the precision adjusting unit 13 is used for modifying the iteration times and adjusting the precision of the output result.
Further, the coordinate rotation digital computing system in this embodiment further includes a human-computer interaction module 4, where the human-computer interaction module 4 includes an SIN selection key, a COS selection key, a TAN selection key, a COT selection key, a CSC selection key, and an SEC selection key, which are respectively used to select a set trigonometric function type, and a target precision input unit used to modify the precision of an output result.
The high-level integration module 2 in this embodiment includes:
an LLVM-IR file converting unit 21 for converting the coordinate rotation digital calculation model constructed by using the high-level language into an LLVM-IR intermediate expression file;
and the configuration unit 22 is used for configuring the LLVM-IR intermediate expression file through the Lua script file and converting the LLVM-IR intermediate expression file into a coordinate rotation digital calculation model expressed through a low-level language.
Further, the configuration unit 22 in this embodiment includes a high-level general optimization layer (Generic Transformations with local information), a high-level comprehensive transformation layer (HLS-specific Transformations), and a register transfer level code and behavior level timing constraint generation layer (RTL Synthesis with behavior level information) that are sequentially connected, and are respectively used to perform high-level general optimization on the LLVM-IR intermediate expression file, perform high-level comprehensive transformation on the optimized LLVM-IR intermediate expression file, and convert the optimized LLVM-IR intermediate expression file into a coordinate rotation digital calculation model expressed by the register transfer level code language based on the behavior level timing constraint.
The same or similar reference numerals correspond to the same or similar parts;
the terms describing positional relationships in the drawings are for illustrative purposes only and are not to be construed as limiting the patent;
it should be understood that the above-described embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not intended to limit the embodiments of the present invention. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. Any modification, equivalent replacement, and improvement made within the spirit and principle of the present invention should be included in the protection scope of the claims of the present invention.
Claims (10)
1. A coordinate rotation digital calculation method based on a high-level synthesis tool is characterized by comprising the following steps:
s1: adopting a high-level language to construct a coordinate rotation digital calculation model based on long integer arithmetic, wherein the coordinate rotation digital calculation model comprises arithmetic operations on a trigonometric function, a hyperbola, an index and a logarithm;
s2: converting the coordinate rotation digital calculation model by adopting a high-level comprehensive tool;
s3: and simulating the converted coordinate rotation digital calculation model through the FPGA to complete the coordinate rotation digital calculation.
2. The coordinate rotation digital calculation method according to claim 1, wherein the step of constructing a coordinate rotation digital calculation model based on a long integer operation comprises:
1) converting the floating point number to a 64-bit long integer number;
2) converting floating-point operation into long integer operation;
3) setting the type of a trigonometric function and the output precision thereof;
4) and modifying and outputting the target trigonometric function type by modifying the enumeration type, and adjusting the output precision by modifying the iteration times.
3. The coordinate rotation digital computation method of claim 1, wherein the step of converting the coordinate rotation digital computation model using a high-level synthesis tool comprises: and converting the coordinate rotation digital calculation model constructed by adopting a high-level language into an LLVM-IR intermediate expression file, configuring the LLVM-IR intermediate expression file through a Lua script file, and converting the LLVM-IR intermediate expression file into the coordinate rotation digital calculation model expressed by a low-level language.
4. The coordinate rotation digital computation method of claim 3, wherein the step of configuring the LLVM-IR intermediate expression file by the Lua script file comprises:
performing high-level general optimization on the LLVM-IR intermediate expression file;
and performing high-level comprehensive transformation on the optimized LLVM-IR intermediate expression file, and converting the LLVM-IR intermediate expression file into a coordinate rotation digital calculation model expressed by a register transmission level code language based on behavior level time sequence constraint.
5. The coordinate rotation digital computation method of claim 1, wherein the step of simulating the transformed coordinate rotation digital computation model by the FPGA comprises:
generating a corresponding bit stream file according to the converted coordinate rotation digital computation model, and downloading and configuring the bit stream file into the FPGA;
performing online debugging on the FPGA, comparing a debugging result with a cordic core, and outputting a coordinate rotation digital calculation result by taking the debugging result as the coordinate rotation digital calculation result when the debugging result is matched with the cordic core data; otherwise, jumping to execute step S1.
6. A coordinate rotation digital computing system based on a high-level synthesis tool, comprising:
the model construction module is used for constructing a coordinate rotation digital calculation model based on the integer arithmetic by adopting a high-level language;
the high-level synthesis module is used for converting the coordinate rotation digital calculation model by adopting a high-level synthesis tool;
and the simulation module is used for carrying out simulation calculation on the converted coordinate rotation digital calculation model and outputting a coordinate rotation digital calculation result.
7. The coordinate rotation digital computing system of claim 6, wherein the model building module comprises:
the floating-point operation conversion unit is used for converting floating-point numbers into 64-bit long integer numbers and converting floating-point operations into long integer operations;
a trigonometric function setting unit for setting a trigonometric function type; the trigonometric function types comprise an SIN function, a COS function, a TAN function, a COT function, a CSC function and an SEC function;
and the precision adjusting unit is used for modifying the iteration times to adjust the precision of the output result.
8. The coordinate rotation digital computing system of claim 7, further comprising a human-machine interaction module including a SIN selection key, a COS selection key, a TAN selection key, a COT selection key, a CSC selection key, and an SEC selection key, respectively, for selecting a set trigonometric function type, and a target precision input unit for modifying the precision of an output result.
9. The coordinate rotation digital computing system of claim 6, wherein the high level integration module comprises:
the LLVM-IR file conversion unit is used for converting the coordinate rotation digital calculation model constructed by adopting a high-level language into an LLVM-IR intermediate expression file;
and the configuration unit is used for configuring the LLVM-IR intermediate expression file through the Lua script file and converting the LLVM-IR intermediate expression file into a coordinate rotation digital calculation model expressed through a low-level language.
10. The coordinate rotating digital computing system of claim 9, wherein the configuration unit comprises a high level general purpose optimization layer, a high level comprehensive transformation layer, and a register transfer level code and behavior level timing constraint generation layer connected in sequence, for performing high level general purpose optimization on the LLVM-IR intermediate expression file, performing high level comprehensive transformation on the optimized LLVM-IR intermediate expression file, and converting into the coordinate rotating digital computing model expressed by the register transfer level code language based on the behavior level timing constraint, respectively.
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