CN113727494A

CN113727494A - Ultra-low range dimming LED drive circuit based on PWM and current double regulation

Info

Publication number: CN113727494A
Application number: CN202010456308.2A
Authority: CN
Inventors: 周海英; 毛红光; 徐海琴
Original assignee: Shanghai Aviation Electric Co Ltd
Current assignee: Shanghai Aviation Electric Co Ltd
Priority date: 2020-05-26
Filing date: 2020-05-26
Publication date: 2021-11-30

Abstract

The invention discloses an ultra-low range dimming LED driving circuit based on PWM and current double regulation, which comprises a dimming signal double processing circuit unit and an LED constant current driving circuit unit, wherein the dimming signal double processing circuit unit is used for receiving a dimming signal from the outside and outputting a corresponding PWM regulating signal and a corresponding current regulating signal according to the dimming signal, and the LED constant current driving circuit unit is used for receiving the PWM regulating signal and the corresponding current regulating signal from the dimming signal double processing circuit unit and outputting a corresponding LED driving signal according to the PWM regulating signal and the corresponding current regulating signal. The invention has the beneficial effects that: the dimming range which can be realized is as wide as 1-100%, the visual man-machine effect is met, the dimming consistency is good, the color deviation is small, the power-on lighting is not delayed obviously, and the circuit structure is simple.

Description

Ultra-low range dimming LED drive circuit based on PWM and current double regulation

Technical Field

The invention relates to an LED dimming circuit, in particular to an ultra-low range dimming LED driving circuit based on PWM and current dual regulation.

Background

At present, the LED lamp with the dimming function is widely applied to various airplanes. The common LED dimming driving methods include three types: voltage dimming, current dimming, and PWM dimming. The voltage dimming is to adjust the brightness by changing the voltage at two ends of the LED, but the dimming range is small, and the brightness consistency is poor when the multiple lamps are dimmed; because the current rises after the LED heats, the reliability of the LED is affected, and the LED is only suitable for lamps with small power and small heat productivity. The current dimming is to adjust the brightness by changing the driving current of the LED, can realize the brightness adjustment in a wide range of 1% -100%, is suitable for independent lamps with dimming functions, but the current change is large, which causes the problem of large color shift, and is not suitable for lamps with high requirements on color range, the current deviation is large when the brightness is ultralow, and when one dimming signal is used for controlling a plurality of lamps at the same time, the difference of the low brightness of each lamp is large. The PWM dimming adjusts the brightness by controlling the on-off ratio of the LED under constant current, has high efficiency and high dimming precision, can achieve stable 1% -100% wide-range brightness adjustment and uniform man-machine efficacy of dimming only by adopting a single chip microcomputer and software, has relatively complex circuit and larger volume, is generally used for lamps with larger volume, and can cause the problem of obvious delay of the lighting of the lamps due to the power-on delay of the single chip microcomputer. When a plurality of lamps are simultaneously dimmed, the circuits of the lamps have different lengths and different voltage drops, so that the brightness of the lamps has slight difference, and the brightness inconsistency felt by human eyes is obvious when the brightness is ultralow.

Disclosure of Invention

The invention aims to provide an ultra-low range dimming LED driving circuit based on PWM and current double regulation, which has the advantages of high efficiency, simple structure, high reliability, wide dimming range, good dimming consistency, small color deviation and no time delay during power-on for an internal dimming lighting fixture. The problems of low voltage dimming efficiency and small dimming range, large current dimming color shift and poor ultralow brightness consistency and the problems of large circuit size and obvious delay of power-on lighting of the PWM dimming single chip microcomputer can be solved.

In order to achieve the purpose, the technical scheme of the invention is as follows: an ultra-low range dimming LED drive circuit based on PWM and current dual regulation is characterized by comprising a dimming signal dual processing circuit unit and an LED constant current drive circuit unit, the dimming signal dual-processing circuit unit is used for receiving a dimming signal from the outside and outputting a corresponding PWM (pulse width modulation) adjusting signal and a corresponding current adjusting signal according to the dimming signal, the LED constant current driving circuit unit is used for receiving the PWM adjusting signal and the current adjusting signal from the dimming signal dual processing circuit unit and outputting a corresponding LED driving signal according to the PWM adjusting signal and the current adjusting signal, if the adjusting range of the PWM adjusting signal is defined as a to 100 percent, the adjusting range of the current adjusting signal is defined as b to 100 percent, the adjustment range of the LED driving signal is a × b to 100%, where a and b are both greater than 0 and less than 1.

As a preferred solution of the ultra-low range dimming LED driving circuit based on PWM and current dual regulation, the dimming signal dual processing circuit unit has a voltage conversion and reference circuit subunit, a signal filtering circuit subunit, a dimming curve correction circuit subunit, a PWM generation circuit subunit and a signal amplitude adjustment circuit subunit, the voltage conversion and reference circuit subunit is configured to receive a power voltage from the outside and convert the power voltage to provide a working voltage and/or a reference voltage to the signal filtering circuit subunit, the dimming curve correction circuit subunit, the PWM generation circuit subunit and the signal amplitude adjustment circuit subunit, respectively, the signal filtering circuit subunit is configured to receive the dimming signal and convert the dimming signal into a filtered dimming signal, and the dimming curve correction circuit subunit is configured to receive the filtered dimming signal from the signal filtering circuit subunit A signal generating circuit subunit, configured to receive the filtered dimming signal from the dimming curve correcting circuit subunit and output the corresponding PWM adjusting signal according to the filtered dimming signal, and a signal threshold amplitude circuit subunit, configured to receive the filtered dimming signal from the signal filtering circuit subunit and output the corresponding current adjusting signal according to the filtered dimming signal.

As a preferred solution of the ultra-low range dimming LED driving circuit based on PWM and current dual regulation, the voltage conversion and reference circuit subunit has one input terminal VIN and four output terminals VCC, VF1, VF2, VF 3; the input end VIN is respectively connected with one end of a capacitor C1, the input end of a three-terminal regulator U1 and the cathode of a rectifier diode D1, and the anode of the rectifier diode D1 is respectively connected with the output end of the three-terminal regulator U1, one end of a resistor R1, one end of a capacitor C3, the cathode of a rectifier diode D2, one end of a resistor R3 and the output end VCC; the other end of the resistor R1 is respectively connected with the adjusting end of the three-terminal voltage regulator U1, the anode of the rectifier diode D2, one end of the capacitor C2 and one end of the resistor R2; the other end of the resistor R3, the positive end and the adjusting end of the reference source U2, one end of the capacitor C4, one end of the resistor R4 and the resistor R6 are all connected to the output end VF 3; the other end of the resistor R4 and one end of the resistor R5 are both connected to the output end VF 1; the other end of the resistor R6 and one end of the resistor R7 are both connected to the output end VF 2; the other end of the capacitor C1, the other end of the capacitor C2, the other end of the resistor R2, the other end of the capacitor C3, the negative terminal of the reference source U2, the other end of the capacitor C4, the other end of the resistor R5 and the other end of the resistor R7 are all connected to GND.

As a preferred solution of the ultra-low range dimming LED driving circuit based on PWM and current dual regulation, the signal filtering circuit subunit has three input terminals VJI, VCC, VF1, one output terminal VJO; the input end VJI is respectively connected with one end of the resistor R9, one end of the resistor R10 and one end of the resistor R11; the input end VCC is respectively connected with the other end of the resistor R9, the cathode of the rectifier diode D3, the positive power supply end of the operational amplifier U3A and one end of the capacitor C6; the other end of the resistor R11 is respectively connected with the anode of the rectifier diode D3, the cathode of the rectifier diode D4, one end of the capacitor C5 and the non-inverting end of the operational amplifier U3A; the inverting end of the operational amplifier U3A is respectively connected with the output end of the operational amplifier U3A and the anode of the Schottky diode D6; the input terminal VF1 is connected to the non-inverting terminal of the operational amplifier U3B; the inverting terminal and the output terminal of the operational amplifier U3B are connected to the anode of the Schottky diode D5; the cathode of the schottky diode D6, the cathode of the schottky diode D5 and one end of the capacitor C7 are connected to the output end VJO, and the other end of the resistor R10, the anode of the rectifier diode D4, the other end of the capacitor C5, the negative power supply end of the operational amplifier U3A, the other end of the capacitor C6 and the other end of the capacitor C7 are all connected to GND.

As a preferred scheme of the ultra-low range dimming LED driving circuit based on PWM and current dual regulation, the dimming curve correction circuit subunit has three input terminals VJDI, VCC, VF2, and one output terminal VJDO; wherein, the input end VJDI is connected to one end of the resistor R12; the other end of the resistor R12 is respectively connected with one end of a resistor R13 and the non-inverting end of the operational amplifier U4A; the inverting end and the output end of the operational amplifier U4A, and the positive end and the adjusting end of the reference source U7 are connected with one end of a resistor R14; the other end of the resistor R14, the negative end of the reference source U7 and one end of the resistor R15 are connected to the in-phase end of the operational amplifier U5B; the inverting terminal and the output terminal of the operational amplifier U5B are both connected to one terminal of the resistor R17; the other end of the resistor R17 and one end of the resistor R16 are connected with the same-phase end of the operational amplifier U5A; the input terminal VF2 is connected to the non-inverting terminal of the operational amplifier U4B; the inverting end and the output end of the operational amplifier U4B are connected to the other end of the resistor R16; the inverting terminal of the operational amplifier U5A is connected to one terminal of the resistor R18 and one terminal of the resistor R19, respectively; the other end of the resistor R19, the output end of the operational amplifier U5 and the in-phase end of the operational amplifier U6A are connected; the inverting terminal and the output terminal of the operational amplifier U6A are both connected to one terminal of the resistor R20; the other end of the resistor R20 and one end of the resistor R21 are both connected to the output end VJDO; the input end VCC is respectively connected with one end of a capacitor C8, one end of a capacitor C9, one end of a capacitor C10, a positive power supply end of an operational amplifier U4A, a positive power supply end of an operational amplifier U5A and a positive power supply end of an operational amplifier U6A; the other end of the capacitor C8, the other end of the capacitor C9, the other end of the capacitor C10, the other end of the resistor R13, the other end of the resistor R15, the other end of the resistor R18, the other end of the resistor R21, the negative power supply end of the operational amplifier U4A, the negative power supply end of the operational amplifier U5A and the negative power supply end of the operational amplifier U6A are connected to GND.

As a preferred scheme of the ultra-low range dimming LED driving circuit based on PWM and current dual regulation, the PWM generating circuit subunit has two input terminals MOD, VCC, and one output terminal DM; the input end MOD is connected with one end of the capacitor C11 and the MOD end of the PWM generator LTC6992S 6-1; the V + end of the PWM generator, one end of the resistor R24 and one end of the capacitor C12 are all connected to the input end VCC; the OUT end of the PWM generator is connected to the output end DM; the other end of the resistor R24 and one end of the resistor R23 are both connected with the DIV end of the PWM generator; the SET end of the PWM generator is connected to one end of a resistor R22; the other end of the resistor R22, the other end of the resistor R23, the GND end of the PWM generator, the other end of the capacitor C11 and the other end of the capacitor C12 are all connected to GND.

As a preferred scheme of the ultra-low range dimming LED driving circuit based on PWM and current dual regulation, the signal amplitude adjusting circuit subunit has three input terminals VJDI, VCC, VF3, and one output terminal VJTO; wherein the input terminal VF3 is connected to the non-inverting terminal of the operational amplifier U13B; the inverting terminal and the output terminal of the operational amplifier U13B are both connected to one terminal of the resistor R27; the input end VJDI is connected to one end of the resistor R25; the other end of the resistor R25 is respectively connected with one end of a resistor R26 and the non-inverting end of the operational amplifier U13A; the inverting end and the output end of the operational amplifier U13A are both connected with one end of the resistor R28; the other end of the resistor R28 and the other end of the resistor R27 are both connected to the non-inverting end of the operational amplifier U14B; the inverting end of the operational amplifier U14B is connected with one end of the resistor R29 and one end of the resistor R30 respectively; the other end of the resistor R30 and the output end of the operational amplifier U14B are both connected with the non-inverting end of the operational amplifier U14A; the inverting terminal and the output terminal of the operational amplifier U14A are both connected to one terminal of the resistor R31; the other end of the resistor R31 and one end of the resistor R32 are both connected with the same-phase end of the operational amplifier U15A; the inverting terminal and the output terminal of the operational amplifier U15A are connected to the output terminal VJTO; the input end VCC is respectively connected with one end of a capacitor C13, one end of a capacitor C14, one end of a capacitor C15, a positive power supply end of an operational amplifier U13A, a positive power supply end of an operational amplifier U14A and a positive power supply end of an operational amplifier U15A; the other end of the capacitor C13, the other end of the capacitor C14, the other end of the capacitor C15, the other end of the resistor R26, the other end of the resistor R29, the other end of the resistor R32, the negative power supply end of the operational amplifier U13, the negative power supply end of the operational amplifier U14 and the negative power supply end of the operational amplifier U15 are all connected to GND.

As a preferred scheme of the ultra-low range dimming LED driving circuit based on PWM and current double regulation, the LED constant current driving circuit unit has three input terminals VIN, VDM, VIM, and one output terminal Io + and Io-; the input end VIN is respectively connected with one end of the capacitor C16, one end of the detection resistor RS1, the IN end of the constant current driving chip U16 (MAX 16832C), and the negative electrode of the schottky diode D7; the other end of the detection resistor RS1, the CS end of the constant current driving chip U16 and one end of the capacitor C18 are connected to the output end Io +; the anode of the schottky diode D7, the Lx1 end and the Lx2 end of the constant current driving chip U16 are connected with one end of the power inductor L1; the other end of the power inductor L1 and the other end of the capacitor C18 are connected to an output end Io-; the input end VDM is connected to one end of the resistor R33; the other end of the resistor R33 is connected with one end of the resistor R34 and the DIM end of the constant current driving chip U16; the input end VIM is connected with one end of the capacitor C17 and the TEMP end of the constant current driving chip U16; the other end of the capacitor C16, the other end of the capacitor C17, and the other end of the resistor R34 are connected to GND, as well as the PGND terminal and GND terminal of the constant current driving chip U16.

Compared with the prior art, the invention has the beneficial effects that: the light modulation range which can be realized is as wide as 1-100%, the visual man-machine effect is met, the power-on lighting has no obvious delay, and the circuit structure is simple. The circuit comprises an optical signal double-processing circuit and an LED constant current driving circuit. The LED constant-current driving chip is used as a core device, a dimming signal double-processing circuit is used for converting a single-path dimming signal into a double-path adjustable current adjusting signal and a PWM adjusting signal, and the amplitude and the duty ratio of driving current are changed simultaneously to adjust the brightness of the LED. The signal double-processing circuit comprises a dimming curve correction circuit, and the dimming effect accords with the visual human-computer effect; the dimming circuit comprises a signal filter circuit, filters the voltage range of dimming signals which are easily affected by interference and line voltage drop, and has good dimming consistency. The circuit of the LED driving circuit is flexible to adjust, circuit parameters can be properly changed, and different adjusting ranges of the LED driving current are met.

Drawings

Fig. 1 is a block diagram of the working principle of the present invention.

Fig. 2 is a circuit diagram of the dimming signal dual processing circuit unit according to the present invention.

FIG. 3 is a circuit diagram of the voltage conversion and reference circuit subunit of the present invention.

Fig. 4 is a circuit configuration diagram of a signal filtering circuit subunit of the present invention.

Fig. 5 is a circuit diagram of a dimming curve correction circuit subunit according to the present invention.

Fig. 6 is a circuit configuration diagram of a PWM generation circuit subunit according to the present invention.

Fig. 7 is a circuit diagram of a signal amplitude adjusting circuit subunit according to the present invention.

Fig. 8 is a circuit configuration diagram of the LED constant current driving circuit unit of the present invention.

Detailed Description

The invention will be described in further detail below with reference to specific embodiments and drawings. Here, the description of the embodiments is provided to help understanding of the present invention, but the present invention is not limited thereto. In addition, the technical features involved in the embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.

Referring to fig. 1 to 8, an ultra-low range dimming LED driving circuit based on PWM and current dual regulation is shown. Comprises a dimming signal double-processing circuit unit and an LED constant current driving circuit unit. The dimming signal dual-processing circuit unit is used for receiving a dimming signal (0 VDC-15 VDC) from the outside and outputting a corresponding PWM (pulse width modulation) adjusting signal and a corresponding current adjusting signal according to the dimming signal. The LED constant current driving circuit unit is used for receiving the PWM adjusting signal and the current adjusting signal from the dimming signal dual-processing circuit unit and outputting a corresponding LED driving signal according to the PWM adjusting signal and the current adjusting signal. And after the dimming signal is converted by the dimming signal dual-processing circuit unit, the dimming signal simultaneously provides the PWM adjusting signal and the current adjusting signal and provides the PWM adjusting signal and the current adjusting signal to the LED constant current driving circuit unit to adjust the current amplitude output range and the duty ratio range output by the constant current source.

Referring to fig. 2, the dimming signal dual processing circuit unit includes a voltage conversion and reference circuit subunit, a signal filter circuit subunit, a dimming curve correction circuit subunit, a PWM generation circuit subunit, and a signal amplitude adjustment circuit subunit, where the voltage conversion and reference circuit subunit is configured to receive a power voltage from the outside and provide a working voltage and/or a reference voltage to the signal filter circuit subunit, the dimming curve correction circuit subunit, the PWM generation circuit subunit, and the signal amplitude adjustment circuit subunit after converting the power voltage, the signal filter circuit subunit is configured to receive the dimming signal and convert the dimming signal into a filtered dimming signal, and the dimming curve correction circuit subunit is configured to receive the filtered dimming signal from the signal filter circuit subunit and output a corresponding corrected dimming signal according to the filtered dimming signal A signal, the PWM generation circuit subunit is configured to receive the corrected dimming signal from the dimming curve correction circuit subunit and output the corresponding PWM adjustment signal according to the corrected dimming signal, and the signal threshold amplitude circuit subunit is configured to receive the filtered dimming signal from the signal filtering circuit subunit and output the corresponding current adjustment signal according to the filtered dimming signal.

Referring to fig. 3, the voltage conversion and reference circuit subunit has an input terminal VIN and four output terminals VCC, VF1, VF2, VF 3. The input end VIN is connected to one end of the capacitor C1, the input end of the three-terminal regulator U1, and the negative electrode of the rectifier diode D1, and the positive electrode of the rectifier diode D1 is connected to the output end of the three-terminal regulator U1, one end of the resistor R1, one end of the capacitor C3, the negative electrode of the rectifier diode D2, one end of the resistor R3, and the output end VCC. The other end of the resistor R1 is respectively connected with the adjusting end of the three-terminal regulator U1, the anode of the rectifying diode D2, one end of the capacitor C2 and one end of the resistor R2. The other end of the resistor R3, the positive terminal and the adjustment terminal of the reference source U2, one end of the capacitor C4, one end of the resistor R4 and the resistor R6 are all connected to the output terminal VF 3. The other end of the resistor R4 and one end of the resistor R5 are both connected to the output terminal VF 1. The other end of the resistor R6 and one end of the resistor R7 are both connected to the output terminal VF 2. The other end of the capacitor C1, the other end of the capacitor C2, the other end of the resistor R2, the other end of the capacitor C3, the negative terminal of the reference source U2, the other end of the capacitor C4, the other end of the resistor R5 and the other end of the resistor R7 are all connected to GND. The voltage conversion and reference circuit subunit adopts a three-terminal regulator to provide stable working voltage, and the VCC voltage value can be set through R1 and R2. The reference circuit adopts a high-precision reference source to provide a reference voltage VF3 (2.5 VDC), then divides the voltage by resistors R4 and R5 to obtain a reference voltage VF1 (1 VDC), and divides the voltage by resistors R6 and R7 to obtain a reference voltage VF2 (0.3 VDC).

Referring to fig. 4, the signal filtering circuit sub-unit has three inputs VJI, VCC, VF1 and an output VJO. The input terminal VJI is connected to one end of the resistor R9, one end of the resistor R10, and one end of the resistor R11, respectively. The input terminal VCC is connected to the other terminal of the resistor R9, the negative electrode of the rectifier diode D3, the positive power terminal of the operational amplifier U3A, and one terminal of the capacitor C6, respectively. The other end of the resistor R11 is connected to the anode of the rectifier diode D3, the cathode of the rectifier diode D4, one end of the capacitor C5, and the non-inverting terminal of the operational amplifier U3A, respectively. The inverting terminal of the operational amplifier U3A is connected to the output terminal of the operational amplifier U3A and the anode of the schottky diode D6, respectively. The input terminal VF1 is connected to the non-inverting terminal of the operational amplifier U3B. The inverting terminal and the output terminal of the operational amplifier U3B are connected to the anode of the schottky diode D5. The cathode of the schottky diode D6, the cathode of the schottky diode D5 and one end of the capacitor C7 are connected to the output end VJO, and the other end of the resistor R10, the anode of the rectifier diode D4, the other end of the capacitor C5, the negative power supply end of the operational amplifier U3A, the other end of the capacitor C6 and the other end of the capacitor C7 are all connected to GND. The signal filtering circuit subunit converts the voltage range of 0 VDC-15 VDC of the input dimming signal into the voltage range of 0.7 VDC-14.7 VDC. In order to ensure the stability and consistency of the lamp in ultra-low brightness, the low voltage section of the dimming signal of 0VDC to 0.7VDC is filtered. The circuit filters the low voltage section of the dimming signal by integrating an operational amplifier, a reference voltage 1VDC, a Schottky diode and the like.

Referring to fig. 5, the dimming curve correction circuit subunit has three input terminals VJDI, VCC, VF2 and an output terminal VJDO. Wherein, input end VJDI is connected to one end of resistor R12. The other end of the resistor R12 is connected to one end of the resistor R13 and the non-inverting terminal of the operational amplifier U4A, respectively. The inverting terminal and the output terminal of the operational amplifier U4A, and the positive terminal and the adjustment terminal of the reference source U7 are connected to one terminal of a resistor R14. The other end of the resistor R14, the negative terminal of the reference source U7 and one end of the resistor R15 are all connected to the non-inverting terminal of the operational amplifier U5B. The inverting terminal and the output terminal of the operational amplifier U5B are connected to one terminal of the resistor R17. The other end of the resistor R17 and one end of the resistor R16 are connected to the non-inverting terminal of the operational amplifier U5A. The input terminal VF2 is connected to the non-inverting terminal of the operational amplifier U4B. The inverting terminal and the output terminal of the operational amplifier U4B are connected to the other terminal of the resistor R16. The inverting terminal of the operational amplifier U5A is connected to one terminal of the resistor R18 and one terminal of the resistor R19, respectively. The other end of the resistor R19, the output end of the operational amplifier U5 and the non-inverting end of the operational amplifier U6A are connected. The inverting terminal and the output terminal of the operational amplifier U6A are connected to one terminal of the resistor R20. The other end of the resistor R20 and one end of the resistor R21 are both connected to the output VJDO. The input terminal VCC is connected to one terminal of the capacitor C8, one terminal of the capacitor C9, one terminal of the capacitor C10, the positive power supply terminal of the operational amplifier U4A, the positive power supply terminal of the operational amplifier U5A, and the positive power supply terminal of the operational amplifier U6A, respectively. The other end of the capacitor C8, the other end of the capacitor C9, the other end of the capacitor C10, the other end of the resistor R13, the other end of the resistor R15, the other end of the resistor R18, the other end of the resistor R21, the negative power supply end of the operational amplifier U4A, the negative power supply end of the operational amplifier U5A and the negative power supply end of the operational amplifier U6A are connected to GND. The dimming curve correction circuit subunit converts the voltage range of 0.7 VDC-14.7 VDC of the input dimming signal into the voltage range of 0.12 VDC-0.9 VDC. And the dimming curve correction circuit subunit performs curve correction on the adjustable voltage signal. The reference source (2.5V, LT 431) and operational amplifier with high precision are adopted to carry out curve correction, the corrected dimming curve is close to the human eye photosensitive curve, and the dimming effect basically meets the requirement of the man-machine efficacy of the lighting lamp. And the required voltage range is obtained by dividing the voltage through resistors R20 and R21, and the required voltage range is matched with the required regulation voltage range of the PWM generating circuit subunit.

Referring to fig. 6, the PWM generating circuit subunit has two input terminals MOD, VCC and an output terminal DM. The input terminal MOD is connected to one terminal of the capacitor C11 and the MOD terminal of the PWM generator LTC6992S 6-1. The V + terminal of the PWM generator, one terminal of the resistor R24 and one terminal of the capacitor C12 are all connected to the input terminal VCC. The OUT terminal of the PWM generator is connected to the output terminal DM. The other end of the resistor R24 and one end of the resistor R23 are both connected with the DIV end of the PWM generator. The SET terminal of the PWM generator is connected to one terminal of a resistor R22. The other end of the resistor R22, the other end of the resistor R23, the GND end of the PWM generator, the other end of the capacitor C11 and the other end of the capacitor C12 are all connected to GND. The PWM generating circuit subunit mainly takes a PWM control chip (LTC 6992HS 6-1) as a core circuit, and converts the dimming voltage signal into a corresponding duty ratio signal. The operating frequency of the PWM control signal is set by resistors R22, R23, and R24. When the dimming voltage signal is changed from 0.12V to 0.9VDC, the duty ratio of the PWM control signal is changed from 2.5% to 100%.

Referring to fig. 7, the signal amplitude adjustment circuit subunit has three input terminals VJDI, VCC, VF3 and an output terminal VJTO. The input terminal VF3 is connected to the non-inverting terminal of the operational amplifier U13B. The inverting terminal and the output terminal of the operational amplifier U13B are connected to one terminal of a resistor R27. Input VJDI is connected to one end of resistor R25. The other end of the resistor R25 is connected to one end of the resistor R26 and the non-inverting terminal of the operational amplifier U13A, respectively. The inverting terminal and the output terminal of the operational amplifier U13A are both connected to one terminal of the resistor R28. The other end of the resistor R28 and the other end of the resistor R27 are both connected to the non-inverting terminal of the operational amplifier U14B. The inverting terminal of the operational amplifier U14B is connected to one terminal of the resistor R29 and one terminal of the resistor R30, respectively. The other end of the resistor R30 and the output end of the operational amplifier U14B are both connected with the non-inverting end of the operational amplifier U14A. The inverting terminal and the output terminal of the operational amplifier U14A are connected to one terminal of a resistor R31. The other end of the resistor R31 and one end of the resistor R32 are both connected with the non-inverting terminal of the operational amplifier U15A. The inverting terminal and the output terminal of the operational amplifier U15A are connected to the output terminal VJTO. The input terminal VCC is connected to one terminal of the capacitor C13, one terminal of the capacitor C14, one terminal of the capacitor C15, the positive power supply terminal of the operational amplifier U13A, the positive power supply terminal of the operational amplifier U14A, and the positive power supply terminal of the operational amplifier U15A, respectively. The other end of the capacitor C13, the other end of the capacitor C14, the other end of the capacitor C15, the other end of the resistor R26, the other end of the resistor R29, the other end of the resistor R32, the negative power supply end of the operational amplifier U13, the negative power supply end of the operational amplifier U14 and the negative power supply end of the operational amplifier U15 are all connected to GND. The signal amplitude adjusting circuit subunit converts the voltage range of 0.7VDC to 14.7VDC of the input dimming signal into a voltage range with settable amplitudes at two ends. The dimming analog voltage signal is adjusted to be in a voltage range of 1.2 VDC-2 VDC by adopting a summing circuit consisting of an operational amplifier with high precision, a reference voltage (2.5 VDC) and a resistor. The voltage amplitude of the dimming analog voltage signal can be adjusted by dividing the voltage through the resistors R25 and R26.

Referring to fig. 8, the LED constant current driving circuit unit has three input terminals VIN, VDM, VIM, and one output terminal Io + and Io-. The input end VIN is respectively connected to one end of the capacitor C16, one end of the detection resistor RS1, the IN end of the constant current driving chip U16 (MAX 16832C), and the negative electrode of the schottky diode D7. The other end of the detection resistor RS1, the CS end of the constant current driving chip U16 and one end of the capacitor C18 are connected to the output terminal Io +. The anode of the schottky diode D7, the Lx1 terminal and the Lx2 terminal of the constant current driving chip U16 are connected to one end of the power inductor L1. The other end of the power inductor L1 and the other end of the capacitor C18 are connected to the output terminal Io-. Input terminal VDM is connected to one terminal of resistor R33. The other end of the resistor R33 is connected to one end of the resistor R34 and the DIM end of the constant current driving chip U16. The input end VIM is connected with one end of the capacitor C17 and the TEMP end of the constant current driving chip U16. The other end of the capacitor C16, the other end of the capacitor C17, and the other end of the resistor R34 are connected to GND, as well as the PGND terminal and GND terminal of the constant current driving chip U16. The LED constant current driving circuit unit mainly takes a constant current source chip (MAX 16832C) as a core circuit, and sets the maximum output current through a resistor RS 1. When the dimming analog voltage signal varies from 1.2VDC to 2VDC, the output current varies from 40% to 100% of the maximum output current. When the duty ratio dimming signal is changed from 2.5% to 100%, the output current duty ratio is changed from 2.5% to 100%. Therefore, the average output current of the constant current driving circuit is changed from 1% to 100%, so that the brightness of the LED light source is adjusted from 1% to 100%.

The above description is only intended to represent the embodiments of the present invention, and the description is more specific and detailed, but not to be construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims

1. The ultra-low range dimming LED driving circuit based on PWM and current dual regulation is characterized by comprising a dimming signal dual processing circuit unit and an LED constant current driving circuit unit, wherein the dimming signal dual processing circuit unit is used for receiving a dimming signal from the outside and outputting a corresponding PWM regulation signal and a corresponding current regulation signal according to the dimming signal, the LED constant current driving circuit unit is used for receiving the PWM regulation signal and the corresponding current regulation signal from the dimming signal dual processing circuit unit and outputting a corresponding LED driving signal according to the PWM regulation signal and the corresponding current regulation signal, and if the regulation range of the PWM regulation signal is defined as a to 100 percent and the regulation range of the current regulation signal is defined as b to 100 percent, the regulation range of the LED driving signal is a b to 100 percent, wherein a, b and 100 percent respectively, b are all greater than 0 and less than 1.

2. The ultra-low range dimming LED driving circuit based on PWM and current dual-regulation of claim 1, wherein the dimming signal dual-processing circuit unit has a voltage converting and reference circuit subunit, a signal filtering circuit subunit, a dimming curve correcting circuit subunit, a PWM generating circuit subunit and a signal amplitude adjusting circuit subunit, the voltage converting and reference circuit subunit is configured to receive a power voltage from outside and convert the power voltage to provide an operating voltage and/or a reference voltage to the signal filtering circuit subunit, the dimming curve correcting circuit subunit, the PWM generating circuit subunit and the signal amplitude adjusting circuit subunit, respectively, the signal filtering circuit subunit is configured to receive the dimming signal and convert the dimming signal into a filtered dimming signal, the dimming curve correction circuit subunit is configured to receive the filtered dimming signal from the signal filtering circuit subunit and output a corresponding corrected dimming signal according to the filtered dimming signal, the PWM generation circuit subunit is configured to receive the corrected dimming signal from the dimming curve correction circuit subunit and output a corresponding PWM adjustment signal according to the corrected dimming signal, and the signal threshold amplitude circuit subunit is configured to receive the filtered dimming signal from the signal filtering circuit subunit and output a corresponding current adjustment signal according to the filtered dimming signal.

3. The ultra-low range dimming LED driving circuit based on PWM and current dual regulation of claim 2, wherein the voltage conversion and reference circuit sub-unit has one input terminal VIN and four output terminals VCC, VF1, VF2, VF 3; the input end VIN is respectively connected with one end of a capacitor C1, the input end of a three-terminal regulator U1 and the cathode of a rectifier diode D1, and the anode of the rectifier diode D1 is respectively connected with the output end of the three-terminal regulator U1, one end of a resistor R1, one end of a capacitor C3, the cathode of a rectifier diode D2, one end of a resistor R3 and the output end VCC; the other end of the resistor R1 is respectively connected with the adjusting end of the three-terminal voltage regulator U1, the anode of the rectifier diode D2, one end of the capacitor C2 and one end of the resistor R2; the other end of the resistor R3, the positive end and the adjusting end of the reference source U2, one end of the capacitor C4, one end of the resistor R4 and the resistor R6 are all connected to the output end VF 3; the other end of the resistor R4 and one end of the resistor R5 are both connected to the output end VF 1; the other end of the resistor R6 and one end of the resistor R7 are both connected to the output end VF 2; the other end of the capacitor C1, the other end of the capacitor C2, the other end of the resistor R2, the other end of the capacitor C3, the negative terminal of the reference source U2, the other end of the capacitor C4, the other end of the resistor R5 and the other end of the resistor R7 are all connected to GND.

4. The ultra-low range dimming LED driving circuit based on PWM and current dual regulation of claim 2, wherein said signal filtering circuit sub-unit has three inputs VJI, VCC, VF1, one output VJO; the input end VJI is respectively connected with one end of the resistor R9, one end of the resistor R10 and one end of the resistor R11; the input end VCC is respectively connected with the other end of the resistor R9, the cathode of the rectifier diode D3, the positive power supply end of the operational amplifier U3A and one end of the capacitor C6; the other end of the resistor R11 is respectively connected with the anode of the rectifier diode D3, the cathode of the rectifier diode D4, one end of the capacitor C5 and the non-inverting end of the operational amplifier U3A; the inverting end of the operational amplifier U3A is respectively connected with the output end of the operational amplifier U3A and the anode of the Schottky diode D6; the input terminal VF1 is connected to the non-inverting terminal of the operational amplifier U3B; the inverting terminal and the output terminal of the operational amplifier U3B are connected to the anode of the Schottky diode D5; the cathode of the schottky diode D6, the cathode of the schottky diode D5 and one end of the capacitor C7 are connected to the output end VJO, and the other end of the resistor R10, the anode of the rectifier diode D4, the other end of the capacitor C5, the negative power supply end of the operational amplifier U3A, the other end of the capacitor C6 and the other end of the capacitor C7 are all connected to GND.

5. The ultra-low range dimming LED driving circuit based on PWM and current dual regulation of claim 2, wherein the dimming curve correction circuit subunit has three input terminals VJDI, VCC, VF2, one output terminal VJDO; wherein, the input end VJDI is connected to one end of the resistor R12; the other end of the resistor R12 is respectively connected with one end of a resistor R13 and the non-inverting end of the operational amplifier U4A; the inverting end and the output end of the operational amplifier U4A, and the positive end and the adjusting end of the reference source U7 are connected with one end of a resistor R14; the other end of the resistor R14, the negative end of the reference source U7 and one end of the resistor R15 are connected to the in-phase end of the operational amplifier U5B; the inverting terminal and the output terminal of the operational amplifier U5B are both connected to one terminal of the resistor R17; the other end of the resistor R17 and one end of the resistor R16 are connected with the same-phase end of the operational amplifier U5A; the input terminal VF2 is connected to the non-inverting terminal of the operational amplifier U4B; the inverting end and the output end of the operational amplifier U4B are connected to the other end of the resistor R16; the inverting terminal of the operational amplifier U5A is connected to one terminal of the resistor R18 and one terminal of the resistor R19, respectively; the other end of the resistor R19, the output end of the operational amplifier U5 and the in-phase end of the operational amplifier U6A are connected; the inverting terminal and the output terminal of the operational amplifier U6A are both connected to one terminal of the resistor R20; the other end of the resistor R20 and one end of the resistor R21 are both connected to the output end VJDO; the input end VCC is respectively connected with one end of a capacitor C8, one end of a capacitor C9, one end of a capacitor C10, a positive power supply end of an operational amplifier U4A, a positive power supply end of an operational amplifier U5A and a positive power supply end of an operational amplifier U6A; the other end of the capacitor C8, the other end of the capacitor C9, the other end of the capacitor C10, the other end of the resistor R13, the other end of the resistor R15, the other end of the resistor R18, the other end of the resistor R21, the negative power supply end of the operational amplifier U4A, the negative power supply end of the operational amplifier U5A and the negative power supply end of the operational amplifier U6A are connected to GND.

6. The ultra-low range dimming LED driving circuit based on PWM and current dual regulation of claim 2, wherein the PWM generation circuit subunit has two input terminals MOD, VCC, and one output terminal DM; the input end MOD is connected with one end of the capacitor C11 and the MOD end of the PWM generator LTC6992S 6-1; the V + end of the PWM generator, one end of the resistor R24 and one end of the capacitor C12 are all connected to the input end VCC; the OUT end of the PWM generator is connected to the output end DM; the other end of the resistor R24 and one end of the resistor R23 are both connected with the DIV end of the PWM generator; the SET end of the PWM generator is connected to one end of a resistor R22; the other end of the resistor R22, the other end of the resistor R23, the GND end of the PWM generator, the other end of the capacitor C11 and the other end of the capacitor C12 are all connected to GND.

7. The ultra-low range dimming LED driving circuit based on PWM and current dual regulation of claim 2, wherein the signal amplitude adjusting circuit subunit has three input terminals VJDI, VCC, VF3, and one output terminal VJTO; wherein the input terminal VF3 is connected to the non-inverting terminal of the operational amplifier U13B; the inverting terminal and the output terminal of the operational amplifier U13B are both connected to one terminal of the resistor R27; the input end VJDI is connected to one end of the resistor R25; the other end of the resistor R25 is respectively connected with one end of a resistor R26 and the non-inverting end of the operational amplifier U13A; the inverting end and the output end of the operational amplifier U13A are both connected with one end of the resistor R28; the other end of the resistor R28 and the other end of the resistor R27 are both connected to the non-inverting end of the operational amplifier U14B; the inverting end of the operational amplifier U14B is connected with one end of the resistor R29 and one end of the resistor R30 respectively; the other end of the resistor R30 and the output end of the operational amplifier U14B are both connected with the non-inverting end of the operational amplifier U14A; the inverting terminal and the output terminal of the operational amplifier U14A are both connected to one terminal of the resistor R31; the other end of the resistor R31 and one end of the resistor R32 are both connected with the same-phase end of the operational amplifier U15A; the inverting terminal and the output terminal of the operational amplifier U15A are connected to the output terminal VJTO; the input end VCC is respectively connected with one end of a capacitor C13, one end of a capacitor C14, one end of a capacitor C15, a positive power supply end of an operational amplifier U13A, a positive power supply end of an operational amplifier U14A and a positive power supply end of an operational amplifier U15A; the other end of the capacitor C13, the other end of the capacitor C14, the other end of the capacitor C15, the other end of the resistor R26, the other end of the resistor R29, the other end of the resistor R32, the negative power supply end of the operational amplifier U13, the negative power supply end of the operational amplifier U14 and the negative power supply end of the operational amplifier U15 are all connected to GND.

8. The ultra-low range dimming LED driving circuit based on PWM and current dual regulation of claim 2, wherein the LED constant current driving circuit unit has three input terminals VIN, VDM, VIM, and one output terminal Io + and Io-; the input end VIN is respectively connected with one end of the capacitor C16, one end of the detection resistor RS1, the IN end of the constant current driving chip U16 (MAX 16832C), and the negative electrode of the schottky diode D7; the other end of the detection resistor RS1, the CS end of the constant current driving chip U16 and one end of the capacitor C18 are connected to the output end Io +; the anode of the schottky diode D7, the Lx1 end and the Lx2 end of the constant current driving chip U16 are connected with one end of the power inductor L1; the other end of the power inductor L1 and the other end of the capacitor C18 are connected to an output end Io-; the input end VDM is connected to one end of the resistor R33; the other end of the resistor R33 is connected with one end of the resistor R34 and the DIM end of the constant current driving chip U16; the input end VIM is connected with one end of the capacitor C17 and the TEMP end of the constant current driving chip U16; the other end of the capacitor C16, the other end of the capacitor C17, and the other end of the resistor R34 are connected to GND, as well as the PGND terminal and GND terminal of the constant current driving chip U16.