CN113725918A

CN113725918A - Multi-loop parallel synchronization method and system for high-power wind power converter

Info

Publication number: CN113725918A
Application number: CN202111112443.6A
Authority: CN
Inventors: 张平; 于彬; 庄圣伦; 曲慧星; 过亮; 刘洋
Original assignee: Nari Technology Co Ltd
Current assignee: Nari Technology Co Ltd
Priority date: 2021-09-23
Filing date: 2021-09-23
Publication date: 2021-11-30

Abstract

The invention discloses a multi-loop parallel synchronization method and a multi-loop parallel synchronization system for a high-power wind power converter, wherein the multi-loop parallel synchronization method for the high-power wind power converter comprises the steps that a main controller generates a synchronization source according to a control time sequence; encoding the synchronous source through a Manchester code encoder to generate a synchronous message; the synchronous message is sent to the slave controllers through the optical fiber transceivers, and the slave controllers generate control interruption, sampling and pulse carrier signals of the slave controllers through the slave machines in the slave controllers, so that the synchronization of the master controllers and the slave controllers is completed; according to the invention, the multi-loop parallel connection of the high-power wind power converter is realized by designing the host and the slave, and the sampling, control and pulse carrier synchronization of the multi-loop of the converter are realized by designing the Manchester code encoder, so that the problems of harmonic circulation and the like when the multiple loops are connected in parallel are solved, and the reliability and anti-interference performance of the multi-loop parallel connection of the high-power wind power converter are improved.

Description

Multi-loop parallel synchronization method and system for high-power wind power converter

Technical Field

The invention relates to the technical field of wind power converter control, in particular to a multi-loop parallel synchronization method and a multi-loop parallel synchronization system for a high-power wind power converter.

Background

Currently, global economic development and population growth continuously expand the energy demand, traditional energy sources are exhausted day by day, and the development of clean renewable energy sources becomes a necessary way for supporting human sustainable development. The conversion from an energy system mainly based on fossil energy to a renewable energy system mainly based on clean low-carbon energy is becoming a core strategy for energy development in various countries. Wind energy is being developed and used in large quantities worldwide as an important renewable energy source. With the continuous development of high-power offshore wind power technology, the continuous improvement of power generation efficiency and the reduction of construction and maintenance cost, a high-power wind power generator set gradually becomes an important direction for offshore wind power development in China in the future.

The wind power converter is a safety key electrical device for grid connection of a wind turbine generator and is a power conversion device with a specific function. The high-power wind power converter generally comprises a plurality of loops, each loop is provided with identical components, and the components comprise a mechanical cabinet body, a main loop, a control system, a cooling system, a power supply system, an auxiliary system and the like.

The input of each loop of the full-power converter is connected with the stator side of the generator of the wind generating set, and the output of each loop of the full-power converter is connected with the same box-type transformer. The output end of each loop is directly short-circuited. The input terminals may be connected to the same winding or to a plurality of windings, depending on the generator winding. Pulse carriers among all loops of the full-power converter need to be synchronized, and the problem of harmonic circulation among the loops can be solved. Generally, the synchronization mode among all loops is a non-coding mode or a single-channel self-defined coding mode. The non-coding scheme is susceptible to interference and thus false synchronization signals. The single-channel self-defined coding is easy to have the situations of packet loss and the like, and the reliability of the operation of the converter is low when the multiple loops of the unit are connected in parallel.

Disclosure of Invention

This section is for the purpose of summarizing some aspects of embodiments of the invention and to briefly introduce some preferred embodiments. In this section, as well as in the abstract and the title of the invention of this application, simplifications or omissions may be made to avoid obscuring the purpose of the section, the abstract and the title, and such simplifications or omissions are not intended to limit the scope of the invention.

The present invention has been made in view of the above-mentioned conventional problems.

Therefore, the invention provides a multi-loop parallel synchronization method for a high-power wind power converter, which can avoid the problems of current imbalance, resonance and the like when a plurality of loops are connected in parallel, ensure the reliable synchronization when the loops are connected in parallel and improve the anti-interference performance.

In order to solve the technical problems, the invention provides the following technical scheme: the method comprises the steps that a main controller generates a synchronous source according to a control time sequence; encoding the synchronous source through a Manchester code encoder to generate a synchronous message; and the synchronous message is sent to the slave controller through the optical fiber transceiver, and the slave computer in the slave controller generates control interruption, sampling and pulse carrier signals of the slave controller so as to complete the synchronization of the master controller and the slave controller.

As a preferred scheme of the multi-loop parallel synchronization method of the high-power wind power converter, the method comprises the following steps: the main controller comprises a central processing unit and a host; the host comprises a main FPGA device and a PI controller; calculating the control time sequence through the central processing unit, and generating a synchronous source by the main FPGA device according to the control time sequence; wherein, the transfer function G(s) of the PI controller is:

the sampling time function T is:

T＝2τK

wherein tau is delay time, s is input, U is active power of the PI controller, and L₁For inductance of incoming line, L₂And K is the regulating coefficient of the PI controller.

As a preferred scheme of the multi-loop parallel synchronization method of the high-power wind power converter, the method comprises the following steps: the adjustment coefficient K may include a value of,

wherein, T_iIs the sampling time constant.

As a preferred scheme of the multi-loop parallel synchronization method of the high-power wind power converter, the method comprises the following steps: the Manchester code encoder comprises a clock unit, a data selector, a serial-parallel converter and a frequency divider; setting a clock period clk and a state count state by the clock unit, the clock period clk being set to clk equal to 500MHz, the state count state being set to state equal to 4; inputting a synchronization source corresponding to a set clock period and state counting to the data selector, dividing the synchronization source into high-level and low-level signals through the data selector, selecting according to the high-level and low-level signals, and sending the selected signals to the serial-parallel converter; performing serial-to-parallel conversion on the selected signal by using the serial-to-parallel converter; and dividing the frequency of the serial-parallel conversion result by the frequency divider to generate the synchronous message.

As a preferred scheme of the multi-loop parallel synchronization method of the high-power wind power converter, the method comprises the following steps: the slave includes a slave FPGA device and a balancing unit.

As a preferred scheme of the multi-loop parallel synchronization method of the high-power wind power converter, the method comprises the following steps: the balance unit comprises a phase discriminator, a mixer, a filter and an oscillator; the phase discriminator performs phase discrimination through Clark conversion Park conversion; the functional expression of the oscillator is as follows:

where w (t) is the oscillation frequency of the output, w_pIs the output frequency of the filter, t is time; the filter filters out harmonic components by adopting the PI controller.

As a preferred scheme of the multi-loop parallel synchronous system of the high-power wind power converter, the invention comprises the following steps: the device comprises a main controller, a synchronization source and a synchronization source, wherein the main controller generates a synchronization source according to a control time sequence; the Manchester code encoder is connected with the main controller and is used for encoding the synchronous source to generate a synchronous message; the optical fiber transceiver is connected with the Manchester code encoder and the slave controller and is used for transmitting the synchronous message to the slave controller; and the slave controller is connected with the optical fiber transceiver and generates control interruption, sampling and pulse carrier signals of the slave controller through the slave in the slave controller so as to complete the synchronization of the master controller and the slave controller.

As a preferred scheme of the multi-loop parallel synchronous system of the high-power wind power converter, the invention comprises the following steps: the main controller comprises a central processing unit and a host; calculating the control time sequence through the central processing unit, and generating a synchronous source by the host according to the control time sequence; the host comprises a main FPGA device and a PI controller.

As a preferred scheme of the multi-loop parallel synchronous system of the high-power wind power converter, the invention comprises the following steps: the Manchester code encoder comprises a clock unit, a data selector, a serial-parallel converter and a frequency divider; the clock unit is used for setting a clock period clk and a state count state, wherein the clock period clk is 500MHz, and the state count state is 4; the data selector is connected with the clock unit and used for dividing a synchronization source corresponding to a set clock period and state counting into high-level and low-level signals and selecting the signals according to the high-level and low-level signals; the serial-parallel converter is connected with the data selector and is used for carrying out serial-parallel conversion on the signal selected by the data selector; and the frequency divider is connected with the serial-parallel converter and used for dividing the frequency of the serial-parallel conversion result to generate the synchronous message.

As a preferred scheme of the multi-loop parallel synchronous system of the high-power wind power converter, the invention comprises the following steps: the slave machine comprises a slave FPGA device and a balancing unit; the balance unit comprises a phase discriminator, a mixer, a filter and an oscillator; the phase discriminator is connected with the filter, the filter is connected with the oscillator, and the oscillator is connected with the mixer; and the filter filters harmonic components by adopting the PI controller.

The invention has the beneficial effects that: according to the invention, the multi-loop parallel connection of the high-power wind power converter is realized by designing the host and the slave, and the sampling, control and pulse carrier synchronization of the multi-loop of the converter are realized by designing the Manchester code encoder, so that the problems of harmonic circulation and the like when the multiple loops are connected in parallel are solved, and the reliability and anti-interference performance of the multi-loop parallel connection of the high-power wind power converter are improved.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise. Wherein:

fig. 1 is a schematic flow chart of a multi-loop parallel synchronization method for a high-power wind power converter according to a first embodiment of the invention;

fig. 2 is a schematic structural diagram of a multi-loop parallel synchronization system of a high-power wind power converter according to a third embodiment of the invention.

Detailed Description

In order to make the aforementioned objects, features and advantages of the present invention comprehensible, specific embodiments accompanied with figures are described in detail below, and it is apparent that the described embodiments are a part of the embodiments of the present invention, not all of the embodiments. All other embodiments, which can be obtained by a person skilled in the art without making creative efforts based on the embodiments of the present invention, shall fall within the protection scope of the present invention.

In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention, but the present invention may be practiced in other ways than those specifically described and will be readily apparent to those of ordinary skill in the art without departing from the spirit of the present invention, and therefore the present invention is not limited to the specific embodiments disclosed below.

Furthermore, reference herein to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one implementation of the invention. The appearances of the phrase "in one embodiment" in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments.

The present invention will be described in detail with reference to the drawings, wherein the cross-sectional views illustrating the structure of the device are not enlarged partially in general scale for convenience of illustration, and the drawings are only exemplary and should not be construed as limiting the scope of the present invention. In addition, the three-dimensional dimensions of length, width and depth should be included in the actual fabrication.

Meanwhile, in the description of the present invention, it should be noted that the terms "upper, lower, inner and outer" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of describing the present invention and simplifying the description, but do not indicate or imply that the referred device or element must have a specific orientation, be constructed in a specific orientation and operate, and thus, cannot be construed as limiting the present invention. Furthermore, the terms first, second, or third are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.

The terms "mounted, connected and connected" in the present invention are to be understood broadly, unless otherwise explicitly specified or limited, for example: can be fixedly connected, detachably connected or integrally connected; they may be mechanically, electrically, or directly connected, or indirectly connected through intervening media, or may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.

Example 1

Referring to fig. 1, a first embodiment of the present invention provides a multi-loop parallel synchronization method for a high-power wind power converter, including:

s1: the main controller 100 generates a synchronization source according to the control timing;

it should be noted that each converter includes a master controller and a plurality of slave controllers.

The main controller 100 includes a central processor 101 and a host 102; the host 102 includes a master FPGA device 102a and a PI controller 102 b; calculating a control time sequence through the central processing unit 101, and generating a synchronous source by the FPGA device 102a according to the control time sequence;

in this embodiment, the PI controller is optimized to accurately control the FPGA device 102a, and the conventional PI controller is optimized by combining the current inner loop of the FPGA device 102a and the design adjustment coefficient K, where the transfer function g(s) of the PI controller 102b is:

the sampling time function T is:

T＝2τK

wherein τ is the delay time, s is the input, U is the active power of the PI controller 102b, L₁For inductance of incoming line, L₂For synchronous inductance, K is the tuning coefficient of PI controller 102 b.

Designing an adjusting coefficient K:

wherein, T_iFor the sampling time constant, the present embodiment sets the sampling time constant to 100 ms.

S2: encoding the synchronous source through a Manchester code encoder 200 to generate a synchronous message;

the manchester code encoder 200 includes a clock unit 201, a data selector 202, a serial-to-parallel converter 203, and a frequency divider 204;

the specific encoding process is as follows: (1) a clock cycle clk and a state count state are set by the clock unit 201, the clock cycle clk is set to 500MHz, and the state count state is set to 4;

(2) inputting the synchronization source corresponding to the set clock period and state count to the data selector 202, dividing the synchronization source into high-level and low-level signals through the data selector 202, selecting according to the high-level and low-level signals, and then sending the selected signals to the serial-parallel converter 203;

the data selector 202 is a four-input data selector, and the data selector 202 selects 0001, 0010, 0100, 1000 signals to send to the serial-to-parallel converter 203 according to the division of the corresponding sync source into 1 and 0, respectively.

(3) Serial-to-parallel converting the selected signal with a serial-to-parallel converter 203;

(4) the serial-to-parallel conversion result is divided by the frequency divider 204 to generate a sync message.

The frequency divider 204 adds or subtracts the signal through a step counter, and the divider generates a pre-signal according to the result generated by the counter and combines the pulse signal to obtain the synchronization message.

S3: the synchronization message is transmitted to the slave controller 400 through the optical fiber transceiver 300, and the slave 401 in the slave controller 400 generates control interrupt, sampling and pulse carrier signals of the converter, thereby completing synchronization between the master controller 100 and the slave controller 400.

Preferably, the optical fiber transceiver 300 of the present embodiment is a 1000M optical fiber transceiver, so as to realize low latency of transmission.

The slave 401 includes a slave FPGA device 401a and a balancing unit 401b, and the present embodiment removes unbalanced current and harmonic voltage between loops by designing the balancing unit 401 b.

Specifically, the balancing unit 401b includes a phase detector, a mixer, a filter, and an oscillator; the phase discriminator carries out phase discrimination through Clark conversion Park conversion;

the functional expression of the oscillator is:

where w (t) is the oscillation frequency of the output, w_pIs the output frequency of the filter, t is time; the filter filters out harmonic components using the PI controller 102 b.

And finally, the frequency spectrum of the oscillation frequency output by the oscillator is linearly shifted through the mixer, so that the problem of harmonic circulation can be effectively suppressed.

Example 2

The technical effects adopted in the method are verified and explained, different methods selected in the embodiment and the method are adopted for comparison and test, and the test results are compared by means of scientific demonstration to verify the real effect of the method.

(1) In the embodiment, a strong interference experiment is performed by using an error code meter, and the bit error rate of the conventional manchester code encoding method and the manchester code encoder 200 designed by the method are respectively compared, so that the manchester code encoder 200 designed by the method has higher anti-interference performance.

Strong interference signals are added 3 seconds before and 3 seconds after transmission, and bit error rates at different times are measured by an error code meter, wherein the manchester code encoder 200 generates 3000 symbols per second, and the results are shown in the following table.

Table 1: and testing the error rate under the interference signal.

Time of measurement	Traditional Manchester code encoding method	Method for producing a composite material
			200s	0.0786％	0.0126％

When a strong interference signal is added, the error rate of the method is lower than that of the traditional Manchester code encoding method, and the anti-interference capability of the method is higher than that of the traditional Manchester code encoding method.

(2) Performing real-time simulation debugging on the converter by using a Signal Tap II Logic Analyzer, and comparing the traditional synchronization method with the converter synchronization performance of the method, wherein a control coefficient K is set to be 0.02; the results are shown in the following table:

table 2: and (5) comparing the synchronization performance.

	Conventional synchronization method	Method for producing a composite material
			Synchronization accuracy	Within 1us	Within 100ns

As can be seen from table 2, compared with the conventional synchronization method, the synchronization reliability of the converter is improved.

Example 3

Referring to fig. 2, a third embodiment of the present invention, which is different from the first embodiment, provides a multi-loop parallel synchronization system for a high-power wind power converter, including,

A main controller 100 for generating a synchronization source according to a control timing; specifically, the main controller 100 includes a central processor 101 and a host 102; calculating a control time sequence through the central processing unit 101, and generating a synchronization source by the host 102 according to the control time sequence; the host 102 includes a master FPGA device 102a and a PI controller 102 b.

The manchester code encoder 200 is connected with the main controller 100 and used for encoding a synchronous source and generating a synchronous message; specifically, the manchester code encoder 200 includes a clock unit 201, a data selector 202, a serial-to-parallel converter 203, and a frequency divider 204; a clock unit 201, configured to set a clock period clk and a state count state, where the clock period clk is 500MHz, and the state count state is 4; a data selector 202 connected to the clock unit 201, for dividing the synchronization source corresponding to the set clock period and state count into high-level and low-level signals; a serial-to-parallel converter 203 connected to the data selector 202 for serial-to-parallel converting the high-level and low-level signals; and the frequency divider 204 is connected with the serial-parallel converter 203 and is used for dividing the frequency of the serial-parallel conversion result to generate the synchronous message.

The optical fiber transceiver 300 is connected with the manchester code encoder 200 and the slave controller 400, and is used for transmitting the synchronization message to the slave controller 400;

the slave controller 400 is connected with the optical fiber transceiver 300, and generates control interruption, sampling and pulse carrier signals of the slave controller 400 through a slave 401 in the slave controller 400 so as to complete the synchronization of the master controller 100 and the slave controller 400; specifically, the slave 401 includes a slave FPGA device 401a and a balancing unit 401 b; the balancing unit 401b comprises a phase discriminator, an amplifier, a mixer, a filter and an oscillator; the balancing unit 401b comprises a phase detector, a mixer, a filter and an oscillator; the phase discriminator is connected with the filter, the filter is connected with the oscillator, and the oscillator is connected with the frequency mixer; the filter filters out harmonic components by using the PI controller 102 b.

The optical fiber transceiver 300 of the present embodiment can be a 1000M optical fiber transceiver, and low latency of transmission is achieved.

It should be recognized that embodiments of the present invention can be realized and implemented by computer hardware, a combination of hardware and software, or by computer instructions stored in a non-transitory computer readable memory. The methods may be implemented in a computer program using standard programming techniques, including a non-transitory computer-readable storage medium configured with the computer program, where the storage medium so configured causes a computer to operate in a specific and predefined manner, according to the methods and figures described in the detailed description. Each program may be implemented in a high level procedural or object oriented programming language to communicate with a computer system. However, the program(s) can be implemented in assembly or machine language, if desired. In any case, the language may be a compiled or interpreted language. Furthermore, the program can be run on a programmed application specific integrated circuit for this purpose.

Further, the operations of processes described herein can be performed in any suitable order unless otherwise indicated herein or otherwise clearly contradicted by context. The processes described herein (or variations and/or combinations thereof) may be performed under the control of one or more computer systems configured with executable instructions, and may be implemented as code (e.g., executable instructions, one or more computer programs, or one or more applications) collectively executed on one or more processors, by hardware, or combinations thereof. The computer program includes a plurality of instructions executable by one or more processors.

Further, the method may be implemented in any type of computing platform operatively connected to a suitable interface, including but not limited to a personal computer, mini computer, mainframe, workstation, networked or distributed computing environment, separate or integrated computer platform, or in communication with a charged particle tool or other imaging device, and the like. Aspects of the invention may be embodied in machine-readable code stored on a non-transitory storage medium or device, whether removable or integrated into a computing platform, such as a hard disk, optically read and/or write storage medium, RAM, ROM, or the like, such that it may be read by a programmable computer, which when read by the storage medium or device, is operative to configure and operate the computer to perform the procedures described herein. Further, the machine-readable code, or portions thereof, may be transmitted over a wired or wireless network. The invention described herein includes these and other different types of non-transitory computer-readable storage media when such media include instructions or programs that implement the steps described above in conjunction with a microprocessor or other data processor. The invention also includes the computer itself when programmed according to the methods and techniques described herein. A computer program can be applied to input data to perform the functions described herein to transform the input data to generate output data that is stored to non-volatile memory. The output information may also be applied to one or more output devices, such as a display. In a preferred embodiment of the invention, the transformed data represents physical and tangible objects, including particular visual depictions of physical and tangible objects produced on a display.

As used in this application, the terms "component," "module," "system," and the like are intended to refer to a computer-related entity, either hardware, firmware, a combination of hardware and software, or software in execution. For example, a component may be, but is not limited to being: a process running on a processor, an object, an executable, a thread of execution, a program, and/or a computer. By way of example, both an application running on a computing device and the computing device can be a component. One or more components can reside within a process and/or thread of execution and a component can be localized on one computer and/or distributed between two or more computers. In addition, these components can execute from various computer readable media having various data structures thereon. The components may communicate by way of local and/or remote processes such as in accordance with a signal having one or more data packets (e.g., data from one component interacting with another component in a local system, distributed system, and/or across a network such as the internet with other systems by way of the signal).

It should be noted that the above-mentioned embodiments are only for illustrating the technical solutions of the present invention and not for limiting, and although the present invention has been described in detail with reference to the preferred embodiments, it should be understood by those skilled in the art that modifications or equivalent substitutions may be made on the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention, which should be covered by the claims of the present invention.

Claims

1. A multi-loop parallel synchronization method for a high-power wind power converter is characterized by comprising the following steps: comprises the steps of (a) preparing a mixture of a plurality of raw materials,

the main controller (100) generates a synchronization source according to the control timing;

encoding the synchronous source through a Manchester code encoder (200) to generate a synchronous message;

and the synchronous message is sent to the slave controller (400) through the optical fiber transceiver (300), and the slave computer (401) in the slave controller (400) generates control interruption, sampling and pulse carrier signals of the slave controller (400), so that the synchronization of the master controller (100) and the slave controller (400) is completed.

2. The multi-loop parallel synchronization method of the high-power wind power converter as claimed in claim 1, wherein: the main controller (100) comprises a central processor (101) and a host (102);

the host (102) comprises a master FPGA device (102a) and a PI controller (102 b);

calculating the control timing by the central processing unit (101), and generating a synchronization source by the main FPGA device (102a) according to the control timing;

wherein the transfer function G(s) of the PI controller (102b) is:

the sampling time function T is:

T＝2τK

wherein tau is the delay time, s is the input, U is the active power of the PI controller (102b), L₁For inductance of incoming line, L₂For synchronous inductance, K is the regulation coefficient of the PI controller (102 b).

3. The multi-loop parallel synchronization method of the high-power wind power converter as claimed in claim 2, characterized in that: the adjustment coefficient K may include a value of,

wherein, T_iIs the sampling time constant.

4. The multi-loop parallel synchronization method for the high-power wind power converter as claimed in claim 1 or 2, wherein: the Manchester code encoder (200) comprises a clock unit (201), a data selector (202), a serial-parallel converter (203) and a frequency divider (204);

setting, by the clock unit (201), a clock period clk to clk of 500MHz and a state count state to state of 4;

inputting a synchronization source corresponding to a set clock period and a set state count to the data selector (202), dividing the synchronization source into high-level and low-level signals through the data selector (202), selecting according to the high-level and low-level signals, and sending the selected signals to the serial-parallel converter (203);

-serial-to-parallel converting said selected signal with said serial-to-parallel converter (203);

and dividing the frequency of the serial-parallel conversion result by the frequency divider (204) to generate the synchronous message.

5. The multi-loop parallel synchronization method of the high-power wind power converter as claimed in claim 4, wherein: the slave (401) comprises a slave FPGA device (401a) and a balancing unit (401 b).

6. The multi-loop parallel synchronization method of the high-power wind power converter as claimed in claim 5, wherein: the balancing unit (401b) comprises a phase detector, a mixer, a filter and an oscillator;

the phase discriminator performs phase discrimination through Clark conversion Park conversion;

the functional expression of the oscillator is as follows:

where w (t) is the oscillation frequency of the output, w_pIs the output frequency of the filter, t is time; the filter filters out harmonic components using the PI controller (102 b).

7. A high-power wind power converter multiloop parallel connection synchronization system is characterized in that: comprises the steps of (a) preparing a mixture of a plurality of raw materials,

a main controller (100) that generates a synchronization source according to a control timing;

the Manchester code encoder (200) is connected with the main controller (100) and is used for encoding the synchronous source and generating a synchronous message;

the optical fiber transceiver (300) is connected with the Manchester code encoder (200) and the slave controller (400) and is used for transmitting the synchronous message to the slave controller (400);

and the slave controller (400) is connected with the optical fiber transceiver (300), and generates control interrupt, sampling and pulse carrier signals of the slave controller (400) through a slave (401) in the slave controller (400), so that the synchronization of the master controller (100) and the slave controller (400) is completed.

8. The high power wind power converter multi-loop parallel synchronization system of claim 7, characterized in that: the main controller (100) comprises a central processor (101) and a host (102);

calculating the control timing by the central processor (101), and generating a synchronization source by the host (102) according to the control timing;

wherein the host (102) comprises a master FPGA device (102a) and a PI controller (102 b).

9. The high-power wind power converter multi-loop parallel synchronization system of claim 7 or 8, characterized in that: the Manchester code encoder (200) comprises a clock unit (201), a data selector (202), a serial-parallel converter (203) and a frequency divider (204);

a clock unit (201) for setting a clock cycle clk and a state count state, wherein the clock cycle clk is 500MHz and the state count state is 4;

the data selector (202) is connected with the clock unit (201) and is used for dividing a synchronization source corresponding to a set clock period and state counting into high-level and low-level signals and selecting the signals according to the high-level and low-level signals;

a serial-to-parallel converter (203) connected to the data selector (202) for serial-to-parallel converting the signal selected by the data selector (202);

and the frequency divider (204) is connected with the serial-parallel converter (203) and is used for dividing the frequency of the serial-parallel conversion result to generate the synchronous message.

10. The high power wind power converter multi-loop parallel synchronization system of claim 9, wherein: the slave (401) comprises a slave FPGA device (401a) and a balancing unit (401 b); the balancing unit (401b) comprises a phase detector, a mixer, a filter and an oscillator; the phase discriminator is connected with the filter, the filter is connected with the oscillator, and the oscillator is connected with the mixer;

wherein the filter filters out harmonic components using the PI controller (102 b).