CN113725290A - Semiconductor structure and forming method thereof - Google Patents

Semiconductor structure and forming method thereof Download PDF

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Publication number
CN113725290A
CN113725290A CN202010454921.0A CN202010454921A CN113725290A CN 113725290 A CN113725290 A CN 113725290A CN 202010454921 A CN202010454921 A CN 202010454921A CN 113725290 A CN113725290 A CN 113725290A
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region
type
doping
base
collector
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杨广立
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Semiconductor Manufacturing International Shanghai Corp
Semiconductor Manufacturing International Beijing Corp
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Semiconductor Manufacturing International Shanghai Corp
Semiconductor Manufacturing International Beijing Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234—Bipolar junction transistors [BJT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1004—Base region of bipolar transistors
    • H01L29/1008—Base region of bipolar transistors of lateral transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73—Bipolar junction transistors
    • H01L29/7302—Bipolar junction transistors structurally associated with other devices

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Bipolar Transistors (AREA)

Abstract

A semiconductor structure and a method of forming the same, comprising: a substrate; a collector region on the substrate; the base region is positioned on the collector region, and the doping type of the base region is opposite to that of the collector region; and the transition region is positioned in the base region, the doping type of the transition region is opposite to that of the base region, the bottom of the transition region is higher than that of the base region, and the top of the transition region is lower than that of the base region. The transition region can be used as the extension of the collector region, so that the effective base region is narrowed, and the current amplification factor beta is increased; when the breakdown voltage (BVceo) between the collector region and the emitter region is detected, the base region at the bottom of the transition region can help the transition region to be depleted, so that the breakdown voltage between the collector region and the emitter region is increased. In addition, the collector region cannot be simply replaced by the transition region, because the collector region surrounds the base regions at the top and the bottom of the transition region, current is effectively isolated from directly flowing to the substrate, and noise is avoided.

Description

Semiconductor structure and forming method thereof
Technical Field
The present invention relates to the field of semiconductor manufacturing technologies, and in particular, to a semiconductor structure and a method for forming the same.
Background
A Bipolar Junction Transistor (BJT) is an important semiconductor device in a semiconductor integrated circuit, and the BJT has an amplifying function and is widely applied to various circuit designs in the industrial and consumer electronics fields, such as a detection circuit, a rectification circuit, an amplification circuit, a switch circuit, a voltage stabilizing circuit, a signal modulation circuit, and the like.
Bipolar junction transistors can be classified into NPN types and PNP types, depending on the structure of the bipolar junction transistor. The bipolar junction transistor is also called a semiconductor triode, and three electrodes are led out from the bipolar junction transistor: the bipolar junction transistor comprises a collector, an emitter and a base, wherein the collector is led out from a collector region in the bipolar junction transistor, the emitter is led out from an emitter region in the bipolar junction transistor, and the base is led out from a base region in the bipolar junction transistor.
However, the current amplification factor β of the bipolar junction transistor provided by the prior art and the breakdown voltage (BVceo) between the collector region and the emitter region cannot be increased at the same time.
Disclosure of Invention
The technical problem to be solved by the invention is to provide a semiconductor structure and a forming method thereof, which can simultaneously increase the current amplification factor beta and the breakdown voltage (BVceo) between a collector region and an emitter region.
To solve the above problems, the present invention provides a semiconductor structure, comprising: a substrate; a collector region on the substrate; the base region is positioned on the collector region, the doping type of the base region is opposite to that of the collector region, and the bottom of the base region is higher than that of the collector region; the transition region is positioned in the base region, the doping type of the transition region is opposite to that of the base region, the bottom of the transition region is higher than that of the base region, and the top of the transition region is lower than that of the base region; and the doping type of the emitter region is opposite to that of the base region, and the bottom of the emitter region is higher than that of the base region.
Optionally, the method further includes: the collector electrode is positioned on the collector region, the doping type of the collector electrode is the same as that of the collector region, and the doping concentration of the collector electrode is greater than that of the collector region; and the base electrode is positioned on the base region, the doping type of the base electrode is the same as that of the base region, and the doping concentration of the base electrode is greater than that of the base region.
Optionally, the method further includes: and the annular isolation structure is positioned on the base region, surrounds the emitter region and part of the base region, and the bottom of the annular isolation structure is higher than that of the base region.
Optionally, the method further includes: the first isolation structure is positioned on the base region and the collector region, the first isolation structure surrounds the base region, and the bottom of the first isolation structure is higher than that of the base region; and the second isolation structure is positioned on the substrate and the collector region, surrounds the collector region, and has a bottom higher than that of the collector region.
Optionally, the doping type of the collector region is N-type doping, the doping type of the base region is P-type doping, the doping type of the emitter region is N-type doping, and the doping type of the transition region is N-type doping.
Optionally, the doping type of the collector region is P-type doping, the doping type of the base region is N-type doping, the doping type of the emitter region is P-type doping, and the doping type of the transition region is P-type doping.
Optionally, the N-type doped dopant ions are N-type ions, and the N-type ions include: phosphorus ions or arsenic ions; the P-type doped doping ions are P-type ions, and the P-type ions comprise: boron ions or indium ions.
Correspondingly, the invention also provides a method for forming the semiconductor structure, which comprises the following steps: providing a substrate; forming a collector region on the substrate; forming a base region on the collector region, wherein the doping type of the base region is opposite to that of the collector region, and the bottom of the base region is higher than that of the collector region; forming a transition region in the base region, wherein the doping type of the transition region is opposite to that of the base region, the bottom of the transition region is higher than that of the base region, and the top of the transition region is lower than that of the base region; and forming an emitter region on the base region, wherein the doping type of the emitter region is opposite to that of the base region, and the bottom of the emitter region is higher than that of the base region.
Optionally, the method further includes: forming a collector electrode on the collector region, wherein the doping type of the collector electrode is the same as that of the collector region, and the doping concentration of the collector electrode is greater than that of the collector region; and forming a base electrode on the base region, wherein the doping type of the base electrode is the same as that of the base region, and the doping concentration of the base electrode is greater than that of the base region.
Optionally, the method further includes: and forming an annular isolation structure on the base region, wherein the annular isolation structure surrounds the emitter region and part of the base region, and the bottom of the annular isolation structure is higher than that of the base region.
Optionally, the method further includes: forming a first isolation structure on the base region and the collector region, wherein the first isolation structure surrounds the base region, and the bottom of the first isolation structure is higher than the bottom of the base region; and forming a second isolation structure on the substrate and the collector region, wherein the second isolation structure surrounds the collector region, and the bottom of the second isolation structure is higher than that of the collector region.
Optionally, the doping type of the collector region is N-type doping, the doping type of the base region is P-type doping, the doping type of the emitter region is N-type doping, and the doping type of the transition region is N-type doping.
Optionally, the doping type of the collector region is P-type doping, the doping type of the base region is N-type doping, the doping type of the emitter region is P-type doping, and the doping type of the transition region is P-type doping.
Optionally, the N-type doped dopant ions are N-type ions, and the N-type ions include: phosphorus ions or arsenic ions; the P-type doped doping ions are P-type ions, and the P-type ions comprise: boron ions or indium ions.
Compared with the prior art, the technical scheme of the invention has the following advantages:
in the structure of the technical scheme of the invention, through the transition region positioned in the base region, the doping type of the transition region is opposite to that of the base region, the bottom of the transition region is higher than that of the base region, and the top of the transition region is lower than that of the base region. Because the doping types of the transition region and the collector region are the same, the transition region can be used as an extension of the collector region, so that an effective base region is narrowed, and a current amplification coefficient beta is increased; when the breakdown voltage (BVceo) between the collector region and the emitter region is detected, the base region at the bottom of the transition region helps the transition region to be depleted, so that the breakdown voltage between the collector region and the emitter region is increased.
In addition, the collector region cannot be simply replaced by the transition region, because the collector region surrounds the base regions at the top and the bottom of the transition region, current is effectively isolated from directly flowing to the substrate, and noise is avoided.
In the forming method of the technical scheme of the invention, the final current amplification factor beta is increased through the transition region formed in the base region. In addition, the doping type of the transition region is opposite to that of the base region, and when the breakdown voltage (BVceo) between the collector region and the emitter region is detected, the base region at the bottom of the transition region helps the transition region to be depleted, so that the breakdown voltage (BVceo) between the collector region and the emitter region is increased.
Drawings
Fig. 1-2 are schematic structural diagrams of a semiconductor structure;
FIG. 3 is a schematic diagram of another semiconductor structure;
fig. 4 to 11 are schematic structural diagrams of steps of a semiconductor structure and a method for forming the same according to an embodiment of the present invention.
Detailed Description
As described in the background, the current amplification factor β and the breakdown voltage (BVceo) between the collector region and the emitter region of the bipolar junction transistor provided by the prior art cannot be increased at the same time. The following detailed description will be made in conjunction with the accompanying drawings.
Referring to fig. 1, a substrate 100 is included; a collector region 101 located on the substrate 100; the base region 102 is located on the collector region 101, the doping type of the base region 102 is opposite to that of the collector region 101, and the bottom of the base region 102 is higher than that of the collector region 101.
Referring to fig. 2, a ring-shaped isolation structure 103, a first isolation structure 104 and a second isolation structure 105 are located on the substrate 100; an emitter region 106 located on the base region 102 surrounded by the annular isolation structure 103, wherein the doping type of the emitter region 106 is opposite to that of the base region 102; a collector 107 located on the collector region 101 between the first isolation structure 104 and the second isolation structure 105, wherein the doping type of the collector 107 is the same as that of the collector region 101, and the doping concentration of the collector 107 is greater than that of the collector region 101; and a base 108 located on the base region 102 between the first isolation structure 104 and the annular isolation structure 103, wherein the doping type of the base 108 is the same as that of the base region 102, and the doping concentration of the base 108 is greater than that of the base region 102.
In this embodiment, since the formed bipolar junction transistor is a parasitic device, the width d1 of the base region 102 (i.e., the distance from the top to the bottom of the base region) in the bipolar junction transistor is fixed and is not easy to change, and since the width of the base region 102 is large, after the majority carriers of the emitter region 106 are injected into the base region 102, and in the process that the majority carriers of the emitter region 106 transit the base region 102, the recombination loss of the majority carriers of the emitter region 106 and the majority carriers in the base region 102 is increased, the number of the majority carriers of the emitter region 106 reaching the collector region 101 is reduced, and further, the current of the collector region 101 is reduced, so that the final current amplification coefficient β is small.
In order to solve the above problem, another method for forming a semiconductor structure is proposed, which will be described in detail below with reference to the accompanying drawings.
Referring to fig. 3, the present embodiment is a method for forming a semiconductor structure, which is further described on the basis of the above embodiment, and the difference between the present embodiment and the above embodiment is: further comprising: the transition region 109 is located in the base region 102, the doping type of the transition region 109 is opposite to that of the base region 102, the top of the transition region 109 is lower than that of the base region 102, and the bottom of the transition region 109 is in contact with the collector region 101.
In this embodiment, since the transition region 109 is formed in the base region 102, the doping type of the transition region 109 is opposite to that of the base region 102, and the top of the transition region 109 is lower than the top of the base region 102, the bottom of the transition region 109 is in contact with the collector region 101, this results in the transition region 109 being integral with the collector region 101, and the width d1 of the base region 102 being smaller, after the majority carriers of the emitter region 106 are injected into the base region 102, and during the majority carriers of the emitter region 106 transit the base region 102, the recombination losses of the majority carriers of the emitter region 106 and the majority carriers in the base region 102 are reduced, the number of the majority carriers of the emitter region 106 reaching the collector region 101 is increased, and then the current of the collector region 101 is increased, so that the final current amplification factor beta is increased.
However, since the bottom of the transition region 109 is integrally contacted with the collector region 101, when the width d1 of the base region 102 is reduced, the distance between the collector region 101 and the emitter region 106 is reduced, and the breakdown voltage (BVceo) between the collector region 101 and the emitter region 106 is reduced, which may easily cause leakage of the semiconductor structure, thereby affecting the performance of the semiconductor structure.
On the basis, the invention provides a semiconductor structure and a forming method thereof. Because the doping types of the transition region and the collector region are the same, the transition region can be used as an extension of the collector region, so that an effective base region is narrowed, and a current amplification coefficient beta is increased; when the breakdown voltage (BVceo) between the collector region and the emitter region is detected, the base region at the bottom of the transition region helps the transition region to be depleted, so that the breakdown voltage between the collector region and the emitter region is increased. In addition, the collector region cannot be simply replaced by the transition region, because the collector region surrounds the base regions at the top and the bottom of the transition region, current is effectively isolated from directly flowing to the substrate, and noise is avoided.
Because the distance between the top of the transition region and the top of the base region is smaller than the distance between the top of the collector region and the top of the base region, after majority carriers of the emitter region are injected into the base region, in the process that the majority carriers of the emitter region cross the base region and reach the transition region, the recombination loss of the majority carriers of the emitter region and the majority carriers in the base region is reduced, the number of the majority carriers of the emitter region reaching the transition region is increased, and because circuit conduction is formed between the transition region and the collector region when power is on, the majority carriers reaching the emitter region of the transition region can be directly collected by the collector region to form collector region current, so that the final current amplification coefficient beta is increased. In addition, because the transition region is formed in the base region, and the doping type of the transition region is opposite to that of the base region, two PN junctions are added in the base region, so that the resistivity of the base region is increased, the breakdown voltage (BVceo) between the collector region and the emitter region is increased, and the performance of the semiconductor structure is improved.
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below.
Fig. 4 to fig. 11 are schematic structural diagrams illustrating a process of forming a semiconductor structure according to an embodiment of the present invention.
Referring to fig. 4, a substrate is provided.
The substrate 200 is one of monocrystalline silicon, polycrystalline silicon, amorphous silicon or silicon on insulator; the substrate 200 may also be a Si substrate, a Ge substrate, a GeSi substrate, or a GaAs substrate. The substrate 200 may be an N-type substrate, a P-type substrate, or an intrinsic substrate. In the present embodiment, the substrate 200 is a Si substrate.
With continued reference to fig. 4, a collector region 201 is formed on the substrate 200.
The process of forming the collector region 201 is a first doping process, the doping type of the first doping process is determined according to the type of the formed bipolar junction transistor, specifically, when the formed bipolar junction transistor is an NPN transistor, the doping type of the collector region 201 is N-type doping, and the doping type of the first doping process is N-type doping; when the formed bipolar junction transistor is a PNP transistor, the doping type of the collector region 201 is P-type doping, and the doping type of the first doping process is P-type doping.
The N-type doped doping ions are N-type ions, and the N-type ions comprise: phosphorus ions or arsenic ions; the P-type doped doping ions are P-type ions, and the P-type ions comprise: boron ions or indium ions.
In this embodiment, the formed bipolar junction transistor is an NPN transistor, and the doping type of the first doping process is N-type doping. In other embodiments, the bipolar junction transistor is a PNP transistor, and the doping type of the first doping process is P-type doping
In this embodiment, the method of the first doping process includes: forming a patterned first photoresist layer (not shown) on the surface of the substrate 200; taking the patterned first photoresist layer as a mask, implanting N-type ions into the substrate 200, and forming the collector region 201 on the substrate 200; after the collector region 201 is formed, the patterned first photoresist layer is removed.
In this embodiment, before the performing the first doping process, the method further includes: a sacrificial oxide layer (not shown) is formed on the surface of the substrate 200, and the sacrificial oxide layer can prevent the surface of the substrate from being damaged by the crystal lattice during the N-type ion implantation.
In this embodiment, after the forming the first doping process, the method further includes: the substrate 200 is subjected to a first annealing process to activate the implanted N-type ions and to diffuse the N-type ions to some extent.
Referring to fig. 5, a base region 202 is formed on the collector region 201, a doping type of the base region 202 is opposite to a doping type of the collector region 201, and a bottom of the base region 202 is higher than a bottom of the collector region 201.
In this embodiment, the doping type of the base region 202 is P-type doping; in other embodiments, the doping type of the base region may also be N-type doping.
In this embodiment, a second doping process is adopted in the process of forming the base region 202, and the method of the second doping process includes: forming a patterned second photoresist layer (not shown) on the surface of the substrate 200, wherein the patterned second photoresist layer exposes a part of the surface of the collector region 201; injecting P-type ions into the substrate 200 by using the patterned second photoresist layer as a mask, and forming a base region 202 on the collector region 201; after forming the base region 202, the patterned second photoresist layer is removed.
In this embodiment, after the second doping process, the method further includes: the substrate 200 is subjected to a second annealing process to activate the implanted P-type ions and to diffuse them to some extent.
In this embodiment, the second annealing treatment and the first annealing treatment are performed in the same process.
Referring to fig. 6, a transition region 203 is formed in the base region 202, a doping type of the transition region 203 is opposite to a doping type of the base region 202, a bottom of the transition region 203 is higher than a bottom of the base region 202, and a top of the transition region 203 is lower than a top of the base region 202.
The doping type of the transition region 203 is opposite to that of the base region 202 through the transition region 203 in the base region 202, the bottom of the transition region 203 is higher than that of the base region 202, and the top of the transition region 203 is lower than that of the base region 202. Since the doping type of the transition region 203 is the same as that of the collector region 201, the transition region 203 can be used as an extension of the collector region 201, so that the effective base region 202 is narrowed, and the current amplification factor β is increased; during the detection of the breakdown voltage (BVceo) between the collector region 201 and the emitter region, the base region 202 at the bottom of the transition region 203 helps the transition region 203 to be depleted, so that the breakdown voltage between the collector region 201 and the emitter region is increased.
In addition, the collector region 201 cannot be simply replaced by the transition region 203, because the collector region 201 surrounds the base regions 202 at the top and the bottom of the transition region 203, thereby effectively isolating current from directly flowing to the substrate 200 and avoiding noise.
In this embodiment, the doping type of the transition region 203 is N-type doping; in other embodiments, the doping type of the transition region is P-type doping.
After forming the transition region 203, further comprising: forming an annular isolation structure on the base region 202, wherein the bottom of the annular isolation structure is higher than the bottom of the base region 202; forming a first isolation structure on the base region 202 and the collector region 201, wherein the first isolation structure surrounds the base region 202, and the bottom of the first isolation structure is higher than the bottom of the base region 202; and forming a second isolation structure on the substrate 200 and the collector region 201, wherein the second isolation structure surrounds the collector region 201, and the bottom of the second isolation structure is higher than that of the collector region 201. Please refer to fig. 7 to 9 for a specific process of forming the ring-shaped isolation structure, the first isolation structure, and the second isolation structure.
Referring to fig. 7, an annular trench 204 is formed on the base region 202, the annular trench 204 surrounds a portion of the base region 202, and the bottom of the annular trench 204 is higher than the bottom of the base region 202.
In this embodiment, the forming of the annular groove 204 further includes: forming a first trench 205 on the base region 202 and the collector region 201, wherein the first trench 205 surrounds the base region 202, and the bottom of the first trench 205 is higher than the bottom of the base region 202; a second trench 206 is formed on the substrate 200 and the collector region 201, the second trench 206 surrounds the collector region 201, and the bottom of the second trench 206 is higher than the bottom of the collector region 201. By forming the annular groove 204, the first groove 205 and the second groove 206 at the same time, the process steps can be effectively saved, and the production efficiency can be improved.
The annular groove 204 functions as: dielectric material is subsequently filled in the annular trench 204 to form an annular isolation structure, which serves to electrically isolate the base and emitter after the base and emitter are subsequently formed.
The first trench 205 and the second trench 206 function to: subsequently, the first trench 205 is filled with a dielectric material to form a first isolation structure, and after the base and the collector are formed subsequently, the first isolation structure plays a role in electrically isolating the base from the emitter; the second trench 206 is subsequently filled with a dielectric material to form a second isolation structure, which subsequently serves to electrically isolate the collector from other circuitry after formation of the collector.
The ring shape of the annular groove 204 is a closed ring shape, wherein the ring shape is a circular ring shape, an elliptical ring shape, a square ring shape or a polygonal ring shape. In the present embodiment, the ring shape of the annular groove 204 is a circular ring shape.
In this embodiment, in order to improve the isolation capability of a first isolation structure and a second isolation structure formed later, both the first trench 205 and the second trench 206 are annular trenches, where the first trench 205 surrounds the periphery of the base region 202, and the second trench 206 surrounds the periphery of the collector region 201.
In the present embodiment, the process of forming the annular trench 204, the first trench 205 and the second trench 206 includes: forming a patterned mask layer (not shown) on the surface of the substrate 200, wherein the patterned mask layer has a ring-shaped opening, a first opening and a second opening (not shown); and etching and removing the substrate, the collector region and the base region with partial thickness by taking the patterned mask layer as a mask, forming the annular groove 204 on the base region, forming the first groove 205 between the base region 202 and the collector region 201, and forming the second groove 206 between the collector region 201 and the substrate 200.
In this embodiment, the annular trench 204, the first trench 205, and the second trench 206 are formed by etching using a dry etching process.
In this embodiment, the bottom dimension of the annular trench 204 is smaller than the top dimension of the annular trench 204, the annular trench 204 has an inverted trapezoidal profile, and the subsequently formed annular isolation structure also has an inverted trapezoidal profile, so that when the annular isolation structure is subsequently etched, since the surface dimension of the annular isolation structure is larger than the bottom dimension, a process window for forming a mask layer for etching the annular isolation structure is larger, and the accuracy of the position for forming the mask layer is improved.
Referring to fig. 8 and 9, fig. 9 is a schematic cross-sectional view taken along a-a line in fig. 8, in which a dielectric material layer is filled in the annular trench 204, the first trench 205, and the second trench 206, an annular isolation structure 207 is formed on the base region 202, a first isolation structure 208 is formed between the base region 202 and the collector region 201, and a second isolation structure 209 is formed between the collector region 201 and the substrate 200.
Wherein the first isolation structure 208 surrounds the base region 202, and the bottom of the first isolation structure 208 is higher than the bottom of the base region 202; the second isolation structure 209 surrounds the collector region 201, and the bottom of the second isolation structure 209 is higher than the bottom of the collector region 201.
The dielectric material layer is made of silicon oxide or silicon oxynitride. In this embodiment, the dielectric material layer is made of silicon oxide, and is formed by a high aspect ratio chemical vapor deposition process, where the process parameters of the high aspect ratio chemical vapor deposition process are as follows: the reaction gas comprises silicon source gas and oxygen source gas, wherein the flow rate of the silicon source gas is 20 sccm-2000 sccm, the flow rate of the oxygen source gas is 10 sccm-1000 sccm, the pressure of the reaction chamber is 1 mTorr-50 Torr, and the temperature of the reaction chamber is 450-800 ℃.
In the present embodiment, before forming the dielectric material layer, a thermal oxidation process is used to form a linear oxide layer (not shown) on the bottom and sidewall surfaces of the ring trench 204, the first trench 205 and the second trench 206. By forming the oxide layer, the interface performance between the dielectric material layer and the side walls of the annular groove 204, the first groove 205 and the second groove 206 is improved,
in other embodiments, the ring-shaped isolation structure, the first isolation structure and the second isolation structure may also be formed before forming the base region and the collector region.
Referring to fig. 10, fig. 10 is a view in the same direction as the view of fig. 9, an emitter region 210 is formed on the base region 202, the doping type of the emitter region 210 is opposite to the doping type of the base region 202, and the bottom of the emitter region 210 is higher than the bottom of the base region 202.
In this embodiment, the emitter region 210 is specifically formed in the base region 202 surrounded by the annular isolation structure 207.
In this embodiment, the doping type of the emitter region 210 is N-type doping; in other embodiments, the doping type of the emitter region may also be P-type doping.
In this embodiment, the process of forming the emitter region 210 adopts a third doping process, and the method of the third doping process includes: forming a patterned third photoresist layer (not shown) on the surface of the substrate 200, wherein the third photoresist layer exposes the sidewall surface and the top surface of the base region 202 surrounded by the annular isolation structure 207; performing N-type ion implantation on the side wall and the top of the base region 202 by using the third photoresist layer as a mask, and forming an emitter region 210 on the surface of the base region 202; after the emitter region is formed, the third photoresist layer is removed.
Referring to fig. 11, after forming the emitting region 210, the method further includes: forming a collector 211 on the collector region 201, wherein the doping type of the collector 211 is the same as that of the collector region 201, and the doping concentration of the collector 211 is greater than that of the collector region 201; a base 212 is formed on the base 202, the doping type of the base 212 is the same as that of the base 202, and the doping concentration of the base 212 is greater than that of the base 202.
The collector electrode 211 is used as a leading-out end of the collector region 201, and the collector region 201 is electrically connected with a metal silicide layer formed later through the collector electrode 211 so as to be further electrically connected with other semiconductor devices or external circuits; the base 212 is used as a base 202 leading-out terminal, and the base 202 is electrically connected with a metal silicide layer formed later through the base 212, so that the base 202 is electrically connected with other semiconductor devices or external circuits.
In this embodiment, the collector 211 is specifically formed in the collector region 201 between the first isolation structure 208 and the second isolation structure 209. The forming method of the collector electrode 211 comprises the following steps: forming a patterned fourth photoresist layer (not shown) on the surface of the substrate 200, so that the surface of the collector region 201 between the first isolation structure 218 and the second isolation structure 219 is exposed; performing N-type ion implantation on the exposed collector region 201 by using the patterned fourth photoresist layer as a mask to form the collector 211; after the collector electrode 211 is formed, the patterned fourth photoresist layer is removed.
In this embodiment, the base electrode 212 is specifically formed between the first isolation structure 208 and the ring-shaped isolation structure 207, and the method for forming the base electrode 211 includes: forming a patterned fifth photoresist layer (not shown) on the surface of the substrate 200, so that the base region 202 between the first isolation structure 208 and the ring-shaped isolation structure 207 is exposed; performing P-type ion implantation on the exposed base region 202 by using the patterned fifth photoresist layer as a mask to form the base electrode 212; and removing the patterned fifth photoresist layer after the base electrode is formed.
Accordingly, in an embodiment of the present invention, a semiconductor structure is further provided, with reference to fig. 11, including: a substrate 200; a collector region 201 on the substrate 200; a base region 202 located on the collector region 201, wherein the doping type of the base region 202 is opposite to that of the collector region 201, and the bottom of the base region 202 is higher than that of the collector region 201; a transition region 203 located in the base region 202, wherein the doping type of the transition region 203 is opposite to that of the base region 202, the bottom of the transition region 203 is higher than that of the base region 202, and the top of the transition region 203 is lower than that of the base region 202; and the emitter region 210 is positioned on the base region 202, the doping type of the emitter region 210 is opposite to that of the base region 202, and the bottom of the emitter region 210 is higher than that of the base region 202.
In this embodiment, the method further includes: a collector 211 located on the collector region 201, wherein the doping type of the collector 211 is the same as that of the collector region 201, and the doping concentration of the collector 211 is greater than that of the collector region 201; a base 212 located on the base 202, wherein the doping type of the base 212 is the same as that of the base 202, and the doping concentration of the base 212 is greater than that of the base 202.
In this embodiment, the method further includes: and the annular isolation structure 207 is positioned on the base region 202, the annular isolation structure 207 surrounds the emitter region 210 and a part of the base region 202, and the bottom of the annular isolation structure 207 is higher than the bottom of the base region 202.
In this embodiment, the method further includes: a first isolation structure 208 located on the base region 202 and the collector region 201, wherein the first isolation structure 208 surrounds the base region 202, and the bottom of the first isolation structure 208 is higher than the bottom of the base region 202; and the second isolation structure 209 is positioned on the substrate 200 and the collector region 201, the second isolation structure 209 surrounds the collector region 201, and the bottom of the second isolation structure 209 is higher than that of the collector region 201.
In this embodiment, the doping type of the collector region 201 is N-type doping, the doping type of the base region 202 is P-type doping, the doping type of the emitter region 210 is N-type doping, and the doping type of the transition region 203 is N-type doping. In other embodiments, the doping type of the collector region is P-type doping, the doping type of the base region is N-type doping, the doping type of the emitter region is P-type doping, and the doping type of the transition region is P-type doping.
In this embodiment, the N-type doped dopant ions are N-type ions, and the N-type ions include: phosphorus ions or arsenic ions; the P-type doped doping ions are P-type ions, and the P-type ions comprise: boron ions or indium ions.
Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be effected therein by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.

Claims (14)

1. A semiconductor structure, comprising:
a substrate;
a collector region on the substrate;
the base region is positioned on the collector region, the doping type of the base region is opposite to that of the collector region, and the bottom of the base region is higher than that of the collector region;
the transition region is positioned in the base region, the doping type of the transition region is opposite to that of the base region, the bottom of the transition region is higher than that of the base region, and the top of the transition region is lower than that of the base region;
and the doping type of the emitter region is opposite to that of the base region, and the bottom of the emitter region is higher than that of the base region.
2. The semiconductor structure of claim 1, further comprising: the collector electrode is positioned on the collector region, the doping type of the collector electrode is the same as that of the collector region, and the doping concentration of the collector electrode is greater than that of the collector region; and the base electrode is positioned on the base region, the doping type of the base electrode is the same as that of the base region, and the doping concentration of the base electrode is greater than that of the base region.
3. The semiconductor structure of claim 1, further comprising: and the annular isolation structure is positioned on the base region, surrounds the emitter region and part of the base region, and the bottom of the annular isolation structure is higher than that of the base region.
4. The semiconductor structure of claim 1, further comprising: the first isolation structure is positioned on the base region and the collector region, the first isolation structure surrounds the base region, and the bottom of the first isolation structure is higher than that of the base region; and the second isolation structure is positioned on the substrate and the collector region, surrounds the collector region, and has a bottom higher than that of the collector region.
5. The semiconductor structure of claim 1, wherein a doping type of the collector region is N-type doping, a doping type of the base region is P-type doping, a doping type of the emitter region is N-type doping, and a doping type of the transition region is N-type doping.
6. The semiconductor structure of claim 1, wherein a doping type of the collector region is P-type doping, a doping type of the base region is N-type doping, a doping type of the emitter region is P-type doping, and a doping type of the transition region is P-type doping.
7. The semiconductor structure of claim 5 or 6, wherein the N-type doped dopant ions are N-type ions comprising: phosphorus ions or arsenic ions; the P-type doped doping ions are P-type ions, and the P-type ions comprise: boron ions or indium ions.
8. A method of forming a semiconductor structure, comprising
Providing a substrate;
forming a collector region on the substrate;
forming a base region on the collector region, wherein the doping type of the base region is opposite to that of the collector region, and the bottom of the base region is higher than that of the collector region;
forming a transition region in the base region, wherein the doping type of the transition region is opposite to that of the base region, the bottom of the transition region is higher than that of the base region, and the top of the transition region is lower than that of the base region;
and forming an emitter region on the base region, wherein the doping type of the emitter region is opposite to that of the base region, and the bottom of the emitter region is higher than that of the base region.
9. The method of forming a semiconductor structure of claim 8, further comprising: forming a collector electrode on the collector region, wherein the doping type of the collector electrode is the same as that of the collector region, and the doping concentration of the collector electrode is greater than that of the collector region; and forming a base electrode on the base region, wherein the doping type of the base electrode is the same as that of the base region, and the doping concentration of the base electrode is greater than that of the base region.
10. The method of forming a semiconductor structure of claim 8, further comprising: and forming an annular isolation structure on the base region, wherein the annular isolation structure surrounds the emitter region and part of the base region, and the bottom of the annular isolation structure is higher than that of the base region.
11. The method of forming a semiconductor structure of claim 8, further comprising: forming a first isolation structure on the base region and the collector region, wherein the first isolation structure surrounds the base region, and the bottom of the first isolation structure is higher than the bottom of the base region; and forming a second isolation structure on the substrate and the collector region, wherein the second isolation structure surrounds the collector region, and the bottom of the second isolation structure is higher than that of the collector region.
12. The method for forming a semiconductor structure according to claim 8, wherein a doping type of the collector region is N-type doping, a doping type of the base region is P-type doping, a doping type of the emitter region is N-type doping, and a doping type of the transition region is N-type doping.
13. The method for forming a semiconductor structure according to claim 8, wherein a doping type of the collector region is P-type doping, a doping type of the base region is N-type doping, a doping type of the emitter region is P-type doping, and a doping type of the transition region is P-type doping.
14. The method of claim 12 or 13, wherein the N-type doped dopant ions are N-type ions, and wherein the N-type ions comprise: phosphorus ions or arsenic ions; the P-type doped doping ions are P-type ions, and the P-type ions comprise: boron ions or indium ions.
CN202010454921.0A 2020-05-26 2020-05-26 Semiconductor structure and forming method thereof Pending CN113725290A (en)

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