CN113725196A - Semiconductor structure and forming method thereof - Google Patents

Semiconductor structure and forming method thereof Download PDF

Info

Publication number
CN113725196A
CN113725196A CN202111013804.1A CN202111013804A CN113725196A CN 113725196 A CN113725196 A CN 113725196A CN 202111013804 A CN202111013804 A CN 202111013804A CN 113725196 A CN113725196 A CN 113725196A
Authority
CN
China
Prior art keywords
alignment mark
layer
repeating structural
dielectric layer
structural units
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202111013804.1A
Other languages
Chinese (zh)
Inventor
于洪浩
王思聪
刘严伟
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yangtze Memory Technologies Co Ltd
Original Assignee
Yangtze Memory Technologies Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yangtze Memory Technologies Co Ltd filed Critical Yangtze Memory Technologies Co Ltd
Priority to CN202111013804.1A priority Critical patent/CN113725196A/en
Publication of CN113725196A publication Critical patent/CN113725196A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/544Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/20Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H10B41/35Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B43/00EEPROM devices comprising charge-trapping gate insulators
    • H10B43/20EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B43/00EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H10B43/35EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544Marks applied to semiconductor devices or parts
    • H01L2223/54426Marks applied to semiconductor devices or parts for alignment

Abstract

The present invention relates to the field of semiconductor manufacturing technologies, and in particular, to a semiconductor structure and a method for forming the same. The semiconductor structure includes: the semiconductor device comprises a substrate, a first electrode and a second electrode, wherein the substrate comprises a semiconductor layer and a top interconnection layer positioned on the top surface of the semiconductor layer; an alignment mark located over the semiconductor layer; the dielectric layer is positioned above the semiconductor layer and comprises a plurality of first repeating structural units which are distributed around the periphery of the alignment mark and are periodically arranged, and the first repeating structural units are used for increasing the contrast between the alignment mark and the dielectric layer. The invention can improve the accuracy and definition of the alignment mark identification, is beneficial to improving the yield of semiconductor products and improving the performance of the semiconductor products.

Description

Semiconductor structure and forming method thereof
Technical Field
The present invention relates to the field of semiconductor manufacturing technologies, and in particular, to a semiconductor structure and a method for forming the same.
Background
With the development of the planar flash memory, the manufacturing process of the semiconductor has been greatly improved. In recent years, however, the development of planar flash memories has met with various challenges: physical limits, existing development technology limits, and storage electron density limits, among others. In this context, to solve the difficulties encountered by flat flash memories and to pursue lower production costs of unit memory cells, various three-dimensional (3D) flash memory structures, such as 3D NOR (3D NOR) flash memory and 3D NAND (3D NAND) flash memory, have come into force.
The 3D NAND memory is based on the small volume and the large capacity, the design concept of the three-dimensional mode layer-by-layer stacking height integration of the storage units is adopted, the memory with high unit area storage density and high-efficiency storage unit performance is produced, and the mainstream process of the design and production of the emerging memory is formed.
Wafer bonding is an important step in semiconductor manufacturing processes. However, in the current wafer bonding process, due to the defects of the bonding alignment mark, the alignment mark cannot be accurately identified in the bonding process, so that alignment deviation and even dislocation are easy to occur, and the wafer bonding quality is affected.
Therefore, how to improve the accuracy of identifying the alignment mark, thereby improving the yield of the semiconductor product, is a technical problem to be solved.
Disclosure of Invention
The invention provides a semiconductor structure and a forming method thereof, which are used for solving the problem of low identification accuracy of an alignment mark in the prior art so as to improve the yield of semiconductor products.
In order to solve the above problems, the present invention provides a semiconductor structure comprising:
the semiconductor device comprises a substrate, a first electrode and a second electrode, wherein the substrate comprises a semiconductor layer and a top interconnection layer positioned on the top surface of the semiconductor layer;
an alignment mark located over the semiconductor layer;
the dielectric layer is positioned above the semiconductor layer and comprises a plurality of first repeating structural units which are distributed around the periphery of the alignment mark and are periodically arranged, and the first repeating structural units are used for increasing the contrast between the alignment mark and the dielectric layer.
Optionally, the first repeating structural unit is made of a first metal material, and the first metal material can generate metal dipole resonance under irradiation of first wavelength light to increase an absorption difference between the alignment mark and the dielectric layer under the first wavelength light.
Optionally, the shape of the first repeating structural unit is a circle, an ellipse or an arbitrary polygon.
Optionally, the dielectric layer is located on the top surface of the semiconductor layer, the top interconnection layer penetrates through the dielectric layer, and the alignment mark is located in the dielectric layer.
Optionally, the dielectric layer is located on the top surface of the semiconductor layer, and the top interconnection layer penetrates through the dielectric layer; the semiconductor structure further includes:
the isolation layer covers the dielectric layer and the top layer interconnection layer, the alignment mark is located in the isolation layer, and projections of the first repeating structural units which are periodically arranged are distributed around the periphery of the projection of the alignment mark in the direction perpendicular to the top surface of the semiconductor layer.
Optionally, the alignment mark includes a plurality of main body portions, and the plurality of first repeating structural units arranged periodically are distributed around the periphery of the main body portions.
Optionally, the alignment mark includes a plurality of mutually separated main body portions, and a plurality of the main body portions are arranged in a windmill shape or an octagonal shape.
Optionally, each of the main body portions has a plurality of second repeating structural units arranged periodically therein, and the second repeating structural units and the first repeating structural units have different absorptance for light with a second wavelength.
Optionally, the second repeating structural unit is made of a second metal material, and the second metal material can generate metal dipole resonance under the irradiation of the second wavelength light to increase an absorption difference between the alignment mark and the dielectric layer under the second wavelength light.
Optionally, the shape of the second repeating structural unit is the same as the shape of the first repeating structural unit.
Optionally, the second repeat unit is different in size from the first repeat unit.
In order to solve the above problem, the present invention further provides a method for forming a semiconductor structure, including the steps of:
providing a substrate, wherein the substrate comprises a semiconductor layer;
forming an alignment mark, a top interconnection layer and a dielectric layer which are positioned above the semiconductor layer, wherein the dielectric layer comprises a plurality of first repeating structural units which are distributed around the periphery of the alignment mark and are periodically arranged, and the first repeating structural units are used for increasing the contrast between the alignment mark and the dielectric layer.
Optionally, the specific steps of forming the alignment mark, the top interconnection layer, and the dielectric layer over the semiconductor layer include:
forming a dielectric layer covering the top surface of the semiconductor layer;
forming the alignment mark, the top interconnection layer and a plurality of first openings distributed around the periphery of the alignment mark in the dielectric layer;
and filling a first metal material into the first opening to form a plurality of first repeating structural units which are periodically arranged, wherein the first metal material can generate metal dipole resonance under the irradiation of first wavelength light so as to increase the difference of the absorption rates of the alignment mark and the dielectric layer under the first wavelength light.
Optionally, the specific steps of forming the alignment mark, the top interconnection layer, and the dielectric layer over the semiconductor layer include:
forming a dielectric layer covering the top surface of the semiconductor layer;
forming the top interconnection layer and a plurality of second openings in the dielectric layer;
filling a first metal material into the second opening to form a plurality of first repeating structural units which are periodically arranged;
forming an isolation layer covering the dielectric layer and the top interconnection layer;
forming an alignment mark in the isolation layer, so that projections of the first repeating structural units which are periodically arranged are distributed around the periphery of the projection of the alignment mark in a direction perpendicular to the top surface of the semiconductor layer, and the first metal material can generate metal dipole resonance under the irradiation of first wavelength light so as to increase the difference of the absorption rate of the alignment mark and the dielectric layer under the first wavelength light.
Optionally, the shape of the first repeating structural unit is a circle, an ellipse or an arbitrary polygon.
Optionally, the specific step of forming the alignment mark in the isolation layer includes:
defining a plurality of main body regions in the isolation layer;
and a plurality of second repeating structural units which are periodically arranged are formed in each main body region, and the absorptivity of the second repeating structural units and the absorptivity of the first repeating structural units to light with a second wavelength are different.
Optionally, the specific step of forming a plurality of second repeating structural units arranged periodically in each of the body regions includes:
etching the isolation layer of the main body region to form a plurality of third openings which are periodically arranged;
and filling a second metal material into the third opening, and forming a plurality of second repeating structural units which are periodically arranged in each main body region, wherein the second metal material can generate metal dipole resonance under the irradiation of the second wavelength light so as to increase the difference of the absorption rates of the alignment mark and the dielectric layer under the second wavelength light.
Optionally, the number of the main body area is a plurality of, and a plurality of the main body area is arranged in a windmill shape or an octagonal shape.
Optionally, the shape of the second repeating structural unit is the same as the shape of the first repeating structural unit.
Optionally, the second repeat unit is different in size from the first repeat unit.
According to the semiconductor structure and the forming method thereof provided by the invention, the plurality of first repeating structural units which are distributed around the periphery of the alignment mark and are periodically arranged are formed in the dielectric layer, and the light and shade contrast between the alignment mark and the dielectric layer is enhanced by using the plurality of first repeating structural units which are periodically arranged, so that the accuracy and definition of the alignment mark identification can be improved in the process of positioning by using the alignment mark, the yield of semiconductor products is improved, and the performance of the semiconductor products is improved.
Drawings
FIG. 1 is a schematic cross-sectional view of a semiconductor structure in a first embodiment of the invention;
FIG. 2 is a schematic top view within the dashed box of FIG. 1;
FIG. 3 is an enlarged schematic view of the circular dashed box of FIG. 2;
FIG. 4 is an enlarged schematic view of the square in phantom in FIG. 2;
FIG. 5 is a flow chart of a method of forming a semiconductor structure in accordance with a first embodiment of the present invention;
FIG. 6 is a schematic cross-sectional view of a semiconductor structure in a second embodiment of the invention;
FIG. 7 is a schematic top view of an alignment mark and a dielectric layer in accordance with a second embodiment of the present invention;
FIG. 8 is an enlarged schematic view of the square in phantom in FIG. 7;
fig. 9 is an enlarged schematic view of the circular dashed box in fig. 7.
Detailed Description
The following detailed description of embodiments of the semiconductor structure and the method for forming the same according to the present invention will be made with reference to the accompanying drawings.
First embodiment
In order to ensure the alignment between two wafers in the wafer bonding process, the wafers need to be positioned by identifying alignment marks on the wafers. However, when the wafer is irradiated with light of a specific wavelength, the alignment mark pattern is blurred due to low contrast between the alignment mark and the dielectric layer around the alignment mark, and the alignment mark cannot be accurately identified, so that the accuracy of wafer positioning is reduced, the final wafer bonding effect is affected, and the yield of the final semiconductor product is affected.
In order to improve the accuracy of the alignment mark recognition, the present embodiment provides a semiconductor structure, fig. 1 is a schematic cross-sectional view of the semiconductor structure according to the first embodiment of the present invention, fig. 2 is a schematic top view within a dashed box in fig. 1, fig. 3 is an enlarged schematic view within a circular dashed box in fig. 2, and fig. 4 is an enlarged schematic view within a square dashed box in fig. 2. As shown in fig. 1-4, the semiconductor structure includes:
the semiconductor device comprises a substrate 10, wherein the substrate 10 comprises a semiconductor layer 11 and a top interconnection layer 13 positioned on the top surface of the semiconductor layer 11;
an alignment mark located above the semiconductor layer 11;
and a dielectric layer 12 located above the semiconductor layer 11, wherein the dielectric layer 12 includes a plurality of first repeating structural units 30 distributed around the periphery of the alignment mark and arranged periodically, and the first repeating structural units 30 are used for increasing the contrast between the alignment mark and the dielectric layer 12.
Specifically, the substrate 10 may be, but is not limited to, a silicon substrate, and in this embodiment, the substrate 10 is illustrated as a silicon substrate. The semiconductor layer 11 is located on the surface of the substrate 10. The semiconductor layer 11 may have a single-layer structure or a multilayer structure. The semiconductor layer 11 may have a CMOS circuit structure, or may have a stacked structure including a plurality of memory cells. The dielectric layer 12 covers the top surface of the semiconductor layer 11. The semiconductor layer 11 includes a bottom surface facing the substrate 10, and a top surface opposite to the bottom surface. The top interconnect layer 13 penetrates the dielectric layer 12 in a direction perpendicular to the top surface of the semiconductor layer 11. One end of the top interconnection layer 13 is used for electrically connecting with the device structure in the semiconductor layer 11, and the other end is used for electrically connecting with an external circuit. The dielectric layer 12 may also have an isolation layer 15 overlying the dielectric layer 12, the alignment mark and the top interconnect layer 13. The material of the dielectric layer 12 may be, but is not limited to, an insulating material such as an oxide material (e.g., silicon dioxide), a nitride material (e.g., silicon nitride), or an oxynitride material (e.g., silicon oxynitride). The material of the top interconnect layer 13 may be, but is not limited to, a metal material, such as tungsten. The isolation layer 15 may have a single-layer structure or a multi-layer structure. The material of the alignment mark is different from that of the dielectric layer 12, for example, the material of the alignment mark may be a metal material.
In the present embodiment, the plurality of first repeating structural units 30 arranged periodically are disposed in the dielectric layer 12 at the periphery of the alignment mark, so as to increase the contrast between the alignment mark and the dielectric layer 12 in the light positioning process, for example, the reflectivity difference or the absorptivity difference of the alignment mark and the dielectric layer 12 to a specific wavelength is adjusted by the plurality of first repeating structural units 30 arranged periodically, so that the accuracy of identifying the alignment mark can be improved, and the positioning accuracy is further improved. The specific shape, size and material of the first repeating structural unit 30 can be selected by those skilled in the art according to actual needs, as long as the contrast between the alignment mark and the dielectric layer 12 during the irradiation of a specific wavelength can be increased. The plurality of the present embodiment means two or more.
Optionally, the dielectric layer 12 is located on the top surface of the semiconductor layer 11, the top interconnection layer 13 penetrates through the dielectric layer 12, and the alignment mark is located in the dielectric layer 12.
Specifically, the alignment mark is disposed in the dielectric layer 12, that is, the alignment mark is also located on the top surface of the semiconductor layer 11, and the alignment mark is disposed on the same layer as the top interconnection layer 13. The first repeating structural units 30 in the dielectric layer 12 are periodically arranged and distributed around the periphery of the alignment mark in the dielectric layer 12.
In some examples, the first repeating structural units 30 arranged periodically may be distributed only in the predetermined region 14 of the dielectric layer 12, and the predetermined region 14 has the alignment mark therein. In other examples, the first repeating structural units 30 arranged in a periodic manner may be distributed in all regions of the dielectric layer 12 except the top interconnection layer 13.
Optionally, the first repeating structural unit 30 is made of a first metal material, and the first metal material can generate metal dipole resonance under irradiation of light with a first wavelength, so as to increase an absorption difference between the alignment mark and the dielectric layer under the light with the first wavelength.
Alternatively, the first repeating structural unit 30 may have a circular, elliptical, or any polygonal shape.
Specifically, the first repeating unit 30 is made of the first metal material. The first metal material may be, but is not limited to, copper, as long as it can emit a metal dipole resonance under the first wavelength light. Under the irradiation of the first wavelength light, the first wavelength light passes through the isolation layer 15 and irradiates the dielectric layer 12. The plurality of first repeating structural units 30 arranged periodically use the metal dipole resonance of the first metal material, that is, the first wavelength light excites the positive and negative dipoles in the first repeating structural unit 14 and generates dipole resonance, and the dipole resonance of the first metal material can continuously absorb the first wavelength light, so that the absorption rate of the first wavelength light can be greatly improved, the absorption rate difference between the alignment mark and the dielectric layer 12 is increased, that is, the light-dark contrast between the alignment mark and the dielectric layer 12 is increased, and the effect of improving the identification accuracy of the alignment mark is further achieved.
The frequency of dipole resonance is related to the period and size of the first repeating structural unit 30, and thus, by adjusting the period and size of the first repeating structural unit 30, adjustment of the absorptivity of the dielectric layer 12 can be achieved. The first repeating structural unit 30 is a square, and the material is the first metal material. By adjusting the side length a1 and/or the period p1 of the first repeating structural unit 30, the reflectivity of the medium layer 12 to light with a specific wavelength (for example, the first wavelength) can be adjusted, so that the absorptivity of the medium layer 12 to light with a specific wavelength can be indirectly adjusted, and the contrast between the alignment mark and the medium layer 12 can be increased. For example, when the side length a1 of the first repeating structural unit 30 is 460nm and the period p1 is 620nm, the difference in reflectance between the dielectric layer 12 and the alignment mark is 51.8% at a wavelength of 629.86nm of the first wavelength light, and a large improvement in the contrast between the alignment mark and the dielectric layer 12 is achieved.
Optionally, the alignment mark includes a plurality of main body portions 141, and the first repeating structural units 30 arranged periodically are distributed around the periphery of the main body portions 141.
Optionally, the alignment mark includes a plurality of main body portions 141 separated from each other, and the main body portions 141 are arranged in a windmill shape or an octagonal shape.
For example, as shown in fig. 2, the number of the main bodies 141 is 4, and 4 main bodies 141 are arranged in a windmill shape. Each of the main body portions 141 has a plurality of the first repeating structural units 30 arranged periodically around the main body portion, and a gap between two adjacent main body portions 141 is filled with the plurality of the first repeating structural units 30 arranged periodically.
Optionally, each of the main bodies 141 has a plurality of second repeating structural units 31 arranged periodically therein, and the second repeating structural units 31 and the first repeating structural units 30 have different absorptance for light with the second wavelength.
Optionally, the second repeating structural unit 31 is made of a second metal material, and the second metal material can generate metal dipole resonance under the irradiation of the second wavelength light, so as to increase an absorption difference between the alignment mark and the dielectric layer 12 under the second wavelength light.
For example, the first repeating structural unit 30 is made of the first metal material. Under the irradiation of the light with the second wavelength, the plurality of first repeating structural units 30 having a periodic structure utilize the metal dipole resonance of the first metal material, that is, the light with the second wavelength excites the positive and negative dipoles in the first repeating structural units 30 and generates dipole resonance, and the light with the third wavelength is continuously absorbed by the dipole resonance in the first metal material, so that the absorptivity of the light with the second wavelength can be greatly improved, that is, the reflectivity of the dielectric layer 12 to the light with the second wavelength is greatly reduced. Meanwhile, the second repeating unit 31 is made of the second metal material. Under the irradiation of the light with the second wavelength, the plurality of second repeating structural units 31 having the periodic arrangement utilize metal dipole resonance of the second metal material, that is, the light with the second wavelength excites positive and negative dipoles in the second repeating structural units 31 and generates dipole resonance, and for the light with the second wavelength, the dipole resonance in the second metal material continuously radiates electromagnetic waves to the outside, so that the reflectivity of the alignment mark to the light with the second wavelength can be greatly improved. The two aspects work together to increase the reflectivity difference between the alignment mark and the dielectric layer 12, i.e. to increase the light and dark contrast between the alignment mark and the dielectric layer 12. The first metal material may be different from the second metal material in kind, for example, the first metal material may have a larger absorptivity to the light of the second wavelength than the second metal material.
Alternatively, the shape of the second repeating unit 31 is the same as the shape of the first repeating unit 30. In one example, the second repeating structural unit 31 and the first repeating structural unit 30 are both rectangular in shape.
In order to further improve the contrast between the alignment mark and the dielectric layer 12, optionally, the size of the second repeating structural unit 31 is different from the size of the first repeating structural unit 30.
In other examples, the alignment mark may be a solid structure, for example, each of the main body portions of the windmill-shaped alignment mark has a solid rectangular shape, i.e., the alignment mark does not have the second repeating structural unit therein.
Moreover, the present embodiments also provide a method of forming a semiconductor structure. Fig. 5 is a flow chart of a method for forming a semiconductor structure according to a first embodiment of the present invention, and a schematic diagram of a semiconductor structure formed according to the present embodiment can be seen in fig. 1 to 4. As shown in fig. 1 to 5, the method for forming the semiconductor structure includes the following steps:
step S11, providing a substrate 10, wherein the substrate 10 includes a semiconductor layer 11 thereon;
step S12, forming an alignment mark, a top interconnection layer 13, and a dielectric layer 12 located above the semiconductor layer 11, where the dielectric layer 12 includes a plurality of first repeating structural units 30 distributed around the periphery of the alignment mark and arranged periodically, and the first repeating structural units 30 are used to increase the contrast between the alignment mark and the dielectric layer 12.
Optionally, the specific steps of forming the alignment mark, the top interconnection layer 13 and the dielectric layer 12 above the semiconductor layer 11 include:
forming a dielectric layer 12 covering the top surface of the semiconductor layer 11;
forming the alignment mark, the top interconnection layer 13 and a plurality of first openings distributed around the periphery of the alignment mark in the dielectric layer 12;
and filling a first metal material into the first opening to form a plurality of first repeating structural units 30 which are periodically arranged, wherein the first metal material can generate metal dipole resonance under the irradiation of first wavelength light so as to increase the difference of the absorption rates of the alignment mark and the dielectric layer 12 under the first wavelength light.
Alternatively, the first repeating structural unit 30 may have a circular, elliptical, or any polygonal shape.
Optionally, the specific steps of forming the alignment mark, the top interconnection layer 13, and the plurality of first openings distributed around the periphery of the alignment mark in the dielectric layer 12 further include:
defining a plurality of body regions in the dielectric layer 12;
a plurality of second repeating structural units 31 are formed in each of the body regions in a periodic arrangement, and the second repeating structural units 31 and the first repeating structural units 30 have different absorptance for light with a second wavelength.
Optionally, the specific step of forming a plurality of second repeating structural units 31 arranged periodically in each of the body regions includes:
etching the dielectric layer 12 in the main body region to form a plurality of third openings which are periodically arranged;
and filling a second metal material into the third opening, and forming a plurality of second repeating structural units 31 arranged periodically in each main body region, wherein the second metal material can generate metal dipole resonance under the irradiation of the light with the second wavelength, so as to increase the difference between the absorption rates of the alignment mark and the dielectric layer 12 under the light with the second wavelength.
Optionally, the number of the main body area is a plurality of, and a plurality of the main body area is arranged in a windmill shape or an octagonal shape.
Alternatively, the shape of the second repeating unit 31 is the same as the shape of the first repeating unit 30.
Alternatively, the size of the second repeating structural unit 31 is different from the size of the first repeating structural unit 30.
In the semiconductor structure and the forming method thereof provided by the present embodiment, the plurality of first repeating structural units are formed in the dielectric layer, and are distributed around the periphery of the alignment mark and are periodically arranged, and the light-dark contrast between the alignment mark and the dielectric layer is enhanced by using the plurality of first repeating structural units which are periodically arranged, so that in the process of positioning by using the alignment mark, the accuracy and the definition of the alignment mark identification can be improved, which is beneficial to improving the yield of semiconductor products and improving the performance of semiconductor products.
Second embodiment
The present detailed description provides a semiconductor structure. Fig. 6 is a schematic cross-sectional view of a semiconductor structure according to a second embodiment of the present invention, fig. 7 is a schematic top view of an alignment mark and a dielectric layer according to the second embodiment of the present invention, fig. 8 is an enlarged schematic view of a square-shaped dashed box in fig. 7, and fig. 9 is an enlarged schematic view of a circular-shaped dashed box in fig. 7. The same parts as those in the first embodiment will not be described again, and the differences from the first embodiment will be mainly described below.
As shown in fig. 6-9, the semiconductor structure includes:
a substrate 40, wherein the substrate 40 comprises a semiconductor layer 41 and a top interconnection layer 43 positioned on the top surface of the semiconductor layer 41;
an alignment mark 46 located above the semiconductor layer 41;
a dielectric layer 42 located above the semiconductor layer 41, wherein the dielectric layer 42 includes a plurality of first repeating structural units 60 distributed around the periphery of the alignment mark 46 and arranged periodically, and the first repeating structural units 30 are used to increase the contrast between the alignment mark and the dielectric layer 12.
In some examples, the first repeating structural units 60 arranged periodically may be distributed only in the predetermined region 44 of the dielectric layer 42, and the projection of the alignment mark 46 in the direction perpendicular to the top surface of the semiconductor layer 41 is located in the predetermined region 44. In other examples, the first repeating structural units 60 arranged in a periodic manner may be distributed throughout the dielectric layer 42.
Optionally, the dielectric layer 42 is located on the top surface of the semiconductor layer 41, and the top interconnection layer 43 penetrates through the dielectric layer 42; the semiconductor structure further includes:
and the isolation layer 45 covers the dielectric layer 42 and the top interconnection layer 43, the alignment mark 46 is located in the isolation layer 45, and projections of a plurality of first repeating structural units 60 which are periodically arranged are distributed around the periphery of the projection of the alignment mark 46 in a direction perpendicular to the top surface of the semiconductor layer 41.
Specifically, the alignment mark 46 is located in the isolation layer 45 above the dielectric layer 42. The material of the isolation layer 45 may be, but is not limited to, an insulating material such as an oxide material (e.g., silicon dioxide), a nitride material (e.g., silicon nitride), or an oxynitride material (e.g., silicon oxynitride).
The material of the first repeating structural unit 60 is taken as the first metal material as an example. Under the irradiation of the first wavelength light, part of the first wavelength light passes through the isolation layer 15 and irradiates the dielectric layer 12, and part of the first wavelength light is directly reflected by the alignment mark 46 in the isolation layer 45. The plurality of first repeating structural units 60 arranged periodically use the metal dipole resonance of the first metal material, that is, the first wavelength light excites positive and negative dipoles in the first repeating structural units 60 and generates dipole resonance, and the dipole resonance of the first metal material continuously absorbs the first wavelength light, so that the absorptivity of the first wavelength light can be greatly improved, the absorptivity difference between the alignment mark 46 and the dielectric layer 42 is increased, that is, the reflectivity difference between the alignment mark 46 and the dielectric layer 42 is increased, the light-dark contrast between the alignment mark 46 and the dielectric layer 42 is increased, and finally the effect of improving the identification accuracy of the alignment mark 46 is achieved.
The alignment mark 46 in this embodiment may be a solid structure, and may include a plurality of second repeating structural units 61 arranged periodically as described in the first embodiment.
Taking the example that the dielectric layer 42 includes a plurality of first repeating structural units 60 arranged periodically as shown in fig. 8, the alignment mark 46 includes a plurality of second repeating structural units 61 arranged periodically as shown in fig. 9, and both the first repeating structural units 60 and the second repeating structural units 61 are square, the reflectivity difference between the alignment mark 46 and the dielectric layer 42 can be adjusted by adjusting the period p3, the side length a3 of the first repeating structural units 60, the period p4 of the second repeating structural units 61, and the side length a 4. When the side length a3 of the first repeating structural unit 60 is 962nm, the period p3 is 1242nm, and the side length a4 of the second repeating structural unit 61 is 460nm, and the period p4 is 620nm, the difference in reflectance between the dielectric layer 42 and the alignment mark 46 is 58.2% at a wavelength of 636.451nm of the second wavelength light, which realizes a great improvement in the light-dark contrast between the alignment mark 46 and the dielectric layer 42.
The present embodiments also provide a method of forming a semiconductor structure. The semiconductor structure formed by the present embodiment is schematically illustrated in fig. 6 to 9. The same parts as those in the first embodiment will not be described again, and the differences from the first embodiment will be mainly described below.
As shown in fig. 6 to 9, the method for forming a semiconductor structure provided in this embodiment includes the following steps:
step S21, providing a substrate 40, wherein the substrate 40 includes a semiconductor layer 41 thereon;
step S22, forming an alignment mark 46, a top interconnection layer 43, and a dielectric layer 42 over the semiconductor layer 41, where the dielectric layer 42 includes a plurality of first repeating structural units 60 distributed around the periphery of the alignment mark 46 and arranged periodically, and the first repeating structural units 60 are used to increase the contrast between the alignment mark 46 and the dielectric layer 42.
Optionally, the specific steps of forming the alignment mark 46, the top interconnection layer 41 and the dielectric layer 42 over the semiconductor layer 41 include:
forming a dielectric layer 42 covering the top surface of the semiconductor layer 41;
forming the top interconnection layer 43 and a plurality of second openings in the dielectric layer 42;
filling a first metal material into the second opening to form a plurality of first repeating structural units 60 arranged periodically;
forming an isolation layer 45 covering the dielectric layer 42 and the top interconnect layer 43;
forming an alignment mark 46 in the isolation layer 45, so that projections of the first repeating structural units 60 arranged periodically in a direction perpendicular to the top surface of the semiconductor layer 41 are distributed around the periphery of the projection of the alignment mark 46, and the first metal material can generate metal dipole resonance under irradiation of first wavelength light to increase the difference between the absorption rates of the alignment mark 46 and the dielectric layer 42 under the first wavelength light.
Optionally, the specific step of forming the alignment mark 46 in the isolation layer 45 includes:
defining a plurality of body regions in the isolation layer 45;
a plurality of second repeating structural units 61 are formed in each of the body regions in a periodic arrangement, and the second repeating structural units 61 and the first repeating structural units 60 have different absorptance for light with a second wavelength.
Optionally, the specific step of forming a plurality of second repeating structural units 61 arranged periodically in each of the body regions includes:
etching the isolation layer 45 of the main body region to form a plurality of third openings which are periodically arranged;
and filling a second metal material into the third opening, and forming a plurality of second repeating structural units 61 arranged periodically in each main body region, wherein the second metal material can generate metal dipole resonance under the irradiation of the light with the second wavelength, so as to increase the difference between the absorptance of the alignment mark 46 and the absorptance of the dielectric layer 45 under the light with the second wavelength.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.

Claims (20)

1. A semiconductor structure, comprising:
the semiconductor device comprises a substrate, a first electrode and a second electrode, wherein the substrate comprises a semiconductor layer and a top interconnection layer positioned on the top surface of the semiconductor layer;
an alignment mark located over the semiconductor layer;
the dielectric layer is positioned above the semiconductor layer and comprises a plurality of first repeating structural units which are distributed around the periphery of the alignment mark and are periodically arranged, and the first repeating structural units are used for increasing the contrast between the alignment mark and the dielectric layer.
2. The semiconductor structure of claim 1, wherein the material of the first repeating structural unit is a first metal material, and the first metal material is capable of generating metal dipole resonance under irradiation of light with a first wavelength to increase an absorption difference between the alignment mark and the dielectric layer under the light with the first wavelength.
3. The semiconductor structure of claim 1, wherein the first repeating structural unit has a circular, elliptical, or arbitrary polygonal shape.
4. The semiconductor structure of claim 1, wherein the dielectric layer is on a top surface of the semiconductor layer, the top interconnect layer extends through the dielectric layer, and the alignment mark is in the dielectric layer.
5. The semiconductor structure of claim 1, wherein the dielectric layer is on a top surface of the semiconductor layer, and the top interconnect layer extends through the dielectric layer; the semiconductor structure further includes: the isolation layer covers the dielectric layer and the top layer interconnection layer, the alignment mark is located in the isolation layer, and projections of the first repeating structural units which are periodically arranged are distributed around the periphery of the projection of the alignment mark in the direction perpendicular to the top surface of the semiconductor layer.
6. The semiconductor structure of claim 1, wherein the alignment mark comprises a plurality of main body portions, and the first repeating structural units are distributed around the periphery of the main body portions.
7. The semiconductor structure of claim 6, wherein the alignment mark comprises a plurality of separated main body portions, and the main body portions are arranged in a windmill or octagonal manner.
8. The semiconductor structure of claim 6, wherein each of the body portions has a plurality of second repeating structural units arranged periodically therein, and the second repeating structural units have a different absorptivity to light of a second wavelength than the first repeating structural units.
9. The semiconductor structure of claim 8, wherein the material of the second repeating structural unit is a second metal material, and the second metal material is capable of generating metal dipole resonance under the irradiation of the light with the second wavelength to increase the difference between the absorption rates of the alignment mark and the dielectric layer under the light with the second wavelength.
10. The semiconductor structure of claim 8, wherein the shape of the second repeating structural unit is the same as the shape of the first repeating structural unit.
11. The semiconductor structure of claim 8, wherein the second repeat unit is a different size than the first repeat unit.
12. A method for forming a semiconductor structure, comprising the steps of:
providing a substrate, wherein the substrate comprises a semiconductor layer;
forming an alignment mark, a top interconnection layer and a dielectric layer which are positioned above the semiconductor layer, wherein the dielectric layer comprises a plurality of first repeating structural units which are distributed around the periphery of the alignment mark and are periodically arranged, and the first repeating structural units are used for increasing the contrast between the alignment mark and the dielectric layer.
13. The method of claim 12, wherein the step of forming the alignment mark, the top interconnect layer and the dielectric layer over the semiconductor layer comprises:
forming a dielectric layer covering the top surface of the semiconductor layer;
forming the alignment mark, the top interconnection layer and a plurality of first openings distributed around the periphery of the alignment mark in the dielectric layer;
and filling a first metal material into the first opening to form a plurality of first repeating structural units which are periodically arranged, wherein the first metal material can generate metal dipole resonance under the irradiation of first wavelength light so as to increase the difference of the absorption rates of the alignment mark and the dielectric layer under the first wavelength light.
14. The method of claim 13, wherein the step of forming the alignment mark, the top interconnect layer and the dielectric layer over the semiconductor layer comprises:
forming a dielectric layer covering the top surface of the semiconductor layer;
forming the top interconnection layer and a plurality of second openings in the dielectric layer;
filling a first metal material into the second opening to form a plurality of first repeating structural units which are periodically arranged;
forming an isolation layer covering the dielectric layer and the top interconnection layer;
forming an alignment mark in the isolation layer, so that projections of the first repeating structural units which are periodically arranged are distributed around the periphery of the projection of the alignment mark in a direction perpendicular to the top surface of the semiconductor layer, and the first metal material can generate metal dipole resonance under the irradiation of first wavelength light so as to increase the difference of the absorption rate of the alignment mark and the dielectric layer under the first wavelength light.
15. The method of claim 12, wherein the first repeating structural unit has a circular, elliptical, or arbitrary polygonal shape.
16. The method as claimed in claim 14, wherein the step of forming the alignment mark in the isolation layer comprises:
defining a plurality of main body regions in the isolation layer;
and a plurality of second repeating structural units which are periodically arranged are formed in each main body region, and the absorptivity of the second repeating structural units and the absorptivity of the first repeating structural units to light with a second wavelength are different.
17. The method as claimed in claim 16, wherein the step of forming a plurality of second repeating units in each of the body regions comprises:
etching the isolation layer of the main body region to form a plurality of third openings which are periodically arranged;
and filling a second metal material into the third opening, and forming a plurality of second repeating structural units which are periodically arranged in each main body region, wherein the second metal material can generate metal dipole resonance under the irradiation of the second wavelength light so as to increase the difference of the absorption rates of the alignment mark and the dielectric layer under the second wavelength light.
18. The method as claimed in claim 16, wherein the number of the body regions is plural, and the plural body regions are arranged in a windmill shape or an octagonal shape.
19. The method of claim 16, wherein the second repeating structural unit has the same shape as the first repeating structural unit.
20. The method of claim 16, wherein the second repeat unit is different in size from the first repeat unit.
CN202111013804.1A 2021-08-31 2021-08-31 Semiconductor structure and forming method thereof Pending CN113725196A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202111013804.1A CN113725196A (en) 2021-08-31 2021-08-31 Semiconductor structure and forming method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202111013804.1A CN113725196A (en) 2021-08-31 2021-08-31 Semiconductor structure and forming method thereof

Publications (1)

Publication Number Publication Date
CN113725196A true CN113725196A (en) 2021-11-30

Family

ID=78679886

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202111013804.1A Pending CN113725196A (en) 2021-08-31 2021-08-31 Semiconductor structure and forming method thereof

Country Status (1)

Country Link
CN (1) CN113725196A (en)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW529149B (en) * 2000-01-11 2003-04-21 Infineon Technologies Ag Method to generate alignment marks
US20040114143A1 (en) * 2002-09-20 2004-06-17 Asml Netherlands B.V. Marker structure for optical alignment of a substrate, a substrate including such a marker structure, an alignment method for aligning to such a marker structure, and a lithographic projection apparatus
US20040262783A1 (en) * 2003-06-27 2004-12-30 Renesas Technology Corp. Semiconductor device with alignment mark
KR20080048395A (en) * 2006-11-28 2008-06-02 엔이씨 일렉트로닉스 가부시키가이샤 Semiconductor device and display device having alignment mark
CN101567302A (en) * 2008-04-23 2009-10-28 力晶半导体股份有限公司 Alignment mark, forming method thereof and alignment method of semiconductor
JP2010287864A (en) * 2009-06-15 2010-12-24 Panasonic Corp Semiconductor device, and method of manufacturing the same

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW529149B (en) * 2000-01-11 2003-04-21 Infineon Technologies Ag Method to generate alignment marks
US20040114143A1 (en) * 2002-09-20 2004-06-17 Asml Netherlands B.V. Marker structure for optical alignment of a substrate, a substrate including such a marker structure, an alignment method for aligning to such a marker structure, and a lithographic projection apparatus
US20040262783A1 (en) * 2003-06-27 2004-12-30 Renesas Technology Corp. Semiconductor device with alignment mark
KR20080048395A (en) * 2006-11-28 2008-06-02 엔이씨 일렉트로닉스 가부시키가이샤 Semiconductor device and display device having alignment mark
CN101567302A (en) * 2008-04-23 2009-10-28 力晶半导体股份有限公司 Alignment mark, forming method thereof and alignment method of semiconductor
JP2010287864A (en) * 2009-06-15 2010-12-24 Panasonic Corp Semiconductor device, and method of manufacturing the same

Similar Documents

Publication Publication Date Title
TWI474414B (en) Stackable semiconductor device packages and semiconductor process
US10262967B2 (en) Semiconductor packages
KR100602918B1 (en) Method for the production of a self-adjusted structure on a semiconductor wafer
US8426946B2 (en) Laminated semiconductor substrate, laminated chip package and method of manufacturing the same
CN113725197A (en) Semiconductor structure and forming method thereof
US20170098619A1 (en) Semiconductor chip, semiconductor package including the same, and method of fabricating the same
US9147672B1 (en) Three-dimensional multiple chip packages including multiple chip stacks
TWI455373B (en) Method for manufacturing led package structure
JP5852359B2 (en) Memory device and manufacturing method thereof
US9543076B2 (en) Electronic component and method of manufacturing the same
CN101350344B (en) Semiconductor device package and fabricating method thereof
KR20140023055A (en) Semiconductor device and method for forming using the same
US8552534B2 (en) Laminated semiconductor substrate, semiconductor substrate, laminated chip package and method of manufacturing the same
CN113725196A (en) Semiconductor structure and forming method thereof
KR101163223B1 (en) Method for fabricating a via hole and through interconnection having via hole
CN113725195B (en) Method for forming alignment mark
US8552427B2 (en) Fuse part of semiconductor device and method of fabricating the same
CN104091789A (en) Radio frequency module
JP2010087403A (en) Semiconductor device
CN104064524A (en) Radio frequency module forming method
US8975731B2 (en) Semiconductor device having an insulating layer structure and method of manufacturing the same
KR20170120251A (en) Semiconductor Device and Method of Forming the Same
CN112394611B (en) Mask plate and manufacturing method of three-dimensional memory
CN110690219A (en) Three-dimensional memory, preparation method thereof and photoetching mask
CN107706186A (en) The preparation method and its structure of a kind of three-dimensional storage

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination