CN113722065B - Resource scheduling method for embedded heterogeneous hardware based on sub-graph matching - Google Patents
Resource scheduling method for embedded heterogeneous hardware based on sub-graph matching Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
- G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
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- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5027—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
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Abstract
The invention discloses a resource scheduling method for embedded heterogeneous hardware based on sub-graph matching, which comprises scheduling information generation and application component scheduling, wherein an upper computer programs application function components, combines components with larger communication data streams, generates topological relations and corresponding computing resource requirements of each new component after scheduling, acquires IDs of a CPU occupied by a user, IDs of an occupied plug box and interconnection relations of the occupied plug box, generates a plug box topological relation and a state data structure of the CPU in the plug box, adopts a sub-graph matching method of traversing pruning according to the topological relation and corresponding computing resource requirements of each new component after scheduling, searches a feasible scheduling scheme in computing nodes currently owned by the user, performs search space pruning on symmetry of computing nodes with the same number of cores in the same plug box, reduces scheduling time consumption, schedules application components and combines associated components, meets special combination requirements for component deployment, and reduces the scale of the scheduling components.
Description
Technical Field
The invention belongs to the technical field of computers, and particularly relates to a resource scheduling technology.
Background
To cope with the changing application demands, the software and hardware system needs to have new functions quickly realized by component reorganization. The computing nodes in the system comprise CPU, DSP, FPGA and other heterogeneous computing nodes, and dynamic scheduling deployment of software in the heterogeneous computing nodes is a necessary condition for realizing dynamic reorganization of the system.
Scheduling and deployment of heterogeneous computing nodes faces the problems of asymmetric computing capacity and non-full interconnection of the computing nodes, and provides an innovative challenge for real-time performance of dynamic scheduling and deployment. The software dynamic reconfiguration technology is designed, the real-time dynamic reconfiguration of the application component is supported, the upgrade maintenance efficiency can be improved, and the system can be quickly adapted to running under the condition of different hardware configurations.
Disclosure of Invention
In order to solve the problem that the time is consumed for generating the binding scheme of the application function component and the computing nodes in the scene of full interconnection of the computing nodes in the same plug-in box and non-full interconnection of the computing nodes among different plug-in boxes in the prior art, the invention provides a resource scheduling method facing embedded heterogeneous hardware based on sub-graph matching, the front end component is arranged to complete component combination, the related components are deployed on the same computing node, the symmetrical nodes are adopted to prune, and the time consumed for generating the scheme is shortened.
The scheduling method comprises the following steps: the scheduling information generates and applies component scheduling.
The scheduling information generation includes: the upper computer programs application function components, combines components with larger communication data flow, and generates topological relation and corresponding computing resource requirements of the new components after the arrangement; and acquiring the ID of the CPU occupied by the user, the ID of the occupied plug box and the interconnection relation of the occupied plug box, and generating a plug box topological relation and a state data structure of the CPU in the plug box.
Further, the scheduling information generation includes:
step 1: a plurality of new components are generated by combining components with large interaction data flow and components with high coupling degree in an application with a plurality of functional components.
Step 2: analyzing the topological relation of the new components and the resource requirement of the new components for calculating the number of cores, storing the topological relation by adopting an adjacent matrix, storing the resource requirement by adopting a linked list, and setting the states of all the new components as 'temporary unallocated'.
Step 3: analyzing information of the remaining computing nodes, obtaining IDs of the plug boxes where the remaining computing nodes are located, and storing topological relations of the plug boxes by adopting an adjacent matrix.
Step 4: and constructing a data structure of the information of the corresponding node of the plug-in box, storing in a dictionary form, taking a key of the dictionary as a core number, taking a value of the dictionary as an ID list of the node with the core number, storing all data structures according to the list, and setting the states of all computing nodes as unbound.
The application component scheduling includes: according to the topological relation of each new component after arrangement and the corresponding computing resource requirement, a sub-graph matching method of traversing pruning is adopted, and a feasible scheduling scheme is searched in the computing nodes currently owned by the user.
Further, the application component scheduling includes:
step 5: and sequentially selecting a new component with a state of 'temporary unallocated', setting the state of the component as 'allocation in', and if no component with the state of 'temporary unallocated', jumping to the step 9.
Step 6: and sequentially selecting the non-traversed plug boxes corresponding to the current component, and if the plug boxes do not exist, jumping to the step 8.
Step 7: and (3) sequentially selecting the computing node which is not traversed and has the state of 'unbinding' in the plug box selected in the step (6), repeating the step (7) if the symmetric node is failed to be bound with the current component, and setting the state of the computing node as 'bound component' and the state of the component as 'successful allocation' if the binding is successful, and jumping to the step (5).
Further, the symmetric node refers to a computing node with the same number of remaining cores in the same plug-in box.
Further, if the number of cores required by the current component is not greater than the remaining number of cores of the corresponding computing node, binding the current component with the corresponding computing node, wherein any two components with successful allocation states and the bound computing nodes have interconnection relations, and the binding is considered to be successful.
Step 8: setting the state of the current component as 'temporary unassigned', if the current component is not the first component, setting the state of the previous component as 'temporary unassigned', and the state of the computing node corresponding to the component as 'unbound', jumping to the step 6, and if the current component is the first component, jumping to the step 9.
Step 9: if the states of all the components are 'successful allocation', outputting an allocation scheme, ending scheduling, otherwise, outputting scheduling failure.
The invention has the beneficial effects that: the symmetry of the computing nodes with the same number of cores in the same plug-in box is subjected to search space pruning, scheduling time consumption is reduced, application components and combination association components are arranged, special combination requirements for component deployment are met, and the scale of the scheduling components is reduced.
Description of the embodiments
The technical scheme of the invention is specifically described below.
All the calculation nodes in the plug boxes are interacted through a data bus, the plug boxes are connected through optical fibers, only the nodes between the directly connected plug boxes can be interacted with data, and a structure of full interconnection in the plug boxes and non-full interconnection between the plug boxes is formed.
The application software comprises a plurality of functional components, the functional components are arranged to form a new component, the nuclear number requirements and the interconnection relation are given by the original components, an arranged component topological structure is formed, and the mapping relation between the arranged component and the computing nodes is realized.
Step 1: a plurality of new components are generated by combining components with large interaction data flow and components with high coupling degree in an application with a plurality of functional components.
Step 2: analyzing the topological relation of the new components and the resource requirement of the new components for calculating the number of cores, storing the topological relation by adopting an adjacent matrix, storing the resource requirement by adopting a linked list, and setting the states of all the new components as 'temporary unallocated'.
Step 3: analyzing information of the remaining computing nodes, obtaining IDs of the plug boxes where the remaining computing nodes are located, and storing topological relations of the plug boxes by adopting an adjacent matrix.
Step 4: and constructing a data structure of the information of the corresponding node of the plug-in box, storing in a dictionary form, taking a key of the dictionary as a core number, taking a value of the dictionary as an ID list of the node with the core number, storing all data structures according to the list, and setting the states of all computing nodes as unbound.
Step 5: and sequentially selecting a new component with a state of 'temporary unallocated', setting the state of the component as 'allocation in', and if no component with the state of 'temporary unallocated', jumping to the step 9.
Step 6: and sequentially selecting the non-traversed plug boxes corresponding to the current component, and if the plug boxes do not exist, jumping to the step 8.
Step 7: and (3) sequentially selecting the computing node which is not traversed and has the state of 'unbinding' in the plug box selected in the step (6), repeating the step (7) if the symmetric node is failed to be bound with the current component, and setting the state of the computing node as 'bound component' and the state of the component as 'successful allocation' if the binding is successful, and jumping to the step (5).
Step 8: setting the state of the current component as 'temporary unassigned', if the current component is not the first component, setting the state of the previous component as 'temporary unassigned', and the state of the computing node corresponding to the component as 'unbound', jumping to the step 6, and if the current component is the first component, jumping to the step 9.
Step 9: if the states of all the components are 'successful allocation', outputting an allocation scheme, ending scheduling, otherwise, outputting scheduling failure.
The foregoing is illustrative of the present invention and is not to be construed as limiting thereof, but rather as being included within the spirit and scope of the present invention.
Claims (3)
1. The resource scheduling method for the embedded heterogeneous hardware based on sub-graph matching is characterized by comprising the following steps of: scheduling information generation and application component scheduling; the scheduling information generation includes: the upper computer programs an application function component, combines components with larger communication data flow, generates topological relation of each new component after the arrangement and corresponding calculation resource requirement, acquires ID of CPU occupied by a user, ID of an occupied plug box and interconnection relation of the occupied plug box, and generates a plug box topological relation and a state data structure of CPU in the plug box; the application component scheduling includes: according to the topological relation of each new component after arrangement and the corresponding computing resource requirement, searching a feasible scheduling scheme in a computing node currently owned by a user by adopting a sub-graph matching method of traversing pruning;
the scheduling information generation includes:
step 1: combining components with large interaction data flow and components with high coupling degree in application with a plurality of functional components to generate a plurality of new components;
step 2: analyzing the topological relation of the new components and the resource requirement of the new components for calculating the nuclear number, storing the topological relation by adopting an adjacent matrix, storing the resource requirement by adopting a linked list, and setting the states of all the new components as 'temporary unallocated';
step 3: analyzing information of the remaining computing nodes, obtaining IDs of the plug boxes where the remaining computing nodes are located, and storing topological relations of the plug boxes by adopting an adjacent matrix;
step 4: constructing a data structure of node information corresponding to the plug-in box, storing in a dictionary form, taking a key of the dictionary as a core number, taking a value of the dictionary as an ID list of a node with the core number, storing all data structures according to the list, and setting the states of all computing nodes as unbound;
the application component scheduling includes:
step 5: sequentially selecting a new component with a state of 'temporary unallocated', setting the state of the component as 'in allocation', and if no component with a state of 'temporary unallocated', jumping to the step 9;
step 6: sequentially selecting the non-traversed plug boxes corresponding to the current component, and if the plug boxes do not exist, jumping to the step 8;
step 7: sequentially selecting the computing node which is not traversed and has the state of 'unbinding' in the selected plug-in box in the step 6, repeating the step 7 if the symmetric node is failed to be bound with the current component, setting the state of the computing node as 'binding component' and the state of the component as 'successful allocation', and jumping to the step 5 if the binding is successful;
step 8: setting the state of the current component as 'temporary unassigned', if the current component is not the first component, setting the state of the previous component as 'temporary unassigned', and the state of a computing node corresponding to the component as 'unbound', jumping to the step 6, and if the current component is the first component, jumping to the step 9;
step 9: if the states of all the components are 'successful allocation', outputting an allocation scheme, ending scheduling, otherwise, outputting scheduling failure.
2. The resource scheduling method for embedded heterogeneous hardware based on sub-graph matching according to claim 1, wherein the symmetric node comprises: the same number of computing nodes remain in the same plug-in box.
3. The resource scheduling method for embedded heterogeneous hardware based on sub-graph matching according to claim 2, wherein the binding is successful, comprising: if the number of cores required by the current component is not greater than the number of remaining cores of the corresponding computing node, binding the current component with the corresponding computing node, wherein any two components with the successful distribution state and the bound computing nodes have interconnection relations, and the binding is considered to be successful.
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| CN110795219A (en) * | 2019-10-24 | 2020-02-14 | 华东计算技术研究所（中国电子科技集团公司第三十二研究所） | Resource scheduling method and system suitable for multiple computing frameworks |
| CN111147555A (en) * | 2019-12-13 | 2020-05-12 | 苏州博纳讯动软件有限公司 | Heterogeneous resource mixed arrangement method |
| CN111611087A (en) * | 2020-06-30 | 2020-09-01 | 中国人民解放军国防科技大学 | Resource scheduling method, device and system |
| CN112099848A (en) * | 2020-09-11 | 2020-12-18 | 杭州海康威视数字技术股份有限公司 | Service processing method, device and equipment |
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