CN113707652A - Display panel and display device - Google Patents

Display panel and display device Download PDF

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Publication number
CN113707652A
CN113707652A CN202110882228.8A CN202110882228A CN113707652A CN 113707652 A CN113707652 A CN 113707652A CN 202110882228 A CN202110882228 A CN 202110882228A CN 113707652 A CN113707652 A CN 113707652A
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China
Prior art keywords
layer
cathode material
display panel
display
material layer
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Granted
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CN202110882228.8A
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Chinese (zh)
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CN113707652B (en
Inventor
熊志勇
刘海民
吕正霞
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Wuhan Tianma Microelectronics Co Ltd
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Wuhan Tianma Microelectronics Co Ltd
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Priority to CN202110882228.8A priority Critical patent/CN113707652B/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0292Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using a specific configuration of the conducting means connecting the protective devices, e.g. ESD buses
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412Digitisers structurally integrated in a display
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0296Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices involving a specific disposition of the protective devices
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2203/00Indexing scheme relating to G06F3/00 - G06F3/048
    • G06F2203/041Indexing scheme relating to G06F3/041 - G06F3/045
    • G06F2203/04107Shielding in digitiser, i.e. guard or shielding arrangements, mostly for capacitive touchscreens, e.g. driven shields, driven grounds

Abstract

The application discloses display panel and display device, the trompil district has, cut off district and display area, display panel includes the substrate, device layer and wall portion, the device layer is located the display area and includes negative pole and thin-film transistor, the wall portion sets up on cutting off the district and sets up on the substrate through the recess interval, the wall portion includes first cathode material layer, recess department is formed with the second cathode material layer, the section difference has between first cathode material layer and the second cathode material layer, the material on first cathode material layer and second cathode material layer is the same with the material of negative pole. The display panel further comprises a conducting layer, the conducting layer comprises a first conducting layer, at least part of the first conducting layer extends in the partition area, the first conducting layer is electrically connected with at least one second cathode material layer, the other end of the first conducting layer is grounded, so that static electricity entering from the opening area can be conducted away through the first conducting layer, the static electricity dissipation capacity is improved, and abnormal display of display pixels caused by the static electricity generated in the display area is avoided.

Description

Display panel and display device
Technical Field
The application belongs to the technical field of display, and particularly relates to a display panel and a display device.
Background
In electronic devices including display panels, the pursuit of a high screen ratio with a better visual experience has become one of the trends in the development of current display technologies.
At present, display panel usually all can set up devices such as leading camera in the display area, and in order to realize the full screen, often need set up the arrangement that devices such as camera were realized to the trompil region on the display panel, however static very easily enters into display panel through the trompil region in, influences display device's normal function.
Therefore, a new display panel and a new display device are needed.
Disclosure of Invention
The embodiment of the application provides a display panel and a display device, and the display panel and the display device provided by the embodiment of the application have better static dissipation capability and higher display performance.
In a first aspect, an embodiment of the present application provides a display panel having an opening region, a display region disposed around at least a portion of the opening region, and a partition region disposed between the opening region and the display region, the display panel including: a substrate; the device layer is positioned in the display area and arranged on one side of the substrate, and the device layer comprises a cathode and a thin film transistor; the partition part is arranged in the partition area and is arranged on the substrate at intervals through a groove, the partition part comprises a first cathode material layer, a second cathode material layer is formed at the groove, a section difference is formed between the first cathode material layer and the second cathode material layer, and the first cathode material layer and the second cathode material layer are made of the same material as the cathode; the first conducting layer extends at least partially in the partition area, the first conducting layer is electrically connected with at least one second cathode material layer, and the first conducting layer is grounded.
In a second aspect, an embodiment of the present application provides a display device, including: and the display panel is the display panel in the embodiment.
The display panel that this application embodiment provided has the open pore region, cut off district and display area, the display panel includes the substrate, device layer and partition portion, the device layer is located the display area and includes negative pole and thin-film transistor, the partition portion sets up on the partition region and sets up on the substrate through the recess interval, the partition portion includes first cathode material layer, recess department is formed with the second cathode material layer, have the section difference between first cathode material layer and the second cathode material layer, the material of first cathode material layer and second cathode material layer is the same with the material of negative pole, first cathode material layer and second cathode material layer can be formed through the same preparation technology preparation with the negative pole promptly. In order to prevent static electricity from entering the display area from the opening area along the first cathode material layer and the second cathode material layer, the display panel further comprises a conducting layer, the conducting layer comprises a first conducting layer, at least part of the first conducting layer extends in the partition area, the first conducting layer is electrically connected with at least one second cathode material layer, and the other end of the first conducting layer is grounded, so that the static electricity entering from the opening area can be conducted away through the first conducting layer, the static electricity dissipation capacity is improved, and abnormal display of display pixels caused by the static electricity generated in the display area is avoided.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the embodiments of the present application will be briefly described below, and it is obvious that the drawings described below are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a top view of a display panel provided according to an embodiment of the present application;
FIG. 2 is a cross-sectional view of a display panel of FIG. 1 taken along B-B;
FIG. 3 is a top view of the perforated area and the blocking area of the display panel shown in FIG. 2;
FIG. 4 is a cross-sectional view of another display panel along B-B of FIG. 1;
FIG. 5 is a top view of the open area and the blocked area of the display panel shown in FIG. 4;
FIG. 6 is a cross-sectional view of another display panel along B-B of FIG. 1;
FIG. 7 is a top view of the perforated area and the blocking area of the display panel shown in FIG. 6;
FIG. 8 is a cross-sectional view of another display panel along B-B of FIG. 1;
FIG. 9 is a cross-sectional view of another display panel along B-B of FIG. 1;
FIG. 10 is a top view of the open area and the blocked area of the display panel shown in FIG. 9;
FIG. 11 is a cross-sectional view of another display panel along B-B of FIG. 1;
FIG. 12 is a top view of the perforated area and the blocking area of the display panel shown in FIG. 11;
FIG. 13 is a top view of a display panel provided in accordance with another embodiment of the present application;
FIG. 14 is a cross-sectional view of a display panel of FIG. 13 taken along C-C;
fig. 15 is a cross-sectional view of the alternative display panel of fig. 13 taken along C-C.
Detailed Description
Features and exemplary embodiments of various aspects of the present application will be described in detail below. In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the present application by illustrating examples thereof.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
For better understanding of the present application, a display panel according to an embodiment of the present application will be described in detail below with reference to fig. 1 to 15.
Referring to fig. 1 and fig. 2, an embodiment of the present invention provides a display panel 100 having an opening area KA, a display area AA disposed around at least a portion of the opening area KA, and a blocking area NA disposed between the opening area KA and the display area AA, the display panel 100 including: a substrate 1; a device layer 2 located in the display area AA and disposed on one side of the substrate 1, the device layer 2 including a cathode 21 and a thin film transistor 22; the partition parts 3 are arranged in the partition area NA and are arranged on the substrate 1 at intervals through the grooves 33, the partition parts 3 comprise a first cathode material layer 31, a second cathode material layer 32 is formed at the positions of the grooves 33, a step difference is formed between the first cathode material layer 31 and the second cathode material layer 32, and the materials of the first cathode material layer 31 and the second cathode material layer 32 are the same as the material of the cathode 21; a first conductive layer 41, at least a portion of the first conductive layer 41 extending in the isolation area NA, the first conductive layer 41 electrically connected to the at least one second cathode material layer 32, the first conductive layer 41 grounded.
The display panel provided by the embodiment of the application has an opening area KA, a partition area NA and a display area AA, the display panel 100 includes a substrate 1, a device layer 2 and a partition 3, the device layer 2 is located in the display area AA and includes a cathode 21 and a thin film transistor 22, the partition 3 is disposed on the partition area NA and is disposed on the substrate 1 at intervals through a groove 33, the partition 3 includes a first cathode material layer 31, a second cathode material layer 32 is formed at the groove 33, a step difference is formed between the first cathode material layer 31 and the second cathode material layer 32, the first cathode material layer 31 and the second cathode material layer 32 are made of the same material as the cathode 21, that is, the first cathode material layer 31 and the second cathode material layer 32 can be prepared and formed through the same preparation process as the cathode 21. In order to prevent static electricity from entering the display area AA from the opening area KA along the first cathode material layer 31 and the second cathode material layer 32, the display panel 100 further includes a conductive layer 4, the conductive layer 4 includes a first conductive layer 41, at least a portion of the first conductive layer 41 extends in the blocking area NA, the first conductive layer 41 is electrically connected to at least one second cathode material layer 32, and the other end of the first conductive layer 41 is grounded, so that static electricity entering from the opening area KA can be conducted away through the first conductive layer 41, thereby improving static electricity dissipation capability and avoiding abnormal display of the display pixels due to static electricity generated in the display area AA.
Through tests and researches on a large number of poor display panels, the inventor finds that, because the display panel 100 is provided with the open area KA, part of static electricity generated on the surface of the display panel 100 is easily transmitted to the second cathode material layer 32 through the open area KA, because the second cathode material layer 32 is directly contacted with the substrate 1, the static electricity is more easily transmitted to the substrate 1 through the second cathode material layer 32 with high conductivity, most of the static electricity generated on the surface of the display panel 100 is negative charge, so that the negative charge is transmitted from the second cathode material layer 32 to the display area AA along the substrate 1, and through coupling or transmission of film layers between the substrate 1 and the device layer 2 in the display area AA, the threshold of the thin film transistor 22 in the device layer 2 is positively biased, so that the characteristic of the thin film transistor 22 is drifted, and the display of a display pixel close to the open area KA is bright.
It can be understood that the display panel 100 includes the first conductive layer 41, and by electrically connecting the first conductive layer 41 to at least one second cathode material layer 32 and grounding the other end of the first conductive layer 41, the static electricity conducted by the second cathode material layer 32 can be quickly conducted away by the first conductive layer 41, so as to avoid the static electricity from being conducted from the second cathode material layer 32 to the substrate 1, which may cause the display of the display pixel near the open area KA to be bright.
Optionally, the first conductive layer 41 may be electrically connected to a ground line GND of the display panel, the ground line GND is electrically connected to a ground terminal of a driving chip of the display panel through a wire, the ground line GND may transmit static electricity around the partition area NA to the ground terminal of the driving chip, and may transmit static electricity in the display area AA to the ground terminal, so as to prevent the static electricity from damaging structures such as the wire or the electrode of the display area AA.
It can be understood that the first cathode material layer 31 and the second cathode material layer 32 are disconnected during formation without continuity by the partition 3 disposed at an interval, so that even when external water, oxygen, permeates into the display panel 100 along the opening area KA, the introduction of the permeated moisture into the display area AA can be prevented or delayed by the partition 3, and in addition, when static electricity is introduced into the first cathode material layer 31 or the second cathode material layer 32 disposed near the partition area NA, the introduced static electricity can be prevented from being diffused into the display area AA by the partition 3. Alternatively, the partition 3 may be prepared in the same layer as one or more layers of the device layer 2, that is, the partition 3 may be made of only one material or may be made of several materials stacked together. The partition part 3 and the film layer of the device layer 2 are processed and formed at the same time, so that secondary processing is avoided, the process flow is saved, the time is saved, and the cost is reduced.
Further, the first cathode material layer 31 and the second cathode material layer 32 can be prepared in a step with the cathode 21, since the partitions 3 are disposed on the substrate 1 at intervals through the grooves 33, when the cathode material is deposited in the partition area NA, a part of the cathode material is deposited on a side surface of the partition 3 away from the substrate 1 to form the first cathode material layer 31, a part of the cathode material is deposited in the grooves 33 between adjacent partitions 3 to form the second cathode material layer 32, and the partitions 3 have a certain thickness, so that a step difference is formed between the first cathode material layer 31 and the second cathode material layer 32, thereby preventing external moisture from permeating.
Referring to fig. 2 and 3, in order to conduct away static electricity on the second cathode material layer 32 through the first conductive layer 41, the first conductive layer 41 is disposed between the substrate 1 and the first cathode material layer 31 of the partial partition 3 along the first direction Y, the first conductive layer 41 is disposed between two adjacent second cathode material layers 32 along the second direction X and is in contact with the second cathode material layers 32, and the first direction Y intersects with the second direction X. That is, the first conductive layer 41 may be disposed at the groove 33 between two adjacent partitions 3, such that the first conductive layer 41 contacts the first cathode material layer 31 along the first direction Y, and the first conductive layer 41 contacts the second cathode material layer 32 along the second direction X, so that when static electricity is introduced into the first cathode material layer 31 and/or the second cathode material layer 32, the static electricity can be rapidly conducted away through the first conductive layer 41 in contact therewith, thereby preventing the display area AA from generating static electricity to cause abnormal display of the display pixels.
Alternatively, part of the partition 3 may be reused as the first conductive layer 41, that is, the partition 3 may be prepared by using part of the metal layers of the device layer 2, and the first conductive layer 41 is formed by over-etching the part of the partition 3 into an inverted trapezoid structure. By multiplexing part of the partition 3 as the first conductive layer 41, processes and costs can be saved.
Further, in order to facilitate uniform dissipation of static electricity, a first conductive layer 41 is disposed between the first cathode material layer 31 and the substrate 1 of one of the two adjacent partitions 3, that is, a first conductive layer 41 is disposed between any two partitions 3, so that no matter where static electricity occurs in the partition NA, the static electricity can be conducted away from the first conductive layer 41 closest to the partition, thereby further improving the static electricity dissipation performance.
Referring to fig. 3, the second cathode material layers 32 are disposed between two adjacent partitions 3, the orthographic projections of the second cathode material layers 32 on the plane of the display panel 100 are concentrically and annularly distributed, and the first conductive layers 41 are annularly distributed between two adjacent second cathode material layers 32. Taking the opening area KA as a circle, the projections of the second cathode material layers 32 on the plane of the display panel 100 are distributed in a concentric circular shape, the first conductive layers 41 are also distributed in a concentric circular shape and distributed between two adjacent second cathode material layers 32, and each annular first conductive layer 41 can be electrically connected to the ground line GND, so as to improve the electrostatic dissipation capability of the display panel opening area KA. Fig. 2 and 3 do not completely correspond to each other, and fig. 3 does not show all of the second cathode material layer 32 and the first conductive layer 41, and fig. 3 is a schematic diagram of the positional relationship among the second cathode material layer 32, the first conductive layer 4, and the ground line GND.
Referring to fig. 4, the first conductive layer 41 may also be disposed on a side of the second cathode material layer 32 facing the substrate 1, and an orthogonal projection of the first conductive layer 41 on the substrate 1 at least partially overlaps an orthogonal projection of the second cathode material layer 32 on the substrate 1. That is, the first conductive layer 41 is connected to each second cathode material layer 32, so that static electricity transferred from the opening area KA to the second cathode material layer 32 is conducted away through the first conductive layer 41, and abnormal display of the display pixel caused by static electricity generated in the display area AA is avoided.
Referring to fig. 5, in particular, the first conductive layer 41 includes a plurality of first conductive blocks separately disposed, and the first conductive blocks are blocks extending from the boundary of the opening area KA to the display area AA. It is understood that the first conductive layer 41 may cover the blocking area NA, but considering the actual structure of the display panel and the light transmittance of the blocking area NA, the first conductive layer 41 may be provided as a plurality of divided first conductive blocks, and the first conductive blocks may be connected to the plurality of second cathode material layers 32 by providing the first conductive blocks as blocks extending from the boundary of the aperture area KA to the display area AA, thereby improving the static electricity dissipation capability of the display panel 100.
Optionally, a second cathode material layer 32 is disposed between two adjacent partitions 3, each second cathode material layer 32 is concentrically and annularly distributed, and the plurality of first conductive blocks radially extend toward the display area AA with the open-pore area KA as a center, and are electrically connected to at least one second cathode material layer 32. Taking the opening area KA as an example, projections of the second cathode material layers 32 on the plane of the display panel 100 are distributed in a concentric ring shape, and the plurality of first conductive blocks extend along a radial direction of the opening area KA, so that the first conductive blocks can be electrically connected to at least one second cathode material layer 32 surrounding the opening area KA. Optionally, the first conductive layer 41 is provided with at least four first conductive blocks, and the first conductive blocks are distributed at equal intervals along the circumferential direction of the opening area KA, so as to ensure the dissipation effect of static electricity.
Referring to fig. 6 and 7, in order to further improve the electrostatic dissipation capability of the display panel 100, the cathode 21 is provided with a cathode extension portion 211 extending to the isolation area NA, and the cathode extension portion 211 is not connected to the second cathode material layer 32. A barrier wall 5 is disposed between the display area AA and the blocking area NA, the first conductive layer 41 includes a first main body portion 411 and a first extension portion 412 that are connected to each other, an orthogonal projection of the first main body portion 411 and the second cathode material layer 32 on the plane of the display panel 100 overlaps and is electrically connected, and an orthogonal projection of the cathode extension portion 211 and the first extension portion 412 on the plane of the display panel 100 overlaps and is electrically connected between the display area AA and the barrier wall 5.
Specifically, the display panel 100 further includes an encapsulation layer 6 disposed on a side of the device layer 2 facing away from the substrate 1, the encapsulation layer 6 includes a first inorganic encapsulation layer 61, an organic encapsulation layer 62, and a second inorganic encapsulation layer 63, which are stacked, and the second inorganic encapsulation layer 63 covers the organic encapsulation layer 62 and the first cathode material layer 31 and the second cathode material layer 32 of the partition area NA, so as to prevent moisture or other external contaminants from penetrating into the display panel 100. By providing the dam 5 between the display area AA and the blocking area NA, the flow of the material of the organic encapsulation layer 62 can be blocked, and the transmission path of water vapor can be blocked.
Further, the blocking wall 5 divides the isolation area NA into an inner isolation area NA1 close to the display area AA and an outer isolation area NA2 close to the open area KA, that is, the cathode 21 is provided with a cathode extension portion 211 extending to the inner isolation area NA1, the first conductive layer 41 includes a first main body portion 411 disposed at the outer isolation area NA2 and a first extension portion 412 disposed at the inner isolation area NA1, the first main body portion 411 is electrically connected with the second cathode material layer 32 at the outer isolation area NA2, the first extension portion 412 is electrically connected with the cathode extension portion 211 at the inner isolation area NA1, and by electrically connecting the first conductive layer 41 with the cathode 211 and the second cathode material layer 32, static electricity on the cathode 211 and the second cathode material layer 32 can be rapidly conducted away through the first conductive layer 41, thereby preventing static electricity accumulation of the isolation area NA and the display area AA. The overlapping area of the orthographic projections of the cathode extension portion 211 and the first extension portion 412 on the plane of the display panel 100 may be provided with a first via hole H1, the first extension portion 412 may be electrically connected to the cathode extension portion 211 through the first via hole H1, and a diameter of the first via hole H1 is smaller than a width of the first conductive block along a direction perpendicular to the extending direction of the first conductive block, so as to ensure that a portion of the first conductive block located in the inner partition area NA1 is communicated with a portion located in the outer partition area NA 2.
Referring to fig. 8, in order to further prevent static electricity from being transferred from the second cathode material layer 32 to the substrate 1, the substrate 1 includes an organic film layer and an inorganic film layer stacked together, wherein a layer of the substrate 1 closest to the device layer 2 is a top inorganic film layer 14, and the second cathode material layer 32 is located on a surface of the top inorganic film layer 14 close to the device layer 2; or the bottom surface of the second cathode material layer 32 is embedded in the top inorganic film 14, that is, the second cathode material layer 32 is in contact with the top inorganic film 14, rather than directly in contact with the organic film, so as to reduce and slow down the passage of external static electricity into the display area AA, that is, reduce the electrostatic charge transferred from the second cathode material layer 32 to the substrate 1, thereby reducing the influence on the tft 22, and reducing the undesirable phenomenon of pixel display luminance caused by the instability of the tft 22.
Optionally, in the stacking direction perpendicular to the display panel 100, the cross-sectional shape of the groove 33 between two adjacent partition portions 3 is etched to be an inverted trapezoid, which is beneficial to forming a tightly adhered film layer on the sidewall of the partition portion 3 when the second inorganic encapsulation layer 63 is formed by a chemical vapor deposition process, so that the encapsulation effect is improved. Meanwhile, when the groove 33 is etched, the electrostatic charge transferred from the second cathode material layer 32 to the substrate 1 can be reduced by controlling the etching depth.
With reference to fig. 8, a surface of the top inorganic film 14 close to the device layer 2 is defined as a first surface P1, a surface of the second cathode material layer 32 away from the device layer 2 is defined as a second surface P2, and a surface of the top inorganic film 14 away from the device layer 2 is defined as a third surface P3. In order to prevent the electrostatic charges of the second cathode material layer 32 from being transferred to the substrate 1 as much as possible, the distance between the second surface P2 and the third surface P3 is equal to or greater than one third of the distance between the first surface P1 and the third surface P3.
Optionally, the substrate 1 includes a first flexible layer 11, a first inorganic film layer 12, a second flexible layer 13, and a top inorganic film layer 14, which are stacked, and the first inorganic film layer 12 is disposed between the first flexible layer 11 and the second flexible layer 13 to improve the water and oxygen barrier capability of the substrate 1. The material of the first flexible layer 11 and the second flexible layer 13 includes Polyimide (PI) material, and the material of the first inorganic film layer 12 and the top inorganic film layer 14 includes silicon oxide or silicon nitride.
Referring to fig. 9, in order to further improve the electrostatic dissipation capability of the display panel 100, the display panel 100 further includes a touch layer 7 located in the display area AA and disposed on a side of the encapsulation layer 6 away from the substrate 1; and the second conductive layer 42 is located on a side of the encapsulation layer 6 away from the substrate 1, an orthogonal projection of the second conductive layer 42 on a plane where the display panel 100 is located covers the first cathode material layer 31 and the second cathode material layer 32, the second conductive layer 42 is electrically connected with the touch layer 7, and the second conductive layer 42 is grounded. By disposing the second conductive layer 42 in the isolation area NA, which is electrically connected to the touch layer 7 in the display area AA, static electricity in the external environment of the display panel 100 can be quickly conducted away along the second conductive layer 42, thereby reducing and dispersing the passage of external static electricity into the display area AA.
Specifically, the touch layer 7 includes a stacked touch electrode layer 71, a touch insulating layer 72, and a bridging connection layer 73, where the touch electrode layer 71 includes a plurality of touch electrodes insulated from each other, a plurality of second via holes H2 are spaced in the touch insulating layer 72, and the bridging connection layer 73 connects adjacent touch electrodes through the second via holes H2.
It should be noted that, a groove 33 is disposed between two adjacent partition portions 3, when the cathode material is evaporated in the partition area NA, the first cathode material layer 31 and the second cathode material layer 32 are disconnected at the edge of the groove 33 and have a certain step difference, so as to block external moisture from penetrating, when the second conductive layer 42 is disposed on the side of the encapsulation layer 6 away from the substrate 1, in order to ensure that the second conductive layer 42 still keeps communicating at the edge of the groove 33, the second conductive layer 42 may be disposed on the same layer as one of the touch electrode layer 71 and the bridge connecting layer 73, that is, at least one of the touch electrode layer 71 and the bridge connecting layer 73 extends to the partition area NA, so as to form the second conductive layer 42, and fig. 9 illustrates that the second conductive layer 42 and the touch electrode layer 71 are disposed on the same layer. Because the touch electrode layer 71 and the bridging connection layer 73 have a certain thickness, the second conductive layer 42 prepared in the isolation area NA can still be communicated at the edge of the groove 33. Meanwhile, the second conductive layer 42 and one of the touch electrode layer 71 and the bridging connection layer 73 are formed at the same time and can be made of the same material and process, so that the preparation process is simplified.
Referring to fig. 10, the second conductive layer 42 includes a plurality of second conductive blocks separately disposed, and the second conductive blocks are blocks extending from the boundary of the opening area KA to the display area AA. It is understood that the second conductive layer 42 may cover the blocking area NA, but considering the uneven surface of the blocking area NA, the second conductive layer 42 may be provided as a plurality of separate second conductive blocks, and the second conductive blocks may be provided as blocks extending from the boundary of the opening area KA to the display area AA, so that static electricity of the external environment of the display panel 100 may be conducted away along the plurality of second conductive blocks, thereby reducing and dispersing the passage of external static electricity into the display area AA.
Optionally, a second cathode material layer 32 is disposed between two adjacent partitions 3, each second cathode material layer 32 is concentrically and annularly distributed, and the plurality of second conductive blocks radially extend to the display area AA around the opening area KA. Taking the opening area KA as an example, projections of the second cathode material layers 32 on the plane where the display panel 100 is located are distributed in a concentric ring shape, the plurality of second conductive blocks extend along a radial direction of the opening area KA, one end of each second conductive block is electrically connected to the touch layer 7 of the display area AA, and the other end of each second conductive block is electrically connected to the ground line GND of the display panel, so that an electrostatic discharge path formed by the touch layer 7, the second conductive blocks and the ground terminal is formed to discharge static electricity of the external environment of the display panel 100, thereby preventing the static electricity from damaging the wires and the display devices in the display panel 100. The second conductive layer 42 may be provided with at least four second conductive blocks, and the plurality of second conductive blocks are distributed at equal intervals along the circumferential direction of the open area KA, so as to ensure the dissipation effect of static electricity.
Referring to fig. 11 and 12, in order to further improve the electrostatic dissipation capability of the external environment of the display panel 100, the display panel 100 further includes a third conductive layer 43 disposed on a side of the substrate 1 away from the encapsulation layer 6; the isolation area NA is provided with at least one via hole, i.e., a third via hole H3, the second conductive layer 42 is electrically connected to the third conductive layer 43 through the third via hole H3, and the third conductive layer 43 is grounded, so that an electrostatic discharge path formed by the touch layer 7, the second conductive layer 42, the third conductive layer 43 and the ground is formed, so that static electricity in the external environment of the display panel 100 can be conducted to the third conductive layer 43 through the fixed third via hole H3 along the touch layer 7 and the second conductive layer 42 and is rapidly conducted away, thereby further reducing and dispersing a passage of external static electricity into the display area AA. Optionally, the third via H3 is generally set to be 3um to 10um, and the third conductive layer 43 is a copper foil.
It is understood that, when the first conductive layer 41 is provided as a plurality of first conductive blocks distributed at equal intervals along the circumferential direction of the first open area KA, in order to prevent the opening of the third via H3 from affecting the function of the first conductive block, the plurality of first conductive blocks and the plurality of second conductive blocks may be arranged in a staggered manner (not shown in the figure).
Referring to fig. 13 to fig. 15, it should be noted that, a part of static electricity generated in the external environment of the display panel 100 is transmitted to the thin film transistor 22 through the substrate 1 near the open area KA, and another part of static electricity is more easily transmitted from the ink of the display panel 100 to the thin film transistor 22 because the ink is disposed on the inner side of the cover plate of the display panel 100 to solve the problem of light leakage of the frame of the display panel 100. To prevent static electricity from being transferred from the ink of the display panel 100 to the device layer 2, the display panel 100 further includes: a cover plate 8 positioned on one side of the device layer 2, which is far away from the substrate 1; a fourth conductive layer 44 located between the cover plate 8 and the device layer 2, the fourth conductive layer 44 being grounded. By inserting the fourth conductive layer 44 between the cover plate 8 and the device layer 2, static electricity in the external environment can be more easily conducted away through the fourth conductive layer 44 in the process of transferring ink from the inner side of the cover plate 8 to the inside of the display panel 100, so that the problem of display lightening of pixels close to the open area KA caused by static electricity is solved, and meanwhile, the problem of lightening of display pixels on the frame of the display panel 100 caused by static electricity can be solved.
Alternatively, the fourth conductive layer 44 may be formed of an Indium Tin Oxide (ITO) film, a zinc oxide (ZnO) film, or an ultra-thin metal material, and the thickness of the ultra-thin metal material may be less than 10nm, so as to ensure high conductivity and high light transmittance of the fourth conductive layer 44.
Further, the display panel 100 further includes a polarizer 9, the polarizer 9 is disposed between the device layer 2 and the cover plate 8, and the fourth conductive layer 44 is disposed between the polarizer 9 and the device layer 2. Because the optical cement 10 is disposed between the cover plate 8 and the polarizer 9, that is, the fourth conductive layer 44 may be disposed between the polarizer 9 and the device layer 2, or between the optical cement 10 and the cover plate 8, it is ensured that static electricity in the external environment can be conducted away through the fourth conductive layer 44, and the disposition position thereof is not specifically limited herein.
Wherein, in a cross section perpendicular to the display surface of the display panel 100, the orthographic projection edge of the fourth conductive layer 44 on the substrate 1 may extend a predetermined distance in the second direction X relative to the orthographic projection edge of the polarizer 9 on the substrate 1, so that static electricity in the external environment may be more easily conducted away through the fourth conductive layer 44 during the transmission process into the display panel 100.
An embodiment of the present invention further provides a display device, including: the display panel is the display panel in any one of the embodiments. The display device provided by the embodiment of the invention has the technical effects of the technical solutions of the display panel in any of the embodiments, and the explanations of the structures and terms identical to or corresponding to those in the embodiments are not repeated herein. The display device provided by the embodiment of the invention can be a mobile phone and can also be any electronic product with a display function, including but not limited to the following categories: the touch screen display system comprises a television, a notebook computer, a desktop display, a tablet computer, a digital camera, an intelligent bracelet, intelligent glasses, a vehicle-mounted display, medical equipment, industrial control equipment, a touch interaction terminal and the like, and the embodiment of the invention is not particularly limited in this respect.
As will be apparent to those skilled in the art, for convenience and brevity of description, the specific working processes of the systems, modules and units described above may refer to corresponding processes in the foregoing method embodiments, and are not described herein again. It should be understood that the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive various equivalent modifications or substitutions within the technical scope of the present application, and these modifications or substitutions should be covered within the scope of the present application.
It should also be noted that the exemplary embodiments mentioned in this application describe some methods or systems based on a series of steps or devices. However, the present application is not limited to the order of the above-described steps, that is, the steps may be performed in the order mentioned in the embodiments, may be performed in an order different from the order in the embodiments, or may be performed simultaneously.

Claims (18)

1. A display panel having an opening region, a display region provided around at least a part of the opening region, and a partition region provided between the opening region and the display region, the display panel comprising:
a substrate;
the device layer is positioned in the display area and arranged on one side of the substrate, and the device layer comprises a cathode and a thin film transistor;
the partition part is arranged in the partition area and is arranged on the substrate at intervals through a groove, the partition part comprises a first cathode material layer, a second cathode material layer is formed at the groove, a section difference is formed between the first cathode material layer and the second cathode material layer, and the first cathode material layer and the second cathode material layer are made of the same material as the cathode;
the first conducting layer extends at least partially in the partition area, the first conducting layer is electrically connected with at least one second cathode material layer, and the first conducting layer is grounded.
2. The display panel according to claim 1, wherein the first conductive layer is disposed between the substrate and a part of the first cathode material layer of the partition along a first direction, the first conductive layer is disposed between and in contact with two adjacent second cathode material layers along a second direction, and the first direction and the second direction intersect.
3. The display panel according to claim 2, wherein the first conductive layer is provided between the first cathode material layer and the substrate of one of adjacent two of the partitions.
4. The display panel according to claim 2, wherein the orthogonal projections of the second cathode material layers on the plane of the display panel are concentrically and annularly distributed, and the first conductive layer is annularly distributed between two adjacent second cathode material layers.
5. The display panel according to claim 1, wherein the first conductive layer is disposed on a side of the second cathode material layer facing the substrate, and an orthogonal projection of the first conductive layer on the substrate at least partially overlaps an orthogonal projection of the second cathode material layer on the substrate.
6. The display panel according to claim 5, wherein the first conductive layer comprises a plurality of separately provided first conductive blocks, and the first conductive blocks are blocks extending from a boundary of the opening region to the display region.
7. The display panel according to claim 6, wherein the second cathode material layers are concentrically and annularly arranged, and a plurality of the first conductive blocks radially extend toward the display area with the opening area as a center and are electrically connected to at least one of the second cathode material layers.
8. The display panel according to claim 5, wherein the cathode is provided with a cathode extension extending to the partition region, the cathode extension is not connected to the second cathode material layer, and a retaining wall is disposed between the display region and the partition portion;
the first conducting layer comprises a first main body part and a first extension part which are connected with each other, and the first main body part and the orthographic projection of the second cathode material layer on the plane of the display panel are overlapped and electrically connected;
between the display area and the retaining wall, the cathode extension part and the first extension part are overlapped and electrically connected on the orthographic projection of the display panel.
9. The display panel according to claim 1, wherein the substrate comprises an organic film layer and an inorganic film layer which are stacked, wherein one layer of the substrate closest to the device layer is a top inorganic film layer, and the second cathode material layer is located on a surface of the top inorganic film layer close to the device layer;
or the bottom surface of the second cathode material layer is embedded in the top inorganic membrane layer.
10. The display panel according to claim 9,
the surface of one side, close to the device layer, of the top inorganic film layer is a first surface, the surface, far away from the device layer, of the second cathode material layer is a second surface, and the surface, far away from the device layer, of the top inorganic film layer is a third surface;
the distance between the second surface and the third surface is greater than or equal to one third of the distance between the first surface and the third surface.
11. The display panel according to claim 1, characterized in that the display panel further comprises:
the packaging layer is arranged on one side, away from the substrate, of the device layer, and covers the first cathode material layer and the second cathode material layer in the partition area;
the touch layer is positioned in the display area and is arranged on one side, away from the substrate, of the packaging layer;
the second conducting layer is located on one side, away from the substrate, of the packaging layer, the orthographic projection of the second conducting layer on the plane where the display panel is located covers the first cathode material layer and the second cathode material layer, the second conducting layer is electrically connected with the touch layer, and the second conducting layer is grounded.
12. The display panel according to claim 11, wherein the touch layer includes a touch electrode layer, a touch insulating layer, and a bridge layer, and the second conductive layer is provided on the same layer as one of the touch electrode layer and the bridge layer.
13. The display panel according to claim 11, wherein the second conductive layer includes a plurality of separately provided second conductive blocks, and the second conductive blocks are blocks extending from a boundary of the opening region to the display region.
14. The display panel according to claim 13, wherein the second cathode material layers are distributed in a concentric ring shape, and a plurality of the second conductive blocks radially extend to the display area around the opening area.
15. The display panel according to claim 11, wherein the display panel further comprises a third conductive layer disposed on a side of the substrate facing away from the encapsulation layer;
the partition area is provided with at least one through hole, and the second conducting layer is electrically connected with the third conducting layer through the through hole.
16. The display panel according to claim 1, characterized in that the display panel further comprises:
the cover plate is positioned on one side, away from the substrate, of the device layer;
and the fourth conducting layer is positioned between the cover plate and the device layer and is grounded.
17. The display panel of claim 16, further comprising a polarizer disposed between the device layer and the cover sheet, wherein the fourth conductive layer is between the polarizer and the device layer.
18. A display device, comprising: a display panel according to any one of claims 1 to 17.
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