CN113678533A

CN113678533A - System and method for scheduling channels

Info

Publication number: CN113678533A
Application number: CN201980095058.XA
Authority: CN
Inventors: 石靖; 郝鹏; 魏兴光; 苟伟
Original assignee: ZTE Corp
Current assignee: ZTE Corp
Priority date: 2019-03-29
Filing date: 2019-03-29
Publication date: 2021-11-19
Also published as: WO2020198984A1

Abstract

A system and method for scheduling channels is disclosed. In one embodiment, the system and method are configured to allocate a first set of resources to transmit a first signal using a first subcarrier spacing on a first channel; and allocating a second set of resources to transmit a second signal using a second subcarrier spacing on a second channel. The second subcarrier spacing is greater than the first subcarrier spacing. The second channel is scheduled based on the first signal. The end time of the first channel in the time domain is earlier than the start time of the second channel in the time domain.

Description

System and method for scheduling channels

Technical Field

The present disclosure relates generally to wireless communications, and more particularly, to systems and methods for scheduling channels.

Background

5G (fifth generation mobile communication technology) has been developed to improve communication technologies, including enabling use of mobile devices with greater bandwidth, covering wider areas, providing higher throughput, and the like. The 5G New Radio (NR) standard defines a 5G architecture including a Downlink Control Channel (PDCCH) and a Downlink Shared Channel (PDSCH). The PDCCH is configured to carry Downlink Control Information (DCI), such as Downlink scheduling assignment and uplink scheduling grant. The PDSCH is used to carry downlink payload.

Disclosure of Invention

Example embodiments disclosed herein are directed to solving the problems associated with one or more of the problems of the prior art, and providing additional features that will be readily apparent from the following detailed description when taken in conjunction with the accompanying drawings. In accordance with various embodiments, example systems, methods, apparatuses, and computer program products are disclosed herein. It is to be understood, however, that these embodiments are presented by way of example, and not limitation, and that various modifications to the disclosed embodiments may become apparent to those skilled in the art upon reading this disclosure, while maintaining the scope of the disclosure.

In one embodiment, a method performed by a wireless communication node comprises: a first set of resources is allocated to transmit a first signal using a first Sub-carrier spacing (Sub-carrier spacing) on a first channel. The method can comprise the following steps: a second set of resources is allocated to transmit a second signal on a second channel using a second SCS. The second SCS is larger than the first SCS. The second channel may be scheduled based on the first signal. The end time of the first channel in the time domain is earlier than the start time of the second channel in the time domain.

In another embodiment, an apparatus includes at least one processor and a memory, wherein the at least one processor is configured to read code from the memory and implement a method. The method can comprise the following steps: allocating a first set of resources to transmit a first signal on a first channel using a first SCS; and allocating a second set of resources to transmit a second signal on a second channel using a second SCS. The second SCS is larger than the first SCS. The second channel may be scheduled based on the first signal. The end time of the first channel in the time domain is earlier than the start time of the second channel in the time domain.

A computer program product comprising a computer readable program medium code stored thereon, which when executed by a processor, causes the processor to implement a method. The method can comprise the following steps: allocating a first set of resources to transmit a first signal on a first channel using a first SCS; and allocating a second set of resources to transmit a second signal on a second channel using a second SCS. The second SCS is larger than the first SCS. The second channel may be scheduled based on the first signal. The end time of the first channel in the time domain is earlier than the start time of the second channel in the time domain.

The above aspects and other aspects and their implementations are described in more detail in the accompanying drawings, description and claims.

Drawings

Various exemplary embodiments of the present solution are described in detail below with reference to the following figures or drawings. The drawings are provided for illustrative purposes only and merely depict exemplary embodiments of the present solution to facilitate the reader's understanding of the present solution. Accordingly, the drawings should not be taken to limit the breadth, scope, or applicability of the present solution. It should be noted that for clarity and ease of illustration, the drawings are not necessarily drawn to scale.

Fig. 1 illustrates an example cellular communication network in which the techniques and other aspects disclosed herein may be implemented in accordance with embodiments of the present disclosure.

Fig. 2 illustrates a block diagram of an example Base Station (BS) and User Equipment (UE) device, in accordance with some embodiments of the present disclosure.

Fig. 3 illustrates a flow diagram of a process for scheduling channels according to some embodiments of the present disclosure.

Detailed Description

Example embodiments of the present solution are described below with reference to the accompanying drawings to enable one of ordinary skill in the art to make and use the present solution. It will be apparent to those of ordinary skill in the art, upon reading this disclosure, that various changes or modifications can be made to the examples described herein without departing from the scope of the present solution. Thus, the present solution is not limited to the example embodiments and applications described or illustrated herein. Further, the particular order or hierarchy of steps in the methods disclosed herein is merely exemplary. The particular order or hierarchy of steps in the methods or processes disclosed may be rearranged based on design preferences and still be within the scope of the present solution. Accordingly, one of ordinary skill in the art will understand that the methods and techniques disclosed herein present steps or actions in the order of illustration, and unless otherwise explicitly stated, the present approach is not limited to the specific order or hierarchy presented.

Fig. 1 illustrates an example wireless communication network and/or system 100 in which techniques of the present disclosure may be implemented in accordance with embodiments of the present disclosure. In the following discussion, the wireless communication network 100 may be any wireless network, such as a cellular network or a Narrowband Internet of Things (NB-IoT) network, and is referred to herein as "network 100". The example network 100 includes a base station 102 (hereinafter "BS 102") and a user equipment device 104 (hereinafter "UE 104") that can communicate with each other over a communication link 110 (e.g., a wireless communication channel), and a set of

cells

126, 130, 132, 134, 136, 138, and 140 that cover a geographic area 101. In fig. 1, BS 102 and UE 104 are contained within respective geographic boundaries of cell 126. Each of the

other cells

130, 132, 134, 136, 138 and 140 may include at least one base station operating on its allocated bandwidth to provide adequate radio coverage to its intended users.

For example, the BS 102 may operate on the allocated channel transmission bandwidth to provide sufficient coverage to the UE 104. The BS 102 and the UE 104 may communicate via downlink radio frames 118 and uplink radio frames 124, respectively. Each radio frame 118/124 may be further divided into subframes 120/127, subframes 120/127 may include data symbols 122/128. In the present disclosure, the BS 102 and UE 104 are generally described herein as non-limiting example "communication nodes" that may practice the methods disclosed herein. According to various embodiments of the present solution, such a communication node is capable of wireless and/or wired communication.

Fig. 2 illustrates a block diagram of an example wireless communication system 200 for transmitting and receiving wireless communication signals, such as Orthogonal Frequency-Division Multiplexing (OFDM)/Orthogonal Frequency-Division Multiple Access (OFDMA) signals, in accordance with some embodiments of the present disclosure. System 200 may include components and elements configured to support known or conventional operating features that need not be described in detail herein. In one example embodiment, the system 200 can be employed to communicate (e.g., transmit and receive) data symbols in a wireless communication environment, such as the wireless communication environment 100 of fig. 1, as described above.

The system 200 generally includes a base station 202 (hereinafter "BS 202") and a user equipment device 204 (hereinafter "UE 204"). BS 202 includes BS transceiver module 210, BS antenna 212, BS processor module 214, BS memory module 216, and network communication module 218, each coupled and interconnected with each other as needed through data communication bus 220. The UE204 includes a UE transceiver module 230, a UE antenna 232, a UE memory module 234, and a UE processor module 236, each coupled to and interconnected with each other as needed through a data communication bus 240. BS 202 communicates with UE204 through a communication channel 250, which communication channel 250 may be any wireless channel or other medium suitable for data transmission as described herein.

As will be appreciated by those of ordinary skill in the art, the system 200 may further include any number of modules other than those shown in fig. 2. Those of skill in the art will appreciate that the various illustrative blocks, modules, circuits, and processing logic described in connection with the embodiments disclosed herein may be implemented as hardware, computer readable software, firmware, or any practical combination thereof. To clearly illustrate this interchangeability and compatibility of hardware, firmware, and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as hardware, firmware, or software depends upon the particular application and design constraints imposed on the overall system. Those familiar with the concepts described herein may implement these functions in any suitable manner for each particular application, but such implementation decisions should not be interpreted as limiting the scope of the present solution.

UE transceiver 230 may be referred to in this disclosure as an "uplink" transceiver 230, which includes a Radio Frequency (RF) transmitter and an RF receiver, each of which includes circuitry coupled to an antenna 232, according to some embodiments. A duplex switch (not shown) may selectively couple the uplink transmitter or receiver to the uplink antenna in a time-duplex manner. Similarly, BS transceiver 210 may be referred to herein as a "downlink" transceiver 210 according to some embodiments, which includes an RF transmitter and an RF receiver, each of which includes circuitry coupled to an antenna 212. The downlink duplex switch may selectively couple the downlink transmitter or receiver to the downlink antenna 212 in a time-duplex manner. The operation of the two transceivers 210 and 230 can be coordinated in time such that the uplink receiver circuit is coupled to the uplink antenna 232 to receive transmissions over the wireless transmission link 250 while the downlink transmitter is coupled to the downlink antenna 212. In some embodiments, there is tight time synchronization with minimum guard time between changes in the duplex direction.

UE transceiver 230 and BS transceiver 210 are configured to communicate over wireless transmission link 250 and cooperate with a suitably configured RF antenna arrangement 212/232 that may support the particular wireless communication protocol and modulation scheme. In some example embodiments, the UE transceiver 210 and the BS transceiver 210 are configured to support industry standards such as Long Term Evolution (LTE) and emerging 5G standards. It should be understood, however, that the present disclosure is not necessarily limited to application to a particular standard and related protocol. Rather, UE transceiver 230 and BS transceiver 210 may be configured to support alternate or additional wireless data communication protocols, including future standards or variants thereof.

According to various embodiments, the BS 202 may be an Evolved node B (eNB), a serving eNB, a target eNB, a Femto Station (Femto Station), or a Pico Station (Pico Station), for example. In some embodiments, the UE204 may be embodied in various types of user devices, such as mobile phones, smart phones, Personal Digital Assistants (PDAs), tablets, laptops, wearable computing devices, and so forth. The Processor modules 214 and 236 may be implemented or realized by a general purpose Processor, a content addressable memory, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA), any suitable Programmable logic device, discrete Gate or transistor logic, discrete hardware components, or any combination thereof, which are intended to perform the functions described in this disclosure. In this manner, the processor module may be implemented as a microprocessor, controller, microcontroller, state machine, or the like. A processor module may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other configuration.

Furthermore, the steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in firmware, in a software module executed by the processor modules 214 and 236, respectively, or in any practical combination thereof. The Memory modules 216 and 234 may be implemented as Random Access Memory (RAM), flash Memory, Read Only Memory (ROM), Erasable Programmable Read Only Memory (EPROM), Electrically Erasable Programmable Read Only Memory (EEPROM), registers, a hard disk, a removable disk, a Compact Disc Read Only Memory (CD-ROM), or any other storage medium known in the art. Thus, the memory modules 214 and 236 may be coupled to the processor modules 210 and 230, respectively, such that the processor modules 210 and 230 may read information from the memory modules 214 and 236, respectively, and write information to the memory modules 214 and 236, respectively. The memory modules 214 and 236 may also be integrated into their respective processor modules 210 and 230. In some embodiments, each of the memory modules 214 and 236 may include a cache memory for storing temporary variables or other intermediate information during execution of instructions to be executed by the processor modules 210 and 230, respectively. Each of the memory modules 214 and 236 may also include non-volatile memory for storing instructions for execution by the processor modules 210 and 230, respectively.

Network communication module 218 generally represents the hardware, software, firmware, processing logic, and/or other components of base station 202 that enable bidirectional communication by BS transceiver 210 and other network components and communication nodes configured to communicate with BS 202. For example, the network communication module 218 may be configured to support internet or WiMAX traffic. In a typical deployment without limitation, network communication module 218 provides an 802.3 ethernet interface so that BS transceiver 210 can communicate with an ethernet-based conventional computer network. In this manner, the network communication module 218 may include a physical interface for connecting to a computer network (e.g., a Mobile Switching Center (MSC)). The terms "configured to" or "disposed" as used herein with respect to a specified operation or function mean that a device, element, circuit, structure, machine, signal, etc., is physically constructed, programmed, formatted, and/or arranged to perform the specified operation or function.

Having discussed aspects of a network environment and apparatus that may be used to implement the systems, methods, and devices described herein, additional details are described below.

Embodiments of the present disclosure provide systems and methods for providing multi-channel scheduling, and may support multi-channel scheduling according to the 5G NR Release 16 standard. When a lower SCS PDCCH is used to schedule a higher SCS PDSCH, the earliest possible starting point of PDSCH may be defined by the end of PDCCH plus a time interval. The time interval is greater than zero. Systems and methods of the present disclosure provide techniques for determining and/or providing such time intervals for scheduling between channels.

Fig. 3 shows a flow diagram of a process 300 for providing wireless communication or channel scheduling according to an example embodiment. Process 300 may be performed by base station 102 of fig. 1, according to some embodiments. Process 00 may be performed by user device 104, according to some embodiments.

In step 302, according to some embodiments, a first set of resources is allocated to transmit a first signal to a wireless communication device using a first SCS on a first channel. In some embodiments, the first channel is a control channel (e.g., PDCCH).

According to some embodiments, the first set of resources may include a search space. According to some embodiments, each first symbol of the search space comprises N Physical Resource Blocks (PRBs) in the frequency domain and Y OFDM symbols in the time domain. According to some embodiments, N is an integer that depends on a multiple of 6 (or other number) of a Radio Resource Control (RRC) configuration and is not greater than, for example, an integer of an associated Bandwidth Part (BWP). According to some embodiments, Y may be 1, 2, or 3 (or other number) depending on, for example, RRC configuration. For example, in one embodiment, the first set of resources includes a search space, each first symbol of the search space including N PRBs in the frequency domain and Y orthogonal frequency division multiplexing symbols in the time domain. N is an integer depending on the radio resource control configuration and not more than a multiple of 6 of the associated BWP, Y is 1, 2 or 3 depending on the radio resource control configuration.

In step 304, a second set of resources is allocated to transmit a second signal to the wireless communication device using a second SCS on a second channel. According to some embodiments, the second channel is a shared channel (e.g. PDSCH). According to some embodiments, the second SCS is larger than the first SCS. The second channel may be scheduled based on the first signal.

In step 306, the second channel is scheduled or configured such that the end time of the first channel in the time domain is earlier than the start time of the second channel in the time domain. According to some embodiments, a time domain offset is defined between an end time of the first channel and a start time of the second channel. According to some embodiments, a parameter value for defining a time domain offset is determined from information associated with the first set of resources. In some embodiments, the information associated with the first set of resources includes a duration of the control resource set (e.g., a CORESET duration), a number of first symbols, or a type of search space, among others. According to some embodiments, the time domain offset of one first symbol is greater than the time domain offsets of the plurality of first symbols. According to some embodiments, the types of search spaces include different priorities (for traffic). According to some embodiments, the type of search space with lower priority traffic has a temporal offset that is greater than the type of search space with higher priority traffic. For example, according to some embodiments, higher priority traffic may include Ultra-reliable and Low Latency communication (URLLC) traffic, while lower priority traffic may include Enhanced Mobile Broadband (eMBB) traffic.

In some embodiments, the time domain offset is defined according to:

T_proc,0＝(N₀+d_0,1)(2048+144)·κ2^-μ·T_C；

or,

T_proc,0＝max((N₀+d_0,1)(2048+144)·κ2^-μ·T_C,d_0,2)。

according to some embodiments, N₀Is a predetermined value determined according to different SCS values. K is a constant. The time domain offset may be based on an additional parameter or time interval d_0,1To be determined. d_0,2A predefined or configured switching time (e.g., for BWP switching).

According to some embodiments, the additional time interval may be determined based on a CORESET duration (e.g., associated with the first set of resources). For example, according to an exemplary embodiment, when the CORESET duration is 3, the additional time interval is 1. Otherwise, the additional time interval may be 0. According to another exemplary embodiment, when the CORESET duration is 3, the additional time interval is 1; when the CORESET duration is 2, the additional time interval is 0; when the CORESET duration is 1, the additional time interval is-1. According to another exemplary embodiment, when the CORESET duration is 3, the additional time interval is 2; when the CORESET duration is 2, the additional time interval is 1; when the CORESET duration is 1, the additional time interval is 0.

In some embodiments, the additional time interval may be determined based on a number of first symbols (e.g., associated with the first set of resources). The first symbol may refer to one or more first symbols of CORESET within a slot for PDCCH monitoring. For example, according to one exemplary embodiment, when the number of the first symbols is 1, the additional time interval is 1, otherwise, the additional time interval is 0. According to another exemplary embodiment, when the number of the first symbols is 1, the additional time interval is 0; when the number of first symbols is greater than 1, the additional time interval is-1.

In some embodiments, the additional time interval may be determined based on a search space (e.g., associated with the first set of resources). For example, according to an exemplary embodiment, when the search space is of an eMBB type (e.g., the search space type corresponds to eMBB traffic and its associated priority), the additional time interval is determined to be 1. Otherwise (e.g., the search space has a URLLC type, e.g., the search space type corresponds to URLLC traffic and its associated priority), the additional time interval is determined to be 0. For example, according to another exemplary embodiment, when the search space has an eMBB type, the additional time interval is determined to be 0. Otherwise (e.g., the search space has a URLLC type), the additional time interval is determined to be-1. For example, the time domain offset for the type of search space corresponding to eMBB traffic having priority a is greater than the time domain offset for the type of search space corresponding to URLLC traffic having priority B, where priority B is higher than priority a, the additional time interval for URLLC is determined to be 0, and the additional time interval for eMBB is determined to be 1.

In some embodiments, the first set of resources is allocated by identifying a first time slot in which the first set of resources is allocated and allocating the allocation in the first time slotStep 306 is performed with a time slot offset of the time domain offset between the second time slots of the second set of resources. In some embodiments, a non-zero value K is selectively added to the slot offset by the symbol position according to the end of the control channel₀To configure, adjust, supplement, or add a time domain offset. In some embodiments, the first and second SCS are determined by a method based on the first and second SCS (e.g., based on K predefined or predetermined for various different combinations of the first and second SCS₀Different values of) of the first and second electrodes, selectively applying a non-zero value of K₀A time domain offset is configured by adding to the slot offset.

A non-zero value may be added to the slot offset if the symbol position at the end of the first channel corresponds to one symbol index in a set of symbol indices (or multiple symbol indices). For example, the set of symbol indices may include symbol indices 3 through 13 (e.g., symbol indices #3 through 13). In some embodiments, the set of symbol indices may include various other symbol indices. The symbol index may comprise an orthogonal frequency division multiplexing, OFDM, symbol index (sometimes referred to as OS #). The OS # or symbol index may indicate or describe the symbol position.

In some embodiments, the non-zero value K may be determined from a symbol position at the end of the control channel₀. Non-zero values K may be determined or identified based on symbol positions at the end of the first channel₀(and slot offset at that time) where the symbol position is within a first range (e.g., one of a plurality of defined or specified ranges). For example, the first range may include one of: symbol indices #7 to 13; symbol indices #7 to 9; symbol indices #10 to 13; symbol index # 7; symbol indices #8 to 9; symbol indices #10 to 11; symbol indices #12 to 13; symbol indices #0 to 6; symbol indices # 3-9; symbol indices #3 to 6; symbol indices #3 to 4; symbol indices #5 to 6; and/or symbol indices #0 through 2.

In some exemplary embodiments, the following provides for determining a non-zero value K based on a symbol position of an end of a control channel₀Table 1 and table 2. Non-zero values K listed in tables 1 and 2₀For illustrative purposes only. One skilled in the art can implement K according to the concepts disclosed herein₀Any suitable non-zero positive integer. In some embodiments, table 1 is used to determine a non-zero value K when the symbol position at the end of the control channel is in the range of 0 to 6₀. In some embodiments, table 2 is used to determine a non-zero value K when the symbol position at the end of the control channel is in the range of 7 to 13₀. When determining the symbol position of the end of the control channel, the non-zero value K may be selected according to the SCS of the control channel (e.g., the scheduled CCs in tables 1 and 2) and the SCS of the shared channel (e.g., the scheduled CCs in tables 1 and 2)₀. For example, if the SCS of the control channel is 15kHz, the SCS of the shared channel is 60kHz, and the symbol position at the end of the control channel is 5, then a non-zero value K can be determined from Table 1₀Is 2. Note that tables 1 and 2 are examples only, and other tables are not excluded.

TABLE 1

TABLE 2

In some exemplary embodiments, table 2-1 (alternative embodiment 1 or 2) is provided below for determining a non-zero value K according to a symbol position of an end of a control channel₀. Non-zero value K listed in Table 2-1₀Are provided for illustrative purposes only. One skilled in the art can implement K according to the concepts disclosed herein₀Any suitable non-zero positive integer. In table 2-1, OS # indicates a symbol position of the end of the control channel. In Table 2-1, K₀The values of' are all non-zero positive integers, as are the tables in other embodiments.

TABLE 2-1 (example 1)

TABLE 2-1 (example 2)

In some exemplary embodiments, table 2-2 (alternative embodiment 1 or 2) is provided below for determining a non-zero value K according to a symbol position of an end of a control channel₀. Non-zero value K listed in Table 2-2₀Are provided for illustrative purposes only. One skilled in the art can implement K according to the concepts disclosed herein₀Any suitable non-zero positive integer. In table 2-2, OS # indicates a symbol position of the end of the control channel.

TABLE 2-2 (example 1)

TABLE 2-2 (example 2)

In some exemplary embodiments, tables 2-3 (alternate embodiment 1 or 2) are provided below for determining a non-zero value K based on a symbol position of an end of a control channel₀. Non-zero values of K listed in tables 2-3₀Are provided for illustrative purposes only. One skilled in the art can implement K in accordance with the concepts disclosed herein₀Is a taskWhich are suitable non-zero positive integers. In all tables described herein, OS # denotes a symbol position of the end of the control channel.

Tables 2 to 3 (example 1)

Tables 2 to 3 (example 2)

In some exemplary embodiments, a method is provided for determining a minimum non-zero value K based on a symbol position of a control channel end₀Tables 2 to 4. Minimum non-zero values K listed in tables 2-4₀Are provided for illustrative purposes only. One skilled in the art can implement a minimum K according to the concepts disclosed herein₀Any suitable non-zero positive integer.

Tables 2 to 4

In some embodiments, the non-zero value K may be determined according to a minimum gap between an end of the control channel and a start of the shared channel₀. In some embodiments, the minimum gap is 0 or a threshold C. In some example embodiments, table 1 provided above, table 3 provided below, and table 4 are used to determine the non-zero value K based on a minimum gap between the end of the control channel and the start of the shared channel₀. Non-zero value K listed in tables 3 and 4₀For illustrative purposes. One skilled in the art can implement K according to the concepts disclosed herein₀Any suitable non-zero positive integer. TABLE 1 non-zero value K for determining symbol positions at the end of a control channel in the range of 0 to 2₀. TABLE 3 non-zero value K for determining symbol positions at the end of a control channel in the range of 3 to 9₀. Table 4 symbol positions for determining the end of the control channel are 10 to 1Non-zero value K in the range of 3₀. When determining the symbol position of the end of the control channel, a non-zero value K may be selected according to the SCS of the control channel (e.g., scheduled CC) and the SCS of the shared channel (e.g., scheduled CC)₀. In some embodiments, a non-zero value K is to be determined₀Is compared to a threshold C. When non-zero value K₀Above threshold C, a non-zero value K₀Added to the slot offset. When non-zero value K₀Not greater than threshold C, not to zero value K₀Added to the slot offset.

TABLE 3

TABLE 4

In some example embodiments, table 5 (alternative embodiments 1, 2, 3 or 4) is provided for determining a non-zero value K according to a minimum gap between an end of a control channel and a start of a shared channel₀. Non-zero value K listed in Table 5₀Are provided for illustrative purposes only. One skilled in the art can implement K according to the concepts disclosed herein₀Any suitable non-zero positive integer.

TABLE 5 (example 1)

TABLE 5 (example 2)

TABLE 5 (example 3)

TABLE 5 (example 4)

In some example embodiments, table 6 (alternative embodiments 1 or 2) is provided below for determining a non-zero value K based on a minimum gap between an end of a control channel and a start of a shared channel₀. Non-zero value K listed in Table 6₀Are provided for illustrative purposes only. One skilled in the art can implement K according to the concepts disclosed herein₀Any suitable non-zero positive integer.

TABLE 6 (example 1)

TABLE 6 (example 2)

In some example embodiments, table 7 (alternative embodiments 1 or 2) is provided below for determining a non-zero value K based on a minimum gap between an end of a control channel and a start of a shared channel₀. Non-zero value K listed in Table 7₀Are provided for illustrative purposes only. One skilled in the art can implement K according to the concepts disclosed herein₀Any suitable non-zero positive integer.

TABLE 7 (example 1)

TABLE 7 (example 2)

In some embodiments, the time domain is shifted by selectively shifting K₀The' value is configured by adding to the slot offset. K₀The' value is determined based on the number of first symbols. According to some embodiments, K is equal to 1 when the number of first symbols is₀' value is 0. When the number of the first symbols is greater than 1, K₀' value greater than 0. K may be determined from the SCS of the control channel and the SCS of the shared channel using various equations₀'. For example, K can be defined using any of the following equations₀'：

In some embodiments, K₀' may be determined by both the number of first symbols and the symbol position of the end of the control channel. In some embodiments, if the number of first symbols is 1 and the symbol position at the end of the control channel is in the range of 0-3 (e.g., in the first three positions of the slot), then K, for example₀' is 0. Otherwise, e.g. K₀' greater than 0. Similarly, when K is determined₀When' greater than 0, K can be determined using any of the equations above₀'。

While various embodiments of the present solution have been described above, it should be understood that they have been presented by way of example only, and not limitation. Likewise, the various figures may depict architectural or configuration examples that are provided to enable one of ordinary skill in the art to understand the exemplary features and functionality of the present solution. However, those skilled in the art will appreciate that the present solution is not limited to the example architectures or configurations shown, but may be implemented using a variety of alternative architectures and configurations. Furthermore, as one of ordinary skill in the art will appreciate, one or more features of one embodiment may be combined with one or more features of another embodiment described herein. Thus, the breadth and scope of the present disclosure should not be limited by any of the above-described exemplary embodiments.

Further, it should be understood that the use of names such as "first," "second," etc. to refer to an element generally does not limit the number or order of such elements. These names may be used herein as a convenient way to distinguish between two or more elements or instances of an element. Thus, reference to first and second elements does not mean that only two elements can be used, or that the first element must precede the second element in some way.

In addition, those of skill in the art would understand that information and signals may be represented using any of a variety of different technologies and techniques. For example, data, instructions, commands, information, signals, bits, and symbols that may be referenced throughout the above description may be represented by voltages, currents, electromagnetic waves, magnetic fields or particles, optical fields or particles, or any combination thereof.

Those of ordinary skill would further appreciate that any of the various illustrative logical blocks, modules, processors, means, circuits, methods, and functions described in connection with the aspects disclosed herein may be implemented as electronic hardware (e.g., a digital implementation, an analog implementation, or a combination of the two, which may be designed using source coding or other techniques), various forms of program or design code incorporating instructions (which may be referred to herein, for convenience, as "software" or a "software module"), or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as hardware, firmware, or software, or as a combination of such technologies, depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present disclosure.

Furthermore, those of ordinary skill in the art will appreciate that the various illustrative logical blocks, modules, devices, components, and circuits described herein may be implemented within or performed by an Integrated Circuit (IC), which may include a general purpose processor, a DSP, an ASIC, an FPGA or other programmable logic device, or any combination thereof. The logic blocks, modules, and circuits may also include antennas and/or transceivers to communicate with various components within the network or device. A general purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, or state machine. A processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other suitable configuration for performing the described functions.

If implemented in software, the functions may be stored on a computer-readable medium in the form of one or more instructions or code. Thus, the steps of a method or algorithm disclosed herein may be implemented as software stored on a computer-readable medium. Computer-readable media includes both computer storage media and communication media including any medium that can communicate a computer program or code from one place to another. A storage media may be any available media that can be accessed by a computer. By way of example, and not limitation, such computer-readable media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store desired program code in the form of instructions or data structures and that can be accessed by a computer.

As used herein, the term "module" refers to software, firmware, hardware, and any combination of these elements that perform the relevant functions described herein. Moreover, for ease of discussion, the various modules are described as discrete modules; however, it will be apparent to those of ordinary skill in the art that two or more modules may be combined into a single module that performs the associated functions according to embodiments of the present solution.

In addition, memory or other memory and communication components may also be used in embodiments of the present solution. It will be appreciated that for clarity, the above description has described embodiments of the present solution with reference to different functional units and processors. It will be apparent, however, that any suitable distribution of functionality between different functional units, processing logic elements, or domains may be used without affecting the present scheme. For example, functionality illustrated to be performed by different processing logic elements or controllers may be performed by the same processing logic elements or controllers. Thus, references to specific functional units are only to suggest suitable ways of providing the described functionality rather than indicative of a strict logical or physical structure or organization.

Various modifications to the embodiments described in this disclosure will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the scope of the disclosure. Thus, the present disclosure is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the novel features and principles disclosed herein as set forth in the following claims.

Claims

1. A method, comprising:

allocating a first set of resources to transmit a first signal using a first subcarrier spacing on a first channel; and

allocating a second set of resources to transmit a second signal on a second channel using a second subcarrier spacing that is greater than the first subcarrier spacing, the second channel scheduled based on the first signal; wherein the ending time of the first channel in the time domain is earlier than the starting time of the second channel in the time domain.

2. The method of claim 1, comprising:

allocating the first set of resources to the first channel, the first channel comprising a control channel, wherein the first signal comprises control information; and

allocating the second set of resources to the second channel, the second channel comprising a shared channel.

3. The method of claim 1, further comprising:

determining parameter values for a relationship defining a time domain offset between an end time of the first channel and a start time of the second channel based on information associated with the first set of resources.

4. The method of claim 3, wherein the information associated with the first set of resources comprises a duration of a set of control resources.

5. The method of claim 3, wherein the information associated with the first set of resources comprises a number of first symbols.

6. The method of claim 5, wherein a time domain offset of one first symbol is greater than a time domain offset of a plurality of first symbols.

7. The method of claim 3, wherein the information associated with the first set of resources comprises a type of search space.

8. The method of claim 7, wherein a time domain offset of a type of search space corresponding to traffic having a priority A is greater than a time domain offset of a type of search space corresponding to traffic having a priority B, wherein the priority B is higher than the priority A.

9. The method of claim 1, comprising:

identifying a time slot offset of a time domain offset between a first time slot in which the first set of resources is allocated and a second time slot in which the second set of resources is allocated; and

configuring the time domain offset by selectively adding a non-zero value to the slot offset according to a symbol position of an end of the first channel.

10. The method of claim 9, comprising: adding the non-zero value to the slot offset if the symbol position at the end of the first channel corresponds to one symbol index of a set of symbol indices.

11. The method of claim 11, wherein the set of symbol indices includes symbol index 3 through symbol index 13.

12. The method of claim 11, comprising: identifying the non-zero value as a first value if a symbol position of an end of the first channel is within a first range.

13. The method of claim 12, comprising: determining the non-zero value based on a minimum gap between an end of the first channel and a start of the second channel; wherein the minimum gap is 0 or a threshold value C.

14. The method of claim 10, comprising: selectively adding the non-zero value to the slot offset based on a number of first symbols associated with the first set of resources.

15. The method of claim 1, comprising:

identifying a slot offset of a time domain offset between a first slot in which the first set of resources is allocated and a second slot in which the second set of resources is allocated, according to a symbol position of an end of the first channel; wherein the symbol position is within a first range.

16. The method of claim 12 or 15, wherein the first range comprises one of:

symbol indices 7 to 13;

symbol indices 7 to 9;

symbol indexes 10 to 13;

a symbol index 7;

symbol indices 8 to 9;

symbol indexes 10 to 11;

symbol indices 12 to 13;

symbol indices 0 to 6;

symbol indices 3 through 9;

symbol indices 3 to 6;

symbol indices 3 to 4;

symbol indices 5 to 6;

the symbol indices are 0 to 2.

17. An apparatus comprising at least one processor and memory, wherein the at least one processor is configured to read code from the memory and implement the method of any of claims 1-16.

18. A computer program product comprising a computer readable program medium code stored thereon, which when executed by a processor, causes the processor to implement the method according to any of claims 1 to 16.