CN113671241A - Frequency multiplication single resistance current sampling method and device thereof - Google Patents

Frequency multiplication single resistance current sampling method and device thereof Download PDF

Info

Publication number
CN113671241A
CN113671241A CN202110828954.1A CN202110828954A CN113671241A CN 113671241 A CN113671241 A CN 113671241A CN 202110828954 A CN202110828954 A CN 202110828954A CN 113671241 A CN113671241 A CN 113671241A
Authority
CN
China
Prior art keywords
phase
current sampling
duty ratio
value
period
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202110828954.1A
Other languages
Chinese (zh)
Inventor
李柏松
陈伟
成爱军
时迎亮
李武君
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Step Electric Corp
Original Assignee
Shanghai Step Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shanghai Step Electric Corp filed Critical Shanghai Step Electric Corp
Priority to CN202110828954.1A priority Critical patent/CN113671241A/en
Publication of CN113671241A publication Critical patent/CN113671241A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/25—Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques

Abstract

The invention discloses a frequency multiplication single-resistor current sampling method and a device thereof, wherein the method comprises the following steps: a. adjusting the three-phase duty ratio calculated by the PWM control algorithm to obtain the adjusted three-phase duty ratio; b. calculating current sampling time t according to the adjusted three-phase duty ratios1、ts2、ts3And ts4(ii) a c. Outputting three-phase voltage according to the adjusted three-phase duty ratio; d. at the current sampling time ts1、ts2、ts3And ts4And carrying out current sampling, and respectively reconstructing three-phase currents of the first half period and the second half period of the carrier period according to current sampling results so as to obtain the three-phase average current of the carrier period. The invention can improve the current sampling precision of the single-resistor current sampling method.

Description

Frequency multiplication single resistance current sampling method and device thereof
Technical Field
The invention relates to a single-resistor current sampling technology.
Background
The inverter is typically a three-phase output used to control a three-phase ac motor. The frequency converter generally needs three-phase current signals to realize motor control, and simultaneously, the frequency converter and the motor are protected according to the three-phase current signals. There are many ways to obtain three-phase current signals, and obtaining current signals through sampling resistors is a common current sampling way. According to the number of the sampling resistors, the current sampling method can be divided into three-resistor current sampling, two-resistor current sampling and single-resistor current sampling, wherein the hardware cost of the single-resistor current sampling is the lowest. When the requirement on the system cost is high, single resistance current sampling is a good choice.
The single-resistor current sampling is to collect the bus current, and then the three-phase current is obtained in a reconstruction mode. In order to ensure that three-phase current can be accurately obtained, a single-resistor current sampling method has certain requirements on a sampling window and sampling time, and in order to meet the requirements, only one group of current signals are generally collected in one carrier period in the prior art, namely the current sampling frequency is the same as the carrier frequency, which also causes low current signal sampling precision.
Disclosure of Invention
The invention aims to provide a frequency-doubling single-resistor current sampling method, which can sample two groups of current signals in one carrier period and improve the current sampling frequency and the current sampling precision.
The invention provides a frequency multiplication single-resistor current sampling device.
The embodiment of the invention provides a frequency multiplication single-resistor current sampling method, which comprises the following steps:
a. three-phase duty ratio D [ a ] calculated by PWM control algorithm]、D[b]、D[c]Adjusting to obtain the adjusted three-phase duty ratio D1[a]、D1[b]、D1[c]And D2[a]、D2[b]、D2[c](ii) a Wherein D is1[a]、D1[b]、D1[c]Three-phase duty cycle, D, being one of the first half or the second half of the carrier cycle2[a]、D2[b]、D2[c]A three-phase duty cycle that is the other of the first half cycle or the second half cycle of the carrier cycle;
b. calculating current sampling time t according to the adjusted three-phase duty ratios1、ts2、ts3And ts4；
c. Outputting three-phase voltage according to the adjusted three-phase duty ratio;
d. at the current sampling time ts1、ts2、ts3And ts4And respectively carrying out current sampling, and respectively reconstructing three-phase currents of the first half period and the second half period of the carrier period according to current sampling results so as to obtain the three-phase average current of the carrier period.
The invention also provides a frequency multiplication single-resistor current sampling device, which comprises: a memory for storing a program; and the processor is used for loading the program to execute the frequency multiplication single-resistor current sampling method.
According to the frequency multiplication single-resistor current sampling method and the frequency multiplication single-resistor current sampling device, two groups of current signals can be sampled in one carrier period, and then three-phase average current of the carrier period can be obtained, so that the current sampling precision of the single-resistor current sampling method is improved.
Drawings
Fig. 1 shows a schematic flow diagram of a frequency-doubling single-resistor current sampling method according to an embodiment of the present invention.
Fig. 2 shows a schematic diagram of four sampling instants according to an embodiment of the invention.
FIG. 3 shows a schematic diagram of a single phase voltage output at a regulated duty cycle according to an embodiment of the present invention.
Detailed Description
Please refer to fig. 1. According to the frequency multiplication single-resistor current sampling method provided by the embodiment of the invention, the bus current is sampled through the sampling resistor arranged on the bus of the three-phase inverter circuit, and the method comprises the following steps:
a. three-phase duty ratio D [ a ] calculated by PWM control algorithm]、D[b]、D[c]Adjusting to obtain the adjusted three-phase duty ratio D1[a]、D1[b]、D1[c]And D2[a]、D2[b]、D2[c](ii) a Wherein D is1[a]、D1[b]、D1[c]Is one of the first half period or the second half period of the carrier wave periodThree-phase duty cycle of D2[a]、D2[b]、D2[c]A three-phase duty cycle that is the other of the first half cycle or the second half cycle of the carrier cycle;
b. calculating current sampling time t according to the adjusted three-phase duty ratios1、ts2、ts3And ts4；
c. Outputting three-phase voltage according to the adjusted three-phase duty ratio;
d. at the current sampling time ts1、ts2、ts3And ts4And respectively carrying out current sampling, and respectively reconstructing three-phase currents of the first half period and the second half period of the carrier period according to current sampling results so as to obtain the three-phase average current of the carrier period.
The frequency multiplication single-resistor current sampling method comprises the following steps:
a1, three-phase duty ratio D [ a ] calculated by PWM control algorithm]、D[b]、D[c]Sorting according to the size sequence to obtain the maximum value DmaxMiddle value DmidMinimum value DminAnd recording the maximum value DmaxMiddle value DmidAnd a minimum value DminIf the corresponding phase is a phase a, a phase b or a phase c, making Max represent the serial number of the phase corresponding to the maximum value of the duty ratio, Mid represent the serial number of the phase corresponding to the intermediate value of the duty ratio, and Min represent the serial number of the phase corresponding to the minimum value of the duty ratio; when the three-phase duty ratios are equal, firstly, appointing any one-phase duty ratio as a maximum value, then appointing any one-phase duty ratio in the rest two-phase duty ratios as an intermediate value, and appointing the rest one-phase duty ratio as a minimum value; when the two-phase duty ratios are equal, designating any one phase of the equal two-phase duty ratios as a large value and designating the other phase of the equal two-phase duty ratios as a small value;
a2, calculation DmaxAnd DmidDifference D ofxdAnd DmidAnd DminDifference D ofdn：
Figure BDA0003174790380000031
Wherein D ismax、DmidAnd DminAre respectively the three-phase duty ratio D [ a ]]、D[b]、D[c]Maximum, intermediate and minimum values of;
a3, according to DxdAnd DdnObtaining a first temporary calculated variable Dxd1A second temporary calculated variable Ddn1A third temporary calculated variable Dxd2And a fourth temporary calculated variable Ddn2：
Figure BDA0003174790380000032
In the above formula,. DELTA.DxdAnd Δ DdnAre respectively DxdAnd DdnAdjustment of (D), Δ DxdAnd Δ DdnThe value taking mode is as follows: in the following six groups Δ DxdAnd Δ DdnSix groups of delta D solved by the calculation formulaxdAnd Δ DdnIn (1), selecting Δ DxdAnd Δ DdnThe set of solutions with the smallest sum is used as the actual Δ DxdAnd Δ Ddn；
The six formulas are respectively as follows:
Figure BDA0003174790380000033
Figure BDA0003174790380000041
Figure BDA0003174790380000042
Figure BDA0003174790380000043
Figure BDA0003174790380000044
Figure BDA0003174790380000045
wherein D isTs＝T s2/T, wherein T is a carrier period, and Ts is a preset minimum sampling window; the functions fun1() and fun2() are defined as follows:
Figure BDA0003174790380000046
Figure BDA0003174790380000047
for D calculated by the above formulaxd1、Ddn1、Dxd2、Ddn2The final D is obtained by limiting according to the following limiting rulexd1、Ddn1、Dxd2、Ddn2：
If D isxd1And Ddn1Sum greater than 1, Dxd1And Ddn1Is unchanged for the smaller of Dxd1And Ddn1The larger of which becomes 1 minus the smaller;
if D isxd2And Ddn2Sum greater than 1, Dxd2And Ddn2Is unchanged for the smaller of Dxd2And Ddn2The larger of which becomes 1 minus the smaller;
a4, according to Dxd1、Ddn1And Dxd2、Ddn2Calculate D1[a]、D1[b]、D1[c]And D2[a]、D2[b]、D2[c]：
Figure BDA0003174790380000048
Figure BDA0003174790380000051
Wherein D isz1Has a value range of [0, 1-Dxd1-Ddn1]；Dz2Has a value range of [0, 1-Dxd2-Ddn2](ii) a The definition of function sign1() and function sign2() are shown as follows:
Figure BDA0003174790380000052
Figure BDA0003174790380000053
。
the working process of the frequency-doubling single-resistor current sampling method of the present invention is further described with reference to a specific embodiment.
According to the embodiment, the three-phase duty ratio calculated by the PWM control algorithm is firstly adjusted, then the time of four times of current sampling is calculated, and finally three-phase currents of the first half carrier period and the second half carrier period are respectively reconstructed according to the bus current obtained by sampling, so that the three-phase average current of the carrier period is obtained. The frequency multiplication single-resistance current sampling method of the embodiment is applied to a frequency converter, the carrier period of the frequency converter is T, and the minimum sampling window is TsA PWM control algorithm for controlling the operation of the motor and a sampling algorithm are performed once per carrier period. In this embodiment, the duty ratios of the a-phase, the b-phase and the c-phase are all zero. The specific steps of this example are as follows:
step a, calculating the three-phase duty ratio D [ a ] of the PWM control algorithm]、D[b]、D[c]Adjusting to obtain the adjusted three-phase duty ratio D1[a]、D1[b]、D1[c]And D2[a]、D2[b]、D2[c](ii) a Step a further comprises:
a1, calculating the three-phase duty ratio D [ a ] by PWM control algorithm]、D[b]、D[c]Sorting according to the size sequence to obtain the maximum value DmaxMiddle value DmidMost preferablySmall value of DminAnd recording whether the phase corresponding to the maximum value, the intermediate value and the minimum value is a phase, b phase or c phase. Max represents the serial number of the phase corresponding to the maximum value of the duty ratio, Mid represents the serial number of the phase corresponding to the intermediate value of the duty ratio, Min represents the serial number of the phase corresponding to the minimum value of the duty ratio, the values of Max, Mid and Min are all a, b or c, and a, b and c are the serial numbers of the phase a, the phase b and the phase c respectively. In this embodiment, before the adjustment, since the duty ratios of the a-phase, the b-phase and the c-phase are all zero, D ismax＝0、Dmid＝0、DminMax ═ a, Mid ═ b, and Min ═ c. Note that Max denotes that the a-phase duty ratio is the maximum before adjustment, and Max stores the number of the phase corresponding to the maximum duty ratio before adjustment, but the a-phase duty ratio after adjustment (i.e., D to be described later)1[a]And D2[a]) May no longer be the maximum. Mid and Min are similar to the meaning of b and c.
a2, calculation DmaxAnd DmidDifference D ofxdAnd DmidAnd DminDifference D ofdn，DxdAnd DdnCalculated according to the following formula:
Figure BDA0003174790380000061
a3, according to DxdAnd DdnObtaining a first temporary calculated variable Dxd1A second temporary calculated variable Ddn1A third temporary calculated variable Dxd2Fourth temporary calculated variable Ddn2；Dxd1、Ddn1And Dxd2、Ddn2The following formula was used for calculation:
Figure BDA0003174790380000062
in the above formula,. DELTA.DxdAnd Δ DdnAre respectively DxdAnd DdnThe amount of adjustment of (a). Delta DxdAnd Δ DdnThere are six possibilities for taking values, which are shown below:
Figure BDA0003174790380000063
Figure BDA0003174790380000064
Figure BDA0003174790380000065
Figure BDA0003174790380000066
Figure BDA0003174790380000067
Figure BDA0003174790380000068
wherein D isTs＝T s2/T, wherein T is a carrier period, and Ts is a preset minimum sampling window; the functions fun1() and fun2() are defined as follows:
Figure BDA0003174790380000071
Figure BDA0003174790380000072
six groups of delta D can be solved according to the six groups of formulasxdAnd Δ DdnSelecting Δ DxdAnd Δ DdnThe set of solutions with the smallest sum is used as the actual Δ DxdAnd Δ DdnI.e. the last group, to obtain Dxd1、Ddn1And Dxd2、Ddn2。
Figure BDA0003174790380000073
Calculate Dxd1、Ddn1And Dxd2、Ddn2Then, the pair D is also requiredxd1、Ddn1And Dxd2、Ddn2Limiting according to the following limiting rule to obtain the final Dxd1、Ddn1、Dxd2、Ddn2：
If D isxd1And Ddn1The sum is greater than 1, then Dxd1And Ddn1Is unchanged for the smaller of Dxd1And Ddn1The larger of which becomes 1 minus the smaller (1-smaller);
if D isxd2And Ddn2The sum is greater than 1, then Dxd2And Ddn2Is unchanged for the smaller of Dxd2And Ddn2The larger of which becomes 1 minus the smaller (the larger is 1-smaller).
a4, according to Dxd1、Ddn1And Dxd2、Ddn2Calculate D1[a]、D1[b]、D1[c]And D2[a]、D2[b]、D2[c]；D1[a]、D1[b]、D1[c]Obtained by the following formula:
Figure BDA0003174790380000074
in the above formula, Dz1Has a value range of [0, 1-Dxd1-Ddn1]I.e. Dz1Is 0, 1-Dxd1-Ddn1Or 0 and 1-Dxd1-Ddn1Any value in between.
D2[a]、D2[b]、D2[c]Obtained by the following formula:
Figure BDA0003174790380000075
in the above formula, Dz2Has a value range of [0, 1-Dxd2-Ddn2]I.e. Dz2Is 0, 1-Dxd2-Ddn2Or 0 and 1-Dxd2-Ddn2Any value in between.
Step b, calculating current sampling time t according to the adjusted three-phase duty ratios1、ts2，ts3And ts4：
Firstly, calculating the current sampling time t of the first half carrier periods1And ts2：
Three-phase duty ratio D of the first half carrier period1[a]、D1[b]、D1[c]Sorting according to the size sequence to obtain the maximum value Dmax1Middle value Dmid1Minimum value Dmin1And recording the maximum value Dmax1Middle value Dmid1And a minimum value Dmin1The corresponding phase is a phase, b phase or c phase, and Max is ordered1Number, Mid, representing the phase corresponding to the maximum value of the duty cycle1Number, Min, representing phase of duty cycle median1Representing the serial number of the corresponding phase of the minimum value of the duty ratio; max (maximum of ten)1、Mid1And Min1The value is a, b or c, and the a, b and c are respectively the serial numbers of the a phase, the b phase and the c phase. Can obtain Dmax1＝D1[a]、Dmid1＝D1[b]、Dmin1＝D1[c]、Max1＝a、Mid1＝b、Min1＝c。
ts1And ts2Can be calculated from the following formula.
Figure BDA0003174790380000081
Then calculating the current sampling time t of the second half carrier periods3And ts4：
Three-phase duty ratio D of the second half carrier period2[a]、D2[b]、D2[c]Sorting according to the size sequence to obtain the maximum value Dmax2Middle value Dmid2Minimum value Dmin2And is combined withRecord the maximum value Dmax2Middle value Dmid2And a minimum value Dmin2The corresponding phase is a phase, b phase or c phase, and Max is ordered2Number, Mid, representing the phase corresponding to the maximum value of the duty cycle2Number, Min, representing phase of duty cycle median2Number, Max, representing phase corresponding to minimum value of duty ratio2、Mid2And Min2The value is a, b or c, and the a, b and c are respectively the serial numbers of the a phase, the b phase and the c phase. Can obtain Dmax2＝D2[c]、Dmid2＝D2[b]、Dmin2＝D2[a]、Max2＝c、Mid2＝b、Min2A. Current sampling time ts3And ts4Calculated from the following formula.
Figure BDA0003174790380000082
Fig. 2 shows a schematic diagram of four sampling instants according to a first embodiment of the present invention, where 0 in fig. 2 represents the start instant of a carrier period.
And c, outputting the three-phase voltage according to the adjusted three-phase duty ratio. According to D in the first half of the carrier period1[a]、D1[b]、D1[c]Outputting three-phase voltage according to D in the latter half period of the carrier wave period2[a]、D2[b]、D2[c]And outputting three-phase voltage.
For simplicity of description, x represents a, b, c, by D1[x]Represents D1[a]、D1[b]、D1[c]By D2[x]Represents D2[a]、D2[b]、D2[c]. In the first half of the carrier period, when time t is less than (1-D)1[x]) When T/2, the x phase outputs low level, otherwise, high level is output; in the latter half of the carrier period, when the time t is less than (1+ D)2[x]) And T/2, outputting high level by the x phase, and otherwise, outputting low level. Fig. 3 is a schematic diagram illustrating a single-phase voltage output according to an adjusted duty ratio according to an embodiment of the present invention. 0 in FIG. 3 represents the start of the carrier cycle, in this embodiment, the sampling algorithm cycle andthe carrier period is the same, and 0 is also the starting time of the sampling algorithm period. The time t mentioned above is the time within the current sampling algorithm period.
Step d, current sampling time t in carrier periods1、ts2、ts3And ts4Respectively sampling to obtain bus current Idc1、Idc2、Idc1And Idc2And respectively reconstructing three-phase currents of the first half period and the second half period of the carrier period according to the bus current obtained by sampling, and further obtaining the three-phase average current of the carrier period.
The three-phase currents in the first half of the wave period are respectively I1[a]、I1[b]And I1[c]，I1[a]、I1[b]And I1[c]Obtained by the following formula:
Figure BDA0003174790380000091
the three-phase currents in the latter half of the wave period are respectively I2[a]、I2[b]And I2[c]，I2[a]、I2[b]And I2[c]Obtained by the following formula.
Figure BDA0003174790380000092
The three-phase average currents Ia, Ib and ic of the carrier period are obtained by the following formula.
Figure BDA0003174790380000093
According to the embodiment of the invention, firstly, the three-phase duty ratio calculated by the PWM control algorithm is adjusted, then the time of four times of current sampling is calculated, and finally, three-phase currents of front and back half carrier periods are respectively reconstructed according to the bus current obtained by sampling, so that the three-phase average current of the carrier period is obtained. In the embodiment of the invention, the duty ratio of the first half period and the duty ratio of the second half period of each carrier wave period can be exchanged, and after the exchange, the sampling time and the calculation formula of current reconstruction are correspondingly modified to realize single-resistor current sampling, and a specific formula is not given here.
In the embodiment of the present invention, when the voltage is output, the polarity of the level may be changed. If the high level is changed into the low level, and the low level is changed into the high level, the same voltage can be ensured to be output only by adjusting the original duty ratio (the value of the original duty ratio is changed into 1 and the value is subtracted), at the moment, the single-resistance current sampling can be realized by correspondingly modifying the sampling time and the calculation formula of current reconstruction, and a specific formula is not given here.
Still another embodiment of the present invention further provides a frequency-doubled single-resistor current sampling apparatus, which includes a memory and a processor. The memory is used for storing programs; the processor is used for loading the program to execute the frequency multiplication single-resistance current sampling method.
According to the frequency multiplication single-resistance current sampling method and the frequency multiplication single-resistance current sampling device, two groups of current signals can be sampled in one carrier period, and then three-phase average current of the carrier period can be obtained, so that the current sampling precision of the single-resistance current sampling method is improved, and further control over a three-phase motor and protection over a motor driving device (such as a frequency converter and the like) and the motor are achieved.

Claims (7)

1. A frequency multiplication single resistance current sampling method is characterized by comprising the following steps:
a. three-phase duty ratio D [ a ] calculated by PWM control algorithm]、D[b]、D[c]Adjusting to obtain the adjusted three-phase duty ratio D1[a]、D1[b]、D1[c]And D2[a]、D2[b]、D2[c](ii) a Wherein D is1[a]、D1[b]、D1[c]Three-phase duty cycle, D, being one of the first half or the second half of the carrier cycle2[a]、D2[b]、D2[c]A three-phase duty cycle that is the other of the first half cycle or the second half cycle of the carrier cycle;
b. calculating current sampling time t according to the adjusted three-phase duty ratios1、ts2、ts3And ts4；
c. Outputting three-phase voltage according to the adjusted three-phase duty ratio;
d. at the current sampling time ts1、ts2、ts3And ts4And respectively carrying out current sampling, and respectively reconstructing three-phase currents of the first half period and the second half period of the carrier period according to current sampling results so as to obtain the three-phase average current of the carrier period.
2. The frequency-doubled single-resistor current sampling method according to claim 1, wherein step a comprises:
a1, three-phase duty ratio D [ a ] calculated by PWM control algorithm]、D[b]、D[c]Sorting according to the size sequence to obtain the maximum value DmaxMiddle value DmidMinimum value DminAnd recording the maximum value DmaxMiddle value DmidAnd a minimum value DminIf the corresponding phase is a phase a, a phase b or a phase c, making Max represent the serial number of the phase corresponding to the maximum value of the duty ratio, Mid represent the serial number of the phase corresponding to the intermediate value of the duty ratio, and Min represent the serial number of the phase corresponding to the minimum value of the duty ratio; when the three-phase duty ratios are equal, firstly, appointing any one-phase duty ratio as a maximum value, then appointing any one-phase duty ratio in the rest two-phase duty ratios as an intermediate value, and appointing the rest one-phase duty ratio as a minimum value; when the two-phase duty ratios are equal, designating any one phase of the equal two-phase duty ratios as a large value and designating the other phase of the equal two-phase duty ratios as a small value;
a2, calculation DmaxAnd DmidDifference D ofxdAnd DmidAnd DminDifference D ofdn：
Figure FDA0003174790370000011
Wherein D ismax、DmidAnd DminAre respectively the three-phase duty ratio D [ a ]]、D[b]、D[c]Maximum, intermediate and minimum values of;
a3, according to DxdAnd DdnObtaining a first temporary calculated variable Dxd1A second temporary calculated variable Ddn1A third temporary calculated variable Dxd2And a fourth temporary calculated variable Ddn2：
Figure FDA0003174790370000021
In the above formula,. DELTA.DxdAnd Δ DdnAre respectively DxdAnd DdnAdjustment of (D), Δ DxdAnd Δ DdnThe value taking mode is as follows: in the following six groups Δ DxdAnd Δ DdnSix groups of delta D solved by the calculation formulaxdAnd Δ DdnIn (1), selecting Δ DxdAnd Δ DdnThe set of solutions with the smallest sum is used as the actual Δ DxdAnd Δ Ddn；
The six formulas are respectively as follows:
Figure FDA0003174790370000022
Figure FDA0003174790370000023
Figure FDA0003174790370000024
Figure FDA0003174790370000025
Figure FDA0003174790370000026
Figure FDA0003174790370000027
wherein D isTs＝Ts2/T, wherein T is a carrier period, and Ts is a preset minimum sampling window; the functions fun1() and fun2() are defined as follows:
Figure FDA0003174790370000028
Figure FDA0003174790370000029
for D calculated by the above formulaxd1、Ddn1、Dxd2、Ddn2The final D is obtained by limiting according to the following limiting rulexd1、Ddn1、Dxd2、Ddn2：
If D isxd1And Ddn1Sum greater than 1, Dxd1And Ddn1Is unchanged for the smaller of Dxd1And Ddn1The larger of which becomes 1 minus the smaller;
if D isxd2And Ddn2Sum greater than 1, Dxd2And Ddn2Is unchanged for the smaller of Dxd2And Ddn2The larger of which becomes 1 minus the smaller;
a4, according to Dxd1、Ddn1And Dxd2、Ddn2Calculate D1[a]、D1[b]、D1[c]And D2[a]、D2[b]、D2[c]：
Figure FDA0003174790370000031
Figure FDA0003174790370000032
Wherein D isz1Has a value range of [0, 1-Dxd1-Ddn1]；Dz2Has a value range of [0, 1-Dxd2-Ddn2](ii) a The definition of function sign1() and function sign2() are shown as follows:
Figure FDA0003174790370000033
Figure FDA0003174790370000034
。
3. the frequency-doubled single-resistor current sampling method of claim 2, wherein D is1[a]、D1[b]、D1[c]Three-phase duty cycle being the first half of the carrier cycle, D2[a]、D2[b]、D2[c]The three-phase duty cycle of the latter half of the carrier period.
4. The frequency-doubling single-resistor current sampling method according to claim 3, wherein in the step b, the current sampling time t is calculated according to the adjusted three-phase duty ratios1、ts2，ts3And ts4The process of (2) is as follows:
b1, calculating the current sampling time t of the first half carrier periods1And ts2：
Three-phase duty ratio D of the first half carrier period1[a]、D1[b]、D1[c]Sorting according to the size sequence to obtain the maximum value Dmax1Middle value Dmid1Minimum value Dmin1And recording the maximum value Dmax1Middle value Dmid1And a minimum value Dmin1The corresponding phase is a phase, b phase or c phase, and Max is ordered1Representative duty cycleNumber of phase corresponding to maximum value, Mid1Number, Min, representing phase of duty cycle median1Representing the serial number of the corresponding phase of the minimum value of the duty ratio; current sampling time ts1And ts2Calculated from the following formula:
Figure FDA0003174790370000041
b2, calculating current sampling time t of the second half carrier wave periods3And ts4：
Three-phase duty ratio D of the second half carrier period2[a]、D2[b]、D2[c]Sorting according to the size sequence to obtain the maximum value Dmax2Middle value Dmid2Minimum value Dmin2And recording the maximum value Dmax2Middle value Dmid2And a minimum value Dmin2The corresponding phase is a phase, b phase or c phase, and Max is ordered2Number, Mid, representing the phase corresponding to the maximum value of the duty cycle2Number, Min, representing phase of duty cycle median2Representing the serial number of the corresponding phase of the minimum value of the duty ratio; current sampling time ts3And ts4Calculated from the following formula:
Figure FDA0003174790370000042
。
5. the frequency-doubled single-resistor current sampling method according to claim 3 or 4, wherein in the first half of the carrier period, when the time t is less than (1-D)1[x]) When T/2, the x phase outputs low level, otherwise, high level is output; in the latter half of the carrier period, when the time t is less than (1+ D)2[x]) When T/2, the x phase outputs high level, otherwise, the x phase outputs low level; d1[x]Represents D1[a]、D1[b]And D1[c]，D2[x]Represents D2[a]、D2[b]And D2[c]。
6. The frequency-doubling single-resistor current sampling method according to claim 2, wherein in the step d, reconstructing three-phase currents of a first half period and a second half period of a carrier period respectively according to the current sampling result, and further obtaining a three-phase average current of the carrier period comprises the following steps:
calculating three-phase current I of the first half of the carrier period1[a]、I1[b]And I1[c]：
Figure FDA0003174790370000043
Calculating three-phase current I of the latter half period of the carrier period2[a]、I2[b]And I2[c]：
Figure FDA0003174790370000044
Calculating three-phase average currents Ia, Ib and ic of the carrier period:
Figure FDA0003174790370000051
wherein, Idc1、Idc2、Idc3And Idc4Are each at ts1、ts2、ts3And ts4And sampling the obtained bus current at any time.
7. A frequency-doubling single-resistor current sampling device is characterized by comprising:
a memory for storing a program;
a processor for loading the program to perform the frequency multiplying single resistance current sampling method according to any one of claims 1 to 6.
CN202110828954.1A 2021-07-22 2021-07-22 Frequency multiplication single resistance current sampling method and device thereof Pending CN113671241A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202110828954.1A CN113671241A (en) 2021-07-22 2021-07-22 Frequency multiplication single resistance current sampling method and device thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202110828954.1A CN113671241A (en) 2021-07-22 2021-07-22 Frequency multiplication single resistance current sampling method and device thereof

Publications (1)

Publication Number Publication Date
CN113671241A true CN113671241A (en) 2021-11-19

Family

ID=78539813

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202110828954.1A Pending CN113671241A (en) 2021-07-22 2021-07-22 Frequency multiplication single resistance current sampling method and device thereof

Country Status (1)

Country Link
CN (1) CN113671241A (en)

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014026331A1 (en) * 2012-08-15 2014-02-20 深圳市英威腾电气股份有限公司 Phase current reconstruction method and apparatus
CN105577062A (en) * 2015-12-31 2016-05-11 美的集团武汉制冷设备有限公司 Single current sensor based three-phase current reconstruction method and device
CN106452261A (en) * 2016-10-19 2017-02-22 南京理工大学 BCPWM based phase current reconstruction method and device
US20180278194A1 (en) * 2015-09-30 2018-09-27 Nissan Motor Co., Ltd. Electric power control method and electric power control device
CN108667378A (en) * 2018-05-22 2018-10-16 北京因时机器人科技有限公司 A kind of list resistance dephased current method of sampling and device
CN110855215A (en) * 2018-08-21 2020-02-28 广东威灵汽车部件有限公司 PWM phase shifting method and PWM phase shifting device of permanent magnet motor
CN111740674A (en) * 2020-06-01 2020-10-02 西北工业大学 Three-phase current reconstruction method of motor driving system
CN112994578A (en) * 2021-03-05 2021-06-18 苏州士林电机有限公司 Phase current single-resistor sampling reconstruction optimization method for frequency converter

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014026331A1 (en) * 2012-08-15 2014-02-20 深圳市英威腾电气股份有限公司 Phase current reconstruction method and apparatus
US20180278194A1 (en) * 2015-09-30 2018-09-27 Nissan Motor Co., Ltd. Electric power control method and electric power control device
CN105577062A (en) * 2015-12-31 2016-05-11 美的集团武汉制冷设备有限公司 Single current sensor based three-phase current reconstruction method and device
CN106452261A (en) * 2016-10-19 2017-02-22 南京理工大学 BCPWM based phase current reconstruction method and device
CN108667378A (en) * 2018-05-22 2018-10-16 北京因时机器人科技有限公司 A kind of list resistance dephased current method of sampling and device
CN110855215A (en) * 2018-08-21 2020-02-28 广东威灵汽车部件有限公司 PWM phase shifting method and PWM phase shifting device of permanent magnet motor
CN111740674A (en) * 2020-06-01 2020-10-02 西北工业大学 Three-phase current reconstruction method of motor driving system
CN112994578A (en) * 2021-03-05 2021-06-18 苏州士林电机有限公司 Phase current single-resistor sampling reconstruction optimization method for frequency converter

Similar Documents

Publication Publication Date Title
DE112007000277B4 (en) Control method and apparatus for an electric motor
CN107547027B (en) Single-resistor motor current sampling method
CN108631672B (en) Permanent magnet synchronous motor prediction flux linkage control method considering optimal duty ratio modulation
CN112422002B (en) Robust permanent magnet synchronous motor single current sensor prediction control method
CN109586638B (en) ECM motor current processing system and working method thereof
CN111478637B (en) Motor control method and motor control system
CN111431462A (en) Direct current bus capacitance estimation method and direct current bus capacitance estimation device
AT508854B1 (en) METHOD FOR THE MECHANICALLY SENSORLESS CONTROL OF A THREE-PHASE MACHINE
CN111030528A (en) Multi-ring voltage regulation control method for three-stage brushless synchronous motor
CN111293947B (en) Improved permanent magnet synchronous motor speed sensorless control method
CN113687126A (en) Single-resistor current sampling method and device
CN113285638B (en) Power control method and system for wind driven generator rotor side converter
DE102013202742A1 (en) AC MOTOR CONTROL DEVICE
CN113671241A (en) Frequency multiplication single resistance current sampling method and device thereof
EP1956380B1 (en) Method and related device for estimating two currents flowing simultaneously through respective windings of a poly-phase electrical load driven in SVM mode
DE102013202770A1 (en) CONTROL DEVICE FOR AN ELECTRICITY MOTOR
EP2747273A1 (en) Method and arrangement for torque estimation of a synchronous machine
CN109510548B (en) Double-fed motor flexible power control method and device
CN114123878A (en) Permanent magnet three-phase alternating current motor and load simulation method and device thereof
CN113922720A (en) PMSM model prediction current control algorithm based on duty ratio control
JPH09224399A (en) Control device of induction motor
JP3201457B2 (en) Induction motor flux estimator Input voltage error correction method and induction motor flux estimator
JP3305493B2 (en) Electricity information collection method in case of power system failure
JP4107570B2 (en) Control method of self-excited converter
DE112020003940T5 (en) Engine control device and engine control method

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination