CN113659645A - High-voltage charging and discharging secondary protection circuit - Google Patents
High-voltage charging and discharging secondary protection circuit Download PDFInfo
- Publication number
- CN113659645A CN113659645A CN202110684003.1A CN202110684003A CN113659645A CN 113659645 A CN113659645 A CN 113659645A CN 202110684003 A CN202110684003 A CN 202110684003A CN 113659645 A CN113659645 A CN 113659645A
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- power management
- management chip
- icu3
- chip
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- 238000007599 discharging Methods 0.000 title description 8
- 239000003990 capacitor Substances 0.000 claims abstract description 25
- 101100496158 Arabidopsis thaliana CLF gene Proteins 0.000 claims description 33
- 238000011084 recovery Methods 0.000 abstract description 7
- WHXSMMKQMYFTQS-UHFFFAOYSA-N Lithium Chemical compound [Li] WHXSMMKQMYFTQS-UHFFFAOYSA-N 0.000 abstract description 4
- 229910052744 lithium Inorganic materials 0.000 abstract description 4
- 208000028659 discharge Diseases 0.000 abstract 6
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000010295 mobile communication Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000002035 prolonged effect Effects 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
- H01M10/00—Secondary cells; Manufacture thereof
- H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
- H01M10/425—Structural combination with electronic components, e.g. electronic circuits integrated to the outside of the casing
- H01M10/4257—Smart batteries, e.g. electronic circuits inside the housing of the cells or batteries
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
- H02H7/18—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for batteries; for accumulators
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
- H02J7/00302—Overcharge protection
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0029—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with safety or protection devices or circuits
- H02J7/00306—Overdischarge protection
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0068—Battery or charger load switching, e.g. concurrent charging and load supply
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0069—Charging or discharging for charge maintenance, battery initiation or rejuvenation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01M—PROCESSES OR MEANS, e.g. BATTERIES, FOR THE DIRECT CONVERSION OF CHEMICAL ENERGY INTO ELECTRICAL ENERGY
- H01M10/00—Secondary cells; Manufacture thereof
- H01M10/42—Methods or arrangements for servicing or maintenance of secondary cells or secondary half-cells
- H01M10/425—Structural combination with electronic components, e.g. electronic circuits integrated to the outside of the casing
- H01M2010/4271—Battery management systems including electronic circuits, e.g. control of current or voltage to keep battery in healthy state, cell balancing
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/10—Energy storage using batteries
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Electrochemistry (AREA)
- General Chemical & Material Sciences (AREA)
- Charge And Discharge Circuits For Batteries Or The Like (AREA)
Abstract
The high-voltage charge-discharge secondary protection circuit is characterized in that a 1 st pin of a battery management ICU3 is connected with a 10 th pin of a power management chip U4 through a resistor R4, a 2 nd pin of the battery management ICU3 is connected with an 8 th pin of the power management chip U4, a 3 rd pin of a battery management ICU3 is connected with a 3 rd pin of a power management chip U4, a 4 th pin of the battery management ICU3 is connected with a 5 th pin of a battery management ICU3 through a capacitor C4, a 4 th pin of the battery management ICU3 is also connected with a B-interface, a 5 th pin of a battery management ICU3 is respectively connected with a B + port and a P + port through a resistor R3, and secondary charge protection, secondary discharge recovery and secondary discharge protection current are realized under the premise of primary charge protection, secondary charge recovery, secondary discharge protection and secondary discharge recovery and secondary discharge protection current are realized through a double-battery management IC and a double power management chip U2, thereby more effectively protecting the lithium battery and the external equipment and prolonging the service life of the lithium battery.
Description
Technical Field
The invention belongs to the technical field of circuit structures, and relates to a high-voltage charge-discharge secondary protection circuit.
Background
With the progress of the era, the internet and mobile communication networks provide a huge amount of functional applications. The user can use the mobile terminal to perform traditional applications, such as: answering or dialing a call by using a smart phone; meanwhile, the user can use the mobile terminal to browse the web pages, transmit pictures, play games and the like. Along with the increase of the use frequency of the mobile terminal, the mobile terminal needs to be charged frequently, and in order to avoid safety accidents caused by abnormal charging, a large number of primary protection circuits are provided to prevent overcharge and overdischarge; however, in the case of overcharge and overdischarge, the conventional primary protection circuit (including the overcharge and overdischarge protection circuit) is configured to disconnect the charge circuit or the discharge circuit through a MOS transistor. Once the MOS transistor is broken down or damaged, the protection function of the primary protection circuit against overcharge and overdischarge is disabled, which may cause damage to electronic components of the primary protection circuit, damage to other circuits inside the mobile terminal, and even cause fire.
Disclosure of Invention
In order to achieve the purpose, the invention adopts the following technical scheme:
high pressure charge-discharge secondary protection circuit includes: the system comprises a battery management ICU3, a battery management ICU1, a power management chip U2 and a power management chip U4; the 1 st pin of the battery management ICU3 is connected with the 10 th pin of the power management chip U4 through a resistor R4, the 2 nd pin of the battery management ICU3 is connected with the 8 th pin of the power management chip U4, the 3 rd pin of the battery management ICU3 is connected with the 3 rd pin of the power management chip U4, the 4 th pin of the battery management ICU3 is connected with the 5 th pin of the battery management ICU3 through a capacitor C4, the 4 th pin of the battery management ICU3 is also connected with a B-interface, the 4 th pin of the battery management ICU3 is grounded, the 5 th pin of the battery management ICU3 is respectively connected with a B + port and a P + port through a resistor R3, the 5 th pin of the battery management ICU3 is connected with a BS + port through a series resistor R3 and a resistor R7, and the 6 th pin of the battery management ICU3 is connected with the 1 st pin of the power management chip U4; the 1 st pin of the power management chip U4 is connected with the B-interface through a resistor RS, and the 1 st pin of the power management chip U4 is connected with the 2 nd pin of the power management chip U4, the 4 th pin of the power management chip U4 and the 5 th pin of the power management chip U4 in series; the 5 th pin of the power management chip U4 is connected with the 6 th pin of the power management chip U4 through a capacitor C5 and a capacitor C6, and the 6 th pin of the power management chip U4 is connected with the 7 th pin of the power management chip U4, the 9 th pin of the power management chip U4 and the 10 th pin of the power management chip U4 in series; the 10 th pin of the power management chip U4 is connected with the 1 st pin of the power management chip U2; the 1 st pin of the power management ICU1 is connected with the 10 th pin of the power management chip U2 through a resistor R2, the 2 nd pin of the power management ICU1 is connected with the 8 th pin of the power management chip U2, the 3 rd pin of the power management ICU1 is connected with the 3 rd pin of the power management chip U2, the 3 rd pin of the power management ICU1 is connected with the 3 rd pin of the power management chip U2, the 4 th pin of the power management ICU1 is connected with the 5 th pin of the power management ICU1 through a capacitor C1, the 4 th pin of the power management ICU1 is grounded, the 5 th pin of the power management ICU1 is connected with the 5 th pin of the battery management ICU3 through a resistor R1 series resistor R3, and the 6 th pin of the power management ICU1 is grounded; the 1 st pin of the power management chip U2 is connected in series with the 2 nd pin of the power management chip U2, the 4 th pin of the power management chip U2 and the 5 th pin of the power management chip U2; the 5 th pin of the power management chip U2 is connected with the 6 th pin of the power management chip U2 through a capacitor C5 and a capacitor C6, and the 6 th pin of the power management chip U2 is connected with the 7 th pin of the power management chip U2, the 9 th pin of the power management chip U2 and the 10 th pin of the power management chip U2 in series; the 6 th pin of the power management chip U2 is connected with the BS-port through a resistor R8, and the 10 th pin of the power management chip U2 is connected with the P-port; the 10 th pin of the power management chip U2 is connected with the B + port and the P + port through a series capacitor C8 and a capacitor C7; the 10 th pin of the power management chip U2 is connected to the NTC port through a resistor R5, and the 10 th pin of the power management chip U2 is connected to the ID port through a resistor R6. As a further scheme of the invention: the battery management ICU3 employs a battery management IC model number S-82F1BAH-16T 1U. As a further scheme of the invention: the battery management ICU1 employs a battery management IC model number S-82F1BAG-16T 1U. As a further scheme of the invention: the power management chip U2 and the power management chip U4 both use the model CJ8208 SP.
The invention has the beneficial effects that: the secondary charging protection, the secondary charging recovery, the secondary discharging protection, the secondary discharging recovery and the secondary discharging protection current are realized on the premise of realizing the primary charging protection, the primary charging recovery, the primary discharging protection, the primary discharging recovery and the primary discharging protection current in the form of the double-battery management IC and the double-power-supply management chip U2, so that the lithium battery and external equipment are protected more effectively, and the service life of the lithium battery is prolonged.
Drawings
FIG. 1 is a schematic diagram of the present invention.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it should be understood that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments, and it should be understood that the present application is not limited to the example embodiments disclosed and described herein. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Referring to fig. 1, in an embodiment of the present invention, a high-voltage charge-discharge secondary protection circuit includes: the system comprises a battery management ICU3, a battery management ICU1, a power management chip U2 and a power management chip U4; the 1 st pin of the battery management ICU3 is connected with the 10 th pin of the power management chip U4 through a resistor R4, the 2 nd pin of the battery management ICU3 is connected with the 8 th pin of the power management chip U4, the 3 rd pin of the battery management ICU3 is connected with the 3 rd pin of the power management chip U4, the 4 th pin of the battery management ICU3 is connected with the 5 th pin of the battery management ICU3 through a capacitor C4, the 4 th pin of the battery management ICU3 is also connected with a B-interface, the 4 th pin of the battery management ICU3 is grounded, the 5 th pin of the battery management ICU3 is respectively connected with a B + port and a P + port through a resistor R3, the 5 th pin of the battery management ICU3 is connected with a BS + port through a series resistor R3 and a resistor R7, and the 6 th pin of the battery management ICU3 is connected with the 1 st pin of the power management chip U4; the 1 st pin of the power management chip U4 is connected with the B-interface through a resistor RS, and the 1 st pin of the power management chip U4 is connected with the 2 nd pin of the power management chip U4, the 4 th pin of the power management chip U4 and the 5 th pin of the power management chip U4 in series; the 5 th pin of the power management chip U4 is connected with the 6 th pin of the power management chip U4 through a capacitor C5 and a capacitor C6, and the 6 th pin of the power management chip U4 is connected with the 7 th pin of the power management chip U4, the 9 th pin of the power management chip U4 and the 10 th pin of the power management chip U4 in series; the 10 th pin of the power management chip U4 is connected with the 1 st pin of the power management chip U2; the 1 st pin of the power management ICU1 is connected with the 10 th pin of the power management chip U2 through a resistor R2, the 2 nd pin of the power management ICU1 is connected with the 8 th pin of the power management chip U2, the 3 rd pin of the power management ICU1 is connected with the 3 rd pin of the power management chip U2, the 3 rd pin of the power management ICU1 is connected with the 3 rd pin of the power management chip U2, the 4 th pin of the power management ICU1 is connected with the 5 th pin of the power management ICU1 through a capacitor C1, the 4 th pin of the power management ICU1 is grounded, the 5 th pin of the power management ICU1 is connected with the 5 th pin of the battery management ICU3 through a resistor R1 series resistor R3, and the 6 th pin of the power management ICU1 is grounded; the 1 st pin of the power management chip U2 is connected in series with the 2 nd pin of the power management chip U2, the 4 th pin of the power management chip U2 and the 5 th pin of the power management chip U2; the 5 th pin of the power management chip U2 is connected with the 6 th pin of the power management chip U2 through a capacitor C5 and a capacitor C6, and the 6 th pin of the power management chip U2 is connected with the 7 th pin of the power management chip U2, the 9 th pin of the power management chip U2 and the 10 th pin of the power management chip U2 in series; the 6 th pin of the power management chip U2 is connected with the BS-port through a resistor R8, and the 10 th pin of the power management chip U2 is connected with the P-port; the 10 th pin of the power management chip U2 is connected with the B + port and the P + port through a series capacitor C8 and a capacitor C7; the 10 th pin of the power management chip U2 is connected to the NTC port through a resistor R5, and the 10 th pin of the power management chip U2 is connected to the ID port through a resistor R6. Further, the battery management ICU3 employs a battery management IC model S-82F1BAH-16T 1U. Further, the battery management ICU1 employs a battery management IC model S-82F1BAG-16T 1U. Further, the power management chip U2 and the power management chip U4 both use the power management chip model CJ8208 SP.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (4)
1. High pressure charge-discharge secondary protection circuit, its characterized in that includes: the system comprises a battery management ICU3, a battery management ICU1, a power management chip U2 and a power management chip U4;
the 1 st pin of the battery management ICU3 is connected with the 10 th pin of the power management chip U4 through a resistor R4, the 2 nd pin of the battery management ICU3 is connected with the 8 th pin of the power management chip U4, the 3 rd pin of the battery management ICU3 is connected with the 3 rd pin of the power management chip U4, the 4 th pin of the battery management ICU3 is connected with the 5 th pin of the battery management ICU3 through a capacitor C4, the 4 th pin of the battery management ICU3 is also connected with a B-interface, the 4 th pin of the battery management ICU3 is grounded, the 5 th pin of the battery management ICU3 is respectively connected with a B + port and a P + port through a resistor R3, the 5 th pin of the battery management ICU3 is connected with a BS + port through a series resistor R3 and a resistor R7, and the 6 th pin of the battery management ICU3 is connected with the 1 st pin of the power management chip U4;
the 1 st pin of the power management chip U4 is connected with the B-interface through a resistor RS, and the 1 st pin of the power management chip U4 is connected with the 2 nd pin of the power management chip U4, the 4 th pin of the power management chip U4 and the 5 th pin of the power management chip U4 in series; the 5 th pin of the power management chip U4 is connected with the 6 th pin of the power management chip U4 through a capacitor C5 and a capacitor C6, and the 6 th pin of the power management chip U4 is connected with the 7 th pin of the power management chip U4, the 9 th pin of the power management chip U4 and the 10 th pin of the power management chip U4 in series; the 10 th pin of the power management chip U4 is connected with the 1 st pin of the power management chip U2;
the 1 st pin of the power management ICU1 is connected with the 10 th pin of the power management chip U2 through a resistor R2, the 2 nd pin of the power management ICU1 is connected with the 8 th pin of the power management chip U2, the 3 rd pin of the power management ICU1 is connected with the 3 rd pin of the power management chip U2, the 3 rd pin of the power management ICU1 is connected with the 3 rd pin of the power management chip U2, the 4 th pin of the power management ICU1 is connected with the 5 th pin of the power management ICU1 through a capacitor C1, the 4 th pin of the power management ICU1 is grounded, the 5 th pin of the power management ICU1 is connected with the 5 th pin of the battery management ICU3 through a resistor R1 series resistor R3, and the 6 th pin of the power management ICU1 is grounded;
the 1 st pin of the power management chip U2 is connected in series with the 2 nd pin of the power management chip U2, the 4 th pin of the power management chip U2 and the 5 th pin of the power management chip U2; the 5 th pin of the power management chip U2 is connected with the 6 th pin of the power management chip U2 through a capacitor C5 and a capacitor C6, and the 6 th pin of the power management chip U2 is connected with the 7 th pin of the power management chip U2, the 9 th pin of the power management chip U2 and the 10 th pin of the power management chip U2 in series; the 6 th pin of the power management chip U2 is connected with the BS-port through a resistor R8, and the 10 th pin of the power management chip U2 is connected with the P-port; the 10 th pin of the power management chip U2 is connected with the B + port and the P + port through a series capacitor C8 and a capacitor C7; the 10 th pin of the power management chip U2 is connected to the NTC port through a resistor R5, and the 10 th pin of the power management chip U2 is connected to the ID port through a resistor R6.
2. The high-voltage charge-discharge secondary protection circuit of claim 1, wherein the battery management ICU3 is a battery management IC of type S-82F1BAH-16T 1U.
3. The high-voltage charge-discharge secondary protection circuit of claim 1, wherein the battery management ICU1 is a battery management IC of type S-82F1BAG-16T 1U.
4. The high-voltage charge-discharge secondary protection circuit of claim 1, wherein the power management chip U2 and the power management chip U4 both use the power management chip model CJ8208 SP.
Priority Applications (1)
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CN202110684003.1A CN113659645B (en) | 2021-06-21 | 2021-06-21 | High-voltage charge-discharge secondary protection circuit |
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CN202110684003.1A CN113659645B (en) | 2021-06-21 | 2021-06-21 | High-voltage charge-discharge secondary protection circuit |
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CN113659645B CN113659645B (en) | 2024-05-07 |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN114977361A (en) * | 2022-02-22 | 2022-08-30 | 深圳市磐鼎科技有限公司 | Power supply circuit and panel terminal of dual supply double cell |
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CN201222661Y (en) * | 2008-06-18 | 2009-04-15 | 宁波双林汽车部件股份有限公司 | Lithium battery protection device with zero discharging function during storage period |
CN203747455U (en) * | 2014-01-28 | 2014-07-30 | 广东欧珀移动通信有限公司 | Overvoltage and overcurrent protection circuit and mobile terminal |
CN104810878A (en) * | 2014-01-28 | 2015-07-29 | 广东欧珀移动通信有限公司 | Overvoltage/overcurrent protection circuit and mobile terminal |
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CN105472821A (en) * | 2015-12-18 | 2016-04-06 | 深圳市中孚能电气设备有限公司 | Lamp and mobile power supply circuit thereof |
CN206341015U (en) * | 2017-01-03 | 2017-07-18 | 钛能科技股份有限公司 | A kind of Charge Management manages circuit with supply path |
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CN209169945U (en) * | 2018-12-27 | 2019-07-26 | 北斗天地股份有限公司山东分公司 | A kind of battery and its protection circuit, mine anti-explosion smart phone |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN114977361A (en) * | 2022-02-22 | 2022-08-30 | 深圳市磐鼎科技有限公司 | Power supply circuit and panel terminal of dual supply double cell |
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